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lizzie 2026-04-01 10:10:25 +00:00
parent d9d0a10c03
commit 8c3b3b1faf
1 changed files with 9 additions and 9 deletions
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18
src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_floating_point.cpp
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@ -59,10 +59,10 @@ static void EmitFourOp(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst,
emit(Vresult, Va, Vb, Vc);
}
template<std::size_t bitsize_from, std::size_t bitstd::size_to, typename EmitFn>
template<std::size_t bitsize_from, std::size_t bitsize_to, typename EmitFn>
static void EmitConvert(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst, EmitFn emit) {
auto args = ctx.reg_alloc.GetArgumentInfo(inst);
auto Vto = ctx.reg_alloc.WriteVec<bitstd::size_to>(inst);
auto Vto = ctx.reg_alloc.WriteVec<bitsize_to>(inst);
auto Vfrom = ctx.reg_alloc.ReadVec<bitsize_from>(args[0]);
const auto rounding_mode = static_cast<FP::RoundingMode>(args[1].GetImmediateU8());
RegAlloc::Realize(Vto, Vfrom);
@ -73,10 +73,10 @@ static void EmitConvert(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst
emit(Vto, Vfrom);
}
template<std::size_t bitsize_from, std::size_t bitstd::size_to, bool is_signed>
template<std::size_t bitsize_from, std::size_t bitsize_to, bool is_signed>
static void EmitToFixed(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
auto args = ctx.reg_alloc.GetArgumentInfo(inst);
auto Rto = ctx.reg_alloc.WriteReg<std::max<std::size_t>(bitstd::size_to, 32)>(inst);
auto Rto = ctx.reg_alloc.WriteReg<std::max<std::size_t>(bitsize_to, 32)>(inst);
auto Vfrom = ctx.reg_alloc.ReadVec<bitsize_from>(args[0]);
const std::size_t fbits = args[1].GetImmediateU8();
const auto rounding_mode = static_cast<FP::RoundingMode>(args[2].GetImmediateU8());
@ -85,7 +85,7 @@ static void EmitToFixed(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst*
if (rounding_mode == FP::RoundingMode::TowardsZero) {
if constexpr (is_signed) {
if constexpr (bitstd::size_to == 16) {
if constexpr (bitsize_to == 16) {
code.FCVTZS(Rto, Vfrom, fbits + 16);
code.ASR(Wscratch0, Rto, 31);
code.ADD(Rto, Rto, Wscratch0, LSR, 16); // Round towards zero when truncating
@ -96,7 +96,7 @@ static void EmitToFixed(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst*
code.FCVTZS(Rto, Vfrom);
}
} else {
if constexpr (bitstd::size_to == 16) {
if constexpr (bitsize_to == 16) {
code.FCVTZU(Rto, Vfrom, fbits + 16);
code.LSR(Rto, Rto, 16);
} else if (fbits) {
@ -107,7 +107,7 @@ static void EmitToFixed(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst*
}
} else {
ASSERT(fbits == 0);
ASSERT(bitstd::size_to != 16);
ASSERT(bitsize_to != 16);
if constexpr (is_signed) {
switch (rounding_mode) {
case FP::RoundingMode::ToNearest_TieEven:
@ -158,10 +158,10 @@ static void EmitToFixed(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst*
}
}
template<std::size_t bitsize_from, std::size_t bitstd::size_to, typename EmitFn>
template<std::size_t bitsize_from, std::size_t bitsize_to, typename EmitFn>
static void EmitFromFixed(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst, EmitFn emit) {
auto args = ctx.reg_alloc.GetArgumentInfo(inst);
auto Vto = ctx.reg_alloc.WriteVec<bitstd::size_to>(inst);
auto Vto = ctx.reg_alloc.WriteVec<bitsize_to>(inst);
auto Rfrom = ctx.reg_alloc.ReadReg<std::max<std::size_t>(bitsize_from, 32)>(args[0]);
const std::size_t fbits = args[1].GetImmediateU8();
const auto rounding_mode = static_cast<FP::RoundingMode>(args[2].GetImmediateU8());