From 8c3b3b1fafac9c81a44ae59dc407eb6a4b1eed6b Mon Sep 17 00:00:00 2001 From: lizzie Date: Wed, 1 Apr 2026 10:10:25 +0000 Subject: [PATCH] wa --- .../arm64/emit_arm64_floating_point.cpp | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_floating_point.cpp b/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_floating_point.cpp index eb37f5cdd5..76a83ede93 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_floating_point.cpp +++ b/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_floating_point.cpp @@ -59,10 +59,10 @@ static void EmitFourOp(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst, emit(Vresult, Va, Vb, Vc); } -template +template static void EmitConvert(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); - auto Vto = ctx.reg_alloc.WriteVec(inst); + auto Vto = ctx.reg_alloc.WriteVec(inst); auto Vfrom = ctx.reg_alloc.ReadVec(args[0]); const auto rounding_mode = static_cast(args[1].GetImmediateU8()); RegAlloc::Realize(Vto, Vfrom); @@ -73,10 +73,10 @@ static void EmitConvert(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst emit(Vto, Vfrom); } -template +template static void EmitToFixed(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); - auto Rto = ctx.reg_alloc.WriteReg(bitstd::size_to, 32)>(inst); + auto Rto = ctx.reg_alloc.WriteReg(bitsize_to, 32)>(inst); auto Vfrom = ctx.reg_alloc.ReadVec(args[0]); const std::size_t fbits = args[1].GetImmediateU8(); const auto rounding_mode = static_cast(args[2].GetImmediateU8()); @@ -85,7 +85,7 @@ static void EmitToFixed(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* if (rounding_mode == FP::RoundingMode::TowardsZero) { if constexpr (is_signed) { - if constexpr (bitstd::size_to == 16) { + if constexpr (bitsize_to == 16) { code.FCVTZS(Rto, Vfrom, fbits + 16); code.ASR(Wscratch0, Rto, 31); code.ADD(Rto, Rto, Wscratch0, LSR, 16); // Round towards zero when truncating @@ -96,7 +96,7 @@ static void EmitToFixed(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* code.FCVTZS(Rto, Vfrom); } } else { - if constexpr (bitstd::size_to == 16) { + if constexpr (bitsize_to == 16) { code.FCVTZU(Rto, Vfrom, fbits + 16); code.LSR(Rto, Rto, 16); } else if (fbits) { @@ -107,7 +107,7 @@ static void EmitToFixed(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* } } else { ASSERT(fbits == 0); - ASSERT(bitstd::size_to != 16); + ASSERT(bitsize_to != 16); if constexpr (is_signed) { switch (rounding_mode) { case FP::RoundingMode::ToNearest_TieEven: @@ -158,10 +158,10 @@ static void EmitToFixed(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* } } -template +template static void EmitFromFixed(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); - auto Vto = ctx.reg_alloc.WriteVec(inst); + auto Vto = ctx.reg_alloc.WriteVec(inst); auto Rfrom = ctx.reg_alloc.ReadReg(bitsize_from, 32)>(args[0]); const std::size_t fbits = args[1].GetImmediateU8(); const auto rounding_mode = static_cast(args[2].GetImmediateU8());