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Nadir 8259 PIC driver
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include/pic.h
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58
include/pic.h
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/* Nadir 8259 PIC driver: remap, EOI, IRQ masking.
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*
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* Runs in 64-bit long mode at Ring 0 (CPL 0) with the stage-2 GDT.
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* Privileged instructions: `outb`/`inb` (via io.h) trap with #GP(0)
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* when CPL > IOPL, so every entry point below is Ring 0 only.
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* Fault behavior: no CPU fault is possible beyond a programming bug;
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* a wrong sequence masks the wrong IRQ or loses an EOI (hung line),
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* never a triple fault by itself. IF stays cleared by the caller;
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* this driver never executes `sti`/`cli`.
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*/
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#ifndef NADIR_PIC_H
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#define NADIR_PIC_H
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#include <stdint.h>
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/* Command/data ports for the master (PIC1) and slave (PIC2). */
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#define PIC1_CMD 0x20U
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#define PIC1_DATA 0x21U
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#define PIC2_CMD 0xA0U
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#define PIC2_DATA 0xA1U
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/* End-of-interrupt command byte. */
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#define PIC_EOI 0x20U
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/* Remapped vector bases: IRQ 0-7 -> vectors 32-39, IRQ 8-15 -> 40-47. */
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#define PIC_IRQ0_VECTOR 0x20U
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#define PIC_IRQ8_VECTOR 0x28U
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/* Number of IRQ lines behind the cascaded 8259 pair. */
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#define PIC_IRQ_COUNT 16U
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/* Remap the cascaded 8259 pair to vectors 32-47 and mask everything.
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* After reset IRQs overlap CPU exceptions 0-15, so without a
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* remap a timer tick looks like a fault. Mask-all leaves each device
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* opt-in via pic_unmask().
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* Preconditions: Ring 0, called once before idt_install_irqs().
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* Failure modes: none. */
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void pic_remap(void);
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/* Signal end-of-interrupt for IRQ line `irq` (0-15).
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* WHY cascade order: the slave must be acked before the master or the
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* master keeps the cascade line busy and IRQ 2 stops firing.
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* Preconditions: Ring 0, `irq` < 16.
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* Failure modes: out-of-range `irq` is ignored. */
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void pic_eoi(uint8_t irq);
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/* Mask (disable) IRQ line `irq` (0-15).
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* Preconditions: Ring 0, `irq` < 16.
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* Failure modes: out-of-range `irq` is ignored. */
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void pic_mask(uint8_t irq);
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/* Unmask (enable) IRQ line `irq` (0-15).
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* Preconditions: Ring 0, `irq` < 16, PIC already remapped.
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* Failure modes: out-of-range `irq` is ignored. */
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void pic_unmask(uint8_t irq);
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#endif /* NADIR_PIC_H */
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