diff --git a/docs/README.md b/docs/README.md index 4ea532be8e..68775f99d8 100644 --- a/docs/README.md +++ b/docs/README.md @@ -16,6 +16,7 @@ This contains documentation created by developers. This contains build instructi - **[Dynarmic](./dynarmic)** - **[Cross compilation](./CrossCompile.md)** - **[Driver Bugs](./DriverBugs.md)** +- **[Building Older Commits](./build/OlderCommits.md)** ## Policies diff --git a/docs/build/OlderCommits.md b/docs/build/OlderCommits.md new file mode 100644 index 0000000000..91e267213e --- /dev/null +++ b/docs/build/OlderCommits.md @@ -0,0 +1,40 @@ +# Building Older Commits + +Bisecting and debugging older versions of Eden can be difficult, as many of our submodules have been deleted or removed. However, work has been done to make this process as simple as possible for users. + +## Script + +Copy the following script and store it in `fix.sh`: + +```sh +#!/bin/sh -e + +git -C externals/discord-rpc checkout 0d8b2d6a37c6e47d62b37caa14708bf747c883bb +git add externals/discord-rpc + +git -C externals/dynarmic checkout 05b7ba50588d1004e23ef91f1bda8be234be68f4 +git add externals/dynarmic + +git -C externals/mbedtls checkout ce4f81f4a926a0e0dcadd0128e016baba416e8ea +git add externals/mbedtls + +git -C externals/oboe checkout e4f06f2143eb0173bf4a2bd15aae5e8cc3179405 +git add externals/oboe + +git -C externals/sirit checkout b870b062998244231a4f08004d3b25151732c5c5 +git add externals/sirit +``` + +Then, run `chmod +x fix.sh` + +## Submodules + +To check out submodules successfully, use this order of operations: + +```sh +git submodule update --init --recursive --depth 1 --jobs 8 --progress +./fix.sh +git submodule update --init --recursive --depth 1 --jobs 8 --progress +``` + +And you should be good to go! If you check out a different commit that changes submodule commits, run the above command list again. diff --git a/externals/CMakeLists.txt b/externals/CMakeLists.txt index 00bdf10a4f..ba0545b7a7 100644 --- a/externals/CMakeLists.txt +++ b/externals/CMakeLists.txt @@ -62,6 +62,12 @@ endif() # unordered_dense AddJsonPackage(unordered-dense) +# httplib +if (IOS) + set(HTTPLIB_USE_BROTLI_IF_AVAILABLE OFF) +endif() +AddJsonPackage(httplib) + if (YUZU_STATIC_ROOM) return() endif() @@ -227,9 +233,6 @@ if (VulkanMemoryAllocator_ADDED) endif() endif() -# httplib -AddJsonPackage(httplib) - # cpp-jwt if (ENABLE_WEB_SERVICE OR ENABLE_UPDATE_CHECKER) AddJsonPackage(cpp-jwt) diff --git a/externals/cpmfile.json b/externals/cpmfile.json index f849426a4d..03303a5896 100644 --- a/externals/cpmfile.json +++ b/externals/cpmfile.json @@ -36,7 +36,8 @@ "0002-fix-zstd.patch" ], "options": [ - "HTTPLIB_REQUIRE_OPENSSL ON" + "HTTPLIB_REQUIRE_OPENSSL ON", + "HTTPLIB_DISABLE_MACOSX_AUTOMATIC_ROOT_CERTIFICATES ON" ] }, "cpp-jwt": { diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt index 600b985609..7df229d9f4 100644 --- a/src/CMakeLists.txt +++ b/src/CMakeLists.txt @@ -8,7 +8,7 @@ include_directories(.) # Dynarmic -if (ARCHITECTURE_x86_64 OR ARCHITECTURE_arm64 AND NOT YUZU_STATIC_ROOM) +if ((ARCHITECTURE_x86_64 OR ARCHITECTURE_arm64 OR ARCHITECTURE_riscv64) AND NOT YUZU_STATIC_ROOM) add_subdirectory(dynarmic) add_library(dynarmic::dynarmic ALIAS dynarmic) endif() diff --git a/src/common/CMakeLists.txt b/src/common/CMakeLists.txt index 98c1688441..2846058df9 100644 --- a/src/common/CMakeLists.txt +++ b/src/common/CMakeLists.txt @@ -146,7 +146,8 @@ add_library( zstd_compression.cpp zstd_compression.h fs/ryujinx_compat.h fs/ryujinx_compat.cpp - fs/symlink.h fs/symlink.cpp) + fs/symlink.h fs/symlink.cpp + httplib.h) if(WIN32) target_sources(common PRIVATE windows/timer_resolution.cpp @@ -244,7 +245,7 @@ else() target_link_libraries(common PUBLIC Boost::headers) endif() -target_link_libraries(common PUBLIC Boost::filesystem Boost::context) +target_link_libraries(common PUBLIC Boost::filesystem Boost::context httplib::httplib) if (lz4_ADDED) target_include_directories(common PRIVATE ${lz4_SOURCE_DIR}/lib) diff --git a/src/common/httplib.h b/src/common/httplib.h new file mode 100644 index 0000000000..57bc4eeb93 --- /dev/null +++ b/src/common/httplib.h @@ -0,0 +1,18 @@ +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project +// SPDX-License-Identifier: GPL-3.0-or-later + +#pragma once + +#define CPPHTTPLIB_DISABLE_MACOSX_AUTOMATIC_ROOT_CERTIFICATES 1 +#define CPPHTTPLIB_OPENSSL_SUPPORT 1 + +#ifdef __GNUC__ +#pragma GCC diagnostic push +#ifndef __clang__ +#pragma GCC diagnostic ignored "-Wmaybe-uninitialized" +#endif +#endif +#include +#ifdef __GNUC__ +#pragma GCC diagnostic pop +#endif diff --git a/src/common/settings.h b/src/common/settings.h index 8cd55bcdd3..2540282790 100644 --- a/src/common/settings.h +++ b/src/common/settings.h @@ -287,8 +287,6 @@ struct Values { true, &use_custom_cpu_ticks}; - SwitchableSetting vtable_bouncing{linkage, true, "vtable_bouncing", Category::Cpu}; - Setting cpuopt_page_tables{linkage, true, "cpuopt_page_tables", Category::CpuDebug}; Setting cpuopt_block_linking{linkage, true, "cpuopt_block_linking", Category::CpuDebug}; Setting cpuopt_return_stack_buffer{linkage, true, "cpuopt_return_stack_buffer", diff --git a/src/core/CMakeLists.txt b/src/core/CMakeLists.txt index 08a2d0e2db..39aebd5f48 100644 --- a/src/core/CMakeLists.txt +++ b/src/core/CMakeLists.txt @@ -1246,7 +1246,7 @@ if (HAS_NCE) target_link_libraries(core PRIVATE merry::oaknut) endif() -if (ARCHITECTURE_x86_64 OR ARCHITECTURE_arm64) +if (ARCHITECTURE_x86_64 OR ARCHITECTURE_arm64 OR ARCHITECTURE_riscv64) target_sources(core PRIVATE arm/dynarmic/arm_dynarmic.h arm/dynarmic/arm_dynarmic_64.cpp @@ -1269,7 +1269,6 @@ endif() target_sources(core PRIVATE hle/service/ssl/ssl_backend_openssl.cpp) target_link_libraries(core PRIVATE OpenSSL::SSL OpenSSL::Crypto) -target_compile_definitions(core PRIVATE CPPHTTPLIB_OPENSSL_SUPPORT) # TODO diff --git a/src/core/arm/dynarmic/dynarmic_cp15.cpp b/src/core/arm/dynarmic/dynarmic_cp15.cpp index 7cb1d58398..28695a1058 100644 --- a/src/core/arm/dynarmic/dynarmic_cp15.cpp +++ b/src/core/arm/dynarmic/dynarmic_cp15.cpp @@ -59,14 +59,10 @@ CallbackOrAccessOneWord DynarmicCP15::CompileSendOneWord(bool two, unsigned opc1 #if defined(_MSC_VER) && defined(ARCHITECTURE_x86_64) _mm_mfence(); _mm_lfence(); -#elif defined(ARCHITECTURE_x86_64) - asm volatile("mfence\n\tlfence\n\t" : : : "memory"); #elif defined(_MSC_VER) && defined(ARCHITECTURE_arm64) _Memory_barrier(); -#elif defined(ARCHITECTURE_arm64) - asm volatile("dsb sy\n\t" : : : "memory"); #else -#error Unsupported architecture + __sync_synchronize(); #endif return 0; }, @@ -78,14 +74,10 @@ CallbackOrAccessOneWord DynarmicCP15::CompileSendOneWord(bool two, unsigned opc1 [](void*, std::uint32_t, std::uint32_t) -> std::uint64_t { #if defined(_MSC_VER) && defined(ARCHITECTURE_x86_64) _mm_mfence(); -#elif defined(ARCHITECTURE_x86_64) - asm volatile("mfence\n\t" : : : "memory"); #elif defined(_MSC_VER) && defined(ARCHITECTURE_arm64) _Memory_barrier(); -#elif defined(ARCHITECTURE_arm64) - asm volatile("dmb sy\n\t" : : : "memory"); #else -#error Unsupported architecture + __sync_synchronize(); #endif return 0; }, diff --git a/src/core/hle/kernel/physical_core.cpp b/src/core/hle/kernel/physical_core.cpp index 77cdab76d7..e4aff43d82 100644 --- a/src/core/hle/kernel/physical_core.cpp +++ b/src/core/hle/kernel/physical_core.cpp @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later // SPDX-FileCopyrightText: Copyright 2020 yuzu Emulator Project @@ -103,26 +103,12 @@ void PhysicalCore::RunThread(Kernel::KThread* thread) { const bool data_abort = True(hr & Core::HaltReason::DataAbort); const bool interrupt = True(hr & Core::HaltReason::BreakLoop); - bool may_abort = true; // Ignore aborting virtual functions (for debugging) - if (prefetch_abort && ::Settings::values.vtable_bouncing) { - auto& lock = m_kernel.GlobalSchedulerContext().SchedulerLock(); - lock.Lock(); - Kernel::Svc::ThreadContext ctx; - interface->GetContext(ctx); - LOG_WARNING(Core_ARM, "vtable bouncing {:016X}", ctx.lr); - ctx.pc = ctx.lr; - ctx.r[0] = 0; - interface->SetContext(ctx); - lock.Unlock(); - may_abort = false; - } - // Since scheduling may occur here, we cannot use any cached // state after returning from calls we make. // Notify the debugger and go to sleep if a breakpoint was hit, // or if the thread is unable to continue for any reason. - if (breakpoint || (prefetch_abort && may_abort)) { + if (breakpoint || prefetch_abort) { if (breakpoint) { interface->RewindBreakpointInstruction(); } diff --git a/src/core/hle/service/bcat/news/builtin_news.cpp b/src/core/hle/service/bcat/news/builtin_news.cpp index ed001b056b..d24431cdbc 100644 --- a/src/core/hle/service/bcat/news/builtin_news.cpp +++ b/src/core/hle/service/bcat/news/builtin_news.cpp @@ -15,9 +15,7 @@ #include #include -#ifdef CPPHTTPLIB_OPENSSL_SUPPORT -#include -#endif +#include "common/httplib.h" #include #include @@ -103,8 +101,6 @@ std::vector TryLoadFromDisk(const std::filesystem::path& path) { std::vector DownloadImage(const std::string& url_path, const std::filesystem::path& cache_path) { LOG_INFO(Service_BCAT, "Downloading image: https://eden-emu.dev{}", url_path); - -#ifdef CPPHTTPLIB_OPENSSL_SUPPORT try { httplib::Client cli("https://eden-emu.dev"); cli.set_follow_location(true); @@ -128,8 +124,6 @@ std::vector DownloadImage(const std::string& url_path, const std::filesystem } catch (...) { LOG_WARNING(Service_BCAT, "Failed to download: {}", url_path); } -#endif - return {}; } @@ -232,8 +226,6 @@ void WriteCachedJson(std::string_view json) { } std::optional DownloadReleasesJson() { - -#ifdef CPPHTTPLIB_OPENSSL_SUPPORT try { httplib::SSLClient cli{"api.github.com", 443}; cli.set_connection_timeout(10); @@ -255,7 +247,6 @@ std::optional DownloadReleasesJson() { } catch (...) { LOG_WARNING(Service_BCAT, " failed to download releases"); } -#endif return std::nullopt; } diff --git a/src/dynarmic/CMakeLists.txt b/src/dynarmic/CMakeLists.txt index dd1def5273..4c4bf86d3e 100644 --- a/src/dynarmic/CMakeLists.txt +++ b/src/dynarmic/CMakeLists.txt @@ -126,7 +126,7 @@ if ("arm64" IN_LIST ARCHITECTURE OR DYNARMIC_TESTS) find_package(oaknut 2.0.1 CONFIG) endif() -if ("riscv" IN_LIST ARCHITECTURE) +if ("riscv64" IN_LIST ARCHITECTURE) find_package(biscuit 0.9.1 REQUIRED) endif() diff --git a/src/dynarmic/src/dynarmic/CMakeLists.txt b/src/dynarmic/src/dynarmic/CMakeLists.txt index f79d18c15a..c51a660c03 100644 --- a/src/dynarmic/src/dynarmic/CMakeLists.txt +++ b/src/dynarmic/src/dynarmic/CMakeLists.txt @@ -13,10 +13,7 @@ add_library(dynarmic STATIC backend/block_range_information.h backend/exception_handler.h common/always_false.h - common/assert.cpp - common/assert.h common/cast_util.h - common/common_types.h common/crypto/aes.cpp common/crypto/aes.h common/crypto/crc32.cpp @@ -258,7 +255,7 @@ if ("arm64" IN_LIST ARCHITECTURE) ) endif() -if ("riscv" IN_LIST ARCHITECTURE) +if ("riscv64" IN_LIST ARCHITECTURE) target_link_libraries(dynarmic PRIVATE biscuit::biscuit) target_sources(dynarmic PRIVATE @@ -281,6 +278,7 @@ if ("riscv" IN_LIST ARCHITECTURE) backend/riscv64/emit_riscv64_vector.cpp backend/riscv64/emit_riscv64.cpp backend/riscv64/emit_riscv64.h + backend/riscv64/exclusive_monitor.cpp backend/riscv64/reg_alloc.cpp backend/riscv64/reg_alloc.h backend/riscv64/stack_layout.h @@ -289,9 +287,12 @@ if ("riscv" IN_LIST ARCHITECTURE) backend/riscv64/a32_address_space.h backend/riscv64/a32_core.h backend/riscv64/a32_interface.cpp + backend/riscv64/a64_interface.cpp backend/riscv64/code_block.h + + common/spin_lock_riscv64.cpp ) - message(FATAL_ERROR "TODO: Unimplemented frontend for this host architecture") + message(WARNING "TODO: Incomplete frontend for this host architecture") endif() if (WIN32) @@ -359,7 +360,7 @@ set_target_properties(dynarmic PROPERTIES target_compile_options(dynarmic PRIVATE ${DYNARMIC_CXX_FLAGS}) target_link_libraries(dynarmic PRIVATE unordered_dense::unordered_dense) -target_link_libraries(dynarmic PUBLIC fmt::fmt) +target_link_libraries(dynarmic PUBLIC fmt::fmt common) if (BOOST_NO_HEADERS) target_link_libraries(dynarmic PRIVATE Boost::variant Boost::icl Boost::pool) diff --git a/src/dynarmic/src/dynarmic/backend/arm64/a32_address_space.cpp b/src/dynarmic/src/dynarmic/backend/arm64/a32_address_space.cpp index 274e553cd8..da51220e9c 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/a32_address_space.cpp +++ b/src/dynarmic/src/dynarmic/backend/arm64/a32_address_space.cpp @@ -227,7 +227,7 @@ void A32AddressSpace::EmitPrelude() { if (conf.HasOptimization(OptimizationFlag::ReturnStackBuffer)) { code.LDR(Xscratch0, l_return_to_dispatcher); - for (size_t i = 0; i < RSBCount; i++) { + for (std::size_t i = 0; i < RSBCount; i++) { code.STR(Xscratch0, SP, offsetof(StackLayout, rsb) + offsetof(RSBEntry, code_ptr) + i * sizeof(RSBEntry)); } } @@ -266,7 +266,7 @@ void A32AddressSpace::EmitPrelude() { if (conf.HasOptimization(OptimizationFlag::ReturnStackBuffer)) { code.LDR(Xscratch0, l_return_to_dispatcher); - for (size_t i = 0; i < RSBCount; i++) { + for (std::size_t i = 0; i < RSBCount; i++) { code.STR(Xscratch0, SP, offsetof(StackLayout, rsb) + offsetof(RSBEntry, code_ptr) + i * sizeof(RSBEntry)); } } diff --git a/src/dynarmic/src/dynarmic/backend/arm64/a32_interface.cpp b/src/dynarmic/src/dynarmic/backend/arm64/a32_interface.cpp index d16a34275b..904806c719 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/a32_interface.cpp +++ b/src/dynarmic/src/dynarmic/backend/arm64/a32_interface.cpp @@ -10,8 +10,8 @@ #include #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/common_types.h" +#include "common/assert.h" +#include "common/common_types.h" #include "dynarmic/backend/arm64/a32_address_space.h" #include "dynarmic/backend/arm64/a32_core.h" diff --git a/src/dynarmic/src/dynarmic/backend/arm64/a32_jitstate.cpp b/src/dynarmic/src/dynarmic/backend/arm64/a32_jitstate.cpp index 0ce51d0e17..dd8a561ccb 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/a32_jitstate.cpp +++ b/src/dynarmic/src/dynarmic/backend/arm64/a32_jitstate.cpp @@ -9,7 +9,7 @@ #include "dynarmic/backend/arm64/a32_jitstate.h" #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" namespace Dynarmic::Backend::Arm64 { diff --git a/src/dynarmic/src/dynarmic/backend/arm64/a32_jitstate.h b/src/dynarmic/src/dynarmic/backend/arm64/a32_jitstate.h index b4fee9a4d0..26513133e3 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/a32_jitstate.h +++ b/src/dynarmic/src/dynarmic/backend/arm64/a32_jitstate.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -10,7 +10,7 @@ #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/frontend/A32/a32_location_descriptor.h" #include "dynarmic/ir/location_descriptor.h" diff --git a/src/dynarmic/src/dynarmic/backend/arm64/a64_address_space.cpp b/src/dynarmic/src/dynarmic/backend/arm64/a64_address_space.cpp index a5a8306a6d..2c71ffe282 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/a64_address_space.cpp +++ b/src/dynarmic/src/dynarmic/backend/arm64/a64_address_space.cpp @@ -403,7 +403,7 @@ void A64AddressSpace::EmitPrelude() { if (conf.HasOptimization(OptimizationFlag::ReturnStackBuffer)) { code.LDR(Xscratch0, l_return_to_dispatcher); - for (size_t i = 0; i < RSBCount; i++) { + for (std::size_t i = 0; i < RSBCount; i++) { code.STR(Xscratch0, SP, offsetof(StackLayout, rsb) + offsetof(RSBEntry, code_ptr) + i * sizeof(RSBEntry)); } } @@ -441,7 +441,7 @@ void A64AddressSpace::EmitPrelude() { if (conf.HasOptimization(OptimizationFlag::ReturnStackBuffer)) { code.LDR(Xscratch0, l_return_to_dispatcher); - for (size_t i = 0; i < RSBCount; i++) { + for (std::size_t i = 0; i < RSBCount; i++) { code.STR(Xscratch0, SP, offsetof(StackLayout, rsb) + offsetof(RSBEntry, code_ptr) + i * sizeof(RSBEntry)); } } diff --git a/src/dynarmic/src/dynarmic/backend/arm64/a64_interface.cpp b/src/dynarmic/src/dynarmic/backend/arm64/a64_interface.cpp index b230f455c5..c1c589162c 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/a64_interface.cpp +++ b/src/dynarmic/src/dynarmic/backend/arm64/a64_interface.cpp @@ -10,8 +10,8 @@ #include #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/common_types.h" +#include "common/assert.h" +#include "common/common_types.h" #include "dynarmic/backend/arm64/a64_address_space.h" #include "dynarmic/backend/arm64/a64_core.h" diff --git a/src/dynarmic/src/dynarmic/backend/arm64/a64_jitstate.h b/src/dynarmic/src/dynarmic/backend/arm64/a64_jitstate.h index 3dd422b6d4..29bc001f2c 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/a64_jitstate.h +++ b/src/dynarmic/src/dynarmic/backend/arm64/a64_jitstate.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -10,7 +10,7 @@ #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/frontend/A64/a64_location_descriptor.h" diff --git a/src/dynarmic/src/dynarmic/backend/arm64/abi.cpp b/src/dynarmic/src/dynarmic/backend/arm64/abi.cpp index acff6a89f0..3e47c4bf1c 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/abi.cpp +++ b/src/dynarmic/src/dynarmic/backend/arm64/abi.cpp @@ -11,22 +11,22 @@ #include #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include namespace Dynarmic::Backend::Arm64 { using namespace oaknut::util; -static constexpr size_t gpr_size = 8; -static constexpr size_t fpr_size = 16; +static constexpr std::size_t gpr_size = 8; +static constexpr std::size_t fpr_size = 16; struct FrameInfo { std::vector gprs; std::vector fprs; - size_t frame_size; - size_t gprs_size; - size_t fprs_size; + std::size_t frame_size; + std::size_t gprs_size; + std::size_t fprs_size; }; static std::vector ListToIndexes(u32 list) { @@ -39,15 +39,15 @@ static std::vector ListToIndexes(u32 list) { return indexes; } -static FrameInfo CalculateFrameInfo(RegisterList rl, size_t frame_size) { +static FrameInfo CalculateFrameInfo(RegisterList rl, std::size_t frame_size) { const auto gprs = ListToIndexes(static_cast(rl)); const auto fprs = ListToIndexes(static_cast(rl >> 32)); - const size_t num_gprs = gprs.size(); - const size_t num_fprs = fprs.size(); + const std::size_t num_gprs = gprs.size(); + const std::size_t num_fprs = fprs.size(); - const size_t gprs_size = (num_gprs + 1) / 2 * 16; - const size_t fprs_size = num_fprs * 16; + const std::size_t gprs_size = (num_gprs + 1) / 2 * 16; + const std::size_t fprs_size = num_fprs * 16; return { gprs, @@ -60,16 +60,16 @@ static FrameInfo CalculateFrameInfo(RegisterList rl, size_t frame_size) { #define DO_IT(TYPE, REG_TYPE, PAIR_OP, SINGLE_OP, OFFSET) \ if (frame_info.TYPE##s.size() > 0) { \ - for (size_t i = 0; i < frame_info.TYPE##s.size() - 1; i += 2) { \ + for (std::size_t i = 0; i < frame_info.TYPE##s.size() - 1; i += 2) { \ code.PAIR_OP(oaknut::REG_TYPE{frame_info.TYPE##s[i]}, oaknut::REG_TYPE{frame_info.TYPE##s[i + 1]}, SP, (OFFSET) + i * TYPE##_size); \ } \ if (frame_info.TYPE##s.size() % 2 == 1) { \ - const size_t i = frame_info.TYPE##s.size() - 1; \ + const std::size_t i = frame_info.TYPE##s.size() - 1; \ code.SINGLE_OP(oaknut::REG_TYPE{frame_info.TYPE##s[i]}, SP, (OFFSET) + i * TYPE##_size); \ } \ } -void ABI_PushRegisters(oaknut::CodeGenerator& code, RegisterList rl, size_t frame_size) { +void ABI_PushRegisters(oaknut::CodeGenerator& code, RegisterList rl, std::size_t frame_size) { const FrameInfo frame_info = CalculateFrameInfo(rl, frame_size); code.SUB(SP, SP, frame_info.gprs_size + frame_info.fprs_size); @@ -80,7 +80,7 @@ void ABI_PushRegisters(oaknut::CodeGenerator& code, RegisterList rl, size_t fram code.SUB(SP, SP, frame_info.frame_size); } -void ABI_PopRegisters(oaknut::CodeGenerator& code, RegisterList rl, size_t frame_size) { +void ABI_PopRegisters(oaknut::CodeGenerator& code, RegisterList rl, std::size_t frame_size) { const FrameInfo frame_info = CalculateFrameInfo(rl, frame_size); code.ADD(SP, SP, frame_info.frame_size); diff --git a/src/dynarmic/src/dynarmic/backend/arm64/abi.h b/src/dynarmic/src/dynarmic/backend/arm64/abi.h index b2e29d49e0..e22d7be346 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/abi.h +++ b/src/dynarmic/src/dynarmic/backend/arm64/abi.h @@ -9,14 +9,11 @@ #pragma once #include -#include -#include -#include "dynarmic/common/common_types.h" -#include "dynarmic/common/assert.h" +#include "common/common_types.h" +#include "common/assert.h" #include -#include "dynarmic/common/always_false.h" namespace Dynarmic::Backend::Arm64 { @@ -29,7 +26,7 @@ constexpr oaknut::XReg Xpagetable{24}; constexpr oaknut::XReg Xscratch0{16}, Xscratch1{17}, Xscratch2{30}; constexpr oaknut::WReg Wscratch0{16}, Wscratch1{17}, Wscratch2{30}; -template +template constexpr auto Rscratch0() { if constexpr (bitsize == 32) { return Wscratch0; @@ -40,7 +37,7 @@ constexpr auto Rscratch0() { } } -template +template constexpr auto Rscratch1() { if constexpr (bitsize == 32) { return Wscratch1; @@ -70,7 +67,7 @@ constexpr RegisterList ToRegList(oaknut::Reg reg) { constexpr RegisterList ABI_CALLEE_SAVE = 0x0000ff00'7ff80000; constexpr RegisterList ABI_CALLER_SAVE = 0xffffffff'4000ffff; -void ABI_PushRegisters(oaknut::CodeGenerator& code, RegisterList rl, size_t stack_space); -void ABI_PopRegisters(oaknut::CodeGenerator& code, RegisterList rl, size_t stack_space); +void ABI_PushRegisters(oaknut::CodeGenerator& code, RegisterList rl, std::size_t stack_space); +void ABI_PopRegisters(oaknut::CodeGenerator& code, RegisterList rl, std::size_t stack_space); } // namespace Dynarmic::Backend::Arm64 diff --git a/src/dynarmic/src/dynarmic/backend/arm64/address_space.cpp b/src/dynarmic/src/dynarmic/backend/arm64/address_space.cpp index 6b59871b0a..aa36119830 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/address_space.cpp +++ b/src/dynarmic/src/dynarmic/backend/arm64/address_space.cpp @@ -24,7 +24,7 @@ namespace Dynarmic::Backend::Arm64 { -AddressSpace::AddressSpace(size_t code_cache_size) +AddressSpace::AddressSpace(std::size_t code_cache_size) : ir_block{IR::LocationDescriptor{0}} , code_cache_size(code_cache_size) , mem(code_cache_size) @@ -102,8 +102,8 @@ void AddressSpace::ClearCache() { code.set_offset(prelude_info.end_of_prelude); } -size_t AddressSpace::GetRemainingSize() { - return code_cache_size - static_cast(code.offset()); +std::size_t AddressSpace::GetRemainingSize() { + return code_cache_size - static_cast(code.offset()); } EmittedBlockInfo AddressSpace::Emit(IR::Block block) { diff --git a/src/dynarmic/src/dynarmic/backend/arm64/address_space.h b/src/dynarmic/src/dynarmic/backend/arm64/address_space.h index 9fe9595c65..fba199aefb 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/address_space.h +++ b/src/dynarmic/src/dynarmic/backend/arm64/address_space.h @@ -11,7 +11,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include #include #include @@ -26,7 +26,7 @@ namespace Dynarmic::Backend::Arm64 { class AddressSpace { public: - explicit AddressSpace(size_t code_cache_size); + explicit AddressSpace(std::size_t code_cache_size); virtual ~AddressSpace(); virtual void GenerateIR(IR::Block& ir_block, IR::LocationDescriptor) const = 0; @@ -60,7 +60,7 @@ protected: #endif } - size_t GetRemainingSize(); + std::size_t GetRemainingSize(); EmittedBlockInfo Emit(IR::Block ir_block); void Link(EmittedBlockInfo& block); void LinkBlockLinks(const CodePtr entry_point, const CodePtr target_ptr, const std::vector& block_relocations_list); @@ -69,7 +69,7 @@ protected: FakeCall FastmemCallback(u64 host_pc); IR::Block ir_block; - const size_t code_cache_size; + const std::size_t code_cache_size; oaknut::CodeBlock mem; oaknut::CodeGenerator code; diff --git a/src/dynarmic/src/dynarmic/backend/arm64/devirtualize.h b/src/dynarmic/src/dynarmic/backend/arm64/devirtualize.h index 737a6572e3..e1fd66b8f1 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/devirtualize.h +++ b/src/dynarmic/src/dynarmic/backend/arm64/devirtualize.h @@ -9,7 +9,7 @@ #pragma once #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/mcl/function_info.hpp" namespace Dynarmic::Backend::Arm64 { diff --git a/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64.cpp b/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64.cpp index 104d0a452c..0330a9890c 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64.cpp +++ b/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64.cpp @@ -176,7 +176,7 @@ void EmitIR(oaknut::CodeGenerator&, EmitContext ctx.reg_alloc.DefineAsExisting(inst, args[0]); } -static void EmitAddCycles(oaknut::CodeGenerator& code, EmitContext& ctx, size_t cycles_to_add) { +static void EmitAddCycles(oaknut::CodeGenerator& code, EmitContext& ctx, std::size_t cycles_to_add) { if (!ctx.conf.enable_cycle_counting) { return; } diff --git a/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64.h b/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64.h index e58f93c4e5..fefbcd8f5a 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64.h +++ b/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -13,7 +13,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include #include "dynarmic/backend/arm64/fastmem.h" @@ -103,7 +103,7 @@ struct BlockRelocation { struct EmittedBlockInfo { CodePtr entry_point; - size_t size; + std::size_t size; std::vector relocations; ankerl::unordered_dense::map> block_relocations; ankerl::unordered_dense::map fastmem_patch_info; @@ -127,9 +127,9 @@ struct EmitConfig { // Page table u64 page_table_pointer; - size_t page_table_address_space_bits; + std::size_t page_table_address_space_bits; int page_table_pointer_mask_bits; - size_t page_table_log2_stride; + std::size_t page_table_log2_stride; bool silently_mirror_page_table; bool absolute_offset_page_table; u8 detect_misaligned_access_via_page_table; @@ -138,7 +138,7 @@ struct EmitConfig { // Fastmem std::optional fastmem_pointer; bool recompile_on_fastmem_failure; - size_t fastmem_address_space_bits; + std::size_t fastmem_address_space_bits; bool silently_mirror_fastmem; // Timing @@ -156,9 +156,9 @@ struct EmitConfig { void (*emit_check_memory_abort)(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst, oaknut::Label& end); // State offsets - size_t state_nzcv_offset; - size_t state_fpsr_offset; - size_t state_exclusive_state_offset; + std::size_t state_nzcv_offset; + std::size_t state_fpsr_offset; + std::size_t state_exclusive_state_offset; // A32 specific std::array, 16> coprocessors{}; diff --git a/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_a32_coprocessor.cpp b/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_a32_coprocessor.cpp index 259e161479..8979ce34f0 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_a32_coprocessor.cpp +++ b/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_a32_coprocessor.cpp @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -45,7 +45,7 @@ static void CallCoprocCallback(oaknut::CodeGenerator& code, EmitContext& ctx, A3 template<> void EmitIR(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { const auto coproc_info = inst->GetArg(0).GetCoprocInfo(); - const size_t coproc_num = coproc_info[0]; + const std::size_t coproc_num = coproc_info[0]; const bool two = coproc_info[1] != 0; const auto opc1 = static_cast(coproc_info[2]); const auto CRd = static_cast(coproc_info[3]); @@ -72,7 +72,7 @@ template<> void EmitIR(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); const auto coproc_info = inst->GetArg(0).GetCoprocInfo(); - const size_t coproc_num = coproc_info[0]; + const std::size_t coproc_num = coproc_info[0]; const bool two = coproc_info[1] != 0; const auto opc1 = static_cast(coproc_info[2]); const auto CRn = static_cast(coproc_info[3]); @@ -115,7 +115,7 @@ void EmitIR(oaknut::CodeGenerator& code, Emit auto args = ctx.reg_alloc.GetArgumentInfo(inst); const auto coproc_info = inst->GetArg(0).GetCoprocInfo(); - const size_t coproc_num = coproc_info[0]; + const std::size_t coproc_num = coproc_info[0]; const bool two = coproc_info[1] != 0; const auto opc = static_cast(coproc_info[2]); const auto CRm = static_cast(coproc_info[3]); @@ -158,7 +158,7 @@ template<> void EmitIR(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { const auto coproc_info = inst->GetArg(0).GetCoprocInfo(); - const size_t coproc_num = coproc_info[0]; + const std::size_t coproc_num = coproc_info[0]; const bool two = coproc_info[1] != 0; const auto opc1 = static_cast(coproc_info[2]); const auto CRn = static_cast(coproc_info[3]); @@ -199,7 +199,7 @@ void EmitIR(oaknut::CodeGenerator& code, EmitCo template<> void EmitIR(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { const auto coproc_info = inst->GetArg(0).GetCoprocInfo(); - const size_t coproc_num = coproc_info[0]; + const std::size_t coproc_num = coproc_info[0]; const bool two = coproc_info[1] != 0; const unsigned opc = coproc_info[2]; const auto CRm = static_cast(coproc_info[3]); @@ -243,7 +243,7 @@ void EmitIR(oaknut::CodeGenerator& code, EmitCon auto args = ctx.reg_alloc.GetArgumentInfo(inst); const auto coproc_info = inst->GetArg(0).GetCoprocInfo(); - const size_t coproc_num = coproc_info[0]; + const std::size_t coproc_num = coproc_info[0]; const bool two = coproc_info[1] != 0; const bool long_transfer = coproc_info[2] != 0; const auto CRd = static_cast(coproc_info[3]); @@ -274,7 +274,7 @@ void EmitIR(oaknut::CodeGenerator& code, EmitCo auto args = ctx.reg_alloc.GetArgumentInfo(inst); const auto coproc_info = inst->GetArg(0).GetCoprocInfo(); - const size_t coproc_num = coproc_info[0]; + const std::size_t coproc_num = coproc_info[0]; const bool two = coproc_info[1] != 0; const bool long_transfer = coproc_info[2] != 0; const auto CRd = static_cast(coproc_info[3]); diff --git a/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_cryptography.cpp b/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_cryptography.cpp index 5366a250c9..212e273984 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_cryptography.cpp +++ b/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_cryptography.cpp @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -21,7 +21,7 @@ namespace Dynarmic::Backend::Arm64 { using namespace oaknut::util; -template +template static void EmitCRC(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst, EmitFn emit_fn) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); diff --git a/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_data_processing.cpp b/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_data_processing.cpp index 6e4ce06eb6..98faf60716 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_data_processing.cpp +++ b/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_data_processing.cpp @@ -11,7 +11,6 @@ #include #include -#include "dynarmic/backend/arm64/a32_jitstate.h" #include "dynarmic/backend/arm64/abi.h" #include "dynarmic/backend/arm64/emit_arm64.h" #include "dynarmic/backend/arm64/emit_context.h" @@ -24,7 +23,7 @@ namespace Dynarmic::Backend::Arm64 { using namespace oaknut::util; -template +template static void EmitTwoOp(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); @@ -35,7 +34,7 @@ static void EmitTwoOp(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst, emit(Rresult, Roperand); } -template +template static void EmitThreeOp(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); @@ -868,7 +867,7 @@ void EmitIR(oaknut::CodeGenerator& code, EmitCo [&](auto& Xresult, auto& Xoperand, auto& Xshift) { code.ROR(Xresult, Xoperand, Xshift); }); } -template +template static void MaybeAddSubImm(oaknut::CodeGenerator& code, u64 imm, EmitFn emit_fn) { static_assert(bitsize == 32 || bitsize == 64); if constexpr (bitsize == 32) { @@ -882,7 +881,7 @@ static void MaybeAddSubImm(oaknut::CodeGenerator& code, u64 imm, EmitFn emit_fn) } } -template +template static void EmitAddSub(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { const auto nzcv_inst = inst->GetAssociatedPseudoOperation(IR::Opcode::GetNZCVFromOp); const auto overflow_inst = inst->GetAssociatedPseudoOperation(IR::Opcode::GetOverflowFromOp); @@ -1102,7 +1101,7 @@ void EmitIR(oaknut::CodeGenerator& code, EmitContext& c [&](auto& Xresult, auto& Xa, auto& Xb) { code.SDIV(Xresult, Xa, Xb); }); } -template +template static bool IsValidBitImm(u64 imm) { static_assert(bitsize == 32 || bitsize == 64); if constexpr (bitsize == 32) { @@ -1112,7 +1111,7 @@ static bool IsValidBitImm(u64 imm) { } } -template +template static void MaybeBitImm(oaknut::CodeGenerator& code, u64 imm, EmitFn emit_fn) { static_assert(bitsize == 32 || bitsize == 64); if constexpr (bitsize == 32) { @@ -1126,7 +1125,7 @@ static void MaybeBitImm(oaknut::CodeGenerator& code, u64 imm, EmitFn emit_fn) { } } -template +template static void EmitBitOp(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst, EmitFn1 emit_without_flags, EmitFn2 emit_with_flags = nullptr) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto Rresult = ctx.reg_alloc.WriteReg(inst); @@ -1168,7 +1167,7 @@ static void EmitBitOp(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* i } } -template +template static void EmitAndNot(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { const auto nz_inst = inst->GetAssociatedPseudoOperation(IR::Opcode::GetNZFromOp); const auto nzcv_inst = inst->GetAssociatedPseudoOperation(IR::Opcode::GetNZCVFromOp); diff --git a/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_floating_point.cpp b/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_floating_point.cpp index 0efb6ce787..76a83ede93 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_floating_point.cpp +++ b/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_floating_point.cpp @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -23,7 +23,7 @@ namespace Dynarmic::Backend::Arm64 { using namespace oaknut::util; -template +template static void EmitTwoOp(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto Vresult = ctx.reg_alloc.WriteVec(inst); @@ -34,7 +34,7 @@ static void EmitTwoOp(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst, emit(Vresult, Voperand); } -template +template static void EmitThreeOp(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto Vresult = ctx.reg_alloc.WriteVec(inst); @@ -46,7 +46,7 @@ static void EmitThreeOp(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst emit(Vresult, Va, Vb); } -template +template static void EmitFourOp(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto Vresult = ctx.reg_alloc.WriteVec(inst); @@ -59,7 +59,7 @@ static void EmitFourOp(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst, emit(Vresult, Va, Vb, Vc); } -template +template static void EmitConvert(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto Vto = ctx.reg_alloc.WriteVec(inst); @@ -73,12 +73,12 @@ static void EmitConvert(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst emit(Vto, Vfrom); } -template +template static void EmitToFixed(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); - auto Rto = ctx.reg_alloc.WriteReg(bitsize_to, 32)>(inst); + auto Rto = ctx.reg_alloc.WriteReg(bitsize_to, 32)>(inst); auto Vfrom = ctx.reg_alloc.ReadVec(args[0]); - const size_t fbits = args[1].GetImmediateU8(); + const std::size_t fbits = args[1].GetImmediateU8(); const auto rounding_mode = static_cast(args[2].GetImmediateU8()); RegAlloc::Realize(Rto, Vfrom); ctx.fpsr.Load(); @@ -158,12 +158,12 @@ static void EmitToFixed(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* } } -template +template static void EmitFromFixed(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto Vto = ctx.reg_alloc.WriteVec(inst); - auto Rfrom = ctx.reg_alloc.ReadReg(bitsize_from, 32)>(args[0]); - const size_t fbits = args[1].GetImmediateU8(); + auto Rfrom = ctx.reg_alloc.ReadReg(bitsize_from, 32)>(args[0]); + const std::size_t fbits = args[1].GetImmediateU8(); const auto rounding_mode = static_cast(args[2].GetImmediateU8()); RegAlloc::Realize(Vto, Rfrom); ctx.fpsr.Load(); @@ -212,7 +212,7 @@ void EmitIR(oaknut::CodeGenerator& code, EmitContext& ctx, EmitThreeOp<64>(code, ctx, inst, [&](auto& Dresult, auto& Da, auto& Db) { code.FADD(Dresult, Da, Db); }); } -template +template void EmitCompare(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto flags = ctx.reg_alloc.WriteFlags(inst); diff --git a/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_memory.cpp b/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_memory.cpp index b7ea792a38..143244d60b 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_memory.cpp +++ b/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_memory.cpp @@ -10,6 +10,7 @@ #include #include +#include #include #include @@ -23,7 +24,6 @@ #include "dynarmic/ir/acc_type.h" #include "dynarmic/ir/basic_block.h" #include "dynarmic/ir/microinstruction.h" -#include "dynarmic/ir/opcodes.h" namespace Dynarmic::Backend::Arm64 { @@ -35,7 +35,7 @@ bool IsOrdered(IR::AccType acctype) { return acctype == IR::AccType::ORDERED || acctype == IR::AccType::ORDEREDRW || acctype == IR::AccType::LIMITEDORDERED; } -LinkTarget ReadMemoryLinkTarget(size_t bitsize) { +LinkTarget ReadMemoryLinkTarget(std::size_t bitsize) { switch (bitsize) { case 8: return LinkTarget::ReadMemory8; @@ -51,7 +51,7 @@ LinkTarget ReadMemoryLinkTarget(size_t bitsize) { UNREACHABLE(); } -LinkTarget WriteMemoryLinkTarget(size_t bitsize) { +LinkTarget WriteMemoryLinkTarget(std::size_t bitsize) { switch (bitsize) { case 8: return LinkTarget::WriteMemory8; @@ -67,7 +67,7 @@ LinkTarget WriteMemoryLinkTarget(size_t bitsize) { UNREACHABLE(); } -LinkTarget WrappedReadMemoryLinkTarget(size_t bitsize) { +LinkTarget WrappedReadMemoryLinkTarget(std::size_t bitsize) { switch (bitsize) { case 8: return LinkTarget::WrappedReadMemory8; @@ -83,7 +83,7 @@ LinkTarget WrappedReadMemoryLinkTarget(size_t bitsize) { UNREACHABLE(); } -LinkTarget WrappedWriteMemoryLinkTarget(size_t bitsize) { +LinkTarget WrappedWriteMemoryLinkTarget(std::size_t bitsize) { switch (bitsize) { case 8: return LinkTarget::WrappedWriteMemory8; @@ -99,7 +99,7 @@ LinkTarget WrappedWriteMemoryLinkTarget(size_t bitsize) { UNREACHABLE(); } -LinkTarget ExclusiveReadMemoryLinkTarget(size_t bitsize) { +LinkTarget ExclusiveReadMemoryLinkTarget(std::size_t bitsize) { switch (bitsize) { case 8: return LinkTarget::ExclusiveReadMemory8; @@ -115,7 +115,7 @@ LinkTarget ExclusiveReadMemoryLinkTarget(size_t bitsize) { UNREACHABLE(); } -LinkTarget ExclusiveWriteMemoryLinkTarget(size_t bitsize) { +LinkTarget ExclusiveWriteMemoryLinkTarget(std::size_t bitsize) { switch (bitsize) { case 8: return LinkTarget::ExclusiveWriteMemory8; @@ -131,7 +131,7 @@ LinkTarget ExclusiveWriteMemoryLinkTarget(size_t bitsize) { UNREACHABLE(); } -template +template void CallbackOnlyEmitReadMemory(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); ctx.reg_alloc.PrepareForCall({}, args[1]); @@ -150,7 +150,7 @@ void CallbackOnlyEmitReadMemory(oaknut::CodeGenerator& code, EmitContext& ctx, I } } -template +template void CallbackOnlyEmitExclusiveReadMemory(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); ctx.reg_alloc.PrepareForCall({}, args[1]); @@ -171,7 +171,7 @@ void CallbackOnlyEmitExclusiveReadMemory(oaknut::CodeGenerator& code, EmitContex } } -template +template void CallbackOnlyEmitWriteMemory(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); ctx.reg_alloc.PrepareForCall({}, args[1], args[2]); @@ -186,7 +186,7 @@ void CallbackOnlyEmitWriteMemory(oaknut::CodeGenerator& code, EmitContext& ctx, } } -template +template void CallbackOnlyEmitExclusiveWriteMemory(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); ctx.reg_alloc.PrepareForCall({}, args[1], args[2]); @@ -209,13 +209,13 @@ void CallbackOnlyEmitExclusiveWriteMemory(oaknut::CodeGenerator& code, EmitConte ctx.reg_alloc.DefineAsRegister(inst, X0); } -constexpr size_t page_table_const_bits = 12; -constexpr size_t page_table_const_size = 1 << page_table_const_bits; -constexpr size_t page_table_const_mask = (1 << page_table_const_bits) - 1; +constexpr std::size_t page_table_const_bits = 12; +constexpr std::size_t page_table_const_size = 1 << page_table_const_bits; +constexpr std::size_t page_table_const_mask = (1 << page_table_const_bits) - 1; // This function may use Xscratch0 as a scratch register // Trashes NZCV -template +template void EmitDetectMisalignedVAddr(oaknut::CodeGenerator& code, EmitContext& ctx, oaknut::XReg Xaddr, const SharedLabel& fallback) { static_assert(bitsize == 8 || bitsize == 16 || bitsize == 32 || bitsize == 64 || bitsize == 128); @@ -253,10 +253,10 @@ void EmitDetectMisalignedVAddr(oaknut::CodeGenerator& code, EmitContext& ctx, oa // May use Xscratch1 as scratch register // Address to read/write = [ret0 + ret1], ret0 is always Xscratch0 and ret1 is either Xaddr or Xscratch1 // Trashes NZCV -template +template std::pair InlinePageTableEmitVAddrLookup(oaknut::CodeGenerator& code, EmitContext& ctx, oaknut::XReg Xaddr, const SharedLabel& fallback) { - const size_t valid_page_index_bits = ctx.conf.page_table_address_space_bits - page_table_const_bits; - const size_t unused_top_bits = 64 - ctx.conf.page_table_address_space_bits; + const std::size_t valid_page_index_bits = ctx.conf.page_table_address_space_bits - page_table_const_bits; + const std::size_t unused_top_bits = 64 - ctx.conf.page_table_address_space_bits; EmitDetectMisalignedVAddr(code, ctx, Xaddr, fallback); @@ -408,7 +408,7 @@ CodePtr EmitMemoryStr(oaknut::CodeGenerator& code, int value_idx, oaknut::XReg X return fastmem_location; } -template +template void InlinePageTableEmitReadMemory(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto Xaddr = ctx.reg_alloc.ReadX(args[1]); @@ -448,7 +448,7 @@ void InlinePageTableEmitReadMemory(oaknut::CodeGenerator& code, EmitContext& ctx code.l(*end); } -template +template void InlinePageTableEmitWriteMemory(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto Xaddr = ctx.reg_alloc.ReadX(args[1]); @@ -511,7 +511,7 @@ inline bool ShouldExt32(EmitContext& ctx) { // May use Xscratch0 as scratch register // Address to read/write = [ret0 + ret1], ret0 is always Xfastmem and ret1 is either Xaddr or Xscratch0 // Trashes NZCV -template +template std::pair FastmemEmitVAddrLookup(oaknut::CodeGenerator& code, EmitContext& ctx, oaknut::XReg Xaddr, const SharedLabel& fallback) { if (ctx.conf.fastmem_address_space_bits == 64 || ShouldExt32(ctx)) { return std::make_pair(Xfastmem, Xaddr); @@ -527,7 +527,7 @@ std::pair FastmemEmitVAddrLookup(oaknut::CodeGenerat return std::make_pair(Xfastmem, Xaddr); } -template +template void FastmemEmitReadMemory(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst, DoNotFastmemMarker marker) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto Xaddr = ctx.reg_alloc.ReadX(args[1]); @@ -577,7 +577,7 @@ void FastmemEmitReadMemory(oaknut::CodeGenerator& code, EmitContext& ctx, IR::In code.l(*end); } -template +template void FastmemEmitWriteMemory(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst, DoNotFastmemMarker marker) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto Xaddr = ctx.reg_alloc.ReadX(args[1]); @@ -633,7 +633,7 @@ void FastmemEmitWriteMemory(oaknut::CodeGenerator& code, EmitContext& ctx, IR::I } // namespace -template +template void EmitReadMemory(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { if (const auto marker = ShouldFastmem(ctx, inst)) { FastmemEmitReadMemory(code, ctx, inst, *marker); @@ -644,12 +644,12 @@ void EmitReadMemory(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* ins } } -template +template void EmitExclusiveReadMemory(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { CallbackOnlyEmitExclusiveReadMemory(code, ctx, inst); } -template +template void EmitWriteMemory(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { if (const auto marker = ShouldFastmem(ctx, inst)) { FastmemEmitWriteMemory(code, ctx, inst, *marker); @@ -660,7 +660,7 @@ void EmitWriteMemory(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* in } } -template +template void EmitExclusiveWriteMemory(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { CallbackOnlyEmitExclusiveWriteMemory(code, ctx, inst); } diff --git a/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_memory.h b/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_memory.h index 3c50194689..25608dbfe3 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_memory.h +++ b/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_memory.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -6,7 +6,7 @@ * SPDX-License-Identifier: 0BSD */ -#include "dynarmic/common/common_types.h" +#include namespace oaknut { struct CodeGenerator; @@ -23,13 +23,13 @@ namespace Dynarmic::Backend::Arm64 { struct EmitContext; enum class LinkTarget; -template +template void EmitReadMemory(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst); -template +template void EmitExclusiveReadMemory(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst); -template +template void EmitWriteMemory(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst); -template +template void EmitExclusiveWriteMemory(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst); } // namespace Dynarmic::Backend::Arm64 diff --git a/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_saturation.cpp b/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_saturation.cpp index f9d1e5d619..93bafbf884 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_saturation.cpp +++ b/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_saturation.cpp @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -66,7 +66,7 @@ void EmitIR(oaknut::CodeGenerator& code, EmitConte const auto overflow_inst = inst->GetAssociatedPseudoOperation(IR::Opcode::GetOverflowFromOp); auto args = ctx.reg_alloc.GetArgumentInfo(inst); - const size_t N = args[1].GetImmediateU8(); + const std::size_t N = args[1].GetImmediateU8(); ASSERT(N >= 1 && N <= 32); if (N == 32) { @@ -112,7 +112,7 @@ void EmitIR(oaknut::CodeGenerator& code, EmitCon RegAlloc::Realize(Wresult, Woperand); ctx.reg_alloc.SpillFlags(); - const size_t N = args[1].GetImmediateU8(); + const std::size_t N = args[1].GetImmediateU8(); ASSERT(N <= 31); const u32 saturated_value = (1u << N) - 1; diff --git a/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_vector.cpp b/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_vector.cpp index c773d5a339..6ac8531bfc 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_vector.cpp +++ b/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_vector.cpp @@ -33,7 +33,7 @@ static void EmitTwoOp(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst, emit(Qresult, Qoperand); } -template +template static void EmitTwoOpArranged(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { EmitTwoOp(code, ctx, inst, [&](auto& Qresult, auto& Qoperand) { if constexpr (size == 8) { @@ -50,7 +50,7 @@ static void EmitTwoOpArranged(oaknut::CodeGenerator& code, EmitContext& ctx, IR: }); } -template +template static void EmitTwoOpArrangedSaturated(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { EmitTwoOpArranged(code, ctx, inst, [&](auto Vresult, auto Voperand) { ctx.fpsr.Load(); @@ -58,7 +58,7 @@ static void EmitTwoOpArrangedSaturated(oaknut::CodeGenerator& code, EmitContext& }); } -template +template static void EmitTwoOpArrangedWiden(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { EmitTwoOp(code, ctx, inst, [&](auto& Qresult, auto& Qoperand) { if constexpr (size == 8) { @@ -73,7 +73,7 @@ static void EmitTwoOpArrangedWiden(oaknut::CodeGenerator& code, EmitContext& ctx }); } -template +template static void EmitTwoOpArrangedNarrow(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { EmitTwoOp(code, ctx, inst, [&](auto& Qresult, auto& Qoperand) { if constexpr (size == 16) { @@ -88,7 +88,7 @@ static void EmitTwoOpArrangedNarrow(oaknut::CodeGenerator& code, EmitContext& ct }); } -template +template static void EmitTwoOpArrangedSaturatedNarrow(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { EmitTwoOpArrangedNarrow(code, ctx, inst, [&](auto Vresult, auto Voperand) { ctx.fpsr.Load(); @@ -96,7 +96,7 @@ static void EmitTwoOpArrangedSaturatedNarrow(oaknut::CodeGenerator& code, EmitCo }); } -template +template static void EmitTwoOpArrangedPairWiden(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { EmitTwoOp(code, ctx, inst, [&](auto& Qresult, auto& Qoperand) { if constexpr (size == 8) { @@ -111,7 +111,7 @@ static void EmitTwoOpArrangedPairWiden(oaknut::CodeGenerator& code, EmitContext& }); } -template +template static void EmitTwoOpArrangedLower(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { EmitTwoOp(code, ctx, inst, [&](auto& Qresult, auto& Qoperand) { if constexpr (size == 8) { @@ -137,7 +137,7 @@ static void EmitThreeOp(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst emit(Qresult, Qa, Qb); } -template +template static void EmitThreeOpArranged(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { EmitThreeOp(code, ctx, inst, [&](auto& Qresult, auto& Qa, auto& Qb) { if constexpr (size == 8) { @@ -154,7 +154,7 @@ static void EmitThreeOpArranged(oaknut::CodeGenerator& code, EmitContext& ctx, I }); } -template +template static void EmitThreeOpArrangedSaturated(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { EmitThreeOpArranged(code, ctx, inst, [&](auto Vresult, auto Va, auto Vb) { ctx.fpsr.Load(); @@ -162,7 +162,7 @@ static void EmitThreeOpArrangedSaturated(oaknut::CodeGenerator& code, EmitContex }); } -template +template static void EmitThreeOpArrangedWiden(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { EmitThreeOp(code, ctx, inst, [&](auto& Qresult, auto& Qa, auto& Qb) { if constexpr (size == 8) { @@ -179,7 +179,7 @@ static void EmitThreeOpArrangedWiden(oaknut::CodeGenerator& code, EmitContext& c }); } -template +template static void EmitThreeOpArrangedSaturatedWiden(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { EmitThreeOpArrangedWiden(code, ctx, inst, [&](auto Vresult, auto Va, auto Vb) { ctx.fpsr.Load(); @@ -187,7 +187,7 @@ static void EmitThreeOpArrangedSaturatedWiden(oaknut::CodeGenerator& code, EmitC }); } -template +template static void EmitThreeOpArrangedLower(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { EmitThreeOp(code, ctx, inst, [&](auto& Qresult, auto& Qa, auto& Qb) { if constexpr (size == 8) { @@ -202,7 +202,7 @@ static void EmitThreeOpArrangedLower(oaknut::CodeGenerator& code, EmitContext& c }); } -template +template static void EmitSaturatedAccumulate(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto Qaccumulator = ctx.reg_alloc.ReadWriteQ(args[1], inst); // NB: Swapped @@ -223,7 +223,7 @@ static void EmitSaturatedAccumulate(oaknut::CodeGenerator&, EmitContext& ctx, IR } } -template +template static void EmitImmShift(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto Qresult = ctx.reg_alloc.WriteQ(inst); @@ -244,7 +244,7 @@ static void EmitImmShift(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* ins } } -template +template static void EmitImmShiftSaturated(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { EmitImmShift(code, ctx, inst, [&](auto Vresult, auto Voperand, u8 shift_amount) { ctx.fpsr.Load(); @@ -252,7 +252,7 @@ static void EmitImmShiftSaturated(oaknut::CodeGenerator& code, EmitContext& ctx, }); } -template +template static void EmitReduce(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto Vresult = ctx.reg_alloc.WriteVec(inst); @@ -272,13 +272,13 @@ static void EmitReduce(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst, } } -template +template static void EmitGetElement(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); ASSERT(args[1].IsImmediate()); const u8 index = args[1].GetImmediateU8(); - auto Rresult = ctx.reg_alloc.WriteReg(32, size)>(inst); + auto Rresult = ctx.reg_alloc.WriteReg(32, size)>(inst); auto Qvalue = ctx.reg_alloc.ReadQ(args[0]); RegAlloc::Realize(Rresult, Qvalue); @@ -307,14 +307,14 @@ void EmitIR(oaknut::CodeGenerator& code, EmitCon EmitGetElement<64>(code, ctx, inst, [&](auto& Xresult, auto& Qvalue, u8 index) { code.UMOV(Xresult, Qvalue->Delem()[index]); }); } -template +template static void EmitSetElement(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); ASSERT(args[1].IsImmediate()); const u8 index = args[1].GetImmediateU8(); auto Qvector = ctx.reg_alloc.ReadWriteQ(args[0], inst); - auto Rvalue = ctx.reg_alloc.ReadReg(32, size)>(args[2]); + auto Rvalue = ctx.reg_alloc.ReadReg(32, size)>(args[2]); RegAlloc::Realize(Qvector, Rvalue); // TODO: fpr source @@ -432,11 +432,11 @@ void EmitIR(oaknut::CodeGenerator& code, E EmitThreeOpArranged<64>(code, ctx, inst, [&](auto Vresult, auto Va, auto Vb) { code.SSHL(Vresult, Va, Vb); }); } -template +template static void EmitBroadcast(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto Qvector = ctx.reg_alloc.WriteQ(inst); - auto Rvalue = ctx.reg_alloc.ReadReg(32, size)>(args[0]); + auto Rvalue = ctx.reg_alloc.ReadReg(32, size)>(args[0]); RegAlloc::Realize(Qvector, Rvalue); // TODO: fpr source @@ -479,7 +479,7 @@ void EmitIR(oaknut::CodeGenerator& code, EmitCont EmitBroadcast<64>(code, ctx, inst, [&](auto& Qvector, auto& Xvalue) { code.DUP(Qvector->D2(), Xvalue); }); } -template +template static void EmitBroadcastElement(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto Qvector = ctx.reg_alloc.WriteQ(inst); @@ -1612,17 +1612,17 @@ void EmitIR(oaknut::CodeGenerator& code, EmitCo auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto table = ctx.reg_alloc.GetArgumentInfo(inst->GetArg(1).GetInst()); - const size_t table_size = std::count_if(table.begin(), table.end(), [](const auto& elem) { return !elem.IsVoid(); }); + const std::size_t table_size = std::count_if(table.begin(), table.end(), [](const auto& elem) { return !elem.IsVoid(); }); const bool is_defaults_zero = inst->GetArg(0).IsZero(); auto Dresult = is_defaults_zero ? ctx.reg_alloc.WriteD(inst) : ctx.reg_alloc.ReadWriteD(args[0], inst); auto Dindices = ctx.reg_alloc.ReadD(args[2]); std::vector> Dtable; - for (size_t i = 0; i < table_size; i++) { + for (std::size_t i = 0; i < table_size; i++) { Dtable.emplace_back(ctx.reg_alloc.ReadD(table[i])); } RegAlloc::Realize(Dresult, Dindices); - for (size_t i = 0; i < table_size; i++) { + for (std::size_t i = 0; i < table_size; i++) { RegAlloc::Realize(Dtable[i]); } @@ -1679,17 +1679,17 @@ void EmitIR(oaknut::CodeGenerator& code, EmitC auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto table = ctx.reg_alloc.GetArgumentInfo(inst->GetArg(1).GetInst()); - const size_t table_size = std::count_if(table.begin(), table.end(), [](const auto& elem) { return !elem.IsVoid(); }); + const std::size_t table_size = std::count_if(table.begin(), table.end(), [](const auto& elem) { return !elem.IsVoid(); }); const bool is_defaults_zero = inst->GetArg(0).IsZero(); auto Qresult = is_defaults_zero ? ctx.reg_alloc.WriteQ(inst) : ctx.reg_alloc.ReadWriteQ(args[0], inst); auto Qindices = ctx.reg_alloc.ReadQ(args[2]); std::vector> Qtable; - for (size_t i = 0; i < table_size; i++) { + for (std::size_t i = 0; i < table_size; i++) { Qtable.emplace_back(ctx.reg_alloc.ReadQ(table[i])); } RegAlloc::Realize(Qresult, Qindices); - for (size_t i = 0; i < table_size; i++) { + for (std::size_t i = 0; i < table_size; i++) { RegAlloc::Realize(Qtable[i]); } diff --git a/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_vector_floating_point.cpp b/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_vector_floating_point.cpp index 557d6284ed..cdc64d996e 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_vector_floating_point.cpp +++ b/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_vector_floating_point.cpp @@ -32,7 +32,7 @@ namespace Dynarmic::Backend::Arm64 { using namespace oaknut::util; -using A64FullVectorWidth = std::integral_constant; +using A64FullVectorWidth = std::integral_constant; // Array alias that always sizes itself according to the given type T // relative to the size of a vector register. e.g. T = u32 would result @@ -65,7 +65,7 @@ static void EmitTwoOp(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* i MaybeStandardFPSCRValue(code, ctx, fpcr_controlled, [&] { emit(Qresult, Qa); }); } -template +template static void EmitTwoOpArranged(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { EmitTwoOp(code, ctx, inst, [&](auto& Qresult, auto& Qa) { if constexpr (size == 16) { @@ -93,7 +93,7 @@ static void EmitThreeOp(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* MaybeStandardFPSCRValue(code, ctx, fpcr_controlled, [&] { emit(Qresult, Qa, Qb); }); } -template +template static void EmitThreeOpArranged(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { EmitThreeOp(code, ctx, inst, [&](auto& Qresult, auto& Qa, auto& Qb) { if constexpr (size == 16) { @@ -108,7 +108,7 @@ static void EmitThreeOpArranged(oaknut::CodeGenerator& code, EmitContext& ctx, I }); } -template +template static void EmitFMA(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto Qresult = ctx.reg_alloc.ReadWriteQ(args[0], inst); @@ -131,7 +131,7 @@ static void EmitFMA(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* ins }); } -template +template static void EmitFromFixed(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto Qto = ctx.reg_alloc.WriteQ(inst); @@ -153,12 +153,12 @@ static void EmitFromFixed(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Ins }); } -template +template void EmitToFixed(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto Qto = ctx.reg_alloc.WriteQ(inst); auto Qfrom = ctx.reg_alloc.ReadQ(args[0]); - const size_t fbits = args[1].GetImmediateU8(); + const std::size_t fbits = args[1].GetImmediateU8(); const auto rounding_mode = static_cast(args[2].GetImmediateU8()); const bool fpcr_controlled = inst->GetArg(3).GetU1(); RegAlloc::Realize(Qto, Qfrom); @@ -272,7 +272,7 @@ static void EmitTwoOpFallbackWithoutRegAlloc(oaknut::CodeGenerator& code, EmitCo ABI_PopRegisters(code, ABI_CALLER_SAVE & ~(1ull << Qresult.index()), stack_size); } -template +template static void EmitTwoOpFallback(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst, Lambda lambda) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto Qarg1 = ctx.reg_alloc.ReadQ(args[0]); @@ -562,7 +562,7 @@ void EmitIR(oaknut::CodeGenerator& code, E /// TODO: we have space for a 5th parameter? :) template static void EmitIRVectorRoundInt16Thunk(VectorArray& output, const VectorArray& input, FP::FPCR fpcr, FP::FPSR& fpsr) { - for (size_t i = 0; i < output.size(); ++i) + for (std::size_t i = 0; i < output.size(); ++i) output[i] = FPT(FP::FPRoundInt(input[i], fpcr, rounding_mode, exact, fpsr)); } diff --git a/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_vector_saturation.cpp b/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_vector_saturation.cpp index d63c1d92d0..6137885fe2 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_vector_saturation.cpp +++ b/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_vector_saturation.cpp @@ -23,7 +23,7 @@ namespace Dynarmic::Backend::Arm64 { using namespace oaknut::util; -template +template static void Emit(oaknut::CodeGenerator&, EmitContext& ctx, IR::Inst* inst, EmitFn emit) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto Qresult = ctx.reg_alloc.WriteQ(inst); diff --git a/src/dynarmic/src/dynarmic/backend/arm64/exclusive_monitor.cpp b/src/dynarmic/src/dynarmic/backend/arm64/exclusive_monitor.cpp index b47167bf6f..d9bc9b2395 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/exclusive_monitor.cpp +++ b/src/dynarmic/src/dynarmic/backend/arm64/exclusive_monitor.cpp @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -10,7 +10,7 @@ #include -#include "dynarmic/common/assert.h" +#include "common/assert.h" namespace Dynarmic { @@ -29,7 +29,7 @@ void ExclusiveMonitor::Unlock() { lock.Unlock(); } -bool ExclusiveMonitor::CheckAndClear(size_t processor_id, VAddr address) { +bool ExclusiveMonitor::CheckAndClear(std::size_t processor_id, VAddr address) { const VAddr masked_address = address & RESERVATION_GRANULE_MASK; Lock(); @@ -52,7 +52,7 @@ void ExclusiveMonitor::Clear() { Unlock(); } -void ExclusiveMonitor::ClearProcessor(size_t processor_id) { +void ExclusiveMonitor::ClearProcessor(std::size_t processor_id) { Lock(); exclusive_addresses[processor_id] = INVALID_EXCLUSIVE_ADDRESS; Unlock(); diff --git a/src/dynarmic/src/dynarmic/backend/arm64/fastmem.h b/src/dynarmic/src/dynarmic/backend/arm64/fastmem.h index 8e40e81569..2eae740f20 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/fastmem.h +++ b/src/dynarmic/src/dynarmic/backend/arm64/fastmem.h @@ -13,7 +13,7 @@ #include #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/backend/exception_handler.h" #include "dynarmic/ir/location_descriptor.h" @@ -21,7 +21,7 @@ namespace Dynarmic::Backend::Arm64 { using DoNotFastmemMarker = std::tuple; -constexpr size_t xmrx(size_t x) noexcept { +constexpr std::size_t xmrx(std::size_t x) noexcept { x ^= x >> 32; x *= 0xff51afd7ed558ccd; x ^= mcl::bit::rotate_right(x, 47) ^ mcl::bit::rotate_right(x, 23); @@ -29,7 +29,7 @@ constexpr size_t xmrx(size_t x) noexcept { } struct DoNotFastmemMarkerHash { - [[nodiscard]] size_t operator()(const DoNotFastmemMarker& value) const noexcept { + [[nodiscard]] std::size_t operator()(const DoNotFastmemMarker& value) const noexcept { return xmrx(std::get<0>(value).Value() ^ u64(std::get<1>(value))); } }; diff --git a/src/dynarmic/src/dynarmic/backend/arm64/fpsr_manager.cpp b/src/dynarmic/src/dynarmic/backend/arm64/fpsr_manager.cpp index 1c61474555..41fcb9138e 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/fpsr_manager.cpp +++ b/src/dynarmic/src/dynarmic/backend/arm64/fpsr_manager.cpp @@ -1,3 +1,6 @@ +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project +// SPDX-License-Identifier: GPL-3.0-or-later + /* This file is part of the dynarmic project. * Copyright (c) 2022 MerryMage * SPDX-License-Identifier: 0BSD @@ -13,7 +16,7 @@ namespace Dynarmic::Backend::Arm64 { using namespace oaknut::util; -FpsrManager::FpsrManager(oaknut::CodeGenerator& code, size_t state_fpsr_offset) +FpsrManager::FpsrManager(oaknut::CodeGenerator& code, std::size_t state_fpsr_offset) : code{code}, state_fpsr_offset{state_fpsr_offset} {} void FpsrManager::Spill() { diff --git a/src/dynarmic/src/dynarmic/backend/arm64/fpsr_manager.h b/src/dynarmic/src/dynarmic/backend/arm64/fpsr_manager.h index 3bc5683153..c0aca09bab 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/fpsr_manager.h +++ b/src/dynarmic/src/dynarmic/backend/arm64/fpsr_manager.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -8,7 +8,7 @@ #pragma once -#include "dynarmic/common/common_types.h" +#include namespace oaknut { struct CodeGenerator; @@ -19,7 +19,7 @@ namespace Dynarmic::Backend::Arm64 { class FpsrManager { public: - explicit FpsrManager(oaknut::CodeGenerator& code, size_t state_fpsr_offset); + explicit FpsrManager(oaknut::CodeGenerator& code, std::size_t state_fpsr_offset); void Spill(); void Load(); @@ -29,7 +29,7 @@ public: private: oaknut::CodeGenerator& code; - size_t state_fpsr_offset; + std::size_t state_fpsr_offset; bool fpsr_loaded = false; }; diff --git a/src/dynarmic/src/dynarmic/backend/arm64/reg_alloc.cpp b/src/dynarmic/src/dynarmic/backend/arm64/reg_alloc.cpp index a92648cd44..b7ab55139b 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/reg_alloc.cpp +++ b/src/dynarmic/src/dynarmic/backend/arm64/reg_alloc.cpp @@ -12,10 +12,10 @@ #include #include -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/mcl/bit.hpp" #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/backend/arm64/abi.h" #include "dynarmic/backend/arm64/emit_context.h" @@ -27,8 +27,8 @@ namespace Dynarmic::Backend::Arm64 { using namespace oaknut::util; -constexpr size_t spill_offset = offsetof(StackLayout, spill); -constexpr size_t spill_slot_size = sizeof(decltype(StackLayout::spill)::value_type); +constexpr std::size_t spill_offset = offsetof(StackLayout, spill); +constexpr std::size_t spill_slot_size = sizeof(decltype(StackLayout::spill)::value_type); static bool IsValuelessType(IR::Type type) { switch (type) { @@ -131,7 +131,7 @@ void HostLocInfo::UpdateUses() { RegAlloc::ArgumentInfo RegAlloc::GetArgumentInfo(IR::Inst* inst) { ArgumentInfo ret = {Argument{}, Argument{}, Argument{}, Argument{}}; - for (size_t i = 0; i < inst->NumArgs(); i++) { + for (std::size_t i = 0; i < inst->NumArgs(); i++) { const IR::Value arg = inst->GetArg(i); ret[i].value = arg; if (!arg.IsImmediate() && !IsValuelessType(arg.GetType())) { @@ -245,7 +245,7 @@ void RegAlloc::AssertNoMoreUses() const { void RegAlloc::EmitVerboseDebuggingOutput() { code.MOV(X19, std::bit_cast(&PrintVerboseDebuggingOutputLine)); // Non-volatile register - const auto do_location = [&](HostLocInfo& info, HostLocType type, size_t index) { + const auto do_location = [&](HostLocInfo& info, HostLocType type, std::size_t index) { using namespace oaknut::util; for (const IR::Inst* value : info.values) { code.MOV(X0, SP); @@ -257,14 +257,14 @@ void RegAlloc::EmitVerboseDebuggingOutput() { } }; - for (size_t i = 0; i < gprs.size(); i++) { + for (std::size_t i = 0; i < gprs.size(); i++) { do_location(gprs[i], HostLocType::X, i); } - for (size_t i = 0; i < fprs.size(); i++) { + for (std::size_t i = 0; i < fprs.size(); i++) { do_location(fprs[i], HostLocType::Q, i); } do_location(flags, HostLocType::Nzcv, 0); - for (size_t i = 0; i < spills.size(); i++) { + for (std::size_t i = 0; i < spills.size(); i++) { do_location(spills[i], HostLocType::Spill, i); } } @@ -576,13 +576,13 @@ std::optional RegAlloc::ValueLocation(const IR::Inst* value) const { HostLocInfo& RegAlloc::ValueInfo(HostLoc host_loc) { switch (host_loc.kind) { case HostLoc::Kind::Gpr: - return gprs[static_cast(host_loc.index)]; + return gprs[static_cast(host_loc.index)]; case HostLoc::Kind::Fpr: - return fprs[static_cast(host_loc.index)]; + return fprs[static_cast(host_loc.index)]; case HostLoc::Kind::Flags: return flags; case HostLoc::Kind::Spill: - return spills[static_cast(host_loc.index)]; + return spills[static_cast(host_loc.index)]; } UNREACHABLE(); } diff --git a/src/dynarmic/src/dynarmic/backend/arm64/reg_alloc.h b/src/dynarmic/src/dynarmic/backend/arm64/reg_alloc.h index 22ab5af662..af21cfbc25 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/reg_alloc.h +++ b/src/dynarmic/src/dynarmic/backend/arm64/reg_alloc.h @@ -14,8 +14,8 @@ #include #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/common_types.h" +#include "common/assert.h" +#include "common/common_types.h" #include "dynarmic/mcl/is_instance_of_template.hpp" #include #include @@ -141,11 +141,11 @@ private: struct HostLocInfo final { std::vector values; - size_t locked = 0; + std::size_t locked = 0; bool realized = false; - size_t uses_this_inst = 0; - size_t accumulated_uses = 0; - size_t expected_uses = 0; + std::size_t uses_this_inst = 0; + std::size_t accumulated_uses = 0; + std::size_t expected_uses = 0; bool Contains(const IR::Inst*) const; void SetupScratchLocation(); @@ -179,7 +179,7 @@ public: auto ReadH(Argument& arg) { return RAReg{*this, RWType::Read, arg.value, nullptr}; } auto ReadB(Argument& arg) { return RAReg{*this, RWType::Read, arg.value, nullptr}; } - template + template auto ReadReg(Argument& arg) { if constexpr (size == 64) { return ReadX(arg); @@ -190,7 +190,7 @@ public: } } - template + template auto ReadVec(Argument& arg) { if constexpr (size == 128) { return ReadQ(arg); @@ -218,7 +218,7 @@ public: auto WriteFlags(IR::Inst* inst) { return RAReg{*this, RWType::Write, {}, inst}; } - template + template auto WriteReg(IR::Inst* inst) { if constexpr (size == 64) { return WriteX(inst); @@ -229,7 +229,7 @@ public: } } - template + template auto WriteVec(IR::Inst* inst) { if constexpr (size == 128) { return WriteQ(inst); @@ -255,7 +255,7 @@ public: auto ReadWriteH(Argument& arg, const IR::Inst* inst) { return RAReg{*this, RWType::ReadWrite, arg.value, inst}; } auto ReadWriteB(Argument& arg, const IR::Inst* inst) { return RAReg{*this, RWType::ReadWrite, arg.value, inst}; } - template + template auto ReadWriteReg(Argument& arg, const IR::Inst* inst) { if constexpr (size == 64) { return ReadWriteX(arg, inst); @@ -266,7 +266,7 @@ public: } } - template + template auto ReadWriteVec(Argument& arg, const IR::Inst* inst) { if constexpr (size == 128) { return ReadWriteQ(arg, inst); @@ -335,7 +335,7 @@ private: HostLocInfo flags; std::array spills; - mutable size_t alloc_candidate_index = 0; + mutable std::size_t alloc_candidate_index = 0; ankerl::unordered_dense::set defined_insts; }; diff --git a/src/dynarmic/src/dynarmic/backend/arm64/stack_layout.h b/src/dynarmic/src/dynarmic/backend/arm64/stack_layout.h index 801b07c008..173872069e 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/stack_layout.h +++ b/src/dynarmic/src/dynarmic/backend/arm64/stack_layout.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -10,7 +10,7 @@ #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" namespace Dynarmic::Backend::Arm64 { @@ -19,14 +19,14 @@ namespace Dynarmic::Backend::Arm64 { # pragma warning(disable : 4324) // Structure was padded due to alignment specifier #endif -constexpr size_t SpillCount = 64; +constexpr std::size_t SpillCount = 64; struct alignas(16) RSBEntry { u64 target; u64 code_ptr; }; -constexpr size_t RSBCount = 8; +constexpr std::size_t RSBCount = 8; constexpr u64 RSBIndexMask = (RSBCount - 1) * sizeof(RSBEntry); struct alignas(16) StackLayout { diff --git a/src/dynarmic/src/dynarmic/backend/arm64/verbose_debugging_output.cpp b/src/dynarmic/src/dynarmic/backend/arm64/verbose_debugging_output.cpp index aec0472f68..a024a212f7 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/verbose_debugging_output.cpp +++ b/src/dynarmic/src/dynarmic/backend/arm64/verbose_debugging_output.cpp @@ -1,3 +1,6 @@ +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project +// SPDX-License-Identifier: GPL-3.0-or-later + /* This file is part of the dynarmic project. * Copyright (c) 2023 MerryMage * SPDX-License-Identifier: 0BSD @@ -51,7 +54,7 @@ void EmitVerboseDebuggingOutput(oaknut::CodeGenerator& code, EmitContext& ctx) { code.ADD(SP, SP, sizeof(RegisterData)); } -void PrintVerboseDebuggingOutputLine(RegisterData& reg_data, HostLocType reg_type, size_t reg_index, size_t inst_index, IR::Type inst_type) { +void PrintVerboseDebuggingOutputLine(RegisterData& reg_data, HostLocType reg_type, std::size_t reg_index, std::size_t inst_index, IR::Type inst_type) { fmt::print("dynarmic debug: %{:05} = ", inst_index); Vector value = [&]() -> Vector { diff --git a/src/dynarmic/src/dynarmic/backend/arm64/verbose_debugging_output.h b/src/dynarmic/src/dynarmic/backend/arm64/verbose_debugging_output.h index b5187f6375..3f78c27745 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/verbose_debugging_output.h +++ b/src/dynarmic/src/dynarmic/backend/arm64/verbose_debugging_output.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -10,7 +10,7 @@ #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/backend/arm64/stack_layout.h" @@ -54,6 +54,6 @@ struct alignas(16) RegisterData { #endif void EmitVerboseDebuggingOutput(oaknut::CodeGenerator& code, EmitContext& ctx); -void PrintVerboseDebuggingOutputLine(RegisterData& reg_data, HostLocType reg_type, size_t reg_index, size_t inst_index, IR::Type inst_type); +void PrintVerboseDebuggingOutputLine(RegisterData& reg_data, HostLocType reg_type, std::size_t reg_index, std::size_t inst_index, IR::Type inst_type); } // namespace Dynarmic::Backend::Arm64 diff --git a/src/dynarmic/src/dynarmic/backend/block_range_information.cpp b/src/dynarmic/src/dynarmic/backend/block_range_information.cpp index aa951d7708..bd7310194f 100644 --- a/src/dynarmic/src/dynarmic/backend/block_range_information.cpp +++ b/src/dynarmic/src/dynarmic/backend/block_range_information.cpp @@ -10,7 +10,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include namespace Dynarmic::Backend { diff --git a/src/dynarmic/src/dynarmic/backend/exception_handler.h b/src/dynarmic/src/dynarmic/backend/exception_handler.h index ff116c5775..b62bd7ab71 100644 --- a/src/dynarmic/src/dynarmic/backend/exception_handler.h +++ b/src/dynarmic/src/dynarmic/backend/exception_handler.h @@ -12,7 +12,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #if defined(ARCHITECTURE_x86_64) namespace Dynarmic::Backend::X64 { @@ -43,6 +43,7 @@ struct FakeCall { }; #elif defined(ARCHITECTURE_riscv64) struct FakeCall { + u64 call_sepc; }; #else # error "Invalid architecture" diff --git a/src/dynarmic/src/dynarmic/backend/exception_handler_macos.cpp b/src/dynarmic/src/dynarmic/backend/exception_handler_macos.cpp index be44207f0a..fc627f60b2 100644 --- a/src/dynarmic/src/dynarmic/backend/exception_handler_macos.cpp +++ b/src/dynarmic/src/dynarmic/backend/exception_handler_macos.cpp @@ -19,8 +19,8 @@ #include #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/common_types.h" +#include "common/assert.h" +#include "common/common_types.h" #include "dynarmic/backend/exception_handler.h" diff --git a/src/dynarmic/src/dynarmic/backend/exception_handler_posix.cpp b/src/dynarmic/src/dynarmic/backend/exception_handler_posix.cpp index 9f508f72e5..50d552aa0e 100644 --- a/src/dynarmic/src/dynarmic/backend/exception_handler_posix.cpp +++ b/src/dynarmic/src/dynarmic/backend/exception_handler_posix.cpp @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -8,6 +8,7 @@ #include #include +#include #include #include #include @@ -16,9 +17,9 @@ #include #include #include "dynarmic/backend/exception_handler.h" -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/common/context.h" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #if defined(ARCHITECTURE_x86_64) # include "dynarmic/backend/x64/block_of_code.h" #elif defined(ARCHITECTURE_arm64) @@ -140,7 +141,15 @@ void SigHandler::SigAction(int sig, siginfo_t* info, void* raw_context) { } fmt::print(stderr, "Unhandled {} at pc {:#018x}\n", sig == SIGSEGV ? "SIGSEGV" : "SIGBUS", CTX_PC); #elif defined(ARCHITECTURE_riscv64) - UNREACHABLE(); + { + std::shared_lock guard(sig_handler->code_block_infos_mutex); + if (const auto iter = sig_handler->FindCodeBlockInfo(CTX_SEPC); iter != sig_handler->code_block_infos.end()) { + FakeCall fc = iter->second.cb(CTX_SEPC); + CTX_SEPC = fc.call_sepc; + return; + } + } + fmt::print(stderr, "Unhandled {} at pc {:#018x}\n", sig == SIGSEGV ? "SIGSEGV" : "SIGBUS", CTX_SEPC); #else # error "Invalid architecture" #endif diff --git a/src/dynarmic/src/dynarmic/backend/riscv64/a32_address_space.cpp b/src/dynarmic/src/dynarmic/backend/riscv64/a32_address_space.cpp index edb24761f6..490398931c 100644 --- a/src/dynarmic/src/dynarmic/backend/riscv64/a32_address_space.cpp +++ b/src/dynarmic/src/dynarmic/backend/riscv64/a32_address_space.cpp @@ -8,7 +8,7 @@ #include "dynarmic/backend/riscv64/a32_address_space.h" -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/backend/riscv64/abi.h" #include "dynarmic/backend/riscv64/emit_riscv64.h" diff --git a/src/dynarmic/src/dynarmic/backend/riscv64/a32_interface.cpp b/src/dynarmic/src/dynarmic/backend/riscv64/a32_interface.cpp index 3f395bfafb..ab3ee13f6b 100644 --- a/src/dynarmic/src/dynarmic/backend/riscv64/a32_interface.cpp +++ b/src/dynarmic/src/dynarmic/backend/riscv64/a32_interface.cpp @@ -10,8 +10,8 @@ #include #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/common_types.h" +#include "common/assert.h" +#include "common/common_types.h" #include "dynarmic/backend/riscv64/a32_address_space.h" #include "dynarmic/backend/riscv64/a32_core.h" @@ -42,7 +42,7 @@ struct Jit::Impl final { HaltReason Step() { ASSERT(!jit_interface->is_executing); jit_interface->is_executing = true; - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); RequestCacheInvalidation(); jit_interface->is_executing = false; return HaltReason{}; @@ -108,6 +108,10 @@ struct Jit::Impl final { current_state.exclusive_state = false; } + std::string Disassemble() const { + return {}; + } + private: void RequestCacheInvalidation() { // UNREACHABLE(); @@ -198,4 +202,8 @@ void Jit::ClearExclusiveState() { impl->ClearExclusiveState(); } +std::string Jit::Disassemble() const { + return impl->Disassemble(); +} + } // namespace Dynarmic::A32 diff --git a/src/dynarmic/src/dynarmic/backend/riscv64/a32_jitstate.cpp b/src/dynarmic/src/dynarmic/backend/riscv64/a32_jitstate.cpp index 70cd6bf0f1..3e9c8ecca1 100644 --- a/src/dynarmic/src/dynarmic/backend/riscv64/a32_jitstate.cpp +++ b/src/dynarmic/src/dynarmic/backend/riscv64/a32_jitstate.cpp @@ -9,7 +9,7 @@ #include "dynarmic/backend/riscv64/a32_jitstate.h" #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" namespace Dynarmic::Backend::RV64 { diff --git a/src/dynarmic/src/dynarmic/backend/riscv64/a32_jitstate.h b/src/dynarmic/src/dynarmic/backend/riscv64/a32_jitstate.h index 2fbb5819d9..ea0bce5fe3 100644 --- a/src/dynarmic/src/dynarmic/backend/riscv64/a32_jitstate.h +++ b/src/dynarmic/src/dynarmic/backend/riscv64/a32_jitstate.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -10,7 +10,7 @@ #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/frontend/A32/a32_location_descriptor.h" #include "dynarmic/ir/location_descriptor.h" diff --git a/src/dynarmic/src/dynarmic/backend/riscv64/a64_interface.cpp b/src/dynarmic/src/dynarmic/backend/riscv64/a64_interface.cpp new file mode 100644 index 0000000000..67c4986109 --- /dev/null +++ b/src/dynarmic/src/dynarmic/backend/riscv64/a64_interface.cpp @@ -0,0 +1,295 @@ +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project +// SPDX-License-Identifier: GPL-3.0-or-later + +#include +#include + +#include +#include "common/assert.h" +#include "common/common_types.h" + +#include "dynarmic/frontend/A64/a64_location_descriptor.h" +#include "dynarmic/frontend/A64/translate/a64_translate.h" +#include "dynarmic/interface/A64/config.h" +#include "dynarmic/backend/riscv64/a32_core.h" +#include "dynarmic/common/atomic.h" +#include "dynarmic/ir/opt_passes.h" +#include "dynarmic/interface/A64/a64.h" + +namespace Dynarmic::A64 { + +using namespace Dynarmic::Backend::RV64; +using CodePtr = std::uint32_t*; + +struct Jit::Impl final { + Impl(Jit* jit_interface, A64::UserConfig conf) + : conf(conf) + //, current_address_space(conf) + , jit_interface(jit_interface) {} + + HaltReason Run() { + ASSERT(false); + return HaltReason{}; + } + + HaltReason Step() { + ASSERT(false); + return HaltReason{}; + } + + void ClearCache() { + std::unique_lock lock{invalidation_mutex}; + invalidate_entire_cache = true; + HaltExecution(HaltReason::CacheInvalidation); + } + + void InvalidateCacheRange(u64 start_address, size_t length) { + std::unique_lock lock{invalidation_mutex}; + const auto end_address = u64(start_address + length - 1); + invalid_cache_ranges.add(boost::icl::discrete_interval::closed(start_address, end_address)); + HaltExecution(HaltReason::CacheInvalidation); + } + + void Reset() { + ASSERT(!is_executing); + //jit_state = {}; + } + + void HaltExecution(HaltReason hr) { + //Atomic::Or(&jit_state.halt_reason, u32(hr)); + } + + void ClearHalt(HaltReason hr) { + //Atomic::And(&jit_state.halt_reason, ~u32(hr)); + } + + u64 GetSP() const { + return 0;//jit_state.sp; + } + + void SetSP(u64 value) { + //jit_state.sp = value; + } + + u64 GetPC() const { + return 0;//jit_state.pc; + } + + void SetPC(u64 value) { + //jit_state.pc = value; + } + + u64 GetRegister(size_t index) const { + return 0;//index == 31 ? GetSP() : jit_state.regs.at(index); + } + + void SetRegister(size_t index, u64 value) { + if (index == 31) + return SetSP(value); + //jit_state.regs.at(index) = value; + } + + std::array GetRegisters() const { + return {};//jit_state.regs; + } + + void SetRegisters(const std::array& value) { + //jit_state.regs = value; + } + + Vector GetVector(size_t index) const { + //return {jit_state.vec.at(index * 2), jit_state.vec.at(index * 2 + 1)}; + return Vector{}; + } + + void SetVector(size_t index, Vector value) { + //jit_state.vec.at(index * 2) = value[0]; + //jit_state.vec.at(index * 2 + 1) = value[1]; + } + + std::array GetVectors() const { + std::array ret; + //static_assert(sizeof(ret) == sizeof(jit_state.vec)); + //std::memcpy(ret.data(), jit_state.vec.data(), sizeof(jit_state.vec)); + return ret; + } + + void SetVectors(const std::array& value) { + //static_assert(sizeof(value) == sizeof(jit_state.vec)); + //std::memcpy(jit_state.vec.data(), value.data(), sizeof(jit_state.vec)); + } + + u32 GetFpcr() const { + return 0;//jit_state.fpcr; + } + + void SetFpcr(u32 value) { + //jit_state.fpcr = value; + } + + u32 GetFpsr() const { + return 0;//jit_state.fpsr; + } + + void SetFpsr(u32 value) { + //jit_state.fpsr = value; + } + + u32 GetPstate() const { + return 0;//jit_state.pstate; + } + + void SetPstate(u32 value) { + //jit_state.pstate = value; + } + + void ClearExclusiveState() { + //jit_state.exclusive_state = 0; + } + + bool IsExecuting() const { + return is_executing; + } + + std::string Disassemble() const { + // const size_t size = reinterpret_cast(block_of_code.getCurr()) - reinterpret_cast(block_of_code.GetCodeBegin()); + // auto const* p = reinterpret_cast(block_of_code.GetCodeBegin()); + // return Common::DisassemblePPC64(p, p + size); + return {}; + } + +private: + void RequestCacheInvalidation() { + // UNREACHABLE(); + invalidate_entire_cache = false; + invalid_cache_ranges.clear(); + } + + A64::UserConfig conf; + //A64JitState jit_state{}; + //A64AddressSpace current_address_space; + Jit* jit_interface; + volatile u32 halt_reason = 0; + bool is_executing = false; + + boost::icl::interval_set invalid_cache_ranges; + bool invalidate_entire_cache = false; + std::mutex invalidation_mutex; +}; + +Jit::Jit(UserConfig conf) : impl(std::make_unique(this, conf)) {} +Jit::~Jit() = default; + +HaltReason Jit::Run() { + return impl->Run(); +} + +HaltReason Jit::Step() { + return impl->Step(); +} + +void Jit::ClearCache() { + impl->ClearCache(); +} + +void Jit::InvalidateCacheRange(u64 start_address, size_t length) { + impl->InvalidateCacheRange(start_address, length); +} + +void Jit::Reset() { + impl->Reset(); +} + +void Jit::HaltExecution(HaltReason hr) { + impl->HaltExecution(hr); +} + +void Jit::ClearHalt(HaltReason hr) { + impl->ClearHalt(hr); +} + +u64 Jit::GetSP() const { + return impl->GetSP(); +} + +void Jit::SetSP(u64 value) { + impl->SetSP(value); +} + +u64 Jit::GetPC() const { + return impl->GetPC(); +} + +void Jit::SetPC(u64 value) { + impl->SetPC(value); +} + +u64 Jit::GetRegister(size_t index) const { + return impl->GetRegister(index); +} + +void Jit::SetRegister(size_t index, u64 value) { + impl->SetRegister(index, value); +} + +std::array Jit::GetRegisters() const { + return impl->GetRegisters(); +} + +void Jit::SetRegisters(const std::array& value) { + impl->SetRegisters(value); +} + +Vector Jit::GetVector(size_t index) const { + return impl->GetVector(index); +} + +void Jit::SetVector(size_t index, Vector value) { + impl->SetVector(index, value); +} + +std::array Jit::GetVectors() const { + return impl->GetVectors(); +} + +void Jit::SetVectors(const std::array& value) { + impl->SetVectors(value); +} + +u32 Jit::GetFpcr() const { + return impl->GetFpcr(); +} + +void Jit::SetFpcr(u32 value) { + impl->SetFpcr(value); +} + +u32 Jit::GetFpsr() const { + return impl->GetFpsr(); +} + +void Jit::SetFpsr(u32 value) { + impl->SetFpsr(value); +} + +u32 Jit::GetPstate() const { + return impl->GetPstate(); +} + +void Jit::SetPstate(u32 value) { + impl->SetPstate(value); +} + +void Jit::ClearExclusiveState() { + impl->ClearExclusiveState(); +} + +bool Jit::IsExecuting() const { + return impl->IsExecuting(); +} + +std::string Jit::Disassemble() const { + return impl->Disassemble(); +} + +} // namespace Dynarmic::A64 diff --git a/src/dynarmic/src/dynarmic/backend/riscv64/code_block.h b/src/dynarmic/src/dynarmic/backend/riscv64/code_block.h index 02bfa44eec..4917399f10 100644 --- a/src/dynarmic/src/dynarmic/backend/riscv64/code_block.h +++ b/src/dynarmic/src/dynarmic/backend/riscv64/code_block.h @@ -13,6 +13,9 @@ #include +#include "common/assert.h" +#include "common/common_types.h" + namespace Dynarmic::Backend::RV64 { class CodeBlock { diff --git a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64.cpp b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64.cpp index 5ce7dee1e1..795ec4ca21 100644 --- a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64.cpp +++ b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64.cpp @@ -35,17 +35,17 @@ void EmitIR(biscuit::Assembler&, EmitContext& ctx, IR::Ins template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> @@ -56,12 +56,12 @@ void EmitIR(biscuit::Assembler&, EmitContext& ctx, I template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> @@ -87,12 +87,12 @@ void EmitIR(biscuit::Assembler& as, EmitContext& ctx, I template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> @@ -109,7 +109,7 @@ void EmitIR(biscuit::Assembler& as, EmitContext& c template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } EmittedBlockInfo EmitRV64(biscuit::Assembler& as, IR::Block block, const EmitConfig& emit_conf) { diff --git a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64.h b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64.h index 68d30d5e15..7c49ce2afa 100644 --- a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64.h +++ b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -11,7 +11,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" namespace biscuit { class Assembler; diff --git a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_a32.cpp b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_a32.cpp index 572f197955..8218ca3489 100644 --- a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_a32.cpp +++ b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_a32.cpp @@ -205,7 +205,7 @@ void EmitA32Terminal(biscuit::Assembler& as, EmitContext& ctx) { template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> @@ -220,17 +220,17 @@ void EmitIR(biscuit::Assembler& as, EmitContext& ctx template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> @@ -249,27 +249,27 @@ void EmitIR(biscuit::Assembler& as, EmitContext& ctx template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> @@ -284,17 +284,17 @@ void EmitIR(biscuit::Assembler& as, EmitContext& ctx template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> @@ -318,82 +318,82 @@ void EmitIR(biscuit::Assembler& as, EmitContext& ctx, template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } } // namespace Dynarmic::Backend::RV64 diff --git a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_a32_coprocessor.cpp b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_a32_coprocessor.cpp index a014d57fc3..b6a41f71b2 100644 --- a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_a32_coprocessor.cpp +++ b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_a32_coprocessor.cpp @@ -1,3 +1,6 @@ +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project +// SPDX-License-Identifier: GPL-3.0-or-later + /* This file is part of the dynarmic project. * Copyright (c) 2024 MerryMage * SPDX-License-Identifier: 0BSD @@ -19,37 +22,37 @@ namespace Dynarmic::Backend::RV64 { template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } } // namespace Dynarmic::Backend::RV64 diff --git a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_a32_memory.cpp b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_a32_memory.cpp index f9a3aabf6b..fa96d52e6e 100644 --- a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_a32_memory.cpp +++ b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_a32_memory.cpp @@ -1,3 +1,6 @@ +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project +// SPDX-License-Identifier: GPL-3.0-or-later + /* This file is part of the dynarmic project. * Copyright (c) 2024 MerryMage * SPDX-License-Identifier: 0BSD @@ -19,87 +22,87 @@ namespace Dynarmic::Backend::RV64 { template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } } // namespace Dynarmic::Backend::RV64 diff --git a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_a64.cpp b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_a64.cpp index 38ea167ff7..eed51547c6 100644 --- a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_a64.cpp +++ b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_a64.cpp @@ -1,3 +1,6 @@ +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project +// SPDX-License-Identifier: GPL-3.0-or-later + /* This file is part of the dynarmic project. * Copyright (c) 2024 MerryMage * SPDX-License-Identifier: 0BSD @@ -19,182 +22,182 @@ namespace Dynarmic::Backend::RV64 { template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } } // namespace Dynarmic::Backend::RV64 diff --git a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_a64_memory.cpp b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_a64_memory.cpp index a5c0c1b8d3..84802837c5 100644 --- a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_a64_memory.cpp +++ b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_a64_memory.cpp @@ -1,3 +1,6 @@ +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project +// SPDX-License-Identifier: GPL-3.0-or-later + /* This file is part of the dynarmic project. * Copyright (c) 2024 MerryMage * SPDX-License-Identifier: 0BSD @@ -19,107 +22,107 @@ namespace Dynarmic::Backend::RV64 { template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } } // namespace Dynarmic::Backend::RV64 diff --git a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_cryptography.cpp b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_cryptography.cpp index c1d3fa0e26..44ebc2e3fc 100644 --- a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_cryptography.cpp +++ b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_cryptography.cpp @@ -1,3 +1,6 @@ +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project +// SPDX-License-Identifier: GPL-3.0-or-later + /* This file is part of the dynarmic project. * Copyright (c) 2024 MerryMage * SPDX-License-Identifier: 0BSD @@ -19,82 +22,82 @@ namespace Dynarmic::Backend::RV64 { template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } } // namespace Dynarmic::Backend::RV64 diff --git a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_data_processing.cpp b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_data_processing.cpp index 114147e018..d41433b12b 100644 --- a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_data_processing.cpp +++ b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_data_processing.cpp @@ -22,67 +22,67 @@ namespace Dynarmic::Backend::RV64 { template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> @@ -124,7 +124,7 @@ void EmitIR(biscuit::Assembler& as, EmitContext& template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> @@ -153,72 +153,72 @@ void EmitIR(biscuit::Assembler& as, EmitContext template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template @@ -264,7 +264,7 @@ static void AddImmWithFlags(biscuit::Assembler& as, biscuit::GPR rd, biscuit::GP as.SLLI(Xscratch1, Xscratch1, 28); as.OR(flags, flags, Xscratch1); } else { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } } @@ -279,7 +279,7 @@ static void EmitAddSub(biscuit::Assembler& as, EmitContext& ctx, IR::Inst* inst) auto Xa = ctx.reg_alloc.ReadX(args[0]); if (overflow_inst) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } else if (nzcv_inst) { if (args[1].IsImmediate()) { const u64 imm = args[1].GetImmediateU64(); @@ -294,17 +294,17 @@ static void EmitAddSub(biscuit::Assembler& as, EmitContext& ctx, IR::Inst* inst) AddImmWithFlags(as, *Xresult, *Xa, sub ? -imm : imm, *Xflags); } } else { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } } else { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } } else { if (args[1].IsImmediate()) { const u64 imm = args[1].GetImmediateU64(); if (args[2].IsImmediate()) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } else { auto Xnzcv = ctx.reg_alloc.ReadX(args[2]); RegAlloc::Realize(Xresult, Xa, Xnzcv); @@ -317,7 +317,7 @@ static void EmitAddSub(biscuit::Assembler& as, EmitContext& ctx, IR::Inst* inst) as.ADDW(Xresult, Xa, Xscratch0); } } else { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } } } @@ -329,7 +329,7 @@ void EmitIR(biscuit::Assembler& as, EmitContext& ctx, IR::Ins template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> @@ -339,237 +339,237 @@ void EmitIR(biscuit::Assembler& as, EmitContext& ctx, IR::Ins template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } } // namespace Dynarmic::Backend::RV64 diff --git a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_floating_point.cpp b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_floating_point.cpp index 94fa474e38..0c5d5984bc 100644 --- a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_floating_point.cpp +++ b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_floating_point.cpp @@ -1,3 +1,6 @@ +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project +// SPDX-License-Identifier: GPL-3.0-or-later + /* This file is part of the dynarmic project. * Copyright (c) 2024 MerryMage * SPDX-License-Identifier: 0BSD @@ -19,442 +22,442 @@ namespace Dynarmic::Backend::RV64 { template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } } // namespace Dynarmic::Backend::RV64 diff --git a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_packed.cpp b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_packed.cpp index 5272dbb114..acd73e86a3 100644 --- a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_packed.cpp +++ b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_packed.cpp @@ -1,3 +1,6 @@ +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project +// SPDX-License-Identifier: GPL-3.0-or-later + /* This file is part of the dynarmic project. * Copyright (c) 2024 MerryMage * SPDX-License-Identifier: 0BSD @@ -19,172 +22,172 @@ namespace Dynarmic::Backend::RV64 { template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } } // namespace Dynarmic::Backend::RV64 diff --git a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_saturation.cpp b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_saturation.cpp index 3bceeb080d..9fae6cda77 100644 --- a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_saturation.cpp +++ b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_saturation.cpp @@ -1,3 +1,6 @@ +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project +// SPDX-License-Identifier: GPL-3.0-or-later + /* This file is part of the dynarmic project. * Copyright (c) 2024 MerryMage * SPDX-License-Identifier: 0BSD @@ -19,112 +22,112 @@ namespace Dynarmic::Backend::RV64 { template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } } // namespace Dynarmic::Backend::RV64 diff --git a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_vector.cpp b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_vector.cpp index 31cfd65cdf..5e56a34f19 100644 --- a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_vector.cpp +++ b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_vector.cpp @@ -1,3 +1,6 @@ +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project +// SPDX-License-Identifier: GPL-3.0-or-later + /* This file is part of the dynarmic project. * Copyright (c) 2024 MerryMage * SPDX-License-Identifier: 0BSD @@ -19,1377 +22,1377 @@ namespace Dynarmic::Backend::RV64 { template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } } // namespace Dynarmic::Backend::RV64 diff --git a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_vector_floating_point.cpp b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_vector_floating_point.cpp index c3bf9708d3..661cfc5403 100644 --- a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_vector_floating_point.cpp +++ b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_vector_floating_point.cpp @@ -1,3 +1,6 @@ +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project +// SPDX-License-Identifier: GPL-3.0-or-later + /* This file is part of the dynarmic project. * Copyright (c) 2024 MerryMage * SPDX-License-Identifier: 0BSD @@ -19,337 +22,337 @@ namespace Dynarmic::Backend::RV64 { template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } } // namespace Dynarmic::Backend::RV64 diff --git a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_vector_saturation.cpp b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_vector_saturation.cpp index 0d3868ec83..6662afcd69 100644 --- a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_vector_saturation.cpp +++ b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64_vector_saturation.cpp @@ -1,3 +1,6 @@ +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project +// SPDX-License-Identifier: GPL-3.0-or-later + /* This file is part of the dynarmic project. * Copyright (c) 2024 MerryMage * SPDX-License-Identifier: 0BSD @@ -19,82 +22,82 @@ namespace Dynarmic::Backend::RV64 { template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } template<> void EmitIR(biscuit::Assembler&, EmitContext&, IR::Inst*) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } } // namespace Dynarmic::Backend::RV64 diff --git a/src/dynarmic/src/dynarmic/backend/riscv64/exclusive_monitor.cpp b/src/dynarmic/src/dynarmic/backend/riscv64/exclusive_monitor.cpp new file mode 100644 index 0000000000..b3585c64ea --- /dev/null +++ b/src/dynarmic/src/dynarmic/backend/riscv64/exclusive_monitor.cpp @@ -0,0 +1,54 @@ +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project +// SPDX-License-Identifier: GPL-3.0-or-later + +#include "dynarmic/interface/exclusive_monitor.h" + +#include + +namespace Dynarmic { + +ExclusiveMonitor::ExclusiveMonitor(std::size_t processor_count) + : exclusive_addresses(processor_count, INVALID_EXCLUSIVE_ADDRESS), exclusive_values(processor_count) {} + +size_t ExclusiveMonitor::GetProcessorCount() const { + return exclusive_addresses.size(); +} + +void ExclusiveMonitor::Lock() { + lock.Lock(); +} + +void ExclusiveMonitor::Unlock() { + lock.Unlock(); +} + +bool ExclusiveMonitor::CheckAndClear(size_t processor_id, VAddr address) { + const VAddr masked_address = address & RESERVATION_GRANULE_MASK; + + Lock(); + if (exclusive_addresses[processor_id] != masked_address) { + Unlock(); + return false; + } + + for (VAddr& other_address : exclusive_addresses) { + if (other_address == masked_address) { + other_address = INVALID_EXCLUSIVE_ADDRESS; + } + } + return true; +} + +void ExclusiveMonitor::Clear() { + Lock(); + std::fill(exclusive_addresses.begin(), exclusive_addresses.end(), INVALID_EXCLUSIVE_ADDRESS); + Unlock(); +} + +void ExclusiveMonitor::ClearProcessor(size_t processor_id) { + Lock(); + exclusive_addresses[processor_id] = INVALID_EXCLUSIVE_ADDRESS; + Unlock(); +} + +} // namespace Dynarmic diff --git a/src/dynarmic/src/dynarmic/backend/riscv64/reg_alloc.cpp b/src/dynarmic/src/dynarmic/backend/riscv64/reg_alloc.cpp index 4ab5d43db8..fdb8ff898f 100644 --- a/src/dynarmic/src/dynarmic/backend/riscv64/reg_alloc.cpp +++ b/src/dynarmic/src/dynarmic/backend/riscv64/reg_alloc.cpp @@ -11,8 +11,8 @@ #include #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/common_types.h" +#include "common/assert.h" +#include "common/common_types.h" #include "dynarmic/common/always_false.h" @@ -161,7 +161,7 @@ u32 RegAlloc::GenerateImmediate(const IR::Value& value) { return new_location_index; } else if constexpr (kind == HostLoc::Kind::Fpr) { - UNIMPLEMENTED(); + ASSERT(false && "Unimplemented instruction"); } else { UNREACHABLE(); } diff --git a/src/dynarmic/src/dynarmic/backend/riscv64/reg_alloc.h b/src/dynarmic/src/dynarmic/backend/riscv64/reg_alloc.h index be826e63f6..5a0bd660de 100644 --- a/src/dynarmic/src/dynarmic/backend/riscv64/reg_alloc.h +++ b/src/dynarmic/src/dynarmic/backend/riscv64/reg_alloc.h @@ -16,8 +16,8 @@ #include #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/common_types.h" +#include "common/assert.h" +#include "common/common_types.h" #include "dynarmic/mcl/is_instance_of_template.hpp" #include diff --git a/src/dynarmic/src/dynarmic/backend/riscv64/stack_layout.h b/src/dynarmic/src/dynarmic/backend/riscv64/stack_layout.h index 082e68aa6d..ca381520ea 100644 --- a/src/dynarmic/src/dynarmic/backend/riscv64/stack_layout.h +++ b/src/dynarmic/src/dynarmic/backend/riscv64/stack_layout.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -10,7 +10,7 @@ #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" namespace Dynarmic::Backend::RV64 { diff --git a/src/dynarmic/src/dynarmic/backend/x64/a32_emit_x64.cpp b/src/dynarmic/src/dynarmic/backend/x64/a32_emit_x64.cpp index dd9e9e4a66..1c21886c60 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/a32_emit_x64.cpp +++ b/src/dynarmic/src/dynarmic/backend/x64/a32_emit_x64.cpp @@ -14,9 +14,9 @@ #include #include -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include #include "dynarmic/backend/x64/a32_jitstate.h" diff --git a/src/dynarmic/src/dynarmic/backend/x64/a32_interface.cpp b/src/dynarmic/src/dynarmic/backend/x64/a32_interface.cpp index b48dcf9046..097e0f426f 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/a32_interface.cpp +++ b/src/dynarmic/src/dynarmic/backend/x64/a32_interface.cpp @@ -12,9 +12,9 @@ #include #include -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/common/llvm_disassemble.h" #include "dynarmic/backend/x64/a32_emit_x64.h" diff --git a/src/dynarmic/src/dynarmic/backend/x64/a32_jitstate.cpp b/src/dynarmic/src/dynarmic/backend/x64/a32_jitstate.cpp index 066b931350..df1d789895 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/a32_jitstate.cpp +++ b/src/dynarmic/src/dynarmic/backend/x64/a32_jitstate.cpp @@ -8,9 +8,9 @@ #include "dynarmic/backend/x64/a32_jitstate.h" -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/backend/x64/block_of_code.h" #include "dynarmic/backend/x64/nzcv_util.h" diff --git a/src/dynarmic/src/dynarmic/backend/x64/a32_jitstate.h b/src/dynarmic/src/dynarmic/backend/x64/a32_jitstate.h index 99510c91cf..c276ab0b8b 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/a32_jitstate.h +++ b/src/dynarmic/src/dynarmic/backend/x64/a32_jitstate.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -9,8 +9,9 @@ #pragma once #include +#include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" namespace Dynarmic::Backend::X64 { @@ -48,8 +49,8 @@ struct A32JitState { // Exclusive state u32 exclusive_state = 0; - static constexpr size_t RSBSize = 8; // MUST be a power of 2. - static constexpr size_t RSBPtrMask = RSBSize - 1; + static constexpr std::size_t RSBSize = 8; // MUST be a power of 2. + static constexpr std::size_t RSBPtrMask = RSBSize - 1; u32 rsb_ptr = 0; std::array rsb_location_descriptors; std::array rsb_codeptrs; diff --git a/src/dynarmic/src/dynarmic/backend/x64/a64_emit_x64.cpp b/src/dynarmic/src/dynarmic/backend/x64/a64_emit_x64.cpp index 8edeb29aed..cf9dab4034 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/a64_emit_x64.cpp +++ b/src/dynarmic/src/dynarmic/backend/x64/a64_emit_x64.cpp @@ -10,8 +10,8 @@ #include #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/common_types.h" +#include "common/assert.h" +#include "common/common_types.h" #include "dynarmic/mcl/integer_of_size.hpp" #include diff --git a/src/dynarmic/src/dynarmic/backend/x64/a64_interface.cpp b/src/dynarmic/src/dynarmic/backend/x64/a64_interface.cpp index 96440d273e..9acaf3f9f6 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/a64_interface.cpp +++ b/src/dynarmic/src/dynarmic/backend/x64/a64_interface.cpp @@ -11,7 +11,7 @@ #include #include -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/common/fp/fpcr.h" #include "dynarmic/common/llvm_disassemble.h" #include diff --git a/src/dynarmic/src/dynarmic/backend/x64/a64_jitstate.h b/src/dynarmic/src/dynarmic/backend/x64/a64_jitstate.h index 22fd94e5c9..85ee1aa4b9 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/a64_jitstate.h +++ b/src/dynarmic/src/dynarmic/backend/x64/a64_jitstate.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -10,7 +10,7 @@ #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/backend/x64/nzcv_util.h" #include "dynarmic/frontend/A64/a64_location_descriptor.h" diff --git a/src/dynarmic/src/dynarmic/backend/x64/abi.cpp b/src/dynarmic/src/dynarmic/backend/x64/abi.cpp index 413af7b557..5d2ee735f3 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/abi.cpp +++ b/src/dynarmic/src/dynarmic/backend/x64/abi.cpp @@ -10,7 +10,7 @@ #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/backend/x64/xbyak.h" #include "dynarmic/backend/x64/block_of_code.h" diff --git a/src/dynarmic/src/dynarmic/backend/x64/abi.h b/src/dynarmic/src/dynarmic/backend/x64/abi.h index c37910ce22..f98fa302ca 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/abi.h +++ b/src/dynarmic/src/dynarmic/backend/x64/abi.h @@ -10,7 +10,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/backend/x64/hostloc.h" namespace Dynarmic::Backend::X64 { diff --git a/src/dynarmic/src/dynarmic/backend/x64/block_of_code.cpp b/src/dynarmic/src/dynarmic/backend/x64/block_of_code.cpp index 3a161fca6b..f41bea6c83 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/block_of_code.cpp +++ b/src/dynarmic/src/dynarmic/backend/x64/block_of_code.cpp @@ -24,7 +24,7 @@ #include #include -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/mcl/bit.hpp" #include "dynarmic/backend/x64/xbyak.h" diff --git a/src/dynarmic/src/dynarmic/backend/x64/block_of_code.h b/src/dynarmic/src/dynarmic/backend/x64/block_of_code.h index f6c12edaaa..857b1a4484 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/block_of_code.h +++ b/src/dynarmic/src/dynarmic/backend/x64/block_of_code.h @@ -14,7 +14,7 @@ #include #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/backend/x64/xbyak.h" #include "dynarmic/backend/x64/abi.h" #include "dynarmic/backend/x64/callback.h" diff --git a/src/dynarmic/src/dynarmic/backend/x64/callback.h b/src/dynarmic/src/dynarmic/backend/x64/callback.h index 2bd917ad76..fb1a1a5855 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/callback.h +++ b/src/dynarmic/src/dynarmic/backend/x64/callback.h @@ -11,7 +11,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/backend/x64/xbyak.h" namespace Dynarmic::Backend::X64 { diff --git a/src/dynarmic/src/dynarmic/backend/x64/constant_pool.cpp b/src/dynarmic/src/dynarmic/backend/x64/constant_pool.cpp index 7dbd46bc2a..127149a29e 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/constant_pool.cpp +++ b/src/dynarmic/src/dynarmic/backend/x64/constant_pool.cpp @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -10,7 +10,7 @@ #include -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/backend/x64/block_of_code.h" diff --git a/src/dynarmic/src/dynarmic/backend/x64/constant_pool.h b/src/dynarmic/src/dynarmic/backend/x64/constant_pool.h index efb19f48ed..79e57fc78c 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/constant_pool.h +++ b/src/dynarmic/src/dynarmic/backend/x64/constant_pool.h @@ -13,7 +13,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include #include "dynarmic/backend/x64/xbyak.h" diff --git a/src/dynarmic/src/dynarmic/backend/x64/constants.h b/src/dynarmic/src/dynarmic/backend/x64/constants.h index a0ae9f3c1e..fb9789e053 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/constants.h +++ b/src/dynarmic/src/dynarmic/backend/x64/constants.h @@ -11,7 +11,7 @@ #include #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/common/fp/rounding_mode.h" diff --git a/src/dynarmic/src/dynarmic/backend/x64/devirtualize.h b/src/dynarmic/src/dynarmic/backend/x64/devirtualize.h index 422d21169f..e6efe010ff 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/devirtualize.h +++ b/src/dynarmic/src/dynarmic/backend/x64/devirtualize.h @@ -12,7 +12,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/mcl/function_info.hpp" #include "dynarmic/backend/x64/callback.h" diff --git a/src/dynarmic/src/dynarmic/backend/x64/emit_x64.cpp b/src/dynarmic/src/dynarmic/backend/x64/emit_x64.cpp index 4ed198e09f..3d28365b1c 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/emit_x64.cpp +++ b/src/dynarmic/src/dynarmic/backend/x64/emit_x64.cpp @@ -10,10 +10,10 @@ #include -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include #include "dynarmic/backend/x64/block_of_code.h" diff --git a/src/dynarmic/src/dynarmic/backend/x64/emit_x64_aes.cpp b/src/dynarmic/src/dynarmic/backend/x64/emit_x64_aes.cpp index 1ab5a12de1..ae05f9f590 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/emit_x64_aes.cpp +++ b/src/dynarmic/src/dynarmic/backend/x64/emit_x64_aes.cpp @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -6,7 +6,7 @@ * SPDX-License-Identifier: 0BSD */ -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/backend/x64/abi.h" #include "dynarmic/backend/x64/block_of_code.h" diff --git a/src/dynarmic/src/dynarmic/backend/x64/emit_x64_data_processing.cpp b/src/dynarmic/src/dynarmic/backend/x64/emit_x64_data_processing.cpp index 38e107fb13..d05d4aa036 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/emit_x64_data_processing.cpp +++ b/src/dynarmic/src/dynarmic/backend/x64/emit_x64_data_processing.cpp @@ -9,8 +9,8 @@ #include #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/common_types.h" +#include "common/assert.h" +#include "common/common_types.h" #include "dynarmic/backend/x64/block_of_code.h" #include "dynarmic/backend/x64/emit_x64.h" diff --git a/src/dynarmic/src/dynarmic/backend/x64/emit_x64_floating_point.cpp b/src/dynarmic/src/dynarmic/backend/x64/emit_x64_floating_point.cpp index 6a3ab005f3..827600c7c2 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/emit_x64_floating_point.cpp +++ b/src/dynarmic/src/dynarmic/backend/x64/emit_x64_floating_point.cpp @@ -10,8 +10,8 @@ #include #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/common_types.h" +#include "common/assert.h" +#include "common/common_types.h" #include "dynarmic/mcl/integer_of_size.hpp" #include "dynarmic/backend/x64/xbyak.h" diff --git a/src/dynarmic/src/dynarmic/backend/x64/emit_x64_saturation.cpp b/src/dynarmic/src/dynarmic/backend/x64/emit_x64_saturation.cpp index 4c9ea821cc..74e8c76275 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/emit_x64_saturation.cpp +++ b/src/dynarmic/src/dynarmic/backend/x64/emit_x64_saturation.cpp @@ -8,9 +8,9 @@ #include -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/mcl/integer_of_size.hpp" #include "dynarmic/backend/x64/block_of_code.h" diff --git a/src/dynarmic/src/dynarmic/backend/x64/emit_x64_vector.cpp b/src/dynarmic/src/dynarmic/backend/x64/emit_x64_vector.cpp index 6f53580997..b5ec6ec7cf 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/emit_x64_vector.cpp +++ b/src/dynarmic/src/dynarmic/backend/x64/emit_x64_vector.cpp @@ -12,9 +12,9 @@ #include #include -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/mcl/function_info.hpp" #include "dynarmic/backend/x64/xbyak.h" diff --git a/src/dynarmic/src/dynarmic/backend/x64/emit_x64_vector_floating_point.cpp b/src/dynarmic/src/dynarmic/backend/x64/emit_x64_vector_floating_point.cpp index 046ecc78d6..926653a920 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/emit_x64_vector_floating_point.cpp +++ b/src/dynarmic/src/dynarmic/backend/x64/emit_x64_vector_floating_point.cpp @@ -12,7 +12,7 @@ #include #include -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/mcl/function_info.hpp" #include "dynarmic/mcl/integer_of_size.hpp" #include "dynarmic/backend/x64/xbyak.h" @@ -1985,6 +1985,13 @@ void EmitX64::EmitFPVectorToHalf32(EmitContext& ctx, IR::Inst* inst) { // output[i] = FPT(FP::FPToFixed(fsize, input[i], fbits, unsigned_, fpcr, rounding_mode, fpsr)); // } +template +static void EmitFPVectorToFixedThunk(VectorArray>& output, const VectorArray>& input, FP::FPCR fpcr, FP::FPSR& fpsr) { + using FPT = mcl::unsigned_integer_of_size; + for (size_t i = 0; i < output.size(); ++i) + output[i] = FPT(FP::FPToFixed(fsize, input[i], fbits, unsigned_, fpcr, rounding_mode, fpsr)); +} + template void EmitFPVectorToFixed(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) { const size_t fbits = inst->GetArg(1).GetU8(); @@ -2106,43 +2113,88 @@ void EmitFPVectorToFixed(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) { ctx.reg_alloc.DefineValue(code, inst, src); return; } + auto const fpt_fn = [fbits, rounding]() -> void (*)(VectorArray>& output, const VectorArray>& input, FP::FPCR fpcr, FP::FPSR& fpsr) { +#define ROUNDING_MODE_CASE(CASE, N) \ + if (rounding == FP::RoundingMode::CASE && fsize >= (N) && fbits == (N)) return &EmitFPVectorToFixedThunk; +#define ROUNDING_MODE_SWITCH(CASE) \ + ROUNDING_MODE_CASE(CASE, 0x00) \ + ROUNDING_MODE_CASE(CASE, 0x01) \ + ROUNDING_MODE_CASE(CASE, 0x02) \ + ROUNDING_MODE_CASE(CASE, 0x03) \ + ROUNDING_MODE_CASE(CASE, 0x04) \ + ROUNDING_MODE_CASE(CASE, 0x05) \ + ROUNDING_MODE_CASE(CASE, 0x06) \ + ROUNDING_MODE_CASE(CASE, 0x07) \ + ROUNDING_MODE_CASE(CASE, 0x08) \ + ROUNDING_MODE_CASE(CASE, 0x09) \ + ROUNDING_MODE_CASE(CASE, 0x0a) \ + ROUNDING_MODE_CASE(CASE, 0x0b) \ + ROUNDING_MODE_CASE(CASE, 0x0c) \ + ROUNDING_MODE_CASE(CASE, 0x0d) \ + ROUNDING_MODE_CASE(CASE, 0x0e) \ + ROUNDING_MODE_CASE(CASE, 0x0f) \ + ROUNDING_MODE_CASE(CASE, 0x10) \ + ROUNDING_MODE_CASE(CASE, 0x11) \ + ROUNDING_MODE_CASE(CASE, 0x12) \ + ROUNDING_MODE_CASE(CASE, 0x13) \ + ROUNDING_MODE_CASE(CASE, 0x14) \ + ROUNDING_MODE_CASE(CASE, 0x15) \ + ROUNDING_MODE_CASE(CASE, 0x16) \ + ROUNDING_MODE_CASE(CASE, 0x17) \ + ROUNDING_MODE_CASE(CASE, 0x18) \ + ROUNDING_MODE_CASE(CASE, 0x19) \ + ROUNDING_MODE_CASE(CASE, 0x1a) \ + ROUNDING_MODE_CASE(CASE, 0x1b) \ + ROUNDING_MODE_CASE(CASE, 0x1c) \ + ROUNDING_MODE_CASE(CASE, 0x1d) \ + ROUNDING_MODE_CASE(CASE, 0x1e) \ + ROUNDING_MODE_CASE(CASE, 0x1f) \ + ROUNDING_MODE_CASE(CASE, 0x20) \ + ROUNDING_MODE_CASE(CASE, 0x21) \ + ROUNDING_MODE_CASE(CASE, 0x22) \ + ROUNDING_MODE_CASE(CASE, 0x23) \ + ROUNDING_MODE_CASE(CASE, 0x24) \ + ROUNDING_MODE_CASE(CASE, 0x25) \ + ROUNDING_MODE_CASE(CASE, 0x26) \ + ROUNDING_MODE_CASE(CASE, 0x27) \ + ROUNDING_MODE_CASE(CASE, 0x28) \ + ROUNDING_MODE_CASE(CASE, 0x29) \ + ROUNDING_MODE_CASE(CASE, 0x2a) \ + ROUNDING_MODE_CASE(CASE, 0x2b) \ + ROUNDING_MODE_CASE(CASE, 0x2c) \ + ROUNDING_MODE_CASE(CASE, 0x2d) \ + ROUNDING_MODE_CASE(CASE, 0x2e) \ + ROUNDING_MODE_CASE(CASE, 0x2f) \ + ROUNDING_MODE_CASE(CASE, 0x30) \ + ROUNDING_MODE_CASE(CASE, 0x31) \ + ROUNDING_MODE_CASE(CASE, 0x32) \ + ROUNDING_MODE_CASE(CASE, 0x33) \ + ROUNDING_MODE_CASE(CASE, 0x34) \ + ROUNDING_MODE_CASE(CASE, 0x35) \ + ROUNDING_MODE_CASE(CASE, 0x36) \ + ROUNDING_MODE_CASE(CASE, 0x37) \ + ROUNDING_MODE_CASE(CASE, 0x38) \ + ROUNDING_MODE_CASE(CASE, 0x39) \ + ROUNDING_MODE_CASE(CASE, 0x3a) \ + ROUNDING_MODE_CASE(CASE, 0x3b) \ + ROUNDING_MODE_CASE(CASE, 0x3c) \ + ROUNDING_MODE_CASE(CASE, 0x3d) \ + ROUNDING_MODE_CASE(CASE, 0x3e) \ + ROUNDING_MODE_CASE(CASE, 0x3f) - using FPT = mcl::unsigned_integer_of_size; // WORKAROUND: For issue 678 on MSVC - auto const func = [rounding]() -> void(*)(VectorArray& output, const VectorArray& input, FP::FPCR fpcr, FP::FPSR& fpsr) { - switch (rounding) { - case FP::RoundingMode::ToNearest_TieEven: - return [](VectorArray& output, const VectorArray& input, FP::FPCR fpcr, FP::FPSR& fpsr) { - for (size_t i = 0; i < output.size(); ++i) - output[i] = FPT(FP::FPToFixed(fsize, input[i], fsize, unsigned_, fpcr, FP::RoundingMode::ToNearest_TieEven, fpsr)); - }; - case FP::RoundingMode::TowardsPlusInfinity: - return [](VectorArray& output, const VectorArray& input, FP::FPCR fpcr, FP::FPSR& fpsr) { - for (size_t i = 0; i < output.size(); ++i) - output[i] = FPT(FP::FPToFixed(fsize, input[i], fsize, unsigned_, fpcr, FP::RoundingMode::TowardsPlusInfinity, fpsr)); - }; - case FP::RoundingMode::TowardsMinusInfinity: - return [](VectorArray& output, const VectorArray& input, FP::FPCR fpcr, FP::FPSR& fpsr) { - for (size_t i = 0; i < output.size(); ++i) - output[i] = FPT(FP::FPToFixed(fsize, input[i], fsize, unsigned_, fpcr, FP::RoundingMode::TowardsMinusInfinity, fpsr)); - }; - case FP::RoundingMode::TowardsZero: - return [](VectorArray& output, const VectorArray& input, FP::FPCR fpcr, FP::FPSR& fpsr) { - for (size_t i = 0; i < output.size(); ++i) - output[i] = FPT(FP::FPToFixed(fsize, input[i], fsize, unsigned_, fpcr, FP::RoundingMode::TowardsZero, fpsr)); - }; - case FP::RoundingMode::ToNearest_TieAwayFromZero: - return [](VectorArray& output, const VectorArray& input, FP::FPCR fpcr, FP::FPSR& fpsr) { - for (size_t i = 0; i < output.size(); ++i) - output[i] = FPT(FP::FPToFixed(fsize, input[i], fsize, unsigned_, fpcr, FP::RoundingMode::ToNearest_TieAwayFromZero, fpsr)); - }; - case FP::RoundingMode::ToOdd: - return [](VectorArray& output, const VectorArray& input, FP::FPCR fpcr, FP::FPSR& fpsr) { - for (size_t i = 0; i < output.size(); ++i) - output[i] = FPT(FP::FPToFixed(fsize, input[i], fsize, unsigned_, fpcr, FP::RoundingMode::ToOdd, fpsr)); - }; - } + // FUCK YOU MSVC, FUCKING DEPTH CANT EVEN HANDLE 8+16+32+64 DEPTH OF A ELSE STATMENT YOU FUCKING STUPID + // BURN MSVC BURN IT STUPID COMPILER CAN'T EVEN COMPILE THE MOST BASIC C++ + ROUNDING_MODE_SWITCH(ToNearest_TieEven) + ROUNDING_MODE_SWITCH(TowardsPlusInfinity) + ROUNDING_MODE_SWITCH(TowardsMinusInfinity) + ROUNDING_MODE_SWITCH(TowardsZero) + ROUNDING_MODE_SWITCH(ToNearest_TieAwayFromZero) +#undef ROUNDING_MODE_SWITCH +#undef ROUNDING_MODE_CASE + return nullptr; }(); - EmitTwoOpFallback<3>(code, ctx, inst, func); + + EmitTwoOpFallback<3>(code, ctx, inst, fpt_fn); } void EmitX64::EmitFPVectorToSignedFixed16(EmitContext& ctx, IR::Inst* inst) { diff --git a/src/dynarmic/src/dynarmic/backend/x64/emit_x64_vector_saturation.cpp b/src/dynarmic/src/dynarmic/backend/x64/emit_x64_vector_saturation.cpp index f0b02169d7..f9ad53c5a7 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/emit_x64_vector_saturation.cpp +++ b/src/dynarmic/src/dynarmic/backend/x64/emit_x64_vector_saturation.cpp @@ -6,7 +6,7 @@ * SPDX-License-Identifier: 0BSD */ -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/backend/x64/block_of_code.h" #include "dynarmic/backend/x64/constants.h" diff --git a/src/dynarmic/src/dynarmic/backend/x64/exception_handler_windows.cpp b/src/dynarmic/src/dynarmic/backend/x64/exception_handler_windows.cpp index bae397ff2b..8d98d4e1fa 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/exception_handler_windows.cpp +++ b/src/dynarmic/src/dynarmic/backend/x64/exception_handler_windows.cpp @@ -12,9 +12,9 @@ #include #include -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/backend/exception_handler.h" #include "dynarmic/backend/x64/block_of_code.h" diff --git a/src/dynarmic/src/dynarmic/backend/x64/exclusive_monitor.cpp b/src/dynarmic/src/dynarmic/backend/x64/exclusive_monitor.cpp index f8237c99e8..c7fee69214 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/exclusive_monitor.cpp +++ b/src/dynarmic/src/dynarmic/backend/x64/exclusive_monitor.cpp @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -10,7 +10,7 @@ #include -#include "dynarmic/common/assert.h" +#include "common/assert.h" namespace Dynarmic { diff --git a/src/dynarmic/src/dynarmic/backend/x64/host_feature.h b/src/dynarmic/src/dynarmic/backend/x64/host_feature.h index 34dca971cb..019a36635b 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/host_feature.h +++ b/src/dynarmic/src/dynarmic/backend/x64/host_feature.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -8,7 +8,7 @@ #pragma once -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" namespace Dynarmic::Backend::X64 { diff --git a/src/dynarmic/src/dynarmic/backend/x64/hostloc.h b/src/dynarmic/src/dynarmic/backend/x64/hostloc.h index 2feecf5d5e..7191a0ceba 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/hostloc.h +++ b/src/dynarmic/src/dynarmic/backend/x64/hostloc.h @@ -10,8 +10,8 @@ #include #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/common_types.h" +#include "common/assert.h" +#include "common/common_types.h" #include "dynarmic/backend/x64/xbyak.h" namespace Dynarmic::Backend::X64 { diff --git a/src/dynarmic/src/dynarmic/backend/x64/nzcv_util.h b/src/dynarmic/src/dynarmic/backend/x64/nzcv_util.h index 1ee0ed4329..2abe06e035 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/nzcv_util.h +++ b/src/dynarmic/src/dynarmic/backend/x64/nzcv_util.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -8,17 +8,18 @@ #pragma once -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" +#include namespace Dynarmic::Backend::X64::NZCV { constexpr u32 arm_mask = 0xF000'0000; constexpr u32 x64_mask = 0xC101; -constexpr size_t x64_n_flag_bit = 15; -constexpr size_t x64_z_flag_bit = 14; -constexpr size_t x64_c_flag_bit = 8; -constexpr size_t x64_v_flag_bit = 0; +constexpr std::size_t x64_n_flag_bit = 15; +constexpr std::size_t x64_z_flag_bit = 14; +constexpr std::size_t x64_c_flag_bit = 8; +constexpr std::size_t x64_v_flag_bit = 0; /// This is a constant used to create the x64 flags format from the ARM format. /// NZCV * multiplier: NZCV0NZCV000NZCV @@ -46,7 +47,7 @@ inline u32 FromX64(u32 x64_flags) { nzcv |= mcl::bit::get_bit<15>(x64_flags) ? 1 << 31 : 0; nzcv |= mcl::bit::get_bit<14>(x64_flags) ? 1 << 30 : 0; nzcv |= mcl::bit::get_bit<8>(x64_flags) ? 1 << 29 : 0; - nzcv |= mcl::bit::get_bit<0>(x64_flags) ? 1 << 28 : 0; + nzcv |= mcl::bit::get_bit<0>(x64_flaags) ? 1 << 28 : 0; return nzcv; */ return ((x64_flags & x64_mask) * from_x64_multiplier) & arm_mask; diff --git a/src/dynarmic/src/dynarmic/backend/x64/oparg.h b/src/dynarmic/src/dynarmic/backend/x64/oparg.h index d16728d19f..7366c0c7a3 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/oparg.h +++ b/src/dynarmic/src/dynarmic/backend/x64/oparg.h @@ -8,7 +8,7 @@ #pragma once -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/backend/x64/xbyak.h" namespace Dynarmic::Backend::X64 { diff --git a/src/dynarmic/src/dynarmic/backend/x64/perf_map.cpp b/src/dynarmic/src/dynarmic/backend/x64/perf_map.cpp index 095d6194f6..eaa6c9e2b8 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/perf_map.cpp +++ b/src/dynarmic/src/dynarmic/backend/x64/perf_map.cpp @@ -11,7 +11,7 @@ #include #include "dynarmic/backend/x64/perf_map.h" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #if defined(__linux__) && !defined(__ANDROID__) # include # include diff --git a/src/dynarmic/src/dynarmic/backend/x64/reg_alloc.cpp b/src/dynarmic/src/dynarmic/backend/x64/reg_alloc.cpp index 2cfa14ae18..5a828839c1 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/reg_alloc.cpp +++ b/src/dynarmic/src/dynarmic/backend/x64/reg_alloc.cpp @@ -13,7 +13,7 @@ #include #include "dynarmic/backend/x64/hostloc.h" -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include #include "dynarmic/backend/x64/xbyak.h" diff --git a/src/dynarmic/src/dynarmic/backend/x64/reg_alloc.h b/src/dynarmic/src/dynarmic/backend/x64/reg_alloc.h index 746d6b723f..455c6a970a 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/reg_alloc.h +++ b/src/dynarmic/src/dynarmic/backend/x64/reg_alloc.h @@ -13,7 +13,7 @@ #include #include "boost/container/small_vector.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/backend/x64/xbyak.h" #include #include diff --git a/src/dynarmic/src/dynarmic/backend/x64/stack_layout.h b/src/dynarmic/src/dynarmic/backend/x64/stack_layout.h index 43a3fc7ab2..b5fd1f04e9 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/stack_layout.h +++ b/src/dynarmic/src/dynarmic/backend/x64/stack_layout.h @@ -9,12 +9,13 @@ #pragma once #include +#include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" namespace Dynarmic::Backend::X64 { -constexpr size_t SpillCount = 64; +constexpr std::size_t SpillCount = 64; #ifdef _MSC_VER # pragma warning(push) diff --git a/src/dynarmic/src/dynarmic/backend/x64/verbose_debugging_output.h b/src/dynarmic/src/dynarmic/backend/x64/verbose_debugging_output.h index 3f4823010b..25c4ddc677 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/verbose_debugging_output.h +++ b/src/dynarmic/src/dynarmic/backend/x64/verbose_debugging_output.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -10,7 +10,7 @@ #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/backend/x64/stack_layout.h" diff --git a/src/dynarmic/src/dynarmic/common/assert.cpp b/src/dynarmic/src/dynarmic/common/assert.cpp deleted file mode 100644 index e3419514e8..0000000000 --- a/src/dynarmic/src/dynarmic/common/assert.cpp +++ /dev/null @@ -1,13 +0,0 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project -// SPDX-License-Identifier: GPL-3.0-or-later -// SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project -// SPDX-License-Identifier: GPL-2.0-or-later - -#include -#include - -[[noreturn]] void assert_terminate_impl(const char* s) { - std::puts(s); - std::fflush(stderr); - std::terminate(); -} diff --git a/src/dynarmic/src/dynarmic/common/assert.h b/src/dynarmic/src/dynarmic/common/assert.h deleted file mode 100644 index a79d865974..0000000000 --- a/src/dynarmic/src/dynarmic/common/assert.h +++ /dev/null @@ -1,27 +0,0 @@ -// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project -// SPDX-License-Identifier: GPL-3.0-or-later -// SPDX-FileCopyrightText: 2013 Dolphin Emulator Project -// SPDX-FileCopyrightText: 2014 Citra Emulator Project -// SPDX-License-Identifier: GPL-2.0-or-later - -#pragma once - -// TODO: Use source_info? -[[noreturn]] void assert_terminate_impl(const char* s); -#ifndef ASSERT -# define ASSERT(expr) do { auto&& condition = !(expr); if(condition) [[unlikely]] assert_terminate_impl(__FILE__ ": " #expr); } while(0) -#endif -#ifndef UNREACHABLE -# ifdef _MSC_VER -# define UNREACHABLE() ASSERT(false && __FILE__ ": unreachable") -# else -# define UNREACHABLE() __builtin_unreachable(); -# endif -#endif -#ifndef DEBUG_ASSERT -# ifndef NDEBUG -# define DEBUG_ASSERT(_a_) ASSERT(_a_) -# else -# define DEBUG_ASSERT(_a_) -# endif -#endif diff --git a/src/dynarmic/src/dynarmic/common/atomic.h b/src/dynarmic/src/dynarmic/common/atomic.h index 966921eb9a..5eb4288517 100644 --- a/src/dynarmic/src/dynarmic/common/atomic.h +++ b/src/dynarmic/src/dynarmic/common/atomic.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -8,7 +8,7 @@ #pragma once -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" namespace Dynarmic::Atomic { diff --git a/src/dynarmic/src/dynarmic/common/common_types.h b/src/dynarmic/src/dynarmic/common/common_types.h deleted file mode 100644 index 711418d97f..0000000000 --- a/src/dynarmic/src/dynarmic/common/common_types.h +++ /dev/null @@ -1,26 +0,0 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project -// SPDX-License-Identifier: GPL-3.0-or-later - -// TODO(crueter): This is identical to root common_types.h - -#pragma once - -#include -#include -#include - -using u8 = std::uint8_t; ///< 8-bit unsigned byte -using u16 = std::uint16_t; ///< 16-bit unsigned short -using u32 = std::uint32_t; ///< 32-bit unsigned word -using u64 = std::uint64_t; ///< 64-bit unsigned int - -using s8 = std::int8_t; ///< 8-bit signed byte -using s16 = std::int16_t; ///< 16-bit signed short -using s32 = std::int32_t; ///< 32-bit signed word -using s64 = std::int64_t; ///< 64-bit signed int - -using f32 = float; ///< 32-bit floating point -using f64 = double; ///< 64-bit floating point - -using u128 = std::array; -static_assert(sizeof(u128) == 16, "u128 must be 128 bits wide"); diff --git a/src/dynarmic/src/dynarmic/common/context.h b/src/dynarmic/src/dynarmic/common/context.h index 941289cb94..e849c9861b 100644 --- a/src/dynarmic/src/dynarmic/common/context.h +++ b/src/dynarmic/src/dynarmic/common/context.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later #pragma once @@ -34,51 +34,24 @@ # endif #endif -#ifdef ARCHITECTURE_x86_64 +#ifdef ARCHITECTURE_arm64 # ifdef __OpenBSD__ # define CTX_DECLARE(raw_context) ucontext_t* ucontext = reinterpret_cast(raw_context); # else -# define CTX_DECLARE(raw_context) \ - ucontext_t* ucontext = reinterpret_cast(raw_context); \ - [[maybe_unused]] auto& mctx = ucontext->uc_mcontext; -# endif -#elif defined(ARCHITECTURE_arm64) -# ifdef __OpenBSD__ -# define CTX_DECLARE(raw_context) ucontext_t* ucontext = reinterpret_cast(raw_context); -# else -# define CTX_DECLARE(raw_context) \ - ucontext_t* ucontext = reinterpret_cast(raw_context); \ +# define CTX_DECLARE(raw_context) ucontext_t* ucontext = reinterpret_cast(raw_context); \ [[maybe_unused]] auto& mctx = ucontext->uc_mcontext; \ [[maybe_unused]] const auto fpctx = GetFloatingPointState(mctx); # endif +#else +# ifdef __OpenBSD__ +# define CTX_DECLARE(raw_context) ucontext_t* ucontext = reinterpret_cast(raw_context); +# else +# define CTX_DECLARE(raw_context) ucontext_t* ucontext = reinterpret_cast(raw_context); \ + [[maybe_unused]] auto& mctx = ucontext->uc_mcontext; +# endif #endif -#if defined(ARCHITECTURE_x86_64) -# if defined(__APPLE__) -# define CTX_RIP (mctx->__ss.__rip) -# define CTX_RSP (mctx->__ss.__rsp) -# elif defined(__linux__) -# define CTX_RIP (mctx.gregs[REG_RIP]) -# define CTX_RSP (mctx.gregs[REG_RSP]) -# elif defined(__FreeBSD__) -# define CTX_RIP (mctx.mc_rip) -# define CTX_RSP (mctx.mc_rsp) -# elif defined(__NetBSD__) -# define CTX_RIP (mctx.__gregs[_REG_RIP]) -# define CTX_RSP (mctx.__gregs[_REG_RSP]) -# elif defined(__OpenBSD__) -# define CTX_RIP (ucontext->sc_rip) -# define CTX_RSP (ucontext->sc_rsp) -# elif defined(__sun__) -# define CTX_RIP (mctx.gregs[REG_RIP]) -# define CTX_RSP (mctx.gregs[REG_RSP]) -# elif defined(__DragonFly__) -# define CTX_RIP (mctx.mc_rip) -# define CTX_RSP (mctx.mc_rsp) -# else -# error "Unknown platform" -# endif -#elif defined(ARCHITECTURE_arm64) +#ifdef ARCHITECTURE_arm64 # if defined(__APPLE__) # define CTX_PC (mctx->__ss.__pc) # define CTX_SP (mctx->__ss.__sp) @@ -110,14 +83,113 @@ # define CTX_X(i) (mctx.mc_gpregs.gp_x[i]) # define CTX_Q(i) (mctx.mc_fpregs.fp_q[i]) # elif defined(__OpenBSD__) +// https://github.com/openbsd/src/blob/master/sys/arch/arm64/include/signal.h # define CTX_PC (ucontext->sc_elr) # define CTX_SP (ucontext->sc_sp) # define CTX_LR (ucontext->sc_lr) # define CTX_X(i) (ucontext->sc_x[i]) # define CTX_Q(i) (ucontext->sc_q[i]) # else -# error "Unknown platform" +# error "unknown platform" # endif +#elif defined(__NetBSD__) +// NetBSD always has useful macros for everything don't they? +// Basically this special path means that for every arch that NetBSD supports +// it atleast has the macro for _UC_MACHINE defined, thus it will be avoided on the +// other macro branches! +// https://github.com/NetBSD/src/blob/trunk/sys/arch/powerpc/include/mcontext.h +// https://github.com/NetBSD/src/blob/trunk/sys/arch/mips/include/mcontext.h +# define CTX_PC (_UC_MACHINE_PC(ucontext)) +# define CTX_SP (_UC_MACHINE_SP(ucontext)) +#elif defined(ARCHITECTURE_x86_64) +# if defined(__APPLE__) +# define CTX_RIP (mctx->__ss.__rip) +# define CTX_RSP (mctx->__ss.__rsp) +# elif defined(__linux__) +# define CTX_RIP (mctx.gregs[REG_RIP]) +# define CTX_RSP (mctx.gregs[REG_RSP]) +# elif defined(__FreeBSD__) +# define CTX_RIP (mctx.mc_rip) +# define CTX_RSP (mctx.mc_rsp) +# elif defined(__OpenBSD__) +// https://github.com/openbsd/src/blob/master/sys/arch/x86_64/include/signal.h +# define CTX_RIP (ucontext->sc_rip) +# define CTX_RSP (ucontext->sc_rsp) +# elif defined(__sun__) +# define CTX_RIP (mctx.gregs[REG_RIP]) +# define CTX_RSP (mctx.gregs[REG_RSP]) +# elif defined(__DragonFly__) +# define CTX_RIP (mctx.mc_rip) +# define CTX_RSP (mctx.mc_rsp) +# else +# error "unknown platform" +# endif +#elif defined(ARCHITECTURE_riscv64) +# if defined(__FreeBSD__) +# define CTX_SEPC (mctx.mc_gpregs.gp_sepc) +# define CTX_SP (mctx.mc_gpregs.gp_sp) +# elif defined(__linux__) +# define CTX_SEPC (mctx.__gregs[REG_PC]) +# define CTX_SP (mctx.__gregs[REG_SP]) +# elif defined(__OpenBSD__) +// https://github.com/openbsd/src/blob/master/sys/arch/riscv64/include/signal.h +# define CTX_SEPC (ucontext->sc_sepc) +# define CTX_SP (ucontext->sc_sp) +# else +# error "unknown platform" +# endif +#elif defined(ARCHITECTURE_powerpc64) +# if defined(__FreeBSD__) +# define CTX_PC (mctx.mc_srr0) +# define CTX_SP (mctx.mc_gpr[1]) +# elif defined(__linux__) +// https://github.com/lattera/glibc/blob/master/sysdeps/unix/sysv/linux/powerpc/sys/ucontext.h +# define CTX_PC (mctx.__regs[REG_PC]) +# define CTX_SP (mctx.__regs[REG_SP]) +# elif defined(__OpenBSD__) +// https://github.com/openbsd/src/blob/master/sys/arch/powerpc64/include/signal.h +# define CTX_PC (ucontext->sc_pc) +# define CTX_SP (ucontext->sc_reg[1]) +# else +# error "unknown platform" +# endif +#elif defined(ARCHITECTURE_mips64) +# if defined(__linux__) +// https://github.com/lattera/glibc/blob/master/sysdeps/unix/sysv/linux/mips/sys/ucontext.h +# define CTX_PC (mctx.__pc) +# define CTX_SP (mctx.__gregs[29]) +# elif defined(__OpenBSD__) +// https://github.com/openbsd/src/blob/master/sys/arch/mips64/include/signal.h +# define CTX_PC (ucontext->sc_pc) +# define CTX_SP (ucontext->sc_regs[29]) +# else +# error "unknown platform" +# endif +#elif defined(ARCHITECTURE_loongarch64) +# if defined(__linux__) +// https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/sysdeps/unix/sysv/linux/loongarch/sys/ucontext.h +# define CTX_PC (mctx.__pc) +# define CTX_SP (mctx.__gregs[LARCH_REG_SP]) +# elif defined(__OpenBSD__) +// Literally MIPS64 copypaste? +// https://github.com/openbsd/src/blob/master/sys/arch/loongson/include/signal.h +# define CTX_PC (ucontext->sc_pc) +# define CTX_SP (ucontext->sc_regs[29]) +# else +# error "unknown platform" +# endif +#elif defined(ARCHITECTURE_sparc64) +# if defined(__linux__) +// https://github.com/lattera/glibc/blob/master/sysdeps/unix/sysv/linux/mips/sys/ucontext.h +# define CTX_PC (mctx.__gregs[1]) //%pc +# define CTX_SP (mctx.__gregs[17]) //%o6 +# elif defined(__OpenBSD__) +// https://github.com/openbsd/src/blob/master/sys/arch/sparc64/include/signal.h +# define CTX_PC (ucontext->sc_pc) +# define CTX_SP (ucontext->sc_sp) +# else +# error "unknown platform" +# endif #else # error "unimplemented" #endif diff --git a/src/dynarmic/src/dynarmic/common/crypto/aes.cpp b/src/dynarmic/src/dynarmic/common/crypto/aes.cpp index c72481fbe3..12ebf1ed04 100644 --- a/src/dynarmic/src/dynarmic/common/crypto/aes.cpp +++ b/src/dynarmic/src/dynarmic/common/crypto/aes.cpp @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -10,7 +10,7 @@ #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" namespace Dynarmic::Common::Crypto::AES { @@ -133,8 +133,8 @@ static void InverseShiftRows(State& out_state, const State& state) { } static void SubBytes(State& state, const SubstitutionTable& table) { - for (size_t i = 0; i < 4; i++) { - for (size_t j = 0; j < 4; j++) { + for (std::size_t i = 0; i < 4; i++) { + for (std::size_t j = 0; j < 4; j++) { state[4 * i + j] = table[state[4 * i + j]]; } } @@ -151,7 +151,7 @@ void EncryptSingleRound(State& out_state, const State& state) { } void MixColumns(State& out_state, const State& state) { - for (size_t i = 0; i < out_state.size(); i += 4) { + for (std::size_t i = 0; i < out_state.size(); i += 4) { const u8 a = state[i]; const u8 b = state[i + 1]; const u8 c = state[i + 2]; @@ -167,7 +167,7 @@ void MixColumns(State& out_state, const State& state) { } void InverseMixColumns(State& out_state, const State& state) { - for (size_t i = 0; i < out_state.size(); i += 4) { + for (std::size_t i = 0; i < out_state.size(); i += 4) { const u8 a = state[i]; const u8 b = state[i + 1]; const u8 c = state[i + 2]; diff --git a/src/dynarmic/src/dynarmic/common/crypto/aes.h b/src/dynarmic/src/dynarmic/common/crypto/aes.h index f5d68fe166..395baf674a 100644 --- a/src/dynarmic/src/dynarmic/common/crypto/aes.h +++ b/src/dynarmic/src/dynarmic/common/crypto/aes.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -10,7 +10,7 @@ #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" namespace Dynarmic::Common::Crypto::AES { diff --git a/src/dynarmic/src/dynarmic/common/crypto/crc32.cpp b/src/dynarmic/src/dynarmic/common/crypto/crc32.cpp index 6b9c129a44..b476b8d8f8 100644 --- a/src/dynarmic/src/dynarmic/common/crypto/crc32.cpp +++ b/src/dynarmic/src/dynarmic/common/crypto/crc32.cpp @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -10,7 +10,7 @@ #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" namespace Dynarmic::Common::Crypto::CRC32 { diff --git a/src/dynarmic/src/dynarmic/common/crypto/crc32.h b/src/dynarmic/src/dynarmic/common/crypto/crc32.h index 391bd8074b..f4057b9793 100644 --- a/src/dynarmic/src/dynarmic/common/crypto/crc32.h +++ b/src/dynarmic/src/dynarmic/common/crypto/crc32.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -8,7 +8,7 @@ #pragma once -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" namespace Dynarmic::Common::Crypto::CRC32 { diff --git a/src/dynarmic/src/dynarmic/common/fp/fpcr.h b/src/dynarmic/src/dynarmic/common/fp/fpcr.h index 948917bc35..038800c7c2 100644 --- a/src/dynarmic/src/dynarmic/common/fp/fpcr.h +++ b/src/dynarmic/src/dynarmic/common/fp/fpcr.h @@ -10,9 +10,9 @@ #include -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/common/fp/rounding_mode.h" diff --git a/src/dynarmic/src/dynarmic/common/fp/fpsr.h b/src/dynarmic/src/dynarmic/common/fp/fpsr.h index caa5cb92c7..18dd177111 100644 --- a/src/dynarmic/src/dynarmic/common/fp/fpsr.h +++ b/src/dynarmic/src/dynarmic/common/fp/fpsr.h @@ -9,7 +9,7 @@ #pragma once #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" namespace Dynarmic::FP { diff --git a/src/dynarmic/src/dynarmic/common/fp/info.h b/src/dynarmic/src/dynarmic/common/fp/info.h index eebca0fc0c..dae10729ee 100644 --- a/src/dynarmic/src/dynarmic/common/fp/info.h +++ b/src/dynarmic/src/dynarmic/common/fp/info.h @@ -9,7 +9,7 @@ #pragma once #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" namespace Dynarmic::FP { diff --git a/src/dynarmic/src/dynarmic/common/fp/mantissa_util.h b/src/dynarmic/src/dynarmic/common/fp/mantissa_util.h index 43bb5fe604..766fb8f9a4 100644 --- a/src/dynarmic/src/dynarmic/common/fp/mantissa_util.h +++ b/src/dynarmic/src/dynarmic/common/fp/mantissa_util.h @@ -9,7 +9,7 @@ #pragma once #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" namespace Dynarmic::FP { diff --git a/src/dynarmic/src/dynarmic/common/fp/op/FPConvert.cpp b/src/dynarmic/src/dynarmic/common/fp/op/FPConvert.cpp index 82803f715d..395ca5c926 100644 --- a/src/dynarmic/src/dynarmic/common/fp/op/FPConvert.cpp +++ b/src/dynarmic/src/dynarmic/common/fp/op/FPConvert.cpp @@ -9,7 +9,7 @@ #include "dynarmic/common/fp/op/FPConvert.h" #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/common/fp/fpcr.h" #include "dynarmic/common/fp/fpsr.h" diff --git a/src/dynarmic/src/dynarmic/common/fp/op/FPMulAdd.cpp b/src/dynarmic/src/dynarmic/common/fp/op/FPMulAdd.cpp index 6990b135f6..1f0b6a8657 100644 --- a/src/dynarmic/src/dynarmic/common/fp/op/FPMulAdd.cpp +++ b/src/dynarmic/src/dynarmic/common/fp/op/FPMulAdd.cpp @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -8,7 +8,7 @@ #include "dynarmic/common/fp/op/FPMulAdd.h" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/common/fp/fpcr.h" #include "dynarmic/common/fp/fpsr.h" diff --git a/src/dynarmic/src/dynarmic/common/fp/op/FPRSqrtEstimate.cpp b/src/dynarmic/src/dynarmic/common/fp/op/FPRSqrtEstimate.cpp index 6b2d43e1ce..c4aa8bcb74 100644 --- a/src/dynarmic/src/dynarmic/common/fp/op/FPRSqrtEstimate.cpp +++ b/src/dynarmic/src/dynarmic/common/fp/op/FPRSqrtEstimate.cpp @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -8,7 +8,7 @@ #include "dynarmic/common/fp/op/FPRSqrtEstimate.h" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/common/fp/fpcr.h" #include "dynarmic/common/fp/fpsr.h" diff --git a/src/dynarmic/src/dynarmic/common/fp/op/FPRecipEstimate.cpp b/src/dynarmic/src/dynarmic/common/fp/op/FPRecipEstimate.cpp index edab4bf147..42de9a0ed1 100644 --- a/src/dynarmic/src/dynarmic/common/fp/op/FPRecipEstimate.cpp +++ b/src/dynarmic/src/dynarmic/common/fp/op/FPRecipEstimate.cpp @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -10,8 +10,8 @@ #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/common_types.h" +#include "common/assert.h" +#include "common/common_types.h" #include "dynarmic/common/fp/fpcr.h" #include "dynarmic/common/fp/fpsr.h" diff --git a/src/dynarmic/src/dynarmic/common/fp/op/FPRecipExponent.cpp b/src/dynarmic/src/dynarmic/common/fp/op/FPRecipExponent.cpp index 332870eb8a..b6fc63293f 100644 --- a/src/dynarmic/src/dynarmic/common/fp/op/FPRecipExponent.cpp +++ b/src/dynarmic/src/dynarmic/common/fp/op/FPRecipExponent.cpp @@ -9,7 +9,7 @@ #include "dynarmic/common/fp/op/FPRecipExponent.h" #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/common/fp/fpcr.h" #include "dynarmic/common/fp/fpsr.h" diff --git a/src/dynarmic/src/dynarmic/common/fp/op/FPRoundInt.cpp b/src/dynarmic/src/dynarmic/common/fp/op/FPRoundInt.cpp index 4bcfcd7c8a..426c66efec 100644 --- a/src/dynarmic/src/dynarmic/common/fp/op/FPRoundInt.cpp +++ b/src/dynarmic/src/dynarmic/common/fp/op/FPRoundInt.cpp @@ -8,9 +8,9 @@ #include "dynarmic/common/fp/op/FPRoundInt.h" -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/common/fp/fpcr.h" #include "dynarmic/common/fp/fpsr.h" diff --git a/src/dynarmic/src/dynarmic/common/fp/op/FPRoundInt.h b/src/dynarmic/src/dynarmic/common/fp/op/FPRoundInt.h index 1eb2bd8877..83dd9f9447 100644 --- a/src/dynarmic/src/dynarmic/common/fp/op/FPRoundInt.h +++ b/src/dynarmic/src/dynarmic/common/fp/op/FPRoundInt.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -8,7 +8,7 @@ #pragma once -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" namespace Dynarmic::FP { diff --git a/src/dynarmic/src/dynarmic/common/fp/op/FPToFixed.cpp b/src/dynarmic/src/dynarmic/common/fp/op/FPToFixed.cpp index 2f37797b70..d920f2d900 100644 --- a/src/dynarmic/src/dynarmic/common/fp/op/FPToFixed.cpp +++ b/src/dynarmic/src/dynarmic/common/fp/op/FPToFixed.cpp @@ -9,9 +9,9 @@ #include "dynarmic/common/fp/op/FPToFixed.h" #include -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/common/fp/fpcr.h" #include "dynarmic/common/fp/fpsr.h" diff --git a/src/dynarmic/src/dynarmic/common/fp/op/FPToFixed.h b/src/dynarmic/src/dynarmic/common/fp/op/FPToFixed.h index 6e19607d51..9d33fa53fb 100644 --- a/src/dynarmic/src/dynarmic/common/fp/op/FPToFixed.h +++ b/src/dynarmic/src/dynarmic/common/fp/op/FPToFixed.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -8,7 +8,7 @@ #pragma once -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" namespace Dynarmic::FP { @@ -17,6 +17,6 @@ class FPSR; enum class RoundingMode; template -u64 FPToFixed(size_t ibits, FPT op, size_t fbits, bool unsigned_, FPCR fpcr, RoundingMode rounding, FPSR& fpsr); +u64 FPToFixed(std::size_t ibits, FPT op, std::size_t fbits, bool unsigned_, FPCR fpcr, RoundingMode rounding, FPSR& fpsr); } // namespace Dynarmic::FP diff --git a/src/dynarmic/src/dynarmic/common/fp/process_exception.cpp b/src/dynarmic/src/dynarmic/common/fp/process_exception.cpp index 33e095de47..2fee438246 100644 --- a/src/dynarmic/src/dynarmic/common/fp/process_exception.cpp +++ b/src/dynarmic/src/dynarmic/common/fp/process_exception.cpp @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -8,7 +8,7 @@ #include "dynarmic/common/fp/process_exception.h" -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/common/fp/fpcr.h" #include "dynarmic/common/fp/fpsr.h" diff --git a/src/dynarmic/src/dynarmic/common/fp/process_nan.cpp b/src/dynarmic/src/dynarmic/common/fp/process_nan.cpp index 7f47852d98..acc9c329e8 100644 --- a/src/dynarmic/src/dynarmic/common/fp/process_nan.cpp +++ b/src/dynarmic/src/dynarmic/common/fp/process_nan.cpp @@ -10,7 +10,7 @@ #include -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/mcl/bit.hpp" #include "dynarmic/common/fp/fpcr.h" diff --git a/src/dynarmic/src/dynarmic/common/fp/unpacked.h b/src/dynarmic/src/dynarmic/common/fp/unpacked.h index effc604fb0..ca842c6e9e 100644 --- a/src/dynarmic/src/dynarmic/common/fp/unpacked.h +++ b/src/dynarmic/src/dynarmic/common/fp/unpacked.h @@ -11,7 +11,7 @@ #include #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/common/fp/fpcr.h" diff --git a/src/dynarmic/src/dynarmic/common/llvm_disassemble.cpp b/src/dynarmic/src/dynarmic/common/llvm_disassemble.cpp index 068c531f70..6aff6d6cc7 100644 --- a/src/dynarmic/src/dynarmic/common/llvm_disassemble.cpp +++ b/src/dynarmic/src/dynarmic/common/llvm_disassemble.cpp @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -15,9 +15,9 @@ # include #endif -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/common/llvm_disassemble.h" diff --git a/src/dynarmic/src/dynarmic/common/llvm_disassemble.h b/src/dynarmic/src/dynarmic/common/llvm_disassemble.h index 226b742ec5..7fbd9495d1 100644 --- a/src/dynarmic/src/dynarmic/common/llvm_disassemble.h +++ b/src/dynarmic/src/dynarmic/common/llvm_disassemble.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -10,7 +10,7 @@ #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" namespace Dynarmic::Common { diff --git a/src/dynarmic/src/dynarmic/common/math_util.h b/src/dynarmic/src/dynarmic/common/math_util.h index 8915100ae4..edf2a8229f 100644 --- a/src/dynarmic/src/dynarmic/common/math_util.h +++ b/src/dynarmic/src/dynarmic/common/math_util.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -10,7 +10,7 @@ #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" namespace Dynarmic::Common { diff --git a/src/dynarmic/src/dynarmic/common/safe_ops.h b/src/dynarmic/src/dynarmic/common/safe_ops.h index 5cc8cb5049..f5559336e0 100644 --- a/src/dynarmic/src/dynarmic/common/safe_ops.h +++ b/src/dynarmic/src/dynarmic/common/safe_ops.h @@ -11,7 +11,7 @@ #include #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/common/u128.h" diff --git a/src/dynarmic/src/dynarmic/common/spin_lock_riscv64.cpp b/src/dynarmic/src/dynarmic/common/spin_lock_riscv64.cpp new file mode 100644 index 0000000000..bd07b8c915 --- /dev/null +++ b/src/dynarmic/src/dynarmic/common/spin_lock_riscv64.cpp @@ -0,0 +1,16 @@ +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project +// SPDX-License-Identifier: GPL-3.0-or-later + +#include + +#include "dynarmic/common/spin_lock.h" + +namespace Dynarmic { + +void SpinLock::Lock() noexcept { +} + +void SpinLock::Unlock() noexcept { +} + +} // namespace Dynarmic diff --git a/src/dynarmic/src/dynarmic/common/u128.cpp b/src/dynarmic/src/dynarmic/common/u128.cpp index 541e009b23..3ea6a758aa 100644 --- a/src/dynarmic/src/dynarmic/common/u128.cpp +++ b/src/dynarmic/src/dynarmic/common/u128.cpp @@ -8,7 +8,7 @@ #include "dynarmic/common/u128.h" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" namespace Dynarmic { diff --git a/src/dynarmic/src/dynarmic/common/u128.h b/src/dynarmic/src/dynarmic/common/u128.h index 4fa842b3cd..1a5686828f 100644 --- a/src/dynarmic/src/dynarmic/common/u128.h +++ b/src/dynarmic/src/dynarmic/common/u128.h @@ -12,7 +12,7 @@ #include #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" namespace Dynarmic { diff --git a/src/dynarmic/src/dynarmic/frontend/A32/FPSCR.h b/src/dynarmic/src/dynarmic/frontend/A32/FPSCR.h index 7e0532ee93..c882add4d6 100644 --- a/src/dynarmic/src/dynarmic/frontend/A32/FPSCR.h +++ b/src/dynarmic/src/dynarmic/frontend/A32/FPSCR.h @@ -11,7 +11,7 @@ #include #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/common/fp/rounding_mode.h" diff --git a/src/dynarmic/src/dynarmic/frontend/A32/ITState.h b/src/dynarmic/src/dynarmic/frontend/A32/ITState.h index baabc1ca15..c8ea0f735b 100644 --- a/src/dynarmic/src/dynarmic/frontend/A32/ITState.h +++ b/src/dynarmic/src/dynarmic/frontend/A32/ITState.h @@ -9,7 +9,7 @@ #pragma once #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/ir/cond.h" diff --git a/src/dynarmic/src/dynarmic/frontend/A32/PSR.h b/src/dynarmic/src/dynarmic/frontend/A32/PSR.h index 16ca86aeac..8ea4a39d67 100644 --- a/src/dynarmic/src/dynarmic/frontend/A32/PSR.h +++ b/src/dynarmic/src/dynarmic/frontend/A32/PSR.h @@ -9,7 +9,7 @@ #pragma once #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/frontend/A32/ITState.h" diff --git a/src/dynarmic/src/dynarmic/frontend/A32/a32_ir_emitter.cpp b/src/dynarmic/src/dynarmic/frontend/A32/a32_ir_emitter.cpp index d9495b881f..7848539186 100644 --- a/src/dynarmic/src/dynarmic/frontend/A32/a32_ir_emitter.cpp +++ b/src/dynarmic/src/dynarmic/frontend/A32/a32_ir_emitter.cpp @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -8,7 +8,7 @@ #include "dynarmic/frontend/A32/a32_ir_emitter.h" -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/frontend/A32/a32_types.h" #include "dynarmic/interface/A32/arch_version.h" diff --git a/src/dynarmic/src/dynarmic/frontend/A32/a32_ir_emitter.h b/src/dynarmic/src/dynarmic/frontend/A32/a32_ir_emitter.h index 8f5e049416..5529c8b720 100644 --- a/src/dynarmic/src/dynarmic/frontend/A32/a32_ir_emitter.h +++ b/src/dynarmic/src/dynarmic/frontend/A32/a32_ir_emitter.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -10,7 +10,7 @@ #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/frontend/A32/a32_location_descriptor.h" #include "dynarmic/ir/ir_emitter.h" diff --git a/src/dynarmic/src/dynarmic/frontend/A32/a32_location_descriptor.h b/src/dynarmic/src/dynarmic/frontend/A32/a32_location_descriptor.h index cd850d0087..399a1681f3 100644 --- a/src/dynarmic/src/dynarmic/frontend/A32/a32_location_descriptor.h +++ b/src/dynarmic/src/dynarmic/frontend/A32/a32_location_descriptor.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -13,7 +13,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/frontend/A32/FPSCR.h" #include "dynarmic/frontend/A32/ITState.h" diff --git a/src/dynarmic/src/dynarmic/frontend/A32/a32_types.h b/src/dynarmic/src/dynarmic/frontend/A32/a32_types.h index 2a0cc25751..957c643f56 100644 --- a/src/dynarmic/src/dynarmic/frontend/A32/a32_types.h +++ b/src/dynarmic/src/dynarmic/frontend/A32/a32_types.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -10,8 +10,8 @@ #include #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/common_types.h" +#include "common/assert.h" +#include "common/common_types.h" #include "dynarmic/interface/A32/coprocessor_util.h" #include "dynarmic/ir/cond.h" diff --git a/src/dynarmic/src/dynarmic/frontend/A32/decoder/arm.h b/src/dynarmic/src/dynarmic/frontend/A32/decoder/arm.h index 1e3d368187..d1cd9a923d 100644 --- a/src/dynarmic/src/dynarmic/frontend/A32/decoder/arm.h +++ b/src/dynarmic/src/dynarmic/frontend/A32/decoder/arm.h @@ -16,7 +16,7 @@ #include #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/frontend/decoder/decoder_detail.h" #include "dynarmic/frontend/decoder/matcher.h" diff --git a/src/dynarmic/src/dynarmic/frontend/A32/decoder/asimd.h b/src/dynarmic/src/dynarmic/frontend/A32/decoder/asimd.h index 2861b998ca..5b0336e59f 100644 --- a/src/dynarmic/src/dynarmic/frontend/A32/decoder/asimd.h +++ b/src/dynarmic/src/dynarmic/frontend/A32/decoder/asimd.h @@ -16,7 +16,7 @@ #include #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/frontend/decoder/decoder_detail.h" #include "dynarmic/frontend/decoder/matcher.h" diff --git a/src/dynarmic/src/dynarmic/frontend/A32/decoder/thumb16.h b/src/dynarmic/src/dynarmic/frontend/A32/decoder/thumb16.h index eae296f59c..590878a6de 100644 --- a/src/dynarmic/src/dynarmic/frontend/A32/decoder/thumb16.h +++ b/src/dynarmic/src/dynarmic/frontend/A32/decoder/thumb16.h @@ -13,7 +13,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/frontend/decoder/decoder_detail.h" #include "dynarmic/frontend/decoder/matcher.h" diff --git a/src/dynarmic/src/dynarmic/frontend/A32/decoder/thumb32.h b/src/dynarmic/src/dynarmic/frontend/A32/decoder/thumb32.h index d82aef73fa..6a09c66afb 100644 --- a/src/dynarmic/src/dynarmic/frontend/A32/decoder/thumb32.h +++ b/src/dynarmic/src/dynarmic/frontend/A32/decoder/thumb32.h @@ -12,7 +12,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/frontend/decoder/decoder_detail.h" #include "dynarmic/frontend/decoder/matcher.h" diff --git a/src/dynarmic/src/dynarmic/frontend/A32/decoder/vfp.h b/src/dynarmic/src/dynarmic/frontend/A32/decoder/vfp.h index f1728e452b..e02cc03a6b 100644 --- a/src/dynarmic/src/dynarmic/frontend/A32/decoder/vfp.h +++ b/src/dynarmic/src/dynarmic/frontend/A32/decoder/vfp.h @@ -13,7 +13,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/frontend/decoder/decoder_detail.h" #include "dynarmic/frontend/decoder/matcher.h" diff --git a/src/dynarmic/src/dynarmic/frontend/A32/translate/a32_translate.h b/src/dynarmic/src/dynarmic/frontend/A32/translate/a32_translate.h index 33e641fcaf..d39e80a54f 100644 --- a/src/dynarmic/src/dynarmic/frontend/A32/translate/a32_translate.h +++ b/src/dynarmic/src/dynarmic/frontend/A32/translate/a32_translate.h @@ -7,7 +7,7 @@ */ #pragma once -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/interface/A32/arch_version.h" diff --git a/src/dynarmic/src/dynarmic/frontend/A32/translate/conditional_state.cpp b/src/dynarmic/src/dynarmic/frontend/A32/translate/conditional_state.cpp index 82d25f1337..64e6bf2c7c 100644 --- a/src/dynarmic/src/dynarmic/frontend/A32/translate/conditional_state.cpp +++ b/src/dynarmic/src/dynarmic/frontend/A32/translate/conditional_state.cpp @@ -10,8 +10,8 @@ #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/common_types.h" +#include "common/assert.h" +#include "common/common_types.h" #include "dynarmic/frontend/A32/a32_ir_emitter.h" #include "dynarmic/frontend/A32/translate/impl/a32_translate_impl.h" diff --git a/src/dynarmic/src/dynarmic/frontend/A32/translate/conditional_state.h b/src/dynarmic/src/dynarmic/frontend/A32/translate/conditional_state.h index ab52dd7198..074e8da662 100644 --- a/src/dynarmic/src/dynarmic/frontend/A32/translate/conditional_state.h +++ b/src/dynarmic/src/dynarmic/frontend/A32/translate/conditional_state.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -8,7 +8,7 @@ #pragma once -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" namespace Dynarmic::IR { enum class Cond; diff --git a/src/dynarmic/src/dynarmic/frontend/A32/translate/impl/a32_translate_impl.cpp b/src/dynarmic/src/dynarmic/frontend/A32/translate/impl/a32_translate_impl.cpp index 7b21e7cce1..f5d1830769 100644 --- a/src/dynarmic/src/dynarmic/frontend/A32/translate/impl/a32_translate_impl.cpp +++ b/src/dynarmic/src/dynarmic/frontend/A32/translate/impl/a32_translate_impl.cpp @@ -8,7 +8,7 @@ #include "dynarmic/frontend/A32/translate/impl/a32_translate_impl.h" -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/interface/A32/config.h" diff --git a/src/dynarmic/src/dynarmic/frontend/A32/translate/impl/a32_translate_impl.h b/src/dynarmic/src/dynarmic/frontend/A32/translate/impl/a32_translate_impl.h index a8888c355f..82e919720e 100644 --- a/src/dynarmic/src/dynarmic/frontend/A32/translate/impl/a32_translate_impl.h +++ b/src/dynarmic/src/dynarmic/frontend/A32/translate/impl/a32_translate_impl.h @@ -8,7 +8,7 @@ #pragma once -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/mcl/bit.hpp" #include "dynarmic/frontend/A32/a32_ir_emitter.h" diff --git a/src/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_misc.cpp b/src/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_misc.cpp index 9aa50c6b8c..6ccfe1e3bc 100644 --- a/src/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_misc.cpp +++ b/src/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_misc.cpp @@ -8,7 +8,7 @@ #include -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/mcl/bit.hpp" #include "dynarmic/frontend/A32/translate/impl/a32_translate_impl.h" diff --git a/src/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_one_reg_modified_immediate.cpp b/src/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_one_reg_modified_immediate.cpp index c5bdb1b551..99b0cf2eb1 100644 --- a/src/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_one_reg_modified_immediate.cpp +++ b/src/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_one_reg_modified_immediate.cpp @@ -6,7 +6,7 @@ * SPDX-License-Identifier: 0BSD */ -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/mcl/bit.hpp" #include "dynarmic/frontend/A32/translate/impl/a32_translate_impl.h" diff --git a/src/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_two_regs_scalar.cpp b/src/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_two_regs_scalar.cpp index d9cc3b1e64..35f9888ce5 100644 --- a/src/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_two_regs_scalar.cpp +++ b/src/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_two_regs_scalar.cpp @@ -8,7 +8,7 @@ #include -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/mcl/bit.hpp" #include "dynarmic/frontend/A32/translate/impl/a32_translate_impl.h" diff --git a/src/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_two_regs_shift.cpp b/src/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_two_regs_shift.cpp index e5a4eb537f..4b653c0455 100644 --- a/src/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_two_regs_shift.cpp +++ b/src/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_two_regs_shift.cpp @@ -6,7 +6,7 @@ * SPDX-License-Identifier: 0BSD */ -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/mcl/bit.hpp" #include "dynarmic/frontend/A32/translate/impl/a32_translate_impl.h" diff --git a/src/dynarmic/src/dynarmic/frontend/A32/translate/impl/thumb32_data_processing_plain_binary_immediate.cpp b/src/dynarmic/src/dynarmic/frontend/A32/translate/impl/thumb32_data_processing_plain_binary_immediate.cpp index 7ea31d40ee..c0bb75962f 100644 --- a/src/dynarmic/src/dynarmic/frontend/A32/translate/impl/thumb32_data_processing_plain_binary_immediate.cpp +++ b/src/dynarmic/src/dynarmic/frontend/A32/translate/impl/thumb32_data_processing_plain_binary_immediate.cpp @@ -6,7 +6,7 @@ * SPDX-License-Identifier: 0BSD */ -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/mcl/bit.hpp" #include "dynarmic/frontend/A32/translate/impl/a32_translate_impl.h" diff --git a/src/dynarmic/src/dynarmic/frontend/A32/translate/translate_arm.cpp b/src/dynarmic/src/dynarmic/frontend/A32/translate/translate_arm.cpp index 5cc9ef3893..3fd475d074 100644 --- a/src/dynarmic/src/dynarmic/frontend/A32/translate/translate_arm.cpp +++ b/src/dynarmic/src/dynarmic/frontend/A32/translate/translate_arm.cpp @@ -6,7 +6,7 @@ * SPDX-License-Identifier: 0BSD */ -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/frontend/A32/a32_location_descriptor.h" #include "dynarmic/frontend/A32/a32_types.h" diff --git a/src/dynarmic/src/dynarmic/frontend/A32/translate/translate_thumb.cpp b/src/dynarmic/src/dynarmic/frontend/A32/translate/translate_thumb.cpp index 309dd080f9..332860a95c 100644 --- a/src/dynarmic/src/dynarmic/frontend/A32/translate/translate_thumb.cpp +++ b/src/dynarmic/src/dynarmic/frontend/A32/translate/translate_thumb.cpp @@ -8,7 +8,7 @@ #include -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/mcl/bit.hpp" #include "dynarmic/frontend/A32/a32_ir_emitter.h" diff --git a/src/dynarmic/src/dynarmic/frontend/A64/a64_ir_emitter.h b/src/dynarmic/src/dynarmic/frontend/A64/a64_ir_emitter.h index 18f32cdcc9..21bd9250dd 100644 --- a/src/dynarmic/src/dynarmic/frontend/A64/a64_ir_emitter.h +++ b/src/dynarmic/src/dynarmic/frontend/A64/a64_ir_emitter.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -10,8 +10,8 @@ #include -#include "dynarmic/common/common_types.h" -#include "dynarmic/common/assert.h" +#include "common/common_types.h" +#include "common/assert.h" #include "dynarmic/frontend/A64/a64_location_descriptor.h" #include "dynarmic/frontend/A64/a64_types.h" diff --git a/src/dynarmic/src/dynarmic/frontend/A64/a64_location_descriptor.h b/src/dynarmic/src/dynarmic/frontend/A64/a64_location_descriptor.h index a8be0232ca..d0c6a9df3d 100644 --- a/src/dynarmic/src/dynarmic/frontend/A64/a64_location_descriptor.h +++ b/src/dynarmic/src/dynarmic/frontend/A64/a64_location_descriptor.h @@ -14,7 +14,7 @@ #include #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/common/fp/fpcr.h" #include "dynarmic/ir/location_descriptor.h" diff --git a/src/dynarmic/src/dynarmic/frontend/A64/a64_types.h b/src/dynarmic/src/dynarmic/frontend/A64/a64_types.h index 8d0f0abe80..55d82a740a 100644 --- a/src/dynarmic/src/dynarmic/frontend/A64/a64_types.h +++ b/src/dynarmic/src/dynarmic/frontend/A64/a64_types.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -11,8 +11,8 @@ #include #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/common_types.h" +#include "common/assert.h" +#include "common/common_types.h" #include "dynarmic/ir/cond.h" diff --git a/src/dynarmic/src/dynarmic/frontend/A64/decoder/a64.h b/src/dynarmic/src/dynarmic/frontend/A64/decoder/a64.h index 533a93f3aa..ccf890cbcd 100644 --- a/src/dynarmic/src/dynarmic/frontend/A64/decoder/a64.h +++ b/src/dynarmic/src/dynarmic/frontend/A64/decoder/a64.h @@ -16,7 +16,7 @@ #include #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/frontend/decoder/decoder_detail.h" #include "dynarmic/frontend/decoder/matcher.h" diff --git a/src/dynarmic/src/dynarmic/frontend/A64/translate/a64_translate.h b/src/dynarmic/src/dynarmic/frontend/A64/translate/a64_translate.h index 125979f8b7..61033eb530 100644 --- a/src/dynarmic/src/dynarmic/frontend/A64/translate/a64_translate.h +++ b/src/dynarmic/src/dynarmic/frontend/A64/translate/a64_translate.h @@ -10,7 +10,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" namespace Dynarmic { diff --git a/src/dynarmic/src/dynarmic/frontend/A64/translate/impl/simd_vector_x_indexed_element.cpp b/src/dynarmic/src/dynarmic/frontend/A64/translate/impl/simd_vector_x_indexed_element.cpp index 12ff153dd8..da11b51d84 100644 --- a/src/dynarmic/src/dynarmic/frontend/A64/translate/impl/simd_vector_x_indexed_element.cpp +++ b/src/dynarmic/src/dynarmic/frontend/A64/translate/impl/simd_vector_x_indexed_element.cpp @@ -8,7 +8,7 @@ #include -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/frontend/A64/translate/impl/impl.h" diff --git a/src/dynarmic/src/dynarmic/frontend/decoder/decoder_detail.h b/src/dynarmic/src/dynarmic/frontend/decoder/decoder_detail.h index 3ab360c287..c22e585c26 100644 --- a/src/dynarmic/src/dynarmic/frontend/decoder/decoder_detail.h +++ b/src/dynarmic/src/dynarmic/frontend/decoder/decoder_detail.h @@ -12,7 +12,7 @@ #include #include -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/mcl/bit.hpp" #include "dynarmic/mcl/function_info.hpp" diff --git a/src/dynarmic/src/dynarmic/frontend/decoder/matcher.h b/src/dynarmic/src/dynarmic/frontend/decoder/matcher.h index f7e2884e0c..194f646ed2 100644 --- a/src/dynarmic/src/dynarmic/frontend/decoder/matcher.h +++ b/src/dynarmic/src/dynarmic/frontend/decoder/matcher.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -10,7 +10,7 @@ #include -#include "dynarmic/common/assert.h" +#include "common/assert.h" namespace Dynarmic::Decoder { diff --git a/src/dynarmic/src/dynarmic/frontend/imm.cpp b/src/dynarmic/src/dynarmic/frontend/imm.cpp index aeb7b5d3f6..7afc3ae403 100644 --- a/src/dynarmic/src/dynarmic/frontend/imm.cpp +++ b/src/dynarmic/src/dynarmic/frontend/imm.cpp @@ -8,9 +8,9 @@ #include "dynarmic/frontend/imm.h" -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" namespace Dynarmic { diff --git a/src/dynarmic/src/dynarmic/frontend/imm.h b/src/dynarmic/src/dynarmic/frontend/imm.h index 3a6c10316a..56fbcbda0e 100644 --- a/src/dynarmic/src/dynarmic/frontend/imm.h +++ b/src/dynarmic/src/dynarmic/frontend/imm.h @@ -10,9 +10,9 @@ #include -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/common/math_util.h" diff --git a/src/dynarmic/src/dynarmic/ir/basic_block.cpp b/src/dynarmic/src/dynarmic/ir/basic_block.cpp index ac0f03d76a..284f115328 100644 --- a/src/dynarmic/src/dynarmic/ir/basic_block.cpp +++ b/src/dynarmic/src/dynarmic/ir/basic_block.cpp @@ -14,7 +14,7 @@ #include #include -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/frontend/A32/a32_types.h" #include "dynarmic/frontend/A64/a64_types.h" #include "dynarmic/ir/cond.h" diff --git a/src/dynarmic/src/dynarmic/ir/basic_block.h b/src/dynarmic/src/dynarmic/ir/basic_block.h index bbf1319957..1518903d2a 100644 --- a/src/dynarmic/src/dynarmic/ir/basic_block.h +++ b/src/dynarmic/src/dynarmic/ir/basic_block.h @@ -17,7 +17,7 @@ #include #include #include "dynarmic/mcl/intrusive_list.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/ir/location_descriptor.h" #include "dynarmic/ir/microinstruction.h" diff --git a/src/dynarmic/src/dynarmic/ir/ir_emitter.h b/src/dynarmic/src/dynarmic/ir/ir_emitter.h index ed95c8b5be..c035af2708 100644 --- a/src/dynarmic/src/dynarmic/ir/ir_emitter.h +++ b/src/dynarmic/src/dynarmic/ir/ir_emitter.h @@ -10,8 +10,8 @@ #include -#include "dynarmic/common/common_types.h" -#include "dynarmic/common/assert.h" +#include "common/common_types.h" +#include "common/assert.h" #include "dynarmic/mcl/bit.hpp" #include "dynarmic/ir/opcodes.h" diff --git a/src/dynarmic/src/dynarmic/ir/location_descriptor.h b/src/dynarmic/src/dynarmic/ir/location_descriptor.h index 5c7c954d38..ca44c03306 100644 --- a/src/dynarmic/src/dynarmic/ir/location_descriptor.h +++ b/src/dynarmic/src/dynarmic/ir/location_descriptor.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -12,7 +12,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" namespace Dynarmic::IR { diff --git a/src/dynarmic/src/dynarmic/ir/microinstruction.cpp b/src/dynarmic/src/dynarmic/ir/microinstruction.cpp index cc555474ef..b5541470cd 100644 --- a/src/dynarmic/src/dynarmic/ir/microinstruction.cpp +++ b/src/dynarmic/src/dynarmic/ir/microinstruction.cpp @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -10,7 +10,7 @@ #include -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/ir/opcodes.h" #include "dynarmic/ir/type.h" diff --git a/src/dynarmic/src/dynarmic/ir/microinstruction.h b/src/dynarmic/src/dynarmic/ir/microinstruction.h index fb3ac1f49a..76ca3b389d 100644 --- a/src/dynarmic/src/dynarmic/ir/microinstruction.h +++ b/src/dynarmic/src/dynarmic/ir/microinstruction.h @@ -11,7 +11,7 @@ #include #include "dynarmic/mcl/intrusive_list.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/ir/value.h" #include "dynarmic/ir/opcodes.h" diff --git a/src/dynarmic/src/dynarmic/ir/opcodes.h b/src/dynarmic/src/dynarmic/ir/opcodes.h index cb0c2db8a4..f975896a6b 100644 --- a/src/dynarmic/src/dynarmic/ir/opcodes.h +++ b/src/dynarmic/src/dynarmic/ir/opcodes.h @@ -11,7 +11,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" namespace Dynarmic::IR { diff --git a/src/dynarmic/src/dynarmic/ir/terminal.h b/src/dynarmic/src/dynarmic/ir/terminal.h index 187648b45c..9b91b27382 100644 --- a/src/dynarmic/src/dynarmic/ir/terminal.h +++ b/src/dynarmic/src/dynarmic/ir/terminal.h @@ -9,7 +9,7 @@ #pragma once #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/ir/cond.h" #include "dynarmic/ir/location_descriptor.h" diff --git a/src/dynarmic/src/dynarmic/ir/type.h b/src/dynarmic/src/dynarmic/ir/type.h index e223513367..3344e26db1 100644 --- a/src/dynarmic/src/dynarmic/ir/type.h +++ b/src/dynarmic/src/dynarmic/ir/type.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -11,7 +11,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" namespace Dynarmic::IR { diff --git a/src/dynarmic/src/dynarmic/ir/value.cpp b/src/dynarmic/src/dynarmic/ir/value.cpp index 451036b1fd..7f0249b1ec 100644 --- a/src/dynarmic/src/dynarmic/ir/value.cpp +++ b/src/dynarmic/src/dynarmic/ir/value.cpp @@ -8,7 +8,7 @@ #include "dynarmic/ir/value.h" -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/mcl/bit.hpp" #include "dynarmic/ir/microinstruction.h" diff --git a/src/dynarmic/src/dynarmic/ir/value.h b/src/dynarmic/src/dynarmic/ir/value.h index ce439f77d1..1fec942e2e 100644 --- a/src/dynarmic/src/dynarmic/ir/value.h +++ b/src/dynarmic/src/dynarmic/ir/value.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -11,8 +11,8 @@ #include #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/common_types.h" +#include "common/assert.h" +#include "common/common_types.h" #include "dynarmic/ir/type.h" diff --git a/src/dynarmic/src/dynarmic/mcl/bit.hpp b/src/dynarmic/src/dynarmic/mcl/bit.hpp index 1ef9880a5f..bbedffd8ae 100644 --- a/src/dynarmic/src/dynarmic/mcl/bit.hpp +++ b/src/dynarmic/src/dynarmic/mcl/bit.hpp @@ -9,8 +9,8 @@ #include #include -#include "dynarmic/common/common_types.h" -#include "dynarmic/common/assert.h" +#include "common/common_types.h" +#include "common/assert.h" namespace mcl { namespace detail { diff --git a/src/dynarmic/src/dynarmic/mcl/integer_of_size.hpp b/src/dynarmic/src/dynarmic/mcl/integer_of_size.hpp index 8bdecc955d..1d54e9e3ef 100644 --- a/src/dynarmic/src/dynarmic/mcl/integer_of_size.hpp +++ b/src/dynarmic/src/dynarmic/mcl/integer_of_size.hpp @@ -5,7 +5,7 @@ #pragma once -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" namespace mcl { diff --git a/src/dynarmic/src/dynarmic/mcl/intrusive_list.hpp b/src/dynarmic/src/dynarmic/mcl/intrusive_list.hpp index 3b1c1d6699..d8b87366a1 100644 --- a/src/dynarmic/src/dynarmic/mcl/intrusive_list.hpp +++ b/src/dynarmic/src/dynarmic/mcl/intrusive_list.hpp @@ -9,7 +9,7 @@ #include #include #include -#include "dynarmic/common/assert.h" +#include "common/assert.h" namespace mcl { diff --git a/src/dynarmic/tests/A32/fuzz_arm.cpp b/src/dynarmic/tests/A32/fuzz_arm.cpp index e9834a6663..e2546de635 100644 --- a/src/dynarmic/tests/A32/fuzz_arm.cpp +++ b/src/dynarmic/tests/A32/fuzz_arm.cpp @@ -16,7 +16,7 @@ #include #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/tests/fuzz_util.h" #include "dynarmic/tests/rand_int.h" diff --git a/src/dynarmic/tests/A32/fuzz_thumb.cpp b/src/dynarmic/tests/A32/fuzz_thumb.cpp index 7fef968b95..67a01daf9c 100644 --- a/src/dynarmic/tests/A32/fuzz_thumb.cpp +++ b/src/dynarmic/tests/A32/fuzz_thumb.cpp @@ -17,7 +17,7 @@ #include #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/tests/rand_int.h" #include "dynarmic/tests/unicorn_emu/a32_unicorn.h" diff --git a/src/dynarmic/tests/A32/test_thumb_instructions.cpp b/src/dynarmic/tests/A32/test_thumb_instructions.cpp index 6aa1b7389b..f461806384 100644 --- a/src/dynarmic/tests/A32/test_thumb_instructions.cpp +++ b/src/dynarmic/tests/A32/test_thumb_instructions.cpp @@ -7,7 +7,7 @@ */ #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/tests/A32/testenv.h" #include "dynarmic/tests/native/testenv.h" diff --git a/src/dynarmic/tests/A32/testenv.h b/src/dynarmic/tests/A32/testenv.h index 6f303a58e9..bebc2566da 100644 --- a/src/dynarmic/tests/A32/testenv.h +++ b/src/dynarmic/tests/A32/testenv.h @@ -14,8 +14,8 @@ #include #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/common_types.h" +#include "common/assert.h" +#include "common/common_types.h" #include "dynarmic/interface/A32/a32.h" template diff --git a/src/dynarmic/tests/A64/fibonacci.cpp b/src/dynarmic/tests/A64/fibonacci.cpp index d706118cd2..12c4170f66 100644 --- a/src/dynarmic/tests/A64/fibonacci.cpp +++ b/src/dynarmic/tests/A64/fibonacci.cpp @@ -11,7 +11,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include #include "dynarmic/interface/A64/a64.h" diff --git a/src/dynarmic/tests/A64/fp_min_max.cpp b/src/dynarmic/tests/A64/fp_min_max.cpp index 313b5e5117..cb27342ff9 100644 --- a/src/dynarmic/tests/A64/fp_min_max.cpp +++ b/src/dynarmic/tests/A64/fp_min_max.cpp @@ -9,7 +9,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/tests/A64/testenv.h" #include "dynarmic/tests/native/testenv.h" diff --git a/src/dynarmic/tests/A64/fuzz_with_unicorn.cpp b/src/dynarmic/tests/A64/fuzz_with_unicorn.cpp index 749cc77126..90df625143 100644 --- a/src/dynarmic/tests/A64/fuzz_with_unicorn.cpp +++ b/src/dynarmic/tests/A64/fuzz_with_unicorn.cpp @@ -12,7 +12,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/tests/fuzz_util.h" #include "dynarmic/tests/rand_int.h" diff --git a/src/dynarmic/tests/A64/testenv.h b/src/dynarmic/tests/A64/testenv.h index 2b8733a177..c25790e1c9 100644 --- a/src/dynarmic/tests/A64/testenv.h +++ b/src/dynarmic/tests/A64/testenv.h @@ -9,8 +9,8 @@ #pragma once #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/common_types.h" +#include "common/assert.h" +#include "common/common_types.h" #include "dynarmic/interface/A64/a64.h" using Vector = Dynarmic::A64::Vector; diff --git a/src/dynarmic/tests/decoder_tests.cpp b/src/dynarmic/tests/decoder_tests.cpp index 1b406fd915..2a6c0f6a4f 100644 --- a/src/dynarmic/tests/decoder_tests.cpp +++ b/src/dynarmic/tests/decoder_tests.cpp @@ -11,7 +11,7 @@ #include #include -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/frontend/A32/decoder/asimd.h" #include "dynarmic/frontend/A32/translate/impl/a32_translate_impl.h" @@ -20,6 +20,7 @@ using namespace Dynarmic; +/* TEST_CASE("ASIMD Decoder: Ensure table order correctness", "[decode][a32][.]") { const auto table = A32::GetASIMDDecodeTable(); @@ -67,4 +68,5 @@ TEST_CASE("ASIMD Decoder: Ensure table order correctness", "[decode][a32][.]") { x = ((x | mask) + 1) & ~mask; } while (x != 0); } -} \ No newline at end of file +} +*/ diff --git a/src/dynarmic/tests/fp/FPToFixed.cpp b/src/dynarmic/tests/fp/FPToFixed.cpp index e16e4460ed..5df0a066fa 100644 --- a/src/dynarmic/tests/fp/FPToFixed.cpp +++ b/src/dynarmic/tests/fp/FPToFixed.cpp @@ -10,7 +10,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/tests/rand_int.h" #include "dynarmic/common/fp/fpcr.h" diff --git a/src/dynarmic/tests/fp/mantissa_util_tests.cpp b/src/dynarmic/tests/fp/mantissa_util_tests.cpp index 9d16c3624c..259e30edc7 100644 --- a/src/dynarmic/tests/fp/mantissa_util_tests.cpp +++ b/src/dynarmic/tests/fp/mantissa_util_tests.cpp @@ -10,7 +10,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/tests/rand_int.h" #include "dynarmic/common/fp/mantissa_util.h" diff --git a/src/dynarmic/tests/fp/unpacked_tests.cpp b/src/dynarmic/tests/fp/unpacked_tests.cpp index a4f10d1273..4fdd4ccc13 100644 --- a/src/dynarmic/tests/fp/unpacked_tests.cpp +++ b/src/dynarmic/tests/fp/unpacked_tests.cpp @@ -10,7 +10,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/tests/rand_int.h" #include "dynarmic/common/fp/fpcr.h" diff --git a/src/dynarmic/tests/fuzz_util.cpp b/src/dynarmic/tests/fuzz_util.cpp index 05f0a9e865..80fdd749ca 100644 --- a/src/dynarmic/tests/fuzz_util.cpp +++ b/src/dynarmic/tests/fuzz_util.cpp @@ -12,7 +12,7 @@ #include #include -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/tests/rand_int.h" #include "dynarmic/common/fp/fpcr.h" diff --git a/src/dynarmic/tests/fuzz_util.h b/src/dynarmic/tests/fuzz_util.h index a0b8666969..b14b9a4362 100644 --- a/src/dynarmic/tests/fuzz_util.h +++ b/src/dynarmic/tests/fuzz_util.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -11,7 +11,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" using Vector = std::array; diff --git a/src/dynarmic/tests/print_info.cpp b/src/dynarmic/tests/print_info.cpp index 19e2ca38b2..6d6109d849 100644 --- a/src/dynarmic/tests/print_info.cpp +++ b/src/dynarmic/tests/print_info.cpp @@ -19,7 +19,7 @@ #include #include #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/common/llvm_disassemble.h" #include "dynarmic/frontend/A32/a32_location_descriptor.h" @@ -57,7 +57,7 @@ std::string_view GetNameOfA64Instruction(u32 instruction) { } void PrintA32Instruction(u32 instruction) { - fmt::print("{:08x} {}\n", instruction, Common::DisassembleAArch32(false, 0, (u8*)&instruction, sizeof(instruction))); + fmt::print("{:08x} {}\n", instruction, Dynarmic::Common::DisassembleAArch32(false, 0, (u8*)&instruction, sizeof(instruction))); fmt::print("Name: {}\n", GetNameOfA32Instruction(instruction)); const A32::LocationDescriptor location{0, {}, {}}; @@ -75,7 +75,7 @@ void PrintA32Instruction(u32 instruction) { } void PrintA64Instruction(u32 instruction) { - fmt::print("{:08x} {}\n", instruction, Common::DisassembleAArch64(instruction)); + fmt::print("{:08x} {}\n", instruction, Dynarmic::Common::DisassembleAArch64(instruction)); fmt::print("Name: {}\n", GetNameOfA64Instruction(instruction)); const A64::LocationDescriptor location{0, {}}; @@ -97,7 +97,7 @@ void PrintThumbInstruction(u32 instruction) { if (inst_size == 4) instruction = mcl::bit::swap_halves_32(instruction); - fmt::print("{:08x} {}\n", instruction, Common::DisassembleAArch32(true, 0, (u8*)&instruction, inst_size)); + fmt::print("{:08x} {}\n", instruction, Dynarmic::Common::DisassembleAArch32(true, 0, (u8*)&instruction, inst_size)); const A32::LocationDescriptor location{0, A32::PSR{0x1F0}, {}}; IR::Block ir_block{location}; diff --git a/src/dynarmic/tests/rsqrt_test.cpp b/src/dynarmic/tests/rsqrt_test.cpp index 6af71ede64..5dd52f26da 100644 --- a/src/dynarmic/tests/rsqrt_test.cpp +++ b/src/dynarmic/tests/rsqrt_test.cpp @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -9,7 +9,7 @@ #include #include #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/common/fp/fpcr.h" #include "dynarmic/common/fp/fpsr.h" diff --git a/src/dynarmic/tests/test_generator.cpp b/src/dynarmic/tests/test_generator.cpp index 43203c3e13..dacb8a6004 100644 --- a/src/dynarmic/tests/test_generator.cpp +++ b/src/dynarmic/tests/test_generator.cpp @@ -17,7 +17,7 @@ #include #include "dynarmic/mcl/bit.hpp" -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "./A32/testenv.h" #include "./A64/testenv.h" diff --git a/src/dynarmic/tests/test_reader.cpp b/src/dynarmic/tests/test_reader.cpp index dd7fccc7d7..1c2cba1c44 100644 --- a/src/dynarmic/tests/test_reader.cpp +++ b/src/dynarmic/tests/test_reader.cpp @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -13,7 +13,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "./A32/testenv.h" #include "./A64/testenv.h" diff --git a/src/dynarmic/tests/unicorn_emu/a32_unicorn.cpp b/src/dynarmic/tests/unicorn_emu/a32_unicorn.cpp index 9a17bc5582..c0e1e13d9b 100644 --- a/src/dynarmic/tests/unicorn_emu/a32_unicorn.cpp +++ b/src/dynarmic/tests/unicorn_emu/a32_unicorn.cpp @@ -10,7 +10,7 @@ #include #include "dynarmic/mcl/bit.hpp" #include "dynarmic/tests/unicorn_emu/a32_unicorn.h" -#include "dynarmic/common/assert.h" +#include "common/assert.h" #include "dynarmic/tests/A32/testenv.h" #define CHECKED(expr) do if ((expr)) ASSERT(false && "Call " #expr " failed with error\n"); while (0) diff --git a/src/dynarmic/tests/unicorn_emu/a32_unicorn.h b/src/dynarmic/tests/unicorn_emu/a32_unicorn.h index d94724d9f2..98c03db76c 100644 --- a/src/dynarmic/tests/unicorn_emu/a32_unicorn.h +++ b/src/dynarmic/tests/unicorn_emu/a32_unicorn.h @@ -19,7 +19,7 @@ # include #endif -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/tests/A32/testenv.h" diff --git a/src/dynarmic/tests/unicorn_emu/a64_unicorn.cpp b/src/dynarmic/tests/unicorn_emu/a64_unicorn.cpp index c8aa404199..c9a194d50a 100644 --- a/src/dynarmic/tests/unicorn_emu/a64_unicorn.cpp +++ b/src/dynarmic/tests/unicorn_emu/a64_unicorn.cpp @@ -8,7 +8,7 @@ #include #include "dynarmic/tests/unicorn_emu/a64_unicorn.h" -#include "dynarmic/common/assert.h" +#include "common/assert.h" #define CHECKED(expr) do if ((expr)) ASSERT(false && "Call " #expr " failed with error\n"); while (0) diff --git a/src/dynarmic/tests/unicorn_emu/a64_unicorn.h b/src/dynarmic/tests/unicorn_emu/a64_unicorn.h index 1bc5b1cb8e..091be950ed 100644 --- a/src/dynarmic/tests/unicorn_emu/a64_unicorn.h +++ b/src/dynarmic/tests/unicorn_emu/a64_unicorn.h @@ -19,7 +19,7 @@ # include #endif -#include "dynarmic/common/common_types.h" +#include "common/common_types.h" #include "dynarmic/tests/A64/testenv.h" diff --git a/src/frontend_common/CMakeLists.txt b/src/frontend_common/CMakeLists.txt index a6d580cb18..f9b3805939 100644 --- a/src/frontend_common/CMakeLists.txt +++ b/src/frontend_common/CMakeLists.txt @@ -22,8 +22,6 @@ if (ENABLE_UPDATE_CHECKER) target_sources(frontend_common PRIVATE update_checker.cpp update_checker.h) - - target_compile_definitions(frontend_common PUBLIC CPPHTTPLIB_OPENSSL_SUPPORT) target_link_libraries(frontend_common PRIVATE OpenSSL::SSL OpenSSL::Crypto) endif() diff --git a/src/frontend_common/update_checker.cpp b/src/frontend_common/update_checker.cpp index 75b1dc00cc..3e5a832ba0 100644 --- a/src/frontend_common/update_checker.cpp +++ b/src/frontend_common/update_checker.cpp @@ -13,7 +13,7 @@ #include "common/scm_rev.h" #include "update_checker.h" -#include +#include "common/httplib.h" #ifdef YUZU_BUNDLED_OPENSSL #include diff --git a/src/qt_common/CMakeLists.txt b/src/qt_common/CMakeLists.txt index 904b03d288..399fbe67a0 100644 --- a/src/qt_common/CMakeLists.txt +++ b/src/qt_common/CMakeLists.txt @@ -50,7 +50,6 @@ if (USE_DISCORD_PRESENCE) if (YUZU_USE_BUNDLED_OPENSSL) target_link_libraries(qt_common PUBLIC OpenSSL::SSL OpenSSL::Crypto) - target_compile_definitions(qt_common PRIVATE CPPHTTPLIB_OPENSSL_SUPPORT) endif() target_compile_definitions(qt_common PUBLIC USE_DISCORD_PRESENCE) diff --git a/src/qt_common/config/shared_translation.cpp b/src/qt_common/config/shared_translation.cpp index a0c4779b73..eda0fb2002 100644 --- a/src/qt_common/config/shared_translation.cpp +++ b/src/qt_common/config/shared_translation.cpp @@ -105,10 +105,6 @@ std::unique_ptr InitializeTranslations(QObject* parent) { "cause deadlocks. A range of 77-21000 is recommended.")); INSERT(Settings, cpu_backend, tr("Backend:"), QString()); - INSERT(Settings, vtable_bouncing, tr("Virtual Table Bouncing"), - tr("Bounces (by emulating a 0-valued return) any functions that triggers a prefetch " - "abort")); - // Cpu Debug // Cpu Unsafe diff --git a/src/qt_common/discord/discord_impl.cpp b/src/qt_common/discord/discord_impl.cpp index 37b24cdd57..c1cb5319dc 100644 --- a/src/qt_common/discord/discord_impl.cpp +++ b/src/qt_common/discord/discord_impl.cpp @@ -9,7 +9,7 @@ #include #include -#include +#include "common/httplib.h" #include #include diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp index c4c898bec9..c2511942d9 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp @@ -285,8 +285,13 @@ Id IsScaled(EmitContext& ctx, const IR::Value& index, Id member_index, u32 base_ if (base_index != 0) { index_value = ctx.OpIAdd(ctx.U32[1], index_value, ctx.Const(base_index)); } + const Id word_index{ctx.OpShiftRightLogical(ctx.U32[1], index_value, ctx.Const(5u))}; const Id bit_index{ctx.OpBitwiseAnd(ctx.U32[1], index_value, ctx.Const(31u))}; - bit = ctx.OpBitFieldUExtract(ctx.U32[1], index_value, bit_index, ctx.Const(1u)); + const Id pointer{ctx.OpAccessChain(push_constant_u32, ctx.rescaling_push_constants, + member_index, word_index)}; + const Id word{ctx.OpLoad(ctx.U32[1], pointer)}; + const Id bit_index_mask{ctx.OpShiftLeftLogical(ctx.U32[1], ctx.Const(1u), bit_index)}; + bit = ctx.OpBitwiseAnd(ctx.U32[1], word, bit_index_mask); } return ctx.OpINotEqual(ctx.U1, bit, ctx.u32_zero_value); } diff --git a/src/video_core/host_shaders/present_lanczos.frag b/src/video_core/host_shaders/present_lanczos.frag index b69b329c1b..ed51ae6d08 100644 --- a/src/video_core/host_shaders/present_lanczos.frag +++ b/src/video_core/host_shaders/present_lanczos.frag @@ -24,14 +24,24 @@ vec4 textureLanczos(sampler2D textureSampler, vec2 p) { vec2 cc = floor(p * res) / res; // kernel size = (2r + 1)^2 const int r = 3; //radius (1 = 3 steps) - for (int x = -r; x <= r; x++) - for (int y = -r; y <= r; y++) { - vec2 kp = 0.5f * (vec2(x, y) / res); // 0.5 = half-pixel level resampling - vec2 uv = cc + kp; - float w = lanczos(kp, float(r)); - c_sum += w * texture(textureSampler, p + kp).rgb; - w_sum += w; - } +#define LANCZOS_LOOP_STEP(x, y) \ + { \ + vec2 kp = 0.5f * (vec2(x, y) / res); /* 0.5 = half-pixel level resampling */ \ + vec2 uv = cc + kp; \ + float w = lanczos(kp, float(r)); \ + c_sum += w * texture(textureSampler, p + kp).rgb; \ + w_sum += w; \ + } + + for (int y = -r; y <= r; ++y) { + LANCZOS_LOOP_STEP(-3, y); + LANCZOS_LOOP_STEP(-2, y); + LANCZOS_LOOP_STEP(-1, y); + LANCZOS_LOOP_STEP(-0, y); + LANCZOS_LOOP_STEP(+1, y); + LANCZOS_LOOP_STEP(+2, y); + LANCZOS_LOOP_STEP(+3, y); + } return vec4(c_sum / w_sum, 1.0f); } diff --git a/src/web_service/CMakeLists.txt b/src/web_service/CMakeLists.txt index 0dedad16f7..d4debb3c09 100644 --- a/src/web_service/CMakeLists.txt +++ b/src/web_service/CMakeLists.txt @@ -1,3 +1,6 @@ +# SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project +# SPDX-License-Identifier: GPL-3.0-or-later + # SPDX-FileCopyrightText: 2018 yuzu Emulator Project # SPDX-License-Identifier: GPL-2.0-or-later @@ -19,4 +22,3 @@ target_link_libraries(web_service PRIVATE common network nlohmann_json::nlohmann find_package(OpenSSL REQUIRED) target_link_libraries(web_service PRIVATE OpenSSL::SSL OpenSSL::Crypto) -target_compile_definitions(web_service PRIVATE CPPHTTPLIB_OPENSSL_SUPPORT) diff --git a/src/web_service/web_backend.cpp b/src/web_service/web_backend.cpp index 60b11fff5a..7fc2ae69b1 100644 --- a/src/web_service/web_backend.cpp +++ b/src/web_service/web_backend.cpp @@ -9,17 +9,7 @@ #include #include - -#ifdef __GNUC__ -#pragma GCC diagnostic push -#ifndef __clang__ -#pragma GCC diagnostic ignored "-Wmaybe-uninitialized" -#endif -#endif -#include -#ifdef __GNUC__ -#pragma GCC diagnostic pop -#endif +#include "common/httplib.h" #ifdef YUZU_BUNDLED_OPENSSL #include diff --git a/src/yuzu/configuration/configure_cpu.cpp b/src/yuzu/configuration/configure_cpu.cpp index eee1c677b7..b31ca849a6 100644 --- a/src/yuzu/configuration/configure_cpu.cpp +++ b/src/yuzu/configuration/configure_cpu.cpp @@ -76,9 +76,7 @@ void ConfigureCpu::Setup(const ConfigurationShared::Builder& builder) { } else if (setting->Id() == Settings::values.cpu_backend.Id()) { backend_layout->addWidget(widget); backend_combobox = widget->combobox; - } else if (setting->Id() == Settings::values.fast_cpu_time.Id() || - setting->Id() == Settings::values.vtable_bouncing.Id() || - setting->Id() == Settings::values.cpu_ticks.Id()) { + } else if (setting->Id() == Settings::values.fast_cpu_time.Id() || setting->Id() == Settings::values.cpu_ticks.Id()) { ui->general_layout->addWidget(widget); } else { // Presently, all other settings here are unsafe checkboxes