diff --git a/.patch/xbyak/0001-rvalue-optimize.patch b/.patch/xbyak/0001-rvalue-optimize.patch new file mode 100644 index 0000000000..931f4710d5 --- /dev/null +++ b/.patch/xbyak/0001-rvalue-optimize.patch @@ -0,0 +1,5151 @@ +diff --git a/xbyak/xbyak.h b/xbyak/xbyak.h +index 176ee58..35f634a 100644 +--- a/xbyak/xbyak.h ++++ b/xbyak/xbyak.h +@@ -1007,7 +1007,7 @@ public: + #endif + XBYAK_CONSTEXPR RegExp() : scale_(0), disp_(0), label_(0), rip_(false), asPtr_(false) { } + XBYAK_CONSTEXPR RegExp(size_t disp) : scale_(0), disp_(disp), label_(0), rip_(false), asPtr_(false) { } +- XBYAK_CONSTEXPR RegExp(const Reg& r, int scale = 1) ++ XBYAK_CONSTEXPR RegExp(const Reg r, int scale = 1) + : scale_(scale) + , disp_(0) + , label_(0) +@@ -1035,7 +1035,7 @@ public: + { + } + #ifdef XBYAK64 +- XBYAK_CONSTEXPR RegExp(const RegRip& /*rip*/) ++ XBYAK_CONSTEXPR RegExp(const RegRip /*rip*/) + : scale_(0) + , disp_(0) + , label_(0) +@@ -1055,12 +1055,12 @@ public: + } + return exp; + } +- bool operator==(const RegExp& rhs) const ++ bool operator==(const RegExp rhs) const + { + return base_ == rhs.base_ && index_ == rhs.index_ && disp_ == rhs.disp_ && scale_ == rhs.scale_; + } +- const Reg& getBase() const { return base_; } +- const Reg& getIndex() const { return index_; } ++ const Reg getBase() const { return base_; } ++ const Reg getIndex() const { return index_; } + const Label *getLabel() const { return label_; } + bool isOnlyDisp() const { return !base_.getBit() && !index_.getBit(); } // for mov eax + int getScale() const { return scale_; } +@@ -1073,9 +1073,9 @@ public: + if (base_.getBit() && base_.getBit() != index_.getBit()) XBYAK_THROW(ERR_BAD_SIZE_OF_REGISTER) + } + } +- friend RegExp operator+(const RegExp& a, const RegExp& b); +- friend RegExp operator+(const RegExp& e, unsigned long long disp); +- friend RegExp operator-(const RegExp& e, size_t disp); ++ friend RegExp operator+(const RegExp a, const RegExp b); ++ friend RegExp operator+(const RegExp e, unsigned long long disp); ++ friend RegExp operator-(const RegExp e, size_t disp); + private: + /* + [base_ + index_ * scale_ + disp_] +@@ -1090,7 +1090,7 @@ private: + bool asPtr_; // disp_ contains a pointer + }; + +-inline RegExp operator+(const RegExp& a, const RegExp& b) ++inline RegExp operator+(const RegExp a, const RegExp b) + { + if (a.index_.getBit() && b.index_.getBit()) XBYAK_THROW_RET(ERR_BAD_ADDRESSING, RegExp()) + if (a.label_ && b.label_) XBYAK_THROW_RET(ERR_BAD_ADDRESSING, RegExp()) +@@ -1116,33 +1116,33 @@ inline RegExp operator+(const RegExp& a, const RegExp& b) + ret.disp_ += b.disp_; + return ret; + } +-inline RegExp operator*(const Reg& r, int scale) ++inline RegExp operator*(const Reg r, int scale) + { + return RegExp(r, scale); + } +-inline RegExp operator*(int scale, const Reg& r) ++inline RegExp operator*(int scale, const Reg r) + { + return r * scale; + } + + // backward compatibility for eax+&x (pointer address) +-inline RegExp operator+(const RegExp& a, const void* b) { return a + RegExp(b); } ++inline RegExp operator+(const RegExp a, const void* b) { return a + RegExp(b); } + + // since what size_t is typedef'd to depends on the implementation, use unsigned long long (assume u64) for the implementation. +-inline RegExp operator+(const RegExp& e, unsigned long long disp) ++inline RegExp operator+(const RegExp e, unsigned long long disp) + { + RegExp ret = e; + ret.disp_ += static_cast(disp); + return ret; + } + // overload for integer literals (e.g. eax+0) to avoid ambiguity with the void* overload +-inline RegExp operator+(const RegExp& e, int disp) { return e + static_cast(disp); } +-inline RegExp operator+(const RegExp& e, long disp) { return e + static_cast(disp); } +-inline RegExp operator+(const RegExp& e, long long disp) { return e + static_cast(disp); } +-inline RegExp operator+(const RegExp& e, unsigned int disp) { return e + static_cast(disp); } +-inline RegExp operator+(const RegExp& e, unsigned long disp) { return e + static_cast(disp); } ++inline RegExp operator+(const RegExp e, int disp) { return e + static_cast(disp); } ++inline RegExp operator+(const RegExp e, long disp) { return e + static_cast(disp); } ++inline RegExp operator+(const RegExp e, long long disp) { return e + static_cast(disp); } ++inline RegExp operator+(const RegExp e, unsigned int disp) { return e + static_cast(disp); } ++inline RegExp operator+(const RegExp e, unsigned long disp) { return e + static_cast(disp); } + +-inline RegExp operator-(const RegExp& e, size_t disp) ++inline RegExp operator-(const RegExp e, size_t disp) + { + RegExp ret = e; + ret.disp_ -= disp; +@@ -1392,7 +1392,7 @@ public: + XBYAK_CONSTEXPR Address() + : Operand(0, MEM, 0), e_(), label_(NULL), mode_(inner::M_ModRM), immSize(0), + disp8N(0), permitVsib(false), broadcast_(false), optimize_(true) { } +- XBYAK_CONSTEXPR Address(uint32_t sizeBit, bool broadcast, const RegExp& e) ++ XBYAK_CONSTEXPR Address(uint32_t sizeBit, bool broadcast, const RegExp e) + : Operand(0, MEM, sizeBit), e_(e), label_(e.label_), mode_(), immSize(0), + disp8N(0), permitVsib(false), broadcast_(broadcast), optimize_(true) + { +@@ -1467,13 +1467,11 @@ inline XBYAK_CONSTEXPR bool Operand::hasRex2() const + } + + class AddressFrame { +- void operator=(const AddressFrame&); +- AddressFrame(const AddressFrame&); + public: + const uint32_t bit_; + const bool broadcast_; + explicit XBYAK_CONSTEXPR AddressFrame(uint32_t bit, bool broadcast = false) : bit_(bit), broadcast_(broadcast) { } +- Address operator[](const RegExp& e) const ++ Address operator[](const RegExp e) const + { + return Address(bit_, broadcast_, e); + } +@@ -1861,7 +1859,7 @@ private: + // SSE instructions do not support XMM16 - XMM31 + return !(op.isXMM() && op.getIdx() >= 16); + } +- static inline uint8_t rexRXB(int bit, int bit3, const Reg& r, const Reg& b, const Reg& x = Reg()) ++ static inline uint8_t rexRXB(int bit, int bit3, const Reg r, const Reg b, const Reg x = Reg()) + { + int v = bit3 ? 8 : 0; + if (r.hasIdxBit(bit)) v |= 4; +@@ -1869,7 +1867,7 @@ private: + if (b.hasIdxBit(bit)) v |= 1; + return uint8_t(v); + } +- void rex2(int bit3, int rex4bit, const Reg& r, const Reg& b, const Reg& x = Reg()) ++ void rex2(int bit3, int rex4bit, const Reg r, const Reg b, const Reg x = Reg()) + { + db(0xD5); + db((rexRXB(4, bit3, r, b, x) << 4) | rex4bit); +@@ -1894,11 +1892,11 @@ private: + } + bool is0F = type & T_0F; + if (p2->isMEM()) { +- const Reg& r = *static_cast(p1); ++ const Reg r = *static_cast(p1); + const Address& addr = p2->getAddress(); + const RegExp e = addr.getRegExp(); +- const Reg& base = e.getBase(); +- const Reg& idx = e.getIndex(); ++ const Reg base = e.getBase(); ++ const Reg idx = e.getIndex(); + if (BIT == 64 && addr.is32bit()) db(0x67); + rex = rexRXB(3, r.isREG(64), r, base, idx); + if (r.hasRex2() || addr.hasRex2()) { +@@ -1908,8 +1906,8 @@ private: + } + if (rex || r.isExt8bit()) rex |= 0x40; + } else { +- const Reg& r1 = static_cast(op1); +- const Reg& r2 = static_cast(op2); ++ const Reg r1 = static_cast(op1); ++ const Reg r2 = static_cast(op2); + // ModRM(reg, base); + rex = rexRXB(3, r1.isREG(64) || r2.isREG(64), r2, r1); + if (r1.hasRex2() || r2.hasRex2()) { +@@ -1980,7 +1978,7 @@ private: + if (type & T_MAP5) return 5; + return (type & T_0F) ? 1 : (type & T_0F38) ? 2 : (type & T_0F3A) ? 3 : 0; + } +- void vex(const Reg& reg, const Reg& base, const Operand *v, uint64_t type, int code, bool x = false) ++ void vex(const Reg reg, const Reg base, const Operand *v, uint64_t type, int code, bool x = false) + { + int w = (type & T_W1) ? 1 : 0; + bool is256 = (type & T_L1) ? true : reg.isYMM(); +@@ -1998,12 +1996,12 @@ private: + } + db(code); + } +- void verifySAE(const Reg& r, uint64_t type) const ++ void verifySAE(const Reg r, uint64_t type) const + { + if (((type & T_SAE_X) && r.isXMM()) || ((type & T_SAE_Y) && r.isYMM()) || ((type & T_SAE_Z) && r.isZMM())) return; + XBYAK_THROW(ERR_SAE_IS_INVALID) + } +- void verifyER(const Reg& r, uint64_t type) const ++ void verifyER(const Reg r, uint64_t type) const + { + if ((type & T_ER_R) && r.isREG(32|64)) return; + if (((type & T_ER_X) && r.isXMM()) || ((type & T_ER_Y) && r.isYMM()) || ((type & T_ER_Z) && r.isZMM())) return; +@@ -2016,7 +2014,7 @@ private: + if ((a > 0 && a != v) + (b > 0 && b != v) + (c > 0 && c != v) > 0) XBYAK_THROW_RET(err, 0) + return v; + } +- int evex(const Reg& reg, const Reg& base, const Operand *v, uint64_t type, int code, const Reg *x = 0, bool b = false, int aaa = 0, uint32_t VL = 0, bool Hi16Vidx = false) ++ int evex(const Reg reg, const Reg base, const Operand *v, uint64_t type, int code, const Reg *x = 0, bool b = false, int aaa = 0, uint32_t VL = 0, bool Hi16Vidx = false) + { + if (!(type & (T_EVEX | T_MUST_EVEX))) XBYAK_THROW_RET(ERR_EVEX_IS_INVALID, 0) + int w = (type & T_EW1) ? 1 : 0; +@@ -2072,7 +2070,7 @@ private: + return disp8N; + } + // evex of Legacy +- void evexLeg(const Reg& r, const Reg& b, const Reg& x, const Reg& v, uint64_t type, int sc = NONE) ++ void evexLeg(const Reg r, const Reg b, const Reg x, const Reg v, uint64_t type, int sc = NONE) + { + int M = getMap(type); if (M == 0) M = 4; // legacy + int R3 = !r.isExtIdx(); +@@ -2105,7 +2103,7 @@ private: + } + void setSIB(const Address& addr, int reg) + { +- const RegExp& e = addr.getRegExp(); ++ const RegExp e = addr.getRegExp(); + const Label *label = e.getLabel(); + int disp8N = addr.disp8N; + uint64_t disp64 = e.getDisp(); +@@ -2121,8 +2119,8 @@ private: + #endif + #endif + uint32_t disp = static_cast(disp64); +- const Reg& base = e.getBase(); +- const Reg& index = e.getIndex(); ++ const Reg base = e.getBase(); ++ const Reg index = e.getIndex(); + const int baseIdx = base.getIdx(); + const int baseBit = base.getBit(); + const int indexBit = index.getBit(); +@@ -2175,7 +2173,7 @@ private: + } + } + LabelManager labelMgr_; +- void writeCode(uint64_t type, const Reg& r, int code, bool rex2 = false) ++ void writeCode(uint64_t type, const Reg r, int code, bool rex2 = false) + { + if (!(type&T_APX || rex2)) { + if (type & T_0F) { +@@ -2188,7 +2186,7 @@ private: + } + db(code | (((type & T_SENTRY) == 0 || (type & T_CODE1_IF1)) && !r.isBit(8))); + } +- void opRR(const Reg& r1, const Reg& r2, uint64_t type, int code) ++ void opRR(const Reg r1, const Reg r2, uint64_t type, int code) + { + if (!(type & T_ALLOW_DIFF_SIZE) && r1.isREG() && r2.isREG() && r1.getBit() != r2.getBit()) XBYAK_THROW(ERR_BAD_SIZE_OF_REGISTER) + if (!(type & T_ALLOW_ABCDH) && (isBadCombination(r1, r2) || isBadCombination(r2, r1))) XBYAK_THROW(ERR_CANT_USE_ABCDH) +@@ -2196,7 +2194,7 @@ private: + writeCode(type, r1, code, rex2); + setModRM(3, r1.getIdx(), r2.getIdx()); + } +- void opMR(const Address& addr, const Reg& r, uint64_t type, int code, uint64_t type2 = 0, int code2 = NONE) ++ void opMR(const Address& addr, const Reg r, uint64_t type, int code, uint64_t type2 = 0, int code2 = NONE) + { + if (code2 == NONE) code2 = code; + if (type2 && opROO(Reg(), addr, r, type2, code2)) return; +@@ -2208,7 +2206,7 @@ private: + writeCode(type, r, code, rex2); + opAddr(addr, r.getIdx()); + } +- void opLoadSeg(const Address& addr, const Reg& reg, uint64_t type, int code) ++ void opLoadSeg(const Address& addr, const Reg reg, uint64_t type, int code) + { + if (reg.isBit(8)) XBYAK_THROW(ERR_BAD_SIZE_OF_REGISTER) + if (addr.is64bitDisp()) XBYAK_THROW(ERR_CANT_USE_64BIT_DISP) +@@ -2219,7 +2217,7 @@ private: + opAddr(addr, reg.getIdx()); + } + // for only MPX(bnd*) +- void opMIB(const Address& addr, const Reg& reg, uint64_t type, int code) ++ void opMIB(const Address& addr, const Reg reg, uint64_t type, int code) + { + if (addr.getMode() != inner::M_ModRM) XBYAK_THROW(ERR_INVALID_MIB_ADDRESS) + opMR(addr.cloneNoOptimize(), reg, type, code); +@@ -2307,14 +2305,14 @@ private: + } + } + } +- void opSSE(const Reg& r, const Operand& op, uint64_t type, int code, bool isValid(const Operand&, const Operand&) = 0, int imm8 = NONE) ++ void opSSE(const Reg r, const Operand& op, uint64_t type, int code, bool isValid(const Operand&, const Operand&) = 0, int imm8 = NONE) + { + if (isValid && !isValid(r, op)) XBYAK_THROW(ERR_BAD_COMBINATION) + if (!isValidSSE(r) || !isValidSSE(op)) XBYAK_THROW(ERR_NOT_SUPPORTED) + opRO(r, op, type, code, true, (imm8 != NONE) ? 1 : 0); + if (imm8 != NONE) db(imm8); + } +- void opMMX_IMM(const Mmx& mmx, int imm8, int code, int ext) ++ void opMMX_IMM(const Mmx mmx, int imm8, int code, int ext) + { + if (!isValidSSE(mmx)) XBYAK_THROW(ERR_NOT_SUPPORTED) + uint64_t type = T_0F; +@@ -2322,7 +2320,7 @@ private: + opRR(Reg32(ext), mmx, type, code); + db(imm8); + } +- void opMMX(const Mmx& mmx, const Operand& op, int code, uint64_t type = T_0F, uint64_t pref = T_66, int imm8 = NONE) ++ void opMMX(const Mmx mmx, const Operand& op, int code, uint64_t type = T_0F, uint64_t pref = T_66, int imm8 = NONE) + { + if (mmx.isXMM()) type |= pref; + opSSE(mmx, op, type, code, isXMMorMMX_MEM, imm8); +@@ -2339,7 +2337,7 @@ private: + } + } + // pextr{w,b,d}, extractps +- void opExt(const Operand& op, const Mmx& mmx, int code, int imm, bool hasMMX2 = false) ++ void opExt(const Operand& op, const Mmx mmx, int code, int imm, bool hasMMX2 = false) + { + if (!isValidSSE(op) || !isValidSSE(mmx)) XBYAK_THROW(ERR_NOT_SUPPORTED) + if (hasMMX2 && op.isREG(i32e)) { /* pextrw is special */ +@@ -2350,21 +2348,21 @@ private: + } + } + // r1 is [abcd]h and r2 is reg with rex +- bool isBadCombination(const Reg& r1, const Reg& r2) const ++ bool isBadCombination(const Reg r1, const Reg r2) const + { + if (!r1.isHigh8bit()) return false; + if (r2.isExt8bit() || r2.getIdx() >= 8) return true; + return false; + } + // (r, r, m) or (r, m, r) +- bool opROO(const Reg& d, const Operand& op1, const Operand& op2, uint64_t type, int code, int immSize = 0, int sc = NONE) ++ bool opROO(const Reg d, const Operand& op1, const Operand& op2, uint64_t type, int code, int immSize = 0, int sc = NONE) + { + if (!(type & T_MUST_EVEX) && !d.isREG() && !(d.hasRex2NFZU() || op1.hasRex2NFZU() || op2.hasRex2NFZU())) return false; + const Operand *p1 = &op1, *p2 = &op2; + if (p1->isMEM()) { std::swap(p1, p2); } else { if (p2->isMEM()) code |= 2; } + if (p1->isMEM()) XBYAK_THROW_RET(ERR_BAD_COMBINATION, false) + if (p2->isMEM()) { +- const Reg& r = *static_cast(p1); ++ const Reg r = *static_cast(p1); + Address addr = p2->getAddress(); + const RegExp e = addr.getRegExp(); + evexLeg(r, e.getBase(), e.getIndex(), d, type, sc); +@@ -2372,7 +2370,7 @@ private: + addr.immSize = immSize; + opAddr(addr, r.getIdx()); + } else { +- evexLeg(static_cast(op2), static_cast(op1), Reg(), d, type, sc); ++ evexLeg(static_cast(op2), static_cast(op1), Reg(), d, type, sc); + writeCode(type, d, code); + setModRM(3, op2.getIdx(), op1.getIdx()); + } +@@ -2405,7 +2403,7 @@ private: + opRext(op, 0, ext&7, type, (0xC0 | ((imm == 1 ? 1 : 0) << 4)), false, (imm != 1) ? 1 : 0, d); + if (imm != 1) db(imm); + } +- void opShift(const Operand& op, const Reg8& _cl, int ext, const Reg *d = 0) ++ void opShift(const Operand& op, const Reg8 _cl, int ext, const Reg *d = 0) + { + if (_cl.getIdx() != Operand::CL) XBYAK_THROW(ERR_BAD_COMBINATION) + if (d && op.getBit() != 0 && d->getBit() != op.getBit()) XBYAK_THROW(ERR_BAD_SIZE_OF_REGISTER) +@@ -2413,7 +2411,7 @@ private: + opRext(op, 0, ext&7, type, 0xD2, false, 0, d); + } + // condR assumes that op.isREG() is true +- void opRO(const Reg& r, const Operand& op, uint64_t type, int code, bool condR = true, int immSize = 0) ++ void opRO(const Reg r, const Operand& op, uint64_t type, int code, bool condR = true, int immSize = 0) + { + if (op.isMEM()) { + opMR(op.getAddress(immSize), r, type, code); +@@ -2423,7 +2421,7 @@ private: + XBYAK_THROW(ERR_BAD_COMBINATION) + } + } +- void opShxd(const Reg& d, const Operand& op, const Reg& reg, uint8_t imm, int code, int code2, const Reg8 *_cl = 0) ++ void opShxd(const Reg d, const Operand& op, const Reg reg, uint8_t imm, int code, int code2, const Reg8 *_cl = 0) + { + if (_cl && _cl->getIdx() != Operand::CL) XBYAK_THROW(ERR_BAD_COMBINATION) + if (!reg.isREG(16|i32e)) XBYAK_THROW(ERR_BAD_SIZE_OF_REGISTER) +@@ -2443,7 +2441,7 @@ private: + if (!op1.isREG()) XBYAK_THROW(ERR_BAD_COMBINATION) + opMR(op2.getAddress(), op1.getReg(), 0, code | 2); + } else { +- opRO(static_cast(op2), op1, 0, code, op1.getKind() == op2.getKind()); ++ opRO(static_cast(op2), op1, 0, code, op1.getKind() == op2.getKind()); + } + } + bool isInDisp16(uint32_t x) const { return 0xFFFF8000 <= x || x <= 0x7FFF; } +@@ -2472,14 +2470,14 @@ private: + db(imm, immBit / 8); + } + // (r, r/m, imm) +- void opROI(const Reg& d, const Operand& op, uint32_t imm, uint64_t type, int ext) ++ void opROI(const Reg d, const Operand& op, uint32_t imm, uint64_t type, int ext) + { + uint32_t immBit = getImmBit(d, imm); + int code = immBit < (std::min)(d.getBit(), 32U) ? 2 : 0; + opROO(d, op, Reg(ext, Operand::REG, d.getBit()), type, 0x80 | code, immBit / 8); + db(imm, immBit / 8); + } +- void opIncDec(const Reg& d, const Operand& op, int ext) ++ void opIncDec(const Reg d, const Operand& op, int ext) + { + #ifdef XBYAK64 + if (d.isREG()) { +@@ -2504,7 +2502,7 @@ private: + void opPushPop(const Operand& op, int code, int ext, int alt) + { + if (op.isREG() && op.hasRex2()) { +- const Reg& r = static_cast(op); ++ const Reg r = static_cast(op); + rex2(0, rexRXB(3, 0, Reg(), r), Reg(), r); + db(alt | (r.getIdx() & 7)); + return; +@@ -2531,7 +2529,7 @@ private: + /* + mov(r, imm) = db(imm, mov_imm(r, imm)) + */ +- int mov_imm(const Reg& reg, uint64_t imm) ++ int mov_imm(const Reg reg, uint64_t imm) + { + int bit = reg.getBit(); + const int idx = reg.getIdx(); +@@ -2571,7 +2569,7 @@ private: + JmpLabel jmp(size_, jmpSize, (relative ? inner::LasIs : isAutoGrow() ? inner::LaddTop : inner::Labs), disp); + labelMgr_.addUndefinedLabel(label, jmp); + } +- void opMovxx(const Reg& reg, const Operand& op, uint8_t code) ++ void opMovxx(const Reg reg, const Operand& op, uint8_t code) + { + if (op.isBit(32)) XBYAK_THROW(ERR_BAD_COMBINATION) + int w = op.isBit(16); +@@ -2590,24 +2588,24 @@ private: + } + // use code1 if reg1 == st0 + // use code2 if reg1 != st0 && reg2 == st0 +- void opFpuFpu(const Fpu& reg1, const Fpu& reg2, uint32_t code1, uint32_t code2) ++ void opFpuFpu(const Fpu reg1, const Fpu reg2, uint32_t code1, uint32_t code2) + { + uint32_t code = reg1.getIdx() == 0 ? code1 : reg2.getIdx() == 0 ? code2 : 0; + if (!code) XBYAK_THROW(ERR_BAD_ST_COMBINATION) + db(uint8_t(code >> 8)); + db(uint8_t(code | (reg1.getIdx() | reg2.getIdx()))); + } +- void opFpu(const Fpu& reg, uint8_t code1, uint8_t code2) ++ void opFpu(const Fpu reg, uint8_t code1, uint8_t code2) + { + db(code1); db(code2 | reg.getIdx()); + } +- void opVex(const Reg& r, const Operand *p1, const Operand& op2, uint64_t type, int code, int imm8 = NONE) ++ void opVex(const Reg r, const Operand *p1, const Operand& op2, uint64_t type, int code, int imm8 = NONE) + { + if (op2.isMEM()) { + Address addr = op2.getAddress(); +- const RegExp& regExp = addr.getRegExp(); +- const Reg& base = regExp.getBase(); +- const Reg& index = regExp.getIndex(); ++ const RegExp regExp = addr.getRegExp(); ++ const Reg base = regExp.getBase(); ++ const Reg index = regExp.getIndex(); + if (BIT == 64 && addr.is32bit()) db(0x67); + int disp8N = 0; + if ((type & (T_MUST_EVEX|T_MEM_EVEX)) || r.hasEvex() || (p1 && p1->hasEvex()) || addr.isBroadcast() || addr.getOpmaskIdx() || addr.hasRex2()) { +@@ -2628,7 +2626,7 @@ private: + if (imm8 != NONE) addr.immSize = 1; + opAddr(addr, r.getIdx()); + } else { +- const Reg& base = op2.getReg(); ++ const Reg base = op2.getReg(); + if ((type & T_MUST_EVEX) || r.hasEvex() || (p1 && p1->hasEvex()) || base.hasEvex()) { + evex(r, base, p1, type, code); + } else { +@@ -2640,7 +2638,7 @@ private: + } + // (r, r, r/m) + // opRRO(a, b, c) == opROO(b, c, a) +- void opRRO(const Reg& d, const Reg& r1, const Operand& op2, uint64_t type, uint8_t code, int imm8 = NONE) ++ void opRRO(const Reg d, const Reg r1, const Operand& op2, uint64_t type, uint8_t code, int imm8 = NONE) + { + const unsigned int bit = d.getBit(); + if (r1.getBit() != bit || (op2.isREG() && op2.getBit() != bit)) XBYAK_THROW(ERR_BAD_COMBINATION) +@@ -2652,7 +2650,7 @@ private: + opVex(d, &r1, op2, type, code, imm8); + } + } +- void opAVX_X_X_XM(const Xmm& x1, const Operand& op1, const Operand& op2, uint64_t type, int code, int imm8 = NONE) ++ void opAVX_X_X_XM(const Xmm x1, const Operand& op1, const Operand& op2, uint64_t type, int code, int imm8 = NONE) + { + const Xmm *x2 = static_cast(&op1); + const Operand *op = &op2; +@@ -2664,7 +2662,7 @@ private: + if (!((x1.isXMM() && x2->isXMM()) || ((type & T_YMM) && ((x1.isYMM() && x2->isYMM()) || (x1.isZMM() && x2->isZMM()))))) XBYAK_THROW(ERR_BAD_COMBINATION) + opVex(x1, x2, *op, type, code, imm8); + } +- void opAVX_K_X_XM(const Opmask& k, const Xmm& x2, const Operand& op3, uint64_t type, int code, int imm8 = NONE) ++ void opAVX_K_X_XM(const Opmask& k, const Xmm x2, const Operand& op3, uint64_t type, int code, int imm8 = NONE) + { + if (!op3.isMEM() && (x2.getKind() != op3.getKind())) XBYAK_THROW(ERR_BAD_COMBINATION) + opVex(k, &x2, op3, type, code, imm8); +@@ -2675,21 +2673,21 @@ private: + if (!op.isMEM() && !(x.is(Operand::XMM | Operand::YMM) && op.isXMM()) && !(x.isZMM() && op.isYMM())) XBYAK_THROW(ERR_BAD_COMBINATION) + } + // (x, x/m), (x, y/m256), (y, z/m) +- void checkCvt2(const Xmm& x, const Operand& op) const ++ void checkCvt2(const Xmm x, const Operand& op) const + { + if (!(x.isXMM() && op.is(Operand::XMM | Operand::YMM | Operand::MEM)) && !(x.isYMM() && op.is(Operand::ZMM | Operand::MEM))) XBYAK_THROW(ERR_BAD_COMBINATION) + } +- void opCvt(const Xmm& x, const Operand& op, uint64_t type, int code) ++ void opCvt(const Xmm x, const Operand& op, uint64_t type, int code) + { + Operand::Kind kind = x.isXMM() ? (op.isBit(256) ? Operand::YMM : Operand::XMM) : Operand::ZMM; + opVex(x.copyAndSetKind(kind), &xm0, op, type, code); + } +- void opCvt2(const Xmm& x, const Operand& op, uint64_t type, int code) ++ void opCvt2(const Xmm x, const Operand& op, uint64_t type, int code) + { + checkCvt2(x, op); + opCvt(x, op, type, code); + } +- void opCvt3(const Xmm& x1, const Xmm& x2, const Operand& op, uint64_t type, uint64_t type64, uint64_t type32, uint8_t code) ++ void opCvt3(const Xmm x1, const Xmm x2, const Operand& op, uint64_t type, uint64_t type64, uint64_t type32, uint8_t code) + { + if (!(x1.isXMM() && x2.isXMM() && (op.isREG(i32e) || op.isMEM()))) XBYAK_THROW(ERR_BAD_SIZE_OF_REGISTER) + Xmm x(op.getIdx()); +@@ -2697,19 +2695,19 @@ private: + opVex(x1, &x2, *p, type | (op.isBit(64) ? type64 : type32), code); + } + // (x, x/y/xword/yword), (y, z/m) +- void checkCvt4(const Xmm& x, const Operand& op) const ++ void checkCvt4(const Xmm x, const Operand& op) const + { + if (!(x.isXMM() && op.is(Operand::XMM | Operand::YMM | Operand::MEM) && op.isBit(128|256)) && !(x.isYMM() && op.is(Operand::ZMM | Operand::MEM))) XBYAK_THROW(ERR_BAD_COMBINATION) + } + // (x, x/y/z/xword/yword/zword) +- void opCvt5(const Xmm& x, const Operand& op, uint64_t type, int code) ++ void opCvt5(const Xmm x, const Operand& op, uint64_t type, int code) + { + if (!(x.isXMM() && op.isBit(128|256|512))) XBYAK_THROW(ERR_BAD_COMBINATION) + Operand::Kind kind = op.isBit(128) ? Operand::XMM : op.isBit(256) ? Operand::YMM : Operand::ZMM; + opVex(x.copyAndSetKind(kind), &xm0, op, type, code); + } + // (x, x, x/m), (x, y, y/m), (y, z, z/m) +- void opCvt6(const Xmm& x1, const Xmm& x2, const Operand& op, uint64_t type, int code) ++ void opCvt6(const Xmm x1, const Xmm x2, const Operand& op, uint64_t type, int code) + { + int b1 = x1.getBit(); + int b2 = x2.getBit(); +@@ -2720,25 +2718,25 @@ private: + } + XBYAK_THROW(ERR_BAD_COMBINATION); + } +- const Xmm& cvtIdx0(const Operand& x) const ++ const Xmm cvtIdx0(const Operand& x) const + { + return x.isZMM() ? zm0 : x.isYMM() ? ym0 : xm0; + } + // support (x, x/m, imm), (y, y/m, imm) +- void opAVX_X_XM_IMM(const Xmm& x, const Operand& op, uint64_t type, int code, int imm8 = NONE) ++ void opAVX_X_XM_IMM(const Xmm x, const Operand& op, uint64_t type, int code, int imm8 = NONE) + { + opAVX_X_X_XM(x, cvtIdx0(x), op, type, code, imm8); + } +- void opCnt(const Reg& reg, const Operand& op, uint8_t code) ++ void opCnt(const Reg reg, const Operand& op, uint8_t code) + { + if (reg.isBit(8)) XBYAK_THROW(ERR_BAD_SIZE_OF_REGISTER) + bool is16bit = reg.isREG(16) && (op.isREG(16) || op.isMEM()); + if (!is16bit && !(reg.isREG(i32e) && (op.isREG(reg.getBit()) || op.isMEM()))) XBYAK_THROW(ERR_BAD_COMBINATION) + opRO(reg, op, T_F3 | T_0F, code); + } +- void opGather(const Xmm& x1, const Address& addr, const Xmm& x2, uint64_t type, uint8_t code, int mode) ++ void opGather(const Xmm x1, const Address& addr, const Xmm x2, uint64_t type, uint8_t code, int mode) + { +- const RegExp& regExp = addr.getRegExp(); ++ const RegExp regExp = addr.getRegExp(); + if (!regExp.isVsib(128 | 256)) XBYAK_THROW(ERR_BAD_VSIB_ADDRESSING) + const int y_vx_y = 0; + const int y_vy_y = 1; +@@ -2766,7 +2764,7 @@ private: + xx_yx_zy = 1, + xx_xy_yz = 2 + }; +- void checkGather2(const Xmm& x1, const Reg& x2, int mode) const ++ void checkGather2(const Xmm x1, const Reg x2, int mode) const + { + if (x1.isXMM() && x2.isXMM()) return; + switch (mode) { +@@ -2779,10 +2777,10 @@ private: + } + XBYAK_THROW(ERR_BAD_VSIB_ADDRESSING) + } +- void opGather2(const Xmm& x, const Address& addr, uint64_t type, uint8_t code, int mode) ++ void opGather2(const Xmm x, const Address& addr, uint64_t type, uint8_t code, int mode) + { + if (x.hasZero()) XBYAK_THROW(ERR_INVALID_ZERO) +- const RegExp& regExp = addr.getRegExp(); ++ const RegExp regExp = addr.getRegExp(); + checkGather2(x, regExp.getIndex(), mode); + int maskIdx = x.getOpmaskIdx(); + if ((type & T_M_K) && addr.getOpmaskIdx()) maskIdx = addr.getOpmaskIdx(); +@@ -2794,7 +2792,7 @@ private: + xx_xy_yz ; mode = true + xx_xy_xz ; mode = false + */ +- void opVmov(const Operand& op, const Xmm& x, uint64_t type, uint8_t code, bool mode) ++ void opVmov(const Operand& op, const Xmm x, uint64_t type, uint8_t code, bool mode) + { + if (mode) { + if (!op.isMEM() && !((op.isXMM() && x.isXMM()) || (op.isXMM() && x.isYMM()) || (op.isYMM() && x.isZMM()))) XBYAK_THROW(ERR_BAD_COMBINATION) +@@ -2803,13 +2801,13 @@ private: + } + opVex(x, 0, op, type, code); + } +- void opGatherFetch(const Address& addr, const Xmm& x, uint64_t type, uint8_t code, Operand::Kind kind) ++ void opGatherFetch(const Address& addr, const Xmm x, uint64_t type, uint8_t code, Operand::Kind kind) + { + if (addr.hasZero()) XBYAK_THROW(ERR_INVALID_ZERO) + if (addr.getRegExp().getIndex().getKind() != kind) XBYAK_THROW(ERR_BAD_VSIB_ADDRESSING) + opVex(x, 0, addr, type, code); + } +- void opEncoding(const Xmm& x1, const Xmm& x2, const Operand& op, uint64_t type, int code, PreferredEncoding enc, int imm = NONE, uint64_t typeVex = 0, uint64_t typeEvex = 0, int sel = 0) ++ void opEncoding(const Xmm x1, const Xmm x2, const Operand& op, uint64_t type, int code, PreferredEncoding enc, int imm = NONE, uint64_t typeVex = 0, uint64_t typeEvex = 0, int sel = 0) + { + opAVX_X_X_XM(x1, x2, op, type | orEvexIf(enc, typeVex, typeEvex, sel), code, imm); + } +@@ -2828,7 +2826,7 @@ private: + enc = getEncoding(enc, sel); + return ((sel == 0 && enc == VexEncoding) || (sel == 1 && enc != AVX10v2Encoding)) ? typeVex : (T_MUST_EVEX | typeEvex); + } +- void opInOut(const Reg& a, const Reg& d, uint8_t code) ++ void opInOut(const Reg a, const Reg d, uint8_t code) + { + if (a.getIdx() == Operand::AL && d.getIdx() == Operand::DX && d.getBit() == 16) { + switch (a.getBit()) { +@@ -2839,7 +2837,7 @@ private: + } + XBYAK_THROW(ERR_BAD_COMBINATION) + } +- void opInOut(const Reg& a, uint8_t code, uint8_t v) ++ void opInOut(const Reg a, uint8_t code, uint8_t v) + { + if (a.getIdx() == Operand::AL) { + switch (a.getBit()) { +@@ -2873,7 +2871,7 @@ private: + opROO(Reg(15 - dfv, Operand::REG, opBit), op, Reg(0, Operand::REG, opBit), T_APX|T_CODE1_IF1, 0xF6, immBit / 8, sc); + db(imm, immBit / 8); + } +- void opCfcmov(const Reg& d, const Operand& op1, const Operand& op2, int code) ++ void opCfcmov(const Reg d, const Operand& op1, const Operand& op2, int code) + { + const int dBit = d.getBit(); + const int op2Bit = op2.getBit(); +@@ -2884,7 +2882,7 @@ private: + uint64_t type = dBit > 0 ? (T_MUST_EVEX|T_NF) : T_MUST_EVEX; + opROO(d, op2, op1, type, code); + } else { +- opROO(d, op1, static_cast(op2)|T_nf, T_MUST_EVEX|T_NF, code); ++ opROO(d, op1, static_cast(op2)|T_nf, T_MUST_EVEX|T_NF, code); + } + } + #ifdef XBYAK64 +@@ -2924,7 +2922,7 @@ private: + if (opROO(Reg(), *p2, *p1, T_APX|type, code)) return; + opVex(static_cast(*p1), 0, *p2, type, code); + } +- void opEncodeKey(const Reg32& r1, const Reg32& r2, uint8_t code1, uint8_t code2) ++ void opEncodeKey(const Reg32 r1, const Reg32 r2, uint8_t code1, uint8_t code2) + { + if (r1.getIdx() < 8 && r2.getIdx() < 8) { + db(0xF3); db(0x0F); db(0x38); db(code1); setModRM(3, r1.getIdx(), r2.getIdx()); +@@ -2932,7 +2930,7 @@ private: + } + opROO(Reg(), r2, r1, T_MUST_EVEX|T_F3, code2); + } +- void opSSE_APX(const Xmm& x, const Operand& op, uint64_t type1, uint8_t code1, uint64_t type2, uint8_t code2, int imm = NONE) ++ void opSSE_APX(const Xmm x, const Operand& op, uint64_t type1, uint8_t code1, uint64_t type2, uint8_t code2, int imm = NONE) + { + if (x.getIdx() <= 15 && op.hasRex2() && opROO(Reg(), op, x, type2, code2, imm != NONE ? 1 : 0)) { + if (imm != NONE) db(imm); +@@ -2972,9 +2970,9 @@ public: + const Xmm xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7; + const Ymm ymm0, ymm1, ymm2, ymm3, ymm4, ymm5, ymm6, ymm7; + const Zmm zmm0, zmm1, zmm2, zmm3, zmm4, zmm5, zmm6, zmm7; +- const Xmm &xm0, &xm1, &xm2, &xm3, &xm4, &xm5, &xm6, &xm7; +- const Ymm &ym0, &ym1, &ym2, &ym3, &ym4, &ym5, &ym6, &ym7; +- const Zmm &zm0, &zm1, &zm2, &zm3, &zm4, &zm5, &zm6, &zm7; ++ const Xmm xm0, &xm1, &xm2, &xm3, &xm4, &xm5, &xm6, &xm7; ++ const Ymm ym0, &ym1, &ym2, &ym3, &ym4, &ym5, &ym6, &ym7; ++ const Zmm zm0, &zm1, &zm2, &zm3, &zm4, &zm5, &zm6, &zm7; + const Reg32 eax, ecx, edx, ebx, esp, ebp, esi, edi; + const Reg16 ax, cx, dx, bx, sp, bp, si, di; + const Reg8 al, cl, dl, bl, ah, ch, dh, bh; +@@ -3007,15 +3005,15 @@ public: + const Zmm zmm16, zmm17, zmm18, zmm19, zmm20, zmm21, zmm22, zmm23; + const Zmm zmm24, zmm25, zmm26, zmm27, zmm28, zmm29, zmm30, zmm31; + const Tmm tmm0, tmm1, tmm2, tmm3, tmm4, tmm5, tmm6, tmm7; +- const Xmm &xm8, &xm9, &xm10, &xm11, &xm12, &xm13, &xm14, &xm15; // for my convenience +- const Xmm &xm16, &xm17, &xm18, &xm19, &xm20, &xm21, &xm22, &xm23; +- const Xmm &xm24, &xm25, &xm26, &xm27, &xm28, &xm29, &xm30, &xm31; +- const Ymm &ym8, &ym9, &ym10, &ym11, &ym12, &ym13, &ym14, &ym15; +- const Ymm &ym16, &ym17, &ym18, &ym19, &ym20, &ym21, &ym22, &ym23; +- const Ymm &ym24, &ym25, &ym26, &ym27, &ym28, &ym29, &ym30, &ym31; +- const Zmm &zm8, &zm9, &zm10, &zm11, &zm12, &zm13, &zm14, &zm15; +- const Zmm &zm16, &zm17, &zm18, &zm19, &zm20, &zm21, &zm22, &zm23; +- const Zmm &zm24, &zm25, &zm26, &zm27, &zm28, &zm29, &zm30, &zm31; ++ const Xmm xm8, &xm9, &xm10, &xm11, &xm12, &xm13, &xm14, &xm15; // for my convenience ++ const Xmm xm16, &xm17, &xm18, &xm19, &xm20, &xm21, &xm22, &xm23; ++ const Xmm xm24, &xm25, &xm26, &xm27, &xm28, &xm29, &xm30, &xm31; ++ const Ymm ym8, &ym9, &ym10, &ym11, &ym12, &ym13, &ym14, &ym15; ++ const Ymm ym16, &ym17, &ym18, &ym19, &ym20, &ym21, &ym22, &ym23; ++ const Ymm ym24, &ym25, &ym26, &ym27, &ym28, &ym29, &ym30, &ym31; ++ const Zmm zm8, &zm9, &zm10, &zm11, &zm12, &zm13, &zm14, &zm15; ++ const Zmm zm16, &zm17, &zm18, &zm19, &zm20, &zm21, &zm22, &zm23; ++ const Zmm zm24, &zm25, &zm26, &zm27, &zm28, &zm29, &zm30, &zm31; + const RegRip rip; + #endif + #ifndef XBYAK_DISABLE_SEGMENT +@@ -3064,7 +3062,7 @@ public: + #endif + void call(const void *addr) { opJmpAbs(addr, T_NEAR, 0, 0xE8); } + +- void test(const Operand& op, const Reg& reg) ++ void test(const Operand& op, const Reg reg) + { + opRO(reg, op, 0, 0x84, op.getKind() == reg.getKind()); + } +@@ -3080,7 +3078,7 @@ public: + } + db(imm, immSize); + } +- void imul(const Reg& reg, const Operand& op, int imm) ++ void imul(const Reg reg, const Operand& op, int imm) + { + int s = inner::IsInDisp8(imm) ? 1 : 0; + int immSize = s ? 1 : reg.isREG(16) ? 2 : 4; +@@ -3370,7 +3368,7 @@ public: + defaultEncoding_[1] = enc; + } + +- void bswap(const Reg32e& r) ++ void bswap(const Reg32e r) + { + int idx = r.getIdx(); + uint8_t rex = (r.isREG(64) ? 8 : 0) | ((idx & 8) ? 1 : 0); +diff --git a/xbyak/xbyak_mnemonic.h b/xbyak/xbyak_mnemonic.h +index 8375f06..bf935f5 100644 +--- a/xbyak/xbyak_mnemonic.h ++++ b/xbyak/xbyak_mnemonic.h +@@ -1,49 +1,49 @@ + const char *getVersionString() const { return "7.35.4"; } +-void aadd(const Address& addr, const Reg32e ®) { opMR(addr, reg, T_0F38, 0x0FC, T_APX); } +-void aand(const Address& addr, const Reg32e ®) { opMR(addr, reg, T_0F38|T_66, 0x0FC, T_APX|T_66); } ++void aadd(const Address& addr, Reg32e reg) { opMR(addr, reg, T_0F38, 0x0FC, T_APX); } ++void aand(const Address& addr, Reg32e reg) { opMR(addr, reg, T_0F38|T_66, 0x0FC, T_APX|T_66); } + void adc(const Operand& op, uint32_t imm) { opOI(op, imm, 0x10, 2); } + void adc(const Operand& op1, const Operand& op2) { opRO_MR(op1, op2, 0x10); } +-void adc(const Reg& d, const Operand& op, uint32_t imm) { opROI(d, op, imm, T_NONE, 2); } +-void adc(const Reg& d, const Operand& op1, const Operand& op2) { opROO(d, op1, op2, T_NONE, 0x10); } +-void adcx(const Reg32e& d, const Reg32e& reg, const Operand& op) { opROO(d, op, reg, T_66, 0x66); } +-void adcx(const Reg32e& reg, const Operand& op) { if (!reg.isREG(16|i32e) && reg.getBit() == op.getBit()) XBYAK_THROW(ERR_BAD_SIZE_OF_REGISTER) if (opROO(Reg(), op, reg, T_66, 0x66)) return; opRO(reg, op, T_66 | T_0F38, 0xF6); } ++void adc(Reg d, const Operand& op, uint32_t imm) { opROI(d, op, imm, T_NONE, 2); } ++void adc(Reg d, const Operand& op1, const Operand& op2) { opROO(d, op1, op2, T_NONE, 0x10); } ++void adcx(Reg32e d, Reg32e reg, const Operand& op) { opROO(d, op, reg, T_66, 0x66); } ++void adcx(Reg32e reg, const Operand& op) { if (!reg.isREG(16|i32e) && reg.getBit() == op.getBit()) XBYAK_THROW(ERR_BAD_SIZE_OF_REGISTER) if (opROO(Reg(), op, reg, T_66, 0x66)) return; opRO(reg, op, T_66 | T_0F38, 0xF6); } + void add(const Operand& op, uint32_t imm) { opOI(op, imm, 0x00, 0); } + void add(const Operand& op1, const Operand& op2) { opRO_MR(op1, op2, 0x00); } +-void add(const Reg& d, const Operand& op, uint32_t imm) { opROI(d, op, imm, T_NF|T_CODE1_IF1, 0); } +-void add(const Reg& d, const Operand& op1, const Operand& op2) { opROO(d, op1, op2, T_NF|T_CODE1_IF1, 0x00); } +-void addpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x58, isXMM_XMMorMEM); } +-void addps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x58, isXMM_XMMorMEM); } +-void addsd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F2, 0x58, isXMM_XMMorMEM); } +-void addss(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F3, 0x58, isXMM_XMMorMEM); } +-void addsubpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F|T_YMM, 0xD0, isXMM_XMMorMEM); } +-void addsubps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_F2|T_0F|T_YMM, 0xD0, isXMM_XMMorMEM); } +-void adox(const Reg32e& d, const Reg32e& reg, const Operand& op) { opROO(d, op, reg, T_F3, 0x66); } +-void adox(const Reg32e& reg, const Operand& op) { if (!reg.isREG(16|i32e) && reg.getBit() == op.getBit()) XBYAK_THROW(ERR_BAD_SIZE_OF_REGISTER) if (opROO(Reg(), op, reg, T_F3, 0x66)) return; opRO(reg, op, T_F3 | T_0F38, 0xF6); } +-void aesdec(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38|T_YMM|T_EVEX, 0xDE, isXMM_XMMorMEM); } +-void aesdeclast(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38|T_YMM|T_EVEX, 0xDF, isXMM_XMMorMEM); } +-void aesenc(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38|T_YMM|T_EVEX, 0xDC, isXMM_XMMorMEM); } +-void aesenclast(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38|T_YMM|T_EVEX, 0xDD, isXMM_XMMorMEM); } +-void aesimc(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38|T_W0, 0xDB, isXMM_XMMorMEM, NONE); } +-void aeskeygenassist(const Xmm& xmm, const Operand& op, uint8_t imm) { opSSE(xmm, op, T_66|T_0F3A, 0xDF, isXMM_XMMorMEM, imm); } ++void add(Reg d, const Operand& op, uint32_t imm) { opROI(d, op, imm, T_NF|T_CODE1_IF1, 0); } ++void add(Reg d, const Operand& op1, const Operand& op2) { opROO(d, op1, op2, T_NF|T_CODE1_IF1, 0x00); } ++void addpd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x58, isXMM_XMMorMEM); } ++void addps(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x58, isXMM_XMMorMEM); } ++void addsd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F2, 0x58, isXMM_XMMorMEM); } ++void addss(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F3, 0x58, isXMM_XMMorMEM); } ++void addsubpd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F|T_YMM, 0xD0, isXMM_XMMorMEM); } ++void addsubps(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_F2|T_0F|T_YMM, 0xD0, isXMM_XMMorMEM); } ++void adox(Reg32e d, Reg32e reg, const Operand& op) { opROO(d, op, reg, T_F3, 0x66); } ++void adox(Reg32e reg, const Operand& op) { if (!reg.isREG(16|i32e) && reg.getBit() == op.getBit()) XBYAK_THROW(ERR_BAD_SIZE_OF_REGISTER) if (opROO(Reg(), op, reg, T_F3, 0x66)) return; opRO(reg, op, T_F3 | T_0F38, 0xF6); } ++void aesdec(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38|T_YMM|T_EVEX, 0xDE, isXMM_XMMorMEM); } ++void aesdeclast(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38|T_YMM|T_EVEX, 0xDF, isXMM_XMMorMEM); } ++void aesenc(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38|T_YMM|T_EVEX, 0xDC, isXMM_XMMorMEM); } ++void aesenclast(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38|T_YMM|T_EVEX, 0xDD, isXMM_XMMorMEM); } ++void aesimc(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38|T_W0, 0xDB, isXMM_XMMorMEM, NONE); } ++void aeskeygenassist(Xmm xmm, const Operand& op, uint8_t imm) { opSSE(xmm, op, T_66|T_0F3A, 0xDF, isXMM_XMMorMEM, imm); } + void and_(const Operand& op, uint32_t imm) { opOI(op, imm, 0x20, 4); } + void and_(const Operand& op1, const Operand& op2) { opRO_MR(op1, op2, 0x20); } +-void and_(const Reg& d, const Operand& op, uint32_t imm) { opROI(d, op, imm, T_NF|T_CODE1_IF1, 4); } +-void and_(const Reg& d, const Operand& op1, const Operand& op2) { opROO(d, op1, op2, T_NF|T_CODE1_IF1, 0x20); } +-void andn(const Reg32e& r1, const Reg32e& r2, const Operand& op) { opRRO(r1, r2, op, T_APX|T_0F38|T_NF, 0xf2); } +-void andnpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x55, isXMM_XMMorMEM); } +-void andnps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x55, isXMM_XMMorMEM); } +-void andpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x54, isXMM_XMMorMEM); } +-void andps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x54, isXMM_XMMorMEM); } +-void aor(const Address& addr, const Reg32e ®) { opMR(addr, reg, T_0F38|T_F2, 0x0FC, T_APX|T_F2); } +-void axor(const Address& addr, const Reg32e ®) { opMR(addr, reg, T_0F38|T_F3, 0x0FC, T_APX|T_F3); } +-void bextr(const Reg32e& r1, const Operand& op, const Reg32e& r2) { opRRO(r1, r2, op, T_APX|T_0F38|T_NF, 0xf7); } +-void blendpd(const Xmm& xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x0D, isXMM_XMMorMEM, static_cast(imm)); } +-void blendps(const Xmm& xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x0C, isXMM_XMMorMEM, static_cast(imm)); } +-void blendvpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38, 0x15, isXMM_XMMorMEM, NONE); } +-void blendvps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38, 0x14, isXMM_XMMorMEM, NONE); } +-void blsi(const Reg32e& r, const Operand& op) { opRRO(Reg32e(3, r.getBit()), r, op, T_APX|T_0F38|T_NF, 0xf3); } +-void blsmsk(const Reg32e& r, const Operand& op) { opRRO(Reg32e(2, r.getBit()), r, op, T_APX|T_0F38|T_NF, 0xf3); } +-void blsr(const Reg32e& r, const Operand& op) { opRRO(Reg32e(1, r.getBit()), r, op, T_APX|T_0F38|T_NF, 0xf3); } ++void and_(Reg d, const Operand& op, uint32_t imm) { opROI(d, op, imm, T_NF|T_CODE1_IF1, 4); } ++void and_(Reg d, const Operand& op1, const Operand& op2) { opROO(d, op1, op2, T_NF|T_CODE1_IF1, 0x20); } ++void andn(Reg32e r1, Reg32e r2, const Operand& op) { opRRO(r1, r2, op, T_APX|T_0F38|T_NF, 0xf2); } ++void andnpd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x55, isXMM_XMMorMEM); } ++void andnps(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x55, isXMM_XMMorMEM); } ++void andpd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x54, isXMM_XMMorMEM); } ++void andps(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x54, isXMM_XMMorMEM); } ++void aor(const Address& addr, Reg32e reg) { opMR(addr, reg, T_0F38|T_F2, 0x0FC, T_APX|T_F2); } ++void axor(const Address& addr, Reg32e reg) { opMR(addr, reg, T_0F38|T_F3, 0x0FC, T_APX|T_F3); } ++void bextr(Reg32e r1, const Operand& op, Reg32e r2) { opRRO(r1, r2, op, T_APX|T_0F38|T_NF, 0xf7); } ++void blendpd(Xmm xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x0D, isXMM_XMMorMEM, static_cast(imm)); } ++void blendps(Xmm xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x0C, isXMM_XMMorMEM, static_cast(imm)); } ++void blendvpd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38, 0x15, isXMM_XMMorMEM, NONE); } ++void blendvps(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38, 0x14, isXMM_XMMorMEM, NONE); } ++void blsi(Reg32e r, const Operand& op) { opRRO(Reg32e(3, r.getBit()), r, op, T_APX|T_0F38|T_NF, 0xf3); } ++void blsmsk(Reg32e r, const Operand& op) { opRRO(Reg32e(2, r.getBit()), r, op, T_APX|T_0F38|T_NF, 0xf3); } ++void blsr(Reg32e r, const Operand& op) { opRRO(Reg32e(1, r.getBit()), r, op, T_APX|T_0F38|T_NF, 0xf3); } + void bnd() { db(0xF2); } + void bndcl(const BoundsReg& bnd, const Operand& op) { opRext(op, i32e, bnd.getIdx(), T_F3 | T_0F, 0x1A, !op.isMEM()); } + void bndcn(const BoundsReg& bnd, const Operand& op) { opRext(op, i32e, bnd.getIdx(), T_F2 | T_0F, 0x1B, !op.isMEM()); } +@@ -53,17 +53,17 @@ void bndmk(const BoundsReg& bnd, const Address& addr) { opMR(addr, bnd, T_F3 | T + void bndmov(const Address& addr, const BoundsReg& bnd) { opMR(addr, bnd, T_66 | T_0F, 0x1B); } + void bndmov(const BoundsReg& bnd, const Operand& op) { opRO(bnd, op, T_66 | T_0F, 0x1A, op.isBNDREG()); } + void bndstx(const Address& addr, const BoundsReg& bnd) { opMIB(addr, bnd, T_0F, 0x1B); } +-void bsf(const Reg®, const Operand& op) { opRO(reg, op, T_0F, 0xBC, op.isREG(16|i32e)); } +-void bsr(const Reg®, const Operand& op) { opRO(reg, op, T_0F, 0xBD, op.isREG(16|i32e)); } +-void bt(const Operand& op, const Reg& reg) { opRO(reg, op, T_0F, 0xA3, op.isREG(16|i32e) && op.getBit() == reg.getBit()); } ++void bsf(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0xBC, op.isREG(16|i32e)); } ++void bsr(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0xBD, op.isREG(16|i32e)); } ++void bt(const Operand& op, Reg reg) { opRO(reg, op, T_0F, 0xA3, op.isREG(16|i32e) && op.getBit() == reg.getBit()); } + void bt(const Operand& op, uint8_t imm) { opRext(op, 16|i32e, 4, T_0F, 0xba, false, 1); db(imm); } +-void btc(const Operand& op, const Reg& reg) { opRO(reg, op, T_0F, 0xBB, op.isREG(16|i32e) && op.getBit() == reg.getBit()); } ++void btc(const Operand& op, Reg reg) { opRO(reg, op, T_0F, 0xBB, op.isREG(16|i32e) && op.getBit() == reg.getBit()); } + void btc(const Operand& op, uint8_t imm) { opRext(op, 16|i32e, 7, T_0F, 0xba, false, 1); db(imm); } +-void btr(const Operand& op, const Reg& reg) { opRO(reg, op, T_0F, 0xB3, op.isREG(16|i32e) && op.getBit() == reg.getBit()); } ++void btr(const Operand& op, Reg reg) { opRO(reg, op, T_0F, 0xB3, op.isREG(16|i32e) && op.getBit() == reg.getBit()); } + void btr(const Operand& op, uint8_t imm) { opRext(op, 16|i32e, 6, T_0F, 0xba, false, 1); db(imm); } +-void bts(const Operand& op, const Reg& reg) { opRO(reg, op, T_0F, 0xAB, op.isREG(16|i32e) && op.getBit() == reg.getBit()); } ++void bts(const Operand& op, Reg reg) { opRO(reg, op, T_0F, 0xAB, op.isREG(16|i32e) && op.getBit() == reg.getBit()); } + void bts(const Operand& op, uint8_t imm) { opRext(op, 16|i32e, 5, T_0F, 0xba, false, 1); db(imm); } +-void bzhi(const Reg32e& r1, const Operand& op, const Reg32e& r2) { opRRO(r1, r2, op, T_APX|T_0F38|T_NF, 0xf5); } ++void bzhi(Reg32e r1, const Operand& op, Reg32e r2) { opRRO(r1, r2, op, T_APX|T_0F38|T_NF, 0xf5); } + void cbw() { db(0x66); db(0x98); } + void ccmpa(const Operand& op, int imm, int dfv = 0) { opCcmpi(op, imm, dfv, 7); } + void ccmpa(const Operand& op1, const Operand& op2, int dfv = 0) { opCcmp(op1, op2, dfv, 0x38, 7); } +@@ -123,37 +123,37 @@ void ccmpz(const Operand& op, int imm, int dfv = 0) { opCcmpi(op, imm, dfv, 4); + void ccmpz(const Operand& op1, const Operand& op2, int dfv = 0) { opCcmp(op1, op2, dfv, 0x38, 4); } + void cdq() { db(0x99); } + void cfcmovb(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x42); } +-void cfcmovb(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x42); } ++void cfcmovb(Reg d, Reg r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x42); } + void cfcmovbe(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x46); } +-void cfcmovbe(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x46); } ++void cfcmovbe(Reg d, Reg r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x46); } + void cfcmovl(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x4C); } +-void cfcmovl(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x4C); } ++void cfcmovl(Reg d, Reg r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x4C); } + void cfcmovle(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x4E); } +-void cfcmovle(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x4E); } ++void cfcmovle(Reg d, Reg r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x4E); } + void cfcmovnb(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x43); } +-void cfcmovnb(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x43); } ++void cfcmovnb(Reg d, Reg r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x43); } + void cfcmovnbe(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x47); } +-void cfcmovnbe(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x47); } ++void cfcmovnbe(Reg d, Reg r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x47); } + void cfcmovnl(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x4D); } +-void cfcmovnl(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x4D); } ++void cfcmovnl(Reg d, Reg r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x4D); } + void cfcmovnle(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x4F); } +-void cfcmovnle(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x4F); } ++void cfcmovnle(Reg d, Reg r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x4F); } + void cfcmovno(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x41); } +-void cfcmovno(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x41); } ++void cfcmovno(Reg d, Reg r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x41); } + void cfcmovnp(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x4B); } +-void cfcmovnp(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x4B); } ++void cfcmovnp(Reg d, Reg r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x4B); } + void cfcmovns(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x49); } +-void cfcmovns(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x49); } ++void cfcmovns(Reg d, Reg r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x49); } + void cfcmovnz(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x45); } +-void cfcmovnz(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x45); } ++void cfcmovnz(Reg d, Reg r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x45); } + void cfcmovo(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x40); } +-void cfcmovo(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x40); } ++void cfcmovo(Reg d, Reg r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x40); } + void cfcmovp(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x4A); } +-void cfcmovp(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x4A); } ++void cfcmovp(Reg d, Reg r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x4A); } + void cfcmovs(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x48); } +-void cfcmovs(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x48); } ++void cfcmovs(Reg d, Reg r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x48); } + void cfcmovz(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x44); } +-void cfcmovz(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x44); } ++void cfcmovz(Reg d, Reg r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x44); } + void clc() { db(0xF8); } + void cld() { db(0xFC); } + void cldemote(const Address& addr) { opMR(addr, eax, T_0F, 0x1C); } +@@ -163,261 +163,261 @@ void cli() { db(0xFA); } + void clwb(const Address& addr) { opMR(addr, esi, T_66 | T_0F, 0xAE); } + void clzero() { db(0x0F); db(0x01); db(0xFC); } + void cmc() { db(0xF5); } +-void cmova(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 7); }//-V524 +-void cmova(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 7, op.isREG(16|i32e)); }//-V524 +-void cmovae(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 3); }//-V524 +-void cmovae(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 3, op.isREG(16|i32e)); }//-V524 +-void cmovb(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 2); }//-V524 +-void cmovb(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 2, op.isREG(16|i32e)); }//-V524 +-void cmovbe(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 6); }//-V524 +-void cmovbe(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 6, op.isREG(16|i32e)); }//-V524 +-void cmovc(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 2); }//-V524 +-void cmovc(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 2, op.isREG(16|i32e)); }//-V524 +-void cmove(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 4); }//-V524 +-void cmove(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 4, op.isREG(16|i32e)); }//-V524 +-void cmovg(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 15); }//-V524 +-void cmovg(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 15, op.isREG(16|i32e)); }//-V524 +-void cmovge(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 13); }//-V524 +-void cmovge(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 13, op.isREG(16|i32e)); }//-V524 +-void cmovl(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 12); }//-V524 +-void cmovl(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 12, op.isREG(16|i32e)); }//-V524 +-void cmovle(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 14); }//-V524 +-void cmovle(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 14, op.isREG(16|i32e)); }//-V524 +-void cmovna(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 6); }//-V524 +-void cmovna(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 6, op.isREG(16|i32e)); }//-V524 +-void cmovnae(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 2); }//-V524 +-void cmovnae(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 2, op.isREG(16|i32e)); }//-V524 +-void cmovnb(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 3); }//-V524 +-void cmovnb(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 3, op.isREG(16|i32e)); }//-V524 +-void cmovnbe(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 7); }//-V524 +-void cmovnbe(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 7, op.isREG(16|i32e)); }//-V524 +-void cmovnc(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 3); }//-V524 +-void cmovnc(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 3, op.isREG(16|i32e)); }//-V524 +-void cmovne(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 5); }//-V524 +-void cmovne(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 5, op.isREG(16|i32e)); }//-V524 +-void cmovng(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 14); }//-V524 +-void cmovng(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 14, op.isREG(16|i32e)); }//-V524 +-void cmovnge(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 12); }//-V524 +-void cmovnge(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 12, op.isREG(16|i32e)); }//-V524 +-void cmovnl(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 13); }//-V524 +-void cmovnl(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 13, op.isREG(16|i32e)); }//-V524 +-void cmovnle(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 15); }//-V524 +-void cmovnle(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 15, op.isREG(16|i32e)); }//-V524 +-void cmovno(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 1); }//-V524 +-void cmovno(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 1, op.isREG(16|i32e)); }//-V524 +-void cmovnp(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 11); }//-V524 +-void cmovnp(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 11, op.isREG(16|i32e)); }//-V524 +-void cmovns(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 9); }//-V524 +-void cmovns(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 9, op.isREG(16|i32e)); }//-V524 +-void cmovnz(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 5); }//-V524 +-void cmovnz(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 5, op.isREG(16|i32e)); }//-V524 +-void cmovo(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 0); }//-V524 +-void cmovo(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 0, op.isREG(16|i32e)); }//-V524 +-void cmovp(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 10); }//-V524 +-void cmovp(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 10, op.isREG(16|i32e)); }//-V524 +-void cmovpe(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 10); }//-V524 +-void cmovpe(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 10, op.isREG(16|i32e)); }//-V524 +-void cmovpo(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 11); }//-V524 +-void cmovpo(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 11, op.isREG(16|i32e)); }//-V524 +-void cmovs(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 8); }//-V524 +-void cmovs(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 8, op.isREG(16|i32e)); }//-V524 +-void cmovz(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 4); }//-V524 +-void cmovz(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 4, op.isREG(16|i32e)); }//-V524 ++void cmova(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 7); }//-V524 ++void cmova(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 7, op.isREG(16|i32e)); }//-V524 ++void cmovae(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 3); }//-V524 ++void cmovae(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 3, op.isREG(16|i32e)); }//-V524 ++void cmovb(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 2); }//-V524 ++void cmovb(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 2, op.isREG(16|i32e)); }//-V524 ++void cmovbe(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 6); }//-V524 ++void cmovbe(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 6, op.isREG(16|i32e)); }//-V524 ++void cmovc(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 2); }//-V524 ++void cmovc(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 2, op.isREG(16|i32e)); }//-V524 ++void cmove(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 4); }//-V524 ++void cmove(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 4, op.isREG(16|i32e)); }//-V524 ++void cmovg(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 15); }//-V524 ++void cmovg(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 15, op.isREG(16|i32e)); }//-V524 ++void cmovge(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 13); }//-V524 ++void cmovge(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 13, op.isREG(16|i32e)); }//-V524 ++void cmovl(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 12); }//-V524 ++void cmovl(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 12, op.isREG(16|i32e)); }//-V524 ++void cmovle(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 14); }//-V524 ++void cmovle(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 14, op.isREG(16|i32e)); }//-V524 ++void cmovna(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 6); }//-V524 ++void cmovna(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 6, op.isREG(16|i32e)); }//-V524 ++void cmovnae(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 2); }//-V524 ++void cmovnae(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 2, op.isREG(16|i32e)); }//-V524 ++void cmovnb(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 3); }//-V524 ++void cmovnb(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 3, op.isREG(16|i32e)); }//-V524 ++void cmovnbe(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 7); }//-V524 ++void cmovnbe(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 7, op.isREG(16|i32e)); }//-V524 ++void cmovnc(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 3); }//-V524 ++void cmovnc(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 3, op.isREG(16|i32e)); }//-V524 ++void cmovne(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 5); }//-V524 ++void cmovne(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 5, op.isREG(16|i32e)); }//-V524 ++void cmovng(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 14); }//-V524 ++void cmovng(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 14, op.isREG(16|i32e)); }//-V524 ++void cmovnge(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 12); }//-V524 ++void cmovnge(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 12, op.isREG(16|i32e)); }//-V524 ++void cmovnl(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 13); }//-V524 ++void cmovnl(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 13, op.isREG(16|i32e)); }//-V524 ++void cmovnle(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 15); }//-V524 ++void cmovnle(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 15, op.isREG(16|i32e)); }//-V524 ++void cmovno(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 1); }//-V524 ++void cmovno(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 1, op.isREG(16|i32e)); }//-V524 ++void cmovnp(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 11); }//-V524 ++void cmovnp(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 11, op.isREG(16|i32e)); }//-V524 ++void cmovns(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 9); }//-V524 ++void cmovns(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 9, op.isREG(16|i32e)); }//-V524 ++void cmovnz(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 5); }//-V524 ++void cmovnz(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 5, op.isREG(16|i32e)); }//-V524 ++void cmovo(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 0); }//-V524 ++void cmovo(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 0, op.isREG(16|i32e)); }//-V524 ++void cmovp(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 10); }//-V524 ++void cmovp(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 10, op.isREG(16|i32e)); }//-V524 ++void cmovpe(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 10); }//-V524 ++void cmovpe(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 10, op.isREG(16|i32e)); }//-V524 ++void cmovpo(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 11); }//-V524 ++void cmovpo(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 11, op.isREG(16|i32e)); }//-V524 ++void cmovs(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 8); }//-V524 ++void cmovs(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 8, op.isREG(16|i32e)); }//-V524 ++void cmovz(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 4); }//-V524 ++void cmovz(Reg reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 4, op.isREG(16|i32e)); }//-V524 + void cmp(const Operand& op, uint32_t imm) { opOI(op, imm, 0x38, 7); } + void cmp(const Operand& op1, const Operand& op2) { opRO_MR(op1, op2, 0x38); } +-void cmpeqpd(const Xmm& x, const Operand& op) { cmppd(x, op, 0); } +-void cmpeqps(const Xmm& x, const Operand& op) { cmpps(x, op, 0); } +-void cmpeqsd(const Xmm& x, const Operand& op) { cmpsd(x, op, 0); } +-void cmpeqss(const Xmm& x, const Operand& op) { cmpss(x, op, 0); } +-void cmplepd(const Xmm& x, const Operand& op) { cmppd(x, op, 2); } +-void cmpleps(const Xmm& x, const Operand& op) { cmpps(x, op, 2); } +-void cmplesd(const Xmm& x, const Operand& op) { cmpsd(x, op, 2); } +-void cmpless(const Xmm& x, const Operand& op) { cmpss(x, op, 2); } +-void cmpltpd(const Xmm& x, const Operand& op) { cmppd(x, op, 1); } +-void cmpltps(const Xmm& x, const Operand& op) { cmpps(x, op, 1); } +-void cmpltsd(const Xmm& x, const Operand& op) { cmpsd(x, op, 1); } +-void cmpltss(const Xmm& x, const Operand& op) { cmpss(x, op, 1); } +-void cmpneqpd(const Xmm& x, const Operand& op) { cmppd(x, op, 4); } +-void cmpneqps(const Xmm& x, const Operand& op) { cmpps(x, op, 4); } +-void cmpneqsd(const Xmm& x, const Operand& op) { cmpsd(x, op, 4); } +-void cmpneqss(const Xmm& x, const Operand& op) { cmpss(x, op, 4); } +-void cmpnlepd(const Xmm& x, const Operand& op) { cmppd(x, op, 6); } +-void cmpnleps(const Xmm& x, const Operand& op) { cmpps(x, op, 6); } +-void cmpnlesd(const Xmm& x, const Operand& op) { cmpsd(x, op, 6); } +-void cmpnless(const Xmm& x, const Operand& op) { cmpss(x, op, 6); } +-void cmpnltpd(const Xmm& x, const Operand& op) { cmppd(x, op, 5); } +-void cmpnltps(const Xmm& x, const Operand& op) { cmpps(x, op, 5); } +-void cmpnltsd(const Xmm& x, const Operand& op) { cmpsd(x, op, 5); } +-void cmpnltss(const Xmm& x, const Operand& op) { cmpss(x, op, 5); } +-void cmpordpd(const Xmm& x, const Operand& op) { cmppd(x, op, 7); } +-void cmpordps(const Xmm& x, const Operand& op) { cmpps(x, op, 7); } +-void cmpordsd(const Xmm& x, const Operand& op) { cmpsd(x, op, 7); } +-void cmpordss(const Xmm& x, const Operand& op) { cmpss(x, op, 7); } +-void cmppd(const Xmm& xmm, const Operand& op, uint8_t imm8) { opSSE(xmm, op, T_0F | T_66, 0xC2, isXMM_XMMorMEM, imm8); } +-void cmpps(const Xmm& xmm, const Operand& op, uint8_t imm8) { opSSE(xmm, op, T_0F, 0xC2, isXMM_XMMorMEM, imm8); } ++void cmpeqpd(Xmm x, const Operand& op) { cmppd(x, op, 0); } ++void cmpeqps(Xmm x, const Operand& op) { cmpps(x, op, 0); } ++void cmpeqsd(Xmm x, const Operand& op) { cmpsd(x, op, 0); } ++void cmpeqss(Xmm x, const Operand& op) { cmpss(x, op, 0); } ++void cmplepd(Xmm x, const Operand& op) { cmppd(x, op, 2); } ++void cmpleps(Xmm x, const Operand& op) { cmpps(x, op, 2); } ++void cmplesd(Xmm x, const Operand& op) { cmpsd(x, op, 2); } ++void cmpless(Xmm x, const Operand& op) { cmpss(x, op, 2); } ++void cmpltpd(Xmm x, const Operand& op) { cmppd(x, op, 1); } ++void cmpltps(Xmm x, const Operand& op) { cmpps(x, op, 1); } ++void cmpltsd(Xmm x, const Operand& op) { cmpsd(x, op, 1); } ++void cmpltss(Xmm x, const Operand& op) { cmpss(x, op, 1); } ++void cmpneqpd(Xmm x, const Operand& op) { cmppd(x, op, 4); } ++void cmpneqps(Xmm x, const Operand& op) { cmpps(x, op, 4); } ++void cmpneqsd(Xmm x, const Operand& op) { cmpsd(x, op, 4); } ++void cmpneqss(Xmm x, const Operand& op) { cmpss(x, op, 4); } ++void cmpnlepd(Xmm x, const Operand& op) { cmppd(x, op, 6); } ++void cmpnleps(Xmm x, const Operand& op) { cmpps(x, op, 6); } ++void cmpnlesd(Xmm x, const Operand& op) { cmpsd(x, op, 6); } ++void cmpnless(Xmm x, const Operand& op) { cmpss(x, op, 6); } ++void cmpnltpd(Xmm x, const Operand& op) { cmppd(x, op, 5); } ++void cmpnltps(Xmm x, const Operand& op) { cmpps(x, op, 5); } ++void cmpnltsd(Xmm x, const Operand& op) { cmpsd(x, op, 5); } ++void cmpnltss(Xmm x, const Operand& op) { cmpss(x, op, 5); } ++void cmpordpd(Xmm x, const Operand& op) { cmppd(x, op, 7); } ++void cmpordps(Xmm x, const Operand& op) { cmpps(x, op, 7); } ++void cmpordsd(Xmm x, const Operand& op) { cmpsd(x, op, 7); } ++void cmpordss(Xmm x, const Operand& op) { cmpss(x, op, 7); } ++void cmppd(Xmm xmm, const Operand& op, uint8_t imm8) { opSSE(xmm, op, T_0F | T_66, 0xC2, isXMM_XMMorMEM, imm8); } ++void cmpps(Xmm xmm, const Operand& op, uint8_t imm8) { opSSE(xmm, op, T_0F, 0xC2, isXMM_XMMorMEM, imm8); } + void cmpsb() { db(0xA6); } + void cmpsd() { db(0xA7); } +-void cmpsd(const Xmm& xmm, const Operand& op, uint8_t imm8) { opSSE(xmm, op, T_0F | T_F2, 0xC2, isXMM_XMMorMEM, imm8); } +-void cmpss(const Xmm& xmm, const Operand& op, uint8_t imm8) { opSSE(xmm, op, T_0F | T_F3, 0xC2, isXMM_XMMorMEM, imm8); } ++void cmpsd(Xmm xmm, const Operand& op, uint8_t imm8) { opSSE(xmm, op, T_0F | T_F2, 0xC2, isXMM_XMMorMEM, imm8); } ++void cmpss(Xmm xmm, const Operand& op, uint8_t imm8) { opSSE(xmm, op, T_0F | T_F3, 0xC2, isXMM_XMMorMEM, imm8); } + void cmpsw() { db(0x66); db(0xA7); } +-void cmpunordpd(const Xmm& x, const Operand& op) { cmppd(x, op, 3); } +-void cmpunordps(const Xmm& x, const Operand& op) { cmpps(x, op, 3); } +-void cmpunordsd(const Xmm& x, const Operand& op) { cmpsd(x, op, 3); } +-void cmpunordss(const Xmm& x, const Operand& op) { cmpss(x, op, 3); } +-void cmpxchg(const Operand& op, const Reg& reg) { opRO(reg, op, T_0F, 0xB0 | (reg.isBit(8) ? 0 : 1), op.getBit() == reg.getBit()); } ++void cmpunordpd(Xmm x, const Operand& op) { cmppd(x, op, 3); } ++void cmpunordps(Xmm x, const Operand& op) { cmpps(x, op, 3); } ++void cmpunordsd(Xmm x, const Operand& op) { cmpsd(x, op, 3); } ++void cmpunordss(Xmm x, const Operand& op) { cmpss(x, op, 3); } ++void cmpxchg(const Operand& op, Reg reg) { opRO(reg, op, T_0F, 0xB0 | (reg.isBit(8) ? 0 : 1), op.getBit() == reg.getBit()); } + void cmpxchg8b(const Address& addr) { opMR(addr, Reg32(1), T_0F, 0xC7); } +-void comisd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F, 0x2F, isXMM_XMMorMEM); } +-void comiss(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x2F, isXMM_XMMorMEM); } ++void comisd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F, 0x2F, isXMM_XMMorMEM); } ++void comiss(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x2F, isXMM_XMMorMEM); } + void cpuid() { db(0x0F); db(0xA2); } +-void crc32(const Reg32e& r, const Operand& op) { if (!((r.isBit(32) && op.isBit(8|16|32)) || (r.isBit(64) && op.isBit(8|64)))) XBYAK_THROW(ERR_BAD_SIZE_OF_REGISTER) int code = 0xF0 | (op.isBit(8) ? 0 : 1); uint64_t type = op.isBit(16) ? T_66:0; type |= T_ALLOW_DIFF_SIZE; if (opROO(Reg(), op, static_cast(r), T_APX|type, code)) return; opRO(r, op, T_F2|T_0F38|type, code); } +-void ctesta(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 7); } ++void crc32(Reg32e r, const Operand& op) { if (!((r.isBit(32) && op.isBit(8|16|32)) || (r.isBit(64) && op.isBit(8|64)))) XBYAK_THROW(ERR_BAD_SIZE_OF_REGISTER) int code = 0xF0 | (op.isBit(8) ? 0 : 1); uint64_t type = op.isBit(16) ? T_66:0; type |= T_ALLOW_DIFF_SIZE; if (opROO(Reg(), op, static_cast(r), T_APX|type, code)) return; opRO(r, op, T_F2|T_0F38|type, code); } ++void ctesta(const Operand& op, Reg r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 7); } + void ctesta(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 7); } +-void ctestae(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 3); } ++void ctestae(const Operand& op, Reg r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 3); } + void ctestae(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 3); } +-void ctestb(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 2); } ++void ctestb(const Operand& op, Reg r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 2); } + void ctestb(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 2); } +-void ctestbe(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 6); } ++void ctestbe(const Operand& op, Reg r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 6); } + void ctestbe(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 6); } +-void ctestc(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 2); } ++void ctestc(const Operand& op, Reg r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 2); } + void ctestc(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 2); } +-void cteste(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 4); } ++void cteste(const Operand& op, Reg r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 4); } + void cteste(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 4); } +-void ctestf(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 11); } ++void ctestf(const Operand& op, Reg r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 11); } + void ctestf(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 11); } +-void ctestg(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 15); } ++void ctestg(const Operand& op, Reg r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 15); } + void ctestg(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 15); } +-void ctestge(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 13); } ++void ctestge(const Operand& op, Reg r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 13); } + void ctestge(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 13); } +-void ctestl(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 12); } ++void ctestl(const Operand& op, Reg r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 12); } + void ctestl(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 12); } +-void ctestle(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 14); } ++void ctestle(const Operand& op, Reg r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 14); } + void ctestle(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 14); } +-void ctestna(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 6); } ++void ctestna(const Operand& op, Reg r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 6); } + void ctestna(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 6); } +-void ctestnae(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 2); } ++void ctestnae(const Operand& op, Reg r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 2); } + void ctestnae(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 2); } +-void ctestnb(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 3); } ++void ctestnb(const Operand& op, Reg r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 3); } + void ctestnb(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 3); } +-void ctestnbe(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 7); } ++void ctestnbe(const Operand& op, Reg r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 7); } + void ctestnbe(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 7); } +-void ctestnc(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 3); } ++void ctestnc(const Operand& op, Reg r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 3); } + void ctestnc(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 3); } +-void ctestne(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 5); } ++void ctestne(const Operand& op, Reg r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 5); } + void ctestne(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 5); } +-void ctestng(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 14); } ++void ctestng(const Operand& op, Reg r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 14); } + void ctestng(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 14); } +-void ctestnge(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 12); } ++void ctestnge(const Operand& op, Reg r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 12); } + void ctestnge(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 12); } +-void ctestnl(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 13); } ++void ctestnl(const Operand& op, Reg r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 13); } + void ctestnl(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 13); } +-void ctestnle(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 15); } ++void ctestnle(const Operand& op, Reg r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 15); } + void ctestnle(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 15); } +-void ctestno(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 1); } ++void ctestno(const Operand& op, Reg r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 1); } + void ctestno(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 1); } +-void ctestns(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 9); } ++void ctestns(const Operand& op, Reg r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 9); } + void ctestns(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 9); } +-void ctestnz(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 5); } ++void ctestnz(const Operand& op, Reg r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 5); } + void ctestnz(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 5); } +-void ctesto(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 0); } ++void ctesto(const Operand& op, Reg r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 0); } + void ctesto(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 0); } +-void ctests(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 8); } ++void ctests(const Operand& op, Reg r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 8); } + void ctests(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 8); } +-void ctestt(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 10); } ++void ctestt(const Operand& op, Reg r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 10); } + void ctestt(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 10); } +-void ctestz(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 4); } ++void ctestz(const Operand& op, Reg r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 4); } + void ctestz(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 4); } +-void cvtdq2pd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_F3|T_0F, 0xE6, isXMM_XMMorMEM); } +-void cvtdq2ps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x5B, isXMM_XMMorMEM); } +-void cvtpd2dq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_F2|T_0F, 0xE6, isXMM_XMMorMEM); } +-void cvtpd2pi(const Reg& reg, const Operand& op) { opSSE(reg, op, T_66|T_0F, 0x2D, isMMX_XMMorMEM); } +-void cvtpd2ps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F, 0x5A, isXMM_XMMorMEM); } +-void cvtpi2pd(const Reg& reg, const Operand& op) { opSSE(reg, op, T_66|T_0F, 0x2A, isXMM_MMXorMEM); } +-void cvtpi2ps(const Reg& reg, const Operand& op) { opSSE(reg, op, T_0F, 0x2A, isXMM_MMXorMEM); } +-void cvtps2dq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F, 0x5B, isXMM_XMMorMEM); } +-void cvtps2pd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x5A, isXMM_XMMorMEM); } +-void cvtps2pi(const Reg& reg, const Operand& op) { opSSE(reg, op, T_0F, 0x2D, isMMX_XMMorMEM); } +-void cvtsd2si(const Reg& reg, const Operand& op) { opSSE(reg, op, T_F2|T_0F, 0x2D, isREG32_XMMorMEM); } +-void cvtsd2ss(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_F2|T_0F, 0x5A, isXMM_XMMorMEM); } +-void cvtsi2sd(const Reg& reg, const Operand& op) { opSSE(reg, op, T_F2|T_0F, 0x2A, isXMM_REG32orMEM); } +-void cvtsi2ss(const Reg& reg, const Operand& op) { opSSE(reg, op, T_F3|T_0F, 0x2A, isXMM_REG32orMEM); } +-void cvtss2sd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_F3|T_0F, 0x5A, isXMM_XMMorMEM); } +-void cvtss2si(const Reg& reg, const Operand& op) { opSSE(reg, op, T_F3|T_0F, 0x2D, isREG32_XMMorMEM); } +-void cvttpd2dq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F, 0xE6, isXMM_XMMorMEM); } +-void cvttpd2pi(const Reg& reg, const Operand& op) { opSSE(reg, op, T_66|T_0F, 0x2C, isMMX_XMMorMEM); } +-void cvttps2dq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_F3|T_0F, 0x5B, isXMM_XMMorMEM); } +-void cvttps2pi(const Reg& reg, const Operand& op) { opSSE(reg, op, T_0F, 0x2C, isMMX_XMMorMEM); } +-void cvttsd2si(const Reg& reg, const Operand& op) { opSSE(reg, op, T_F2|T_0F, 0x2C, isREG32_XMMorMEM); } +-void cvttss2si(const Reg& reg, const Operand& op) { opSSE(reg, op, T_F3|T_0F, 0x2C, isREG32_XMMorMEM); } ++void cvtdq2pd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_F3|T_0F, 0xE6, isXMM_XMMorMEM); } ++void cvtdq2ps(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x5B, isXMM_XMMorMEM); } ++void cvtpd2dq(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_F2|T_0F, 0xE6, isXMM_XMMorMEM); } ++void cvtpd2pi(Reg reg, const Operand& op) { opSSE(reg, op, T_66|T_0F, 0x2D, isMMX_XMMorMEM); } ++void cvtpd2ps(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F, 0x5A, isXMM_XMMorMEM); } ++void cvtpi2pd(Reg reg, const Operand& op) { opSSE(reg, op, T_66|T_0F, 0x2A, isXMM_MMXorMEM); } ++void cvtpi2ps(Reg reg, const Operand& op) { opSSE(reg, op, T_0F, 0x2A, isXMM_MMXorMEM); } ++void cvtps2dq(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F, 0x5B, isXMM_XMMorMEM); } ++void cvtps2pd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x5A, isXMM_XMMorMEM); } ++void cvtps2pi(Reg reg, const Operand& op) { opSSE(reg, op, T_0F, 0x2D, isMMX_XMMorMEM); } ++void cvtsd2si(Reg reg, const Operand& op) { opSSE(reg, op, T_F2|T_0F, 0x2D, isREG32_XMMorMEM); } ++void cvtsd2ss(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_F2|T_0F, 0x5A, isXMM_XMMorMEM); } ++void cvtsi2sd(Reg reg, const Operand& op) { opSSE(reg, op, T_F2|T_0F, 0x2A, isXMM_REG32orMEM); } ++void cvtsi2ss(Reg reg, const Operand& op) { opSSE(reg, op, T_F3|T_0F, 0x2A, isXMM_REG32orMEM); } ++void cvtss2sd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_F3|T_0F, 0x5A, isXMM_XMMorMEM); } ++void cvtss2si(Reg reg, const Operand& op) { opSSE(reg, op, T_F3|T_0F, 0x2D, isREG32_XMMorMEM); } ++void cvttpd2dq(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F, 0xE6, isXMM_XMMorMEM); } ++void cvttpd2pi(Reg reg, const Operand& op) { opSSE(reg, op, T_66|T_0F, 0x2C, isMMX_XMMorMEM); } ++void cvttps2dq(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_F3|T_0F, 0x5B, isXMM_XMMorMEM); } ++void cvttps2pi(Reg reg, const Operand& op) { opSSE(reg, op, T_0F, 0x2C, isMMX_XMMorMEM); } ++void cvttsd2si(Reg reg, const Operand& op) { opSSE(reg, op, T_F2|T_0F, 0x2C, isREG32_XMMorMEM); } ++void cvttss2si(Reg reg, const Operand& op) { opSSE(reg, op, T_F3|T_0F, 0x2C, isREG32_XMMorMEM); } + void cwd() { db(0x66); db(0x99); } + void cwde() { db(0x98); } + void dec(const Operand& op) { opIncDec(Reg(), op, 1); } +-void dec(const Reg& d, const Operand& op) { opIncDec(d, op, 1); } ++void dec(Reg d, const Operand& op) { opIncDec(d, op, 1); } + void div(const Operand& op) { opRext(op, 0, 6, T_APX|T_NF|T_CODE1_IF1, 0xF6); } +-void divpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x5E, isXMM_XMMorMEM); } +-void divps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x5E, isXMM_XMMorMEM); } +-void divsd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F2, 0x5E, isXMM_XMMorMEM); } +-void divss(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F3, 0x5E, isXMM_XMMorMEM); } +-void dppd(const Xmm& xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x41, isXMM_XMMorMEM, static_cast(imm)); } +-void dpps(const Xmm& xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x40, isXMM_XMMorMEM, static_cast(imm)); } ++void divpd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x5E, isXMM_XMMorMEM); } ++void divps(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x5E, isXMM_XMMorMEM); } ++void divsd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F2, 0x5E, isXMM_XMMorMEM); } ++void divss(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F3, 0x5E, isXMM_XMMorMEM); } ++void dppd(Xmm xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x41, isXMM_XMMorMEM, static_cast(imm)); } ++void dpps(Xmm xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x40, isXMM_XMMorMEM, static_cast(imm)); } + void emms() { db(0x0F); db(0x77); } + void endbr32() { db(0xF3); db(0x0F); db(0x1E); db(0xFB); } + void endbr64() { db(0xF3); db(0x0F); db(0x1E); db(0xFA); } + void enter(uint16_t x, uint8_t y) { db(0xC8); dw(x); db(y); } +-void extractps(const Operand& op, const Xmm& xmm, uint8_t imm) { opExt(op, xmm, 0x17, imm); } ++void extractps(const Operand& op, Xmm xmm, uint8_t imm) { opExt(op, xmm, 0x17, imm); } + void f2xm1() { db(0xD9); db(0xF0); } + void fabs() { db(0xD9); db(0xE1); } + void fadd(const Address& addr) { opFpuMem(addr, 0x00, 0xD8, 0xDC, 0, 0); } +-void fadd(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xD8C0, 0xDCC0); } +-void fadd(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xD8C0, 0xDCC0); } ++void fadd(Fpu reg1) { opFpuFpu(st0, reg1, 0xD8C0, 0xDCC0); } ++void fadd(Fpu reg1, Fpu reg2) { opFpuFpu(reg1, reg2, 0xD8C0, 0xDCC0); } + void faddp() { db(0xDE); db(0xC1); } +-void faddp(const Fpu& reg1) { opFpuFpu(reg1, st0, 0x0000, 0xDEC0); } +-void faddp(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0x0000, 0xDEC0); } ++void faddp(Fpu reg1) { opFpuFpu(reg1, st0, 0x0000, 0xDEC0); } ++void faddp(Fpu reg1, Fpu reg2) { opFpuFpu(reg1, reg2, 0x0000, 0xDEC0); } + void fbld(const Address& addr) { opMR(addr, Reg32(4), 0, 0xDF); } + void fbstp(const Address& addr) { opMR(addr, Reg32(6), 0, 0xDF); } + void fchs() { db(0xD9); db(0xE0); } + void fclex() { db(0x9B); db(0xDB); db(0xE2); } +-void fcmovb(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xDAC0, 0x00C0); } +-void fcmovb(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xDAC0, 0x00C0); } +-void fcmovbe(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xDAD0, 0x00D0); } +-void fcmovbe(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xDAD0, 0x00D0); } +-void fcmove(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xDAC8, 0x00C8); } +-void fcmove(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xDAC8, 0x00C8); } +-void fcmovnb(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xDBC0, 0x00C0); } +-void fcmovnb(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xDBC0, 0x00C0); } +-void fcmovnbe(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xDBD0, 0x00D0); } +-void fcmovnbe(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xDBD0, 0x00D0); } +-void fcmovne(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xDBC8, 0x00C8); } +-void fcmovne(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xDBC8, 0x00C8); } +-void fcmovnu(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xDBD8, 0x00D8); } +-void fcmovnu(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xDBD8, 0x00D8); } +-void fcmovu(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xDAD8, 0x00D8); } +-void fcmovu(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xDAD8, 0x00D8); } ++void fcmovb(Fpu reg1) { opFpuFpu(st0, reg1, 0xDAC0, 0x00C0); } ++void fcmovb(Fpu reg1, Fpu reg2) { opFpuFpu(reg1, reg2, 0xDAC0, 0x00C0); } ++void fcmovbe(Fpu reg1) { opFpuFpu(st0, reg1, 0xDAD0, 0x00D0); } ++void fcmovbe(Fpu reg1, Fpu reg2) { opFpuFpu(reg1, reg2, 0xDAD0, 0x00D0); } ++void fcmove(Fpu reg1) { opFpuFpu(st0, reg1, 0xDAC8, 0x00C8); } ++void fcmove(Fpu reg1, Fpu reg2) { opFpuFpu(reg1, reg2, 0xDAC8, 0x00C8); } ++void fcmovnb(Fpu reg1) { opFpuFpu(st0, reg1, 0xDBC0, 0x00C0); } ++void fcmovnb(Fpu reg1, Fpu reg2) { opFpuFpu(reg1, reg2, 0xDBC0, 0x00C0); } ++void fcmovnbe(Fpu reg1) { opFpuFpu(st0, reg1, 0xDBD0, 0x00D0); } ++void fcmovnbe(Fpu reg1, Fpu reg2) { opFpuFpu(reg1, reg2, 0xDBD0, 0x00D0); } ++void fcmovne(Fpu reg1) { opFpuFpu(st0, reg1, 0xDBC8, 0x00C8); } ++void fcmovne(Fpu reg1, Fpu reg2) { opFpuFpu(reg1, reg2, 0xDBC8, 0x00C8); } ++void fcmovnu(Fpu reg1) { opFpuFpu(st0, reg1, 0xDBD8, 0x00D8); } ++void fcmovnu(Fpu reg1, Fpu reg2) { opFpuFpu(reg1, reg2, 0xDBD8, 0x00D8); } ++void fcmovu(Fpu reg1) { opFpuFpu(st0, reg1, 0xDAD8, 0x00D8); } ++void fcmovu(Fpu reg1, Fpu reg2) { opFpuFpu(reg1, reg2, 0xDAD8, 0x00D8); } + void fcom() { db(0xD8); db(0xD1); } + void fcom(const Address& addr) { opFpuMem(addr, 0x00, 0xD8, 0xDC, 2, 0); } +-void fcom(const Fpu& reg) { opFpu(reg, 0xD8, 0xD0); } +-void fcomi(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xDBF0, 0x00F0); } +-void fcomi(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xDBF0, 0x00F0); } +-void fcomip(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xDFF0, 0x00F0); } +-void fcomip(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xDFF0, 0x00F0); } ++void fcom(Fpu reg) { opFpu(reg, 0xD8, 0xD0); } ++void fcomi(Fpu reg1) { opFpuFpu(st0, reg1, 0xDBF0, 0x00F0); } ++void fcomi(Fpu reg1, Fpu reg2) { opFpuFpu(reg1, reg2, 0xDBF0, 0x00F0); } ++void fcomip(Fpu reg1) { opFpuFpu(st0, reg1, 0xDFF0, 0x00F0); } ++void fcomip(Fpu reg1, Fpu reg2) { opFpuFpu(reg1, reg2, 0xDFF0, 0x00F0); } + void fcomp() { db(0xD8); db(0xD9); } + void fcomp(const Address& addr) { opFpuMem(addr, 0x00, 0xD8, 0xDC, 3, 0); } +-void fcomp(const Fpu& reg) { opFpu(reg, 0xD8, 0xD8); } ++void fcomp(Fpu reg) { opFpu(reg, 0xD8, 0xD8); } + void fcompp() { db(0xDE); db(0xD9); } + void fcos() { db(0xD9); db(0xFF); } + void fdecstp() { db(0xD9); db(0xF6); } + void fdiv(const Address& addr) { opFpuMem(addr, 0x00, 0xD8, 0xDC, 6, 0); } +-void fdiv(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xD8F0, 0xDCF8); } +-void fdiv(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xD8F0, 0xDCF8); } ++void fdiv(Fpu reg1) { opFpuFpu(st0, reg1, 0xD8F0, 0xDCF8); } ++void fdiv(Fpu reg1, Fpu reg2) { opFpuFpu(reg1, reg2, 0xD8F0, 0xDCF8); } + void fdivp() { db(0xDE); db(0xF9); } +-void fdivp(const Fpu& reg1) { opFpuFpu(reg1, st0, 0x0000, 0xDEF8); } +-void fdivp(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0x0000, 0xDEF8); } ++void fdivp(Fpu reg1) { opFpuFpu(reg1, st0, 0x0000, 0xDEF8); } ++void fdivp(Fpu reg1, Fpu reg2) { opFpuFpu(reg1, reg2, 0x0000, 0xDEF8); } + void fdivr(const Address& addr) { opFpuMem(addr, 0x00, 0xD8, 0xDC, 7, 0); } +-void fdivr(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xD8F8, 0xDCF0); } +-void fdivr(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xD8F8, 0xDCF0); } ++void fdivr(Fpu reg1) { opFpuFpu(st0, reg1, 0xD8F8, 0xDCF0); } ++void fdivr(Fpu reg1, Fpu reg2) { opFpuFpu(reg1, reg2, 0xD8F8, 0xDCF0); } + void fdivrp() { db(0xDE); db(0xF1); } +-void fdivrp(const Fpu& reg1) { opFpuFpu(reg1, st0, 0x0000, 0xDEF0); } +-void fdivrp(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0x0000, 0xDEF0); } +-void ffree(const Fpu& reg) { opFpu(reg, 0xDD, 0xC0); } ++void fdivrp(Fpu reg1) { opFpuFpu(reg1, st0, 0x0000, 0xDEF0); } ++void fdivrp(Fpu reg1, Fpu reg2) { opFpuFpu(reg1, reg2, 0x0000, 0xDEF0); } ++void ffree(Fpu reg) { opFpu(reg, 0xDD, 0xC0); } + void fiadd(const Address& addr) { opFpuMem(addr, 0xDE, 0xDA, 0x00, 0, 0); } + void ficom(const Address& addr) { opFpuMem(addr, 0xDE, 0xDA, 0x00, 2, 0); } + void ficomp(const Address& addr) { opFpuMem(addr, 0xDE, 0xDA, 0x00, 3, 0); } +@@ -433,7 +433,7 @@ void fisttp(const Address& addr) { opFpuMem(addr, 0xDF, 0xDB, 0xDD, 1, 0); } + void fisub(const Address& addr) { opFpuMem(addr, 0xDE, 0xDA, 0x00, 4, 0); } + void fisubr(const Address& addr) { opFpuMem(addr, 0xDE, 0xDA, 0x00, 5, 0); } + void fld(const Address& addr) { opFpuMem(addr, 0x00, 0xD9, 0xDD, 0, 0); } +-void fld(const Fpu& reg) { opFpu(reg, 0xD9, 0xC0); } ++void fld(Fpu reg) { opFpu(reg, 0xD9, 0xC0); } + void fld1() { db(0xD9); db(0xE8); } + void fldcw(const Address& addr) { opMR(addr, Reg32(5), 0, 0xD9); } + void fldenv(const Address& addr) { opMR(addr, Reg32(4), 0, 0xD9); } +@@ -444,11 +444,11 @@ void fldln2() { db(0xD9); db(0xED); } + void fldpi() { db(0xD9); db(0xEB); } + void fldz() { db(0xD9); db(0xEE); } + void fmul(const Address& addr) { opFpuMem(addr, 0x00, 0xD8, 0xDC, 1, 0); } +-void fmul(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xD8C8, 0xDCC8); } +-void fmul(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xD8C8, 0xDCC8); } ++void fmul(Fpu reg1) { opFpuFpu(st0, reg1, 0xD8C8, 0xDCC8); } ++void fmul(Fpu reg1, Fpu reg2) { opFpuFpu(reg1, reg2, 0xD8C8, 0xDCC8); } + void fmulp() { db(0xDE); db(0xC9); } +-void fmulp(const Fpu& reg1) { opFpuFpu(reg1, st0, 0x0000, 0xDEC8); } +-void fmulp(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0x0000, 0xDEC8); } ++void fmulp(Fpu reg1) { opFpuFpu(reg1, st0, 0x0000, 0xDEC8); } ++void fmulp(Fpu reg1, Fpu reg2) { opFpuFpu(reg1, reg2, 0x0000, 0xDEC8); } + void fnclex() { db(0xDB); db(0xE2); } + void fninit() { db(0xDB); db(0xE3); } + void fnop() { db(0xD9); db(0xD0); } +@@ -456,7 +456,7 @@ void fnsave(const Address& addr) { opMR(addr, Reg32(6), 0, 0xDD); } + void fnstcw(const Address& addr) { opMR(addr, Reg32(7), 0, 0xD9); } + void fnstenv(const Address& addr) { opMR(addr, Reg32(6), 0, 0xD9); } + void fnstsw(const Address& addr) { opMR(addr, Reg32(7), 0, 0xDD); } +-void fnstsw(const Reg16& r) { if (r.getIdx() != Operand::AX) XBYAK_THROW(ERR_BAD_PARAMETER) db(0xDF); db(0xE0); } ++void fnstsw(Reg16 r) { if (r.getIdx() != Operand::AX) XBYAK_THROW(ERR_BAD_PARAMETER) db(0xDF); db(0xE0); } + void fpatan() { db(0xD9); db(0xF3); } + void fprem() { db(0xD9); db(0xF8); } + void fprem1() { db(0xD9); db(0xF5); } +@@ -469,60 +469,60 @@ void fsin() { db(0xD9); db(0xFE); } + void fsincos() { db(0xD9); db(0xFB); } + void fsqrt() { db(0xD9); db(0xFA); } + void fst(const Address& addr) { opFpuMem(addr, 0x00, 0xD9, 0xDD, 2, 0); } +-void fst(const Fpu& reg) { opFpu(reg, 0xDD, 0xD0); } ++void fst(Fpu reg) { opFpu(reg, 0xDD, 0xD0); } + void fstcw(const Address& addr) { db(0x9B); opMR(addr, Reg32(7), 0, 0xD9); } + void fstenv(const Address& addr) { db(0x9B); opMR(addr, Reg32(6), 0, 0xD9); } + void fstp(const Address& addr) { opFpuMem(addr, 0x00, 0xD9, 0xDD, 3, 0); } +-void fstp(const Fpu& reg) { opFpu(reg, 0xDD, 0xD8); } ++void fstp(Fpu reg) { opFpu(reg, 0xDD, 0xD8); } + void fstsw(const Address& addr) { db(0x9B); opMR(addr, Reg32(7), 0, 0xDD); } +-void fstsw(const Reg16& r) { if (r.getIdx() != Operand::AX) XBYAK_THROW(ERR_BAD_PARAMETER) db(0x9B); db(0xDF); db(0xE0); } ++void fstsw(Reg16 r) { if (r.getIdx() != Operand::AX) XBYAK_THROW(ERR_BAD_PARAMETER) db(0x9B); db(0xDF); db(0xE0); } + void fsub(const Address& addr) { opFpuMem(addr, 0x00, 0xD8, 0xDC, 4, 0); } +-void fsub(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xD8E0, 0xDCE8); } +-void fsub(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xD8E0, 0xDCE8); } ++void fsub(Fpu reg1) { opFpuFpu(st0, reg1, 0xD8E0, 0xDCE8); } ++void fsub(Fpu reg1, Fpu reg2) { opFpuFpu(reg1, reg2, 0xD8E0, 0xDCE8); } + void fsubp() { db(0xDE); db(0xE9); } +-void fsubp(const Fpu& reg1) { opFpuFpu(reg1, st0, 0x0000, 0xDEE8); } +-void fsubp(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0x0000, 0xDEE8); } ++void fsubp(Fpu reg1) { opFpuFpu(reg1, st0, 0x0000, 0xDEE8); } ++void fsubp(Fpu reg1, Fpu reg2) { opFpuFpu(reg1, reg2, 0x0000, 0xDEE8); } + void fsubr(const Address& addr) { opFpuMem(addr, 0x00, 0xD8, 0xDC, 5, 0); } +-void fsubr(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xD8E8, 0xDCE0); } +-void fsubr(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xD8E8, 0xDCE0); } ++void fsubr(Fpu reg1) { opFpuFpu(st0, reg1, 0xD8E8, 0xDCE0); } ++void fsubr(Fpu reg1, Fpu reg2) { opFpuFpu(reg1, reg2, 0xD8E8, 0xDCE0); } + void fsubrp() { db(0xDE); db(0xE1); } +-void fsubrp(const Fpu& reg1) { opFpuFpu(reg1, st0, 0x0000, 0xDEE0); } +-void fsubrp(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0x0000, 0xDEE0); } ++void fsubrp(Fpu reg1) { opFpuFpu(reg1, st0, 0x0000, 0xDEE0); } ++void fsubrp(Fpu reg1, Fpu reg2) { opFpuFpu(reg1, reg2, 0x0000, 0xDEE0); } + void ftst() { db(0xD9); db(0xE4); } + void fucom() { db(0xDD); db(0xE1); } +-void fucom(const Fpu& reg) { opFpu(reg, 0xDD, 0xE0); } +-void fucomi(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xDBE8, 0x00E8); } +-void fucomi(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xDBE8, 0x00E8); } +-void fucomip(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xDFE8, 0x00E8); } +-void fucomip(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xDFE8, 0x00E8); } ++void fucom(Fpu reg) { opFpu(reg, 0xDD, 0xE0); } ++void fucomi(Fpu reg1) { opFpuFpu(st0, reg1, 0xDBE8, 0x00E8); } ++void fucomi(Fpu reg1, Fpu reg2) { opFpuFpu(reg1, reg2, 0xDBE8, 0x00E8); } ++void fucomip(Fpu reg1) { opFpuFpu(st0, reg1, 0xDFE8, 0x00E8); } ++void fucomip(Fpu reg1, Fpu reg2) { opFpuFpu(reg1, reg2, 0xDFE8, 0x00E8); } + void fucomp() { db(0xDD); db(0xE9); } +-void fucomp(const Fpu& reg) { opFpu(reg, 0xDD, 0xE8); } ++void fucomp(Fpu reg) { opFpu(reg, 0xDD, 0xE8); } + void fucompp() { db(0xDA); db(0xE9); } + void fwait() { db(0x9B); } + void fxam() { db(0xD9); db(0xE5); } + void fxch() { db(0xD9); db(0xC9); } +-void fxch(const Fpu& reg) { opFpu(reg, 0xD9, 0xC8); } ++void fxch(Fpu reg) { opFpu(reg, 0xD9, 0xC8); } + void fxrstor(const Address& addr) { opMR(addr, Reg32(1), T_0F, 0xAE); } + void fxtract() { db(0xD9); db(0xF4); } + void fyl2x() { db(0xD9); db(0xF1); } + void fyl2xp1() { db(0xD9); db(0xF9); } +-void gf2p8affineinvqb(const Xmm& xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0xCF, isXMM_XMMorMEM, static_cast(imm)); } +-void gf2p8affineqb(const Xmm& xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0xCE, isXMM_XMMorMEM, static_cast(imm)); } +-void gf2p8mulb(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0xCF, isXMM_XMMorMEM); } +-void haddpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F|T_YMM, 0x7C, isXMM_XMMorMEM); } +-void haddps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_F2|T_0F|T_YMM, 0x7C, isXMM_XMMorMEM); } ++void gf2p8affineinvqb(Xmm xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0xCF, isXMM_XMMorMEM, static_cast(imm)); } ++void gf2p8affineqb(Xmm xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0xCE, isXMM_XMMorMEM, static_cast(imm)); } ++void gf2p8mulb(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0xCF, isXMM_XMMorMEM); } ++void haddpd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F|T_YMM, 0x7C, isXMM_XMMorMEM); } ++void haddps(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_F2|T_0F|T_YMM, 0x7C, isXMM_XMMorMEM); } + void hlt() { db(0xF4); } +-void hsubpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F|T_YMM, 0x7D, isXMM_XMMorMEM); } +-void hsubps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_F2|T_0F|T_YMM, 0x7D, isXMM_XMMorMEM); } ++void hsubpd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F|T_YMM, 0x7D, isXMM_XMMorMEM); } ++void hsubps(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_F2|T_0F|T_YMM, 0x7D, isXMM_XMMorMEM); } + void idiv(const Operand& op) { opRext(op, 0, 7, T_APX|T_NF|T_CODE1_IF1, 0xF6); } + void imul(const Operand& op) { opRext(op, 0, 5, T_APX|T_NF|T_CODE1_IF1, 0xF6); } +-void imul(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1|T_NF, 0xAF); } +-void imul(const Reg& reg, const Operand& op) { if (opROO(Reg(), op, reg, T_APX|T_NF, 0xAF)) return; opRO(reg, op, T_0F, 0xAF, reg.getKind() == op.getKind()); } +-void in_(const Reg& a, const Reg& d) { opInOut(a, d, 0xEC); } +-void in_(const Reg& a, uint8_t v) { opInOut(a, 0xE4, v); } ++void imul(Reg d, Reg reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1|T_NF, 0xAF); } ++void imul(Reg reg, const Operand& op) { if (opROO(Reg(), op, reg, T_APX|T_NF, 0xAF)) return; opRO(reg, op, T_0F, 0xAF, reg.getKind() == op.getKind()); } ++void in_(Reg a, Reg d) { opInOut(a, d, 0xEC); } ++void in_(Reg a, uint8_t v) { opInOut(a, 0xE4, v); } + void inc(const Operand& op) { opIncDec(Reg(), op, 0); } +-void inc(const Reg& d, const Operand& op) { opIncDec(d, op, 0); } +-void insertps(const Xmm& xmm, const Operand& op, uint8_t imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x21, isXMM_XMMorMEM, imm); } ++void inc(Reg d, const Operand& op) { opIncDec(d, op, 0); } ++void insertps(Xmm xmm, const Operand& op, uint8_t imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x21, isXMM_XMMorMEM, imm); } + void int3() { db(0xCC); } + void int_(uint8_t x) { db(0xCD); db(x); } + void ja(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x77, 0x87, 0x0F); }//-V524 +@@ -646,13 +646,13 @@ void jz(const char *label, LabelType type = T_AUTO) { jz(std::string(label), typ + void jz(const void *addr) { opJmpAbs(addr, T_NEAR, 0x74, 0x84, 0x0F); }//-V524 + void jz(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x74, 0x84, 0x0F); }//-V524 + void lahf() { db(0x9F); } +-void lddqu(const Xmm& xmm, const Address& addr) { opSSE(xmm, addr, T_F2 | T_0F, 0xF0); } ++void lddqu(Xmm xmm, const Address& addr) { opSSE(xmm, addr, T_F2 | T_0F, 0xF0); } + void ldmxcsr(const Address& addr) { opMR(addr, Reg32(2), T_0F, 0xAE); } +-void lea(const Reg& reg, const Address& addr) { if (!reg.isBit(16 | i32e)) XBYAK_THROW(ERR_BAD_SIZE_OF_REGISTER) opMR(addr, reg, 0, 0x8D); } ++void lea(Reg reg, const Address& addr) { if (!reg.isBit(16 | i32e)) XBYAK_THROW(ERR_BAD_SIZE_OF_REGISTER) opMR(addr, reg, 0, 0x8D); } + void leave() { db(0xC9); } + void lfence() { db(0x0F); db(0xAE); db(0xE8); } +-void lfs(const Reg& reg, const Address& addr) { opLoadSeg(addr, reg, T_0F, 0xB4); } +-void lgs(const Reg& reg, const Address& addr) { opLoadSeg(addr, reg, T_0F, 0xB5); } ++void lfs(Reg reg, const Address& addr) { opLoadSeg(addr, reg, T_0F, 0xB4); } ++void lgs(Reg reg, const Address& addr) { opLoadSeg(addr, reg, T_0F, 0xB5); } + void lock() { db(0xF0); } + void lodsb() { db(0xAC); } + void lodsd() { db(0xAD); } +@@ -666,185 +666,185 @@ void loope(std::string label) { opJmp(label, T_SHORT, 0xE1, 0, 0); } + void loopne(const Label& label) { opJmp(label, T_SHORT, 0xE0, 0, 0); } + void loopne(const char *label) { loopne(std::string(label)); } + void loopne(std::string label) { opJmp(label, T_SHORT, 0xE0, 0, 0); } +-void lss(const Reg& reg, const Address& addr) { opLoadSeg(addr, reg, T_0F, 0xB2); } +-void lzcnt(const Reg®, const Operand& op) { if (opROO(Reg(), op, reg, T_APX|T_NF, 0xF5)) return; opCnt(reg, op, 0xBD); } +-void maskmovdqu(const Xmm& reg1, const Xmm& reg2) { opSSE(reg1, reg2, T_66|T_0F, 0xF7); } +-void maskmovq(const Mmx& reg1, const Mmx& reg2) { opSSE(reg1, reg2, T_0F, 0xF7); } +-void maxpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x5F, isXMM_XMMorMEM); } +-void maxps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x5F, isXMM_XMMorMEM); } +-void maxsd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F2, 0x5F, isXMM_XMMorMEM); } +-void maxss(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F3, 0x5F, isXMM_XMMorMEM); } ++void lss(Reg reg, const Address& addr) { opLoadSeg(addr, reg, T_0F, 0xB2); } ++void lzcnt(Reg reg, const Operand& op) { if (opROO(Reg(), op, reg, T_APX|T_NF, 0xF5)) return; opCnt(reg, op, 0xBD); } ++void maskmovdqu(Xmm reg1, Xmm reg2) { opSSE(reg1, reg2, T_66|T_0F, 0xF7); } ++void maskmovq(Mmx reg1, Mmx reg2) { opSSE(reg1, reg2, T_0F, 0xF7); } ++void maxpd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x5F, isXMM_XMMorMEM); } ++void maxps(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x5F, isXMM_XMMorMEM); } ++void maxsd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F2, 0x5F, isXMM_XMMorMEM); } ++void maxss(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F3, 0x5F, isXMM_XMMorMEM); } + void mfence() { db(0x0F); db(0xAE); db(0xF0); } +-void minpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x5D, isXMM_XMMorMEM); } +-void minps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x5D, isXMM_XMMorMEM); } +-void minsd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F2, 0x5D, isXMM_XMMorMEM); } +-void minss(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F3, 0x5D, isXMM_XMMorMEM); } ++void minpd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x5D, isXMM_XMMorMEM); } ++void minps(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x5D, isXMM_XMMorMEM); } ++void minsd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F2, 0x5D, isXMM_XMMorMEM); } ++void minss(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F3, 0x5D, isXMM_XMMorMEM); } + void monitor() { db(0x0F); db(0x01); db(0xC8); } + void monitorx() { db(0x0F); db(0x01); db(0xFA); } +-void movapd(const Address& addr, const Xmm& xmm) { opSSE(xmm, addr, T_0F|T_66, 0x29); } +-void movapd(const Xmm& xmm, const Operand& op) { opMMX(xmm, op, 0x28, T_0F, T_66); } +-void movaps(const Address& addr, const Xmm& xmm) { opSSE(xmm, addr, T_0F|T_NONE, 0x29); } +-void movaps(const Xmm& xmm, const Operand& op) { opMMX(xmm, op, 0x28, T_0F, T_NONE); } +-void movbe(const Address& addr, const Reg& reg) { opMR(addr, reg, T_0F38, 0xF1, T_APX, 0x61); } +-void movbe(const Reg& reg, const Address& addr) { opMR(addr, reg, T_0F38, 0xF0, T_APX, 0x60); } +-void movd(const Mmx& mmx, const Operand& op) { if (!(op.isMEM() || op.isREG(32))) XBYAK_THROW(ERR_BAD_COMBINATION) if (mmx.isXMM()) db(0x66); opSSE(mmx, op, T_0F | T_ALLOW_DIFF_SIZE, 0x6E); } +-void movd(const Operand& op, const Mmx& mmx) { if (!(op.isMEM() || op.isREG(32))) XBYAK_THROW(ERR_BAD_COMBINATION) if (mmx.isXMM()) db(0x66); opSSE(mmx, op, T_0F | T_ALLOW_DIFF_SIZE, 0x7E); } +-void movddup(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_DUP|T_F2|T_0F|T_EW1|T_YMM|T_EVEX, 0x12, isXMM_XMMorMEM, NONE); } +-void movdir64b(const Reg& reg, const Address& addr) { opMR(addr, reg.cvt32(), T_66|T_0F38, 0xF8, T_APX|T_66); } +-void movdiri(const Address& addr, const Reg32e& reg) { opMR(addr, reg, T_0F38, 0xF9, T_APX); } +-void movdq2q(const Mmx& mmx, const Xmm& xmm) { opSSE(mmx, xmm, T_F2 | T_0F, 0xD6); } +-void movdqa(const Address& addr, const Xmm& xmm) { opSSE(xmm, addr, T_0F|T_66, 0x7F); } +-void movdqa(const Xmm& xmm, const Operand& op) { opMMX(xmm, op, 0x6F, T_0F, T_66); } +-void movdqu(const Address& addr, const Xmm& xmm) { opSSE(xmm, addr, T_0F|T_F3, 0x7F); } +-void movdqu(const Xmm& xmm, const Operand& op) { opMMX(xmm, op, 0x6F, T_0F, T_F3); } +-void movhlps(const Xmm& reg1, const Xmm& reg2) { opSSE(reg1, reg2, T_0F, 0x12); } ++void movapd(const Address& addr, Xmm xmm) { opSSE(xmm, addr, T_0F|T_66, 0x29); } ++void movapd(Xmm xmm, const Operand& op) { opMMX(xmm, op, 0x28, T_0F, T_66); } ++void movaps(const Address& addr, Xmm xmm) { opSSE(xmm, addr, T_0F|T_NONE, 0x29); } ++void movaps(Xmm xmm, const Operand& op) { opMMX(xmm, op, 0x28, T_0F, T_NONE); } ++void movbe(const Address& addr, Reg reg) { opMR(addr, reg, T_0F38, 0xF1, T_APX, 0x61); } ++void movbe(Reg reg, const Address& addr) { opMR(addr, reg, T_0F38, 0xF0, T_APX, 0x60); } ++void movd(Mmx mmx, const Operand& op) { if (!(op.isMEM() || op.isREG(32))) XBYAK_THROW(ERR_BAD_COMBINATION) if (mmx.isXMM()) db(0x66); opSSE(mmx, op, T_0F | T_ALLOW_DIFF_SIZE, 0x6E); } ++void movd(const Operand& op, Mmx mmx) { if (!(op.isMEM() || op.isREG(32))) XBYAK_THROW(ERR_BAD_COMBINATION) if (mmx.isXMM()) db(0x66); opSSE(mmx, op, T_0F | T_ALLOW_DIFF_SIZE, 0x7E); } ++void movddup(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_DUP|T_F2|T_0F|T_EW1|T_YMM|T_EVEX, 0x12, isXMM_XMMorMEM, NONE); } ++void movdir64b(Reg reg, const Address& addr) { opMR(addr, reg.cvt32(), T_66|T_0F38, 0xF8, T_APX|T_66); } ++void movdiri(const Address& addr, Reg32e reg) { opMR(addr, reg, T_0F38, 0xF9, T_APX); } ++void movdq2q(Mmx mmx, Xmm xmm) { opSSE(mmx, xmm, T_F2 | T_0F, 0xD6); } ++void movdqa(const Address& addr, Xmm xmm) { opSSE(xmm, addr, T_0F|T_66, 0x7F); } ++void movdqa(Xmm xmm, const Operand& op) { opMMX(xmm, op, 0x6F, T_0F, T_66); } ++void movdqu(const Address& addr, Xmm xmm) { opSSE(xmm, addr, T_0F|T_F3, 0x7F); } ++void movdqu(Xmm xmm, const Operand& op) { opMMX(xmm, op, 0x6F, T_0F, T_F3); } ++void movhlps(Xmm reg1, Xmm reg2) { opSSE(reg1, reg2, T_0F, 0x12); } + void movhpd(const Operand& op1, const Operand& op2) { opMovXMM(op1, op2, T_66|T_0F, 0x16); } + void movhps(const Operand& op1, const Operand& op2) { opMovXMM(op1, op2, T_0F, 0x16); } +-void movlhps(const Xmm& reg1, const Xmm& reg2) { opSSE(reg1, reg2, T_0F, 0x16); } ++void movlhps(Xmm reg1, Xmm reg2) { opSSE(reg1, reg2, T_0F, 0x16); } + void movlpd(const Operand& op1, const Operand& op2) { opMovXMM(op1, op2, T_66|T_0F, 0x12); } + void movlps(const Operand& op1, const Operand& op2) { opMovXMM(op1, op2, T_0F, 0x12); } +-void movmskpd(const Reg32e& reg, const Xmm& xmm) { db(0x66); movmskps(reg, xmm); } +-void movmskps(const Reg32e& reg, const Xmm& xmm) { opSSE(reg, xmm, T_0F, 0x50); } +-void movntdq(const Address& addr, const Xmm& reg) { if (reg.getIdx() >= 16) XBYAK_THROW(ERR_BAD_PARAMETER) opSSE(Reg16(reg.getIdx()), addr, T_0F, 0xE7); } +-void movntdqa(const Xmm& xmm, const Address& addr) { opSSE(xmm, addr, T_66 | T_0F38, 0x2A); } +-void movnti(const Address& addr, const Reg32e& reg) { opMR(addr, reg, T_0F, 0xC3); } +-void movntpd(const Address& addr, const Xmm& reg) { if (reg.getIdx() >= 16) XBYAK_THROW(ERR_BAD_PARAMETER) opSSE(Reg16(reg.getIdx()), addr, T_0F, 0x2B); } +-void movntps(const Address& addr, const Xmm& xmm) { opSSE(Xmm(xmm.getIdx()), addr, T_0F, 0x2B); } +-void movntq(const Address& addr, const Mmx& mmx) { if (!mmx.isMMX()) XBYAK_THROW(ERR_BAD_COMBINATION) opSSE(mmx, addr, T_0F, 0xE7); } +-void movq(const Address& addr, const Mmx& mmx) { if (mmx.isXMM()) db(0x66); opSSE(mmx, addr, T_0F | T_ALLOW_DIFF_SIZE, mmx.isXMM() ? 0xD6 : 0x7F); } +-void movq(const Mmx& mmx, const Operand& op) { if (!op.isMEM() && mmx.getKind() != op.getKind()) XBYAK_THROW(ERR_BAD_COMBINATION) if (mmx.isXMM()) db(0xF3); opSSE(mmx, op, T_0F | T_ALLOW_DIFF_SIZE, mmx.isXMM() ? 0x7E : 0x6F); } +-void movq2dq(const Xmm& xmm, const Mmx& mmx) { opSSE(xmm, mmx, T_F3 | T_0F, 0xD6); } ++void movmskpd(Reg32e reg, Xmm xmm) { db(0x66); movmskps(reg, xmm); } ++void movmskps(Reg32e reg, Xmm xmm) { opSSE(reg, xmm, T_0F, 0x50); } ++void movntdq(const Address& addr, Xmm reg) { if (reg.getIdx() >= 16) XBYAK_THROW(ERR_BAD_PARAMETER) opSSE(Reg16(reg.getIdx()), addr, T_0F, 0xE7); } ++void movntdqa(Xmm xmm, const Address& addr) { opSSE(xmm, addr, T_66 | T_0F38, 0x2A); } ++void movnti(const Address& addr, Reg32e reg) { opMR(addr, reg, T_0F, 0xC3); } ++void movntpd(const Address& addr, Xmm reg) { if (reg.getIdx() >= 16) XBYAK_THROW(ERR_BAD_PARAMETER) opSSE(Reg16(reg.getIdx()), addr, T_0F, 0x2B); } ++void movntps(const Address& addr, Xmm xmm) { opSSE(Xmm(xmm.getIdx()), addr, T_0F, 0x2B); } ++void movntq(const Address& addr, Mmx mmx) { if (!mmx.isMMX()) XBYAK_THROW(ERR_BAD_COMBINATION) opSSE(mmx, addr, T_0F, 0xE7); } ++void movq(const Address& addr, Mmx mmx) { if (mmx.isXMM()) db(0x66); opSSE(mmx, addr, T_0F | T_ALLOW_DIFF_SIZE, mmx.isXMM() ? 0xD6 : 0x7F); } ++void movq(Mmx mmx, const Operand& op) { if (!op.isMEM() && mmx.getKind() != op.getKind()) XBYAK_THROW(ERR_BAD_COMBINATION) if (mmx.isXMM()) db(0xF3); opSSE(mmx, op, T_0F | T_ALLOW_DIFF_SIZE, mmx.isXMM() ? 0x7E : 0x6F); } ++void movq2dq(Xmm xmm, Mmx mmx) { opSSE(xmm, mmx, T_F3 | T_0F, 0xD6); } + void movsb() { db(0xA4); } + void movsd() { db(0xA5); } +-void movsd(const Address& addr, const Xmm& xmm) { opSSE(xmm, addr, T_0F|T_F2, 0x11); } +-void movsd(const Xmm& xmm, const Operand& op) { opMMX(xmm, op, 0x10, T_0F, T_F2); } +-void movshdup(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_F3|T_0F|T_W0|T_YMM|T_EVEX, 0x16, isXMM_XMMorMEM, NONE); } +-void movsldup(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_F3|T_0F|T_W0|T_YMM|T_EVEX, 0x12, isXMM_XMMorMEM, NONE); } +-void movss(const Address& addr, const Xmm& xmm) { opSSE(xmm, addr, T_0F|T_F3, 0x11); } +-void movss(const Xmm& xmm, const Operand& op) { opMMX(xmm, op, 0x10, T_0F, T_F3); } ++void movsd(const Address& addr, Xmm xmm) { opSSE(xmm, addr, T_0F|T_F2, 0x11); } ++void movsd(Xmm xmm, const Operand& op) { opMMX(xmm, op, 0x10, T_0F, T_F2); } ++void movshdup(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_F3|T_0F|T_W0|T_YMM|T_EVEX, 0x16, isXMM_XMMorMEM, NONE); } ++void movsldup(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_F3|T_0F|T_W0|T_YMM|T_EVEX, 0x12, isXMM_XMMorMEM, NONE); } ++void movss(const Address& addr, Xmm xmm) { opSSE(xmm, addr, T_0F|T_F3, 0x11); } ++void movss(Xmm xmm, const Operand& op) { opMMX(xmm, op, 0x10, T_0F, T_F3); } + void movsw() { db(0x66); db(0xA5); } +-void movsx(const Reg& reg, const Operand& op) { opMovxx(reg, op, 0xBE); } +-void movupd(const Address& addr, const Xmm& xmm) { opSSE(xmm, addr, T_0F|T_66, 0x11); } +-void movupd(const Xmm& xmm, const Operand& op) { opMMX(xmm, op, 0x10, T_0F, T_66); } +-void movups(const Address& addr, const Xmm& xmm) { opSSE(xmm, addr, T_0F|T_NONE, 0x11); } +-void movups(const Xmm& xmm, const Operand& op) { opMMX(xmm, op, 0x10, T_0F, T_NONE); } +-void movzx(const Reg& reg, const Operand& op) { opMovxx(reg, op, 0xB6); } +-void mpsadbw(const Xmm& xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x42, isXMM_XMMorMEM, static_cast(imm)); } ++void movsx(Reg reg, const Operand& op) { opMovxx(reg, op, 0xBE); } ++void movupd(const Address& addr, Xmm xmm) { opSSE(xmm, addr, T_0F|T_66, 0x11); } ++void movupd(Xmm xmm, const Operand& op) { opMMX(xmm, op, 0x10, T_0F, T_66); } ++void movups(const Address& addr, Xmm xmm) { opSSE(xmm, addr, T_0F|T_NONE, 0x11); } ++void movups(Xmm xmm, const Operand& op) { opMMX(xmm, op, 0x10, T_0F, T_NONE); } ++void movzx(Reg reg, const Operand& op) { opMovxx(reg, op, 0xB6); } ++void mpsadbw(Xmm xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x42, isXMM_XMMorMEM, static_cast(imm)); } + void mul(const Operand& op) { opRext(op, 0, 4, T_APX|T_NF|T_CODE1_IF1, 0xF6); } +-void mulpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x59, isXMM_XMMorMEM); } +-void mulps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x59, isXMM_XMMorMEM); } +-void mulsd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F2, 0x59, isXMM_XMMorMEM); } +-void mulss(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F3, 0x59, isXMM_XMMorMEM); } +-void mulx(const Reg32e& r1, const Reg32e& r2, const Operand& op) { opRRO(r1, r2, op, T_APX|T_F2|T_0F38, 0xf6); } ++void mulpd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x59, isXMM_XMMorMEM); } ++void mulps(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x59, isXMM_XMMorMEM); } ++void mulsd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F2, 0x59, isXMM_XMMorMEM); } ++void mulss(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F3, 0x59, isXMM_XMMorMEM); } ++void mulx(Reg32e r1, Reg32e r2, const Operand& op) { opRRO(r1, r2, op, T_APX|T_F2|T_0F38, 0xf6); } + void mwait() { db(0x0F); db(0x01); db(0xC9); } + void mwaitx() { db(0x0F); db(0x01); db(0xFB); } + void neg(const Operand& op) { opRext(op, 0, 3, T_APX|T_NF|T_CODE1_IF1, 0xF6); } +-void neg(const Reg& d, const Operand& op) { opROO(d, op, Reg(3, Operand::REG, d.getBit()), T_APX|T_NF|T_CODE1_IF1|T_ND1, 0xF6); } ++void neg(Reg d, const Operand& op) { opROO(d, op, Reg(3, Operand::REG, d.getBit()), T_APX|T_NF|T_CODE1_IF1|T_ND1, 0xF6); } + void not_(const Operand& op) { opRext(op, 0, 2, T_APX|T_CODE1_IF1, 0xF6); } +-void not_(const Reg& d, const Operand& op) { opROO(d, op, Reg(2, Operand::REG, d.getBit()), T_APX|T_CODE1_IF1|T_ND1, 0xF6); } ++void not_(Reg d, const Operand& op) { opROO(d, op, Reg(2, Operand::REG, d.getBit()), T_APX|T_CODE1_IF1|T_ND1, 0xF6); } + void or_(const Operand& op, uint32_t imm) { opOI(op, imm, 0x08, 1); } + void or_(const Operand& op1, const Operand& op2) { opRO_MR(op1, op2, 0x08); } +-void or_(const Reg& d, const Operand& op, uint32_t imm) { opROI(d, op, imm, T_NF|T_CODE1_IF1, 1); } +-void or_(const Reg& d, const Operand& op1, const Operand& op2) { opROO(d, op1, op2, T_NF|T_CODE1_IF1, 0x08); } +-void orpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x56, isXMM_XMMorMEM); } +-void orps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x56, isXMM_XMMorMEM); } +-void out_(const Reg& d, const Reg& a) { opInOut(a, d, 0xEE); } +-void out_(uint8_t v, const Reg& a) { opInOut(a, 0xE6, v); } ++void or_(Reg d, const Operand& op, uint32_t imm) { opROI(d, op, imm, T_NF|T_CODE1_IF1, 1); } ++void or_(Reg d, const Operand& op1, const Operand& op2) { opROO(d, op1, op2, T_NF|T_CODE1_IF1, 0x08); } ++void orpd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x56, isXMM_XMMorMEM); } ++void orps(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x56, isXMM_XMMorMEM); } ++void out_(Reg d, Reg a) { opInOut(a, d, 0xEE); } ++void out_(uint8_t v, Reg a) { opInOut(a, 0xE6, v); } + void outsb() { db(0x6E); } + void outsd() { db(0x6F); } + void outsw() { db(0x66); db(0x6F); } +-void pabsb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x1C, T_0F38, T_66); } +-void pabsd(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x1E, T_0F38, T_66); } +-void pabsw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x1D, T_0F38, T_66); } +-void packssdw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x6B); } +-void packsswb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x63); } +-void packusdw(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x2B, isXMM_XMMorMEM); } +-void packuswb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x67); } +-void paddb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xFC); } +-void paddd(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xFE); } +-void paddq(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xD4); } +-void paddsb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xEC); } +-void paddsw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xED); } +-void paddusb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xDC); } +-void paddusw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xDD); } +-void paddw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xFD); } +-void palignr(const Mmx& mmx, const Operand& op, int imm) { opMMX(mmx, op, 0x0F, T_0F3A, T_66, static_cast(imm)); } +-void pand(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xDB); } +-void pandn(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xDF); } ++void pabsb(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0x1C, T_0F38, T_66); } ++void pabsd(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0x1E, T_0F38, T_66); } ++void pabsw(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0x1D, T_0F38, T_66); } ++void packssdw(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0x6B); } ++void packsswb(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0x63); } ++void packusdw(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x2B, isXMM_XMMorMEM); } ++void packuswb(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0x67); } ++void paddb(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xFC); } ++void paddd(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xFE); } ++void paddq(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xD4); } ++void paddsb(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xEC); } ++void paddsw(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xED); } ++void paddusb(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xDC); } ++void paddusw(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xDD); } ++void paddw(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xFD); } ++void palignr(Mmx mmx, const Operand& op, int imm) { opMMX(mmx, op, 0x0F, T_0F3A, T_66, static_cast(imm)); } ++void pand(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xDB); } ++void pandn(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xDF); } + void pause() { db(0xF3); db(0x90); } +-void pavgb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xE0); } +-void pavgw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xE3); } +-void pblendvb(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38, 0x10, isXMM_XMMorMEM, NONE); } +-void pblendw(const Xmm& xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x0E, isXMM_XMMorMEM, static_cast(imm)); } +-void pclmulhqhqdq(const Xmm& xmm, const Operand& op) { pclmulqdq(xmm, op, 0x11); } +-void pclmulhqlqdq(const Xmm& xmm, const Operand& op) { pclmulqdq(xmm, op, 0x01); } +-void pclmullqhqdq(const Xmm& xmm, const Operand& op) { pclmulqdq(xmm, op, 0x10); } +-void pclmullqlqdq(const Xmm& xmm, const Operand& op) { pclmulqdq(xmm, op, 0x00); } +-void pclmulqdq(const Xmm& xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x44, isXMM_XMMorMEM, static_cast(imm)); } +-void pcmpeqb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x74); } +-void pcmpeqd(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x76); } +-void pcmpeqq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x29, isXMM_XMMorMEM); } +-void pcmpeqw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x75); } +-void pcmpestri(const Xmm& xmm, const Operand& op, uint8_t imm) { opSSE(xmm, op, T_66|T_0F3A, 0x61, isXMM_XMMorMEM, imm); } +-void pcmpestrm(const Xmm& xmm, const Operand& op, uint8_t imm) { opSSE(xmm, op, T_66|T_0F3A, 0x60, isXMM_XMMorMEM, imm); } +-void pcmpgtb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x64); } +-void pcmpgtd(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x66); } +-void pcmpgtq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x37, isXMM_XMMorMEM); } +-void pcmpgtw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x65); } +-void pcmpistri(const Xmm& xmm, const Operand& op, uint8_t imm) { opSSE(xmm, op, T_66|T_0F3A, 0x63, isXMM_XMMorMEM, imm); } +-void pcmpistrm(const Xmm& xmm, const Operand& op, uint8_t imm) { opSSE(xmm, op, T_66|T_0F3A, 0x62, isXMM_XMMorMEM, imm); } +-void pdep(const Reg32e& r1, const Reg32e& r2, const Operand& op) { opRRO(r1, r2, op, T_APX|T_F2|T_0F38, 0xf5); } +-void pext(const Reg32e& r1, const Reg32e& r2, const Operand& op) { opRRO(r1, r2, op, T_APX|T_F3|T_0F38, 0xf5); } +-void pextrb(const Operand& op, const Xmm& xmm, uint8_t imm) { opExt(op, xmm, 0x14, imm); } +-void pextrd(const Operand& op, const Xmm& xmm, uint8_t imm) { opExt(op, xmm, 0x16, imm); } +-void pextrw(const Operand& op, const Mmx& xmm, uint8_t imm) { opExt(op, xmm, 0x15, imm, true); } +-void phaddd(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x02, T_0F38, T_66); } +-void phaddsw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x03, T_0F38, T_66); } +-void phaddw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x01, T_0F38, T_66); } +-void phminposuw(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38, 0x41, isXMM_XMMorMEM, NONE); } +-void phsubd(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x06, T_0F38, T_66); } +-void phsubsw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x07, T_0F38, T_66); } +-void phsubw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x05, T_0F38, T_66); } +-void pinsrb(const Xmm& xmm, const Operand& op, uint8_t imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x20, isXMM_REG32orMEM, imm); } +-void pinsrd(const Xmm& xmm, const Operand& op, uint8_t imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x22, isXMM_REG32orMEM, imm); } +-void pinsrw(const Mmx& mmx, const Operand& op, int imm) { if (!op.isREG(32) && !op.isMEM()) XBYAK_THROW(ERR_BAD_COMBINATION) opSSE(mmx, op, T_0F | (mmx.isXMM() ? T_66 : T_NONE), 0xC4, 0, imm); } +-void pmaddubsw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x04, T_0F38, T_66); } +-void pmaddwd(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xF5); } +-void pmaxsb(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x3C, isXMM_XMMorMEM); } +-void pmaxsd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x3D, isXMM_XMMorMEM); } +-void pmaxsw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xEE); } +-void pmaxub(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xDE); } +-void pmaxud(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x3F, isXMM_XMMorMEM); } +-void pmaxuw(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x3E, isXMM_XMMorMEM); } +-void pminsb(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x38, isXMM_XMMorMEM); } +-void pminsd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x39, isXMM_XMMorMEM); } +-void pminsw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xEA); } +-void pminub(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xDA); } +-void pminud(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x3B, isXMM_XMMorMEM); } +-void pminuw(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x3A, isXMM_XMMorMEM); } +-void pmovmskb(const Reg32e& reg, const Mmx& mmx) { if (mmx.isXMM()) db(0x66); opSSE(reg, mmx, T_0F, 0xD7); } +-void pmovsxbd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_N4|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x21, isXMM_XMMorMEM, NONE); } +-void pmovsxbq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_N2|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x22, isXMM_XMMorMEM, NONE); } +-void pmovsxbw(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_N8|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x20, isXMM_XMMorMEM, NONE); } +-void pmovsxdq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_N8|T_N_VL|T_66|T_0F38|T_W0|T_YMM|T_EVEX, 0x25, isXMM_XMMorMEM, NONE); } +-void pmovsxwd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_N8|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x23, isXMM_XMMorMEM, NONE); } +-void pmovsxwq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_N4|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x24, isXMM_XMMorMEM, NONE); } +-void pmovzxbd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_N4|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x31, isXMM_XMMorMEM, NONE); } +-void pmovzxbq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_N2|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x32, isXMM_XMMorMEM, NONE); } +-void pmovzxbw(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_N8|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x30, isXMM_XMMorMEM, NONE); } +-void pmovzxdq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_N8|T_N_VL|T_66|T_0F38|T_W0|T_YMM|T_EVEX, 0x35, isXMM_XMMorMEM, NONE); } +-void pmovzxwd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_N8|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x33, isXMM_XMMorMEM, NONE); } +-void pmovzxwq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_N4|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x34, isXMM_XMMorMEM, NONE); } +-void pmuldq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x28, isXMM_XMMorMEM); } +-void pmulhrsw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x0B, T_0F38, T_66); } +-void pmulhuw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xE4); } +-void pmulhw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xE5); } +-void pmulld(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x40, isXMM_XMMorMEM); } +-void pmullw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xD5); } +-void pmuludq(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xF4); } +-void popcnt(const Reg®, const Operand& op) { opCnt(reg, op, 0xB8); } ++void pavgb(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xE0); } ++void pavgw(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xE3); } ++void pblendvb(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38, 0x10, isXMM_XMMorMEM, NONE); } ++void pblendw(Xmm xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x0E, isXMM_XMMorMEM, static_cast(imm)); } ++void pclmulhqhqdq(Xmm xmm, const Operand& op) { pclmulqdq(xmm, op, 0x11); } ++void pclmulhqlqdq(Xmm xmm, const Operand& op) { pclmulqdq(xmm, op, 0x01); } ++void pclmullqhqdq(Xmm xmm, const Operand& op) { pclmulqdq(xmm, op, 0x10); } ++void pclmullqlqdq(Xmm xmm, const Operand& op) { pclmulqdq(xmm, op, 0x00); } ++void pclmulqdq(Xmm xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x44, isXMM_XMMorMEM, static_cast(imm)); } ++void pcmpeqb(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0x74); } ++void pcmpeqd(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0x76); } ++void pcmpeqq(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x29, isXMM_XMMorMEM); } ++void pcmpeqw(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0x75); } ++void pcmpestri(Xmm xmm, const Operand& op, uint8_t imm) { opSSE(xmm, op, T_66|T_0F3A, 0x61, isXMM_XMMorMEM, imm); } ++void pcmpestrm(Xmm xmm, const Operand& op, uint8_t imm) { opSSE(xmm, op, T_66|T_0F3A, 0x60, isXMM_XMMorMEM, imm); } ++void pcmpgtb(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0x64); } ++void pcmpgtd(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0x66); } ++void pcmpgtq(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x37, isXMM_XMMorMEM); } ++void pcmpgtw(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0x65); } ++void pcmpistri(Xmm xmm, const Operand& op, uint8_t imm) { opSSE(xmm, op, T_66|T_0F3A, 0x63, isXMM_XMMorMEM, imm); } ++void pcmpistrm(Xmm xmm, const Operand& op, uint8_t imm) { opSSE(xmm, op, T_66|T_0F3A, 0x62, isXMM_XMMorMEM, imm); } ++void pdep(Reg32e r1, Reg32e r2, const Operand& op) { opRRO(r1, r2, op, T_APX|T_F2|T_0F38, 0xf5); } ++void pext(Reg32e r1, Reg32e r2, const Operand& op) { opRRO(r1, r2, op, T_APX|T_F3|T_0F38, 0xf5); } ++void pextrb(const Operand& op, Xmm xmm, uint8_t imm) { opExt(op, xmm, 0x14, imm); } ++void pextrd(const Operand& op, Xmm xmm, uint8_t imm) { opExt(op, xmm, 0x16, imm); } ++void pextrw(const Operand& op, Mmx xmm, uint8_t imm) { opExt(op, xmm, 0x15, imm, true); } ++void phaddd(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0x02, T_0F38, T_66); } ++void phaddsw(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0x03, T_0F38, T_66); } ++void phaddw(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0x01, T_0F38, T_66); } ++void phminposuw(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38, 0x41, isXMM_XMMorMEM, NONE); } ++void phsubd(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0x06, T_0F38, T_66); } ++void phsubsw(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0x07, T_0F38, T_66); } ++void phsubw(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0x05, T_0F38, T_66); } ++void pinsrb(Xmm xmm, const Operand& op, uint8_t imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x20, isXMM_REG32orMEM, imm); } ++void pinsrd(Xmm xmm, const Operand& op, uint8_t imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x22, isXMM_REG32orMEM, imm); } ++void pinsrw(Mmx mmx, const Operand& op, int imm) { if (!op.isREG(32) && !op.isMEM()) XBYAK_THROW(ERR_BAD_COMBINATION) opSSE(mmx, op, T_0F | (mmx.isXMM() ? T_66 : T_NONE), 0xC4, 0, imm); } ++void pmaddubsw(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0x04, T_0F38, T_66); } ++void pmaddwd(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xF5); } ++void pmaxsb(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x3C, isXMM_XMMorMEM); } ++void pmaxsd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x3D, isXMM_XMMorMEM); } ++void pmaxsw(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xEE); } ++void pmaxub(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xDE); } ++void pmaxud(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x3F, isXMM_XMMorMEM); } ++void pmaxuw(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x3E, isXMM_XMMorMEM); } ++void pminsb(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x38, isXMM_XMMorMEM); } ++void pminsd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x39, isXMM_XMMorMEM); } ++void pminsw(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xEA); } ++void pminub(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xDA); } ++void pminud(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x3B, isXMM_XMMorMEM); } ++void pminuw(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x3A, isXMM_XMMorMEM); } ++void pmovmskb(Reg32e reg, Mmx mmx) { if (mmx.isXMM()) db(0x66); opSSE(reg, mmx, T_0F, 0xD7); } ++void pmovsxbd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_N4|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x21, isXMM_XMMorMEM, NONE); } ++void pmovsxbq(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_N2|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x22, isXMM_XMMorMEM, NONE); } ++void pmovsxbw(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_N8|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x20, isXMM_XMMorMEM, NONE); } ++void pmovsxdq(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_N8|T_N_VL|T_66|T_0F38|T_W0|T_YMM|T_EVEX, 0x25, isXMM_XMMorMEM, NONE); } ++void pmovsxwd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_N8|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x23, isXMM_XMMorMEM, NONE); } ++void pmovsxwq(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_N4|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x24, isXMM_XMMorMEM, NONE); } ++void pmovzxbd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_N4|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x31, isXMM_XMMorMEM, NONE); } ++void pmovzxbq(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_N2|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x32, isXMM_XMMorMEM, NONE); } ++void pmovzxbw(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_N8|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x30, isXMM_XMMorMEM, NONE); } ++void pmovzxdq(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_N8|T_N_VL|T_66|T_0F38|T_W0|T_YMM|T_EVEX, 0x35, isXMM_XMMorMEM, NONE); } ++void pmovzxwd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_N8|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x33, isXMM_XMMorMEM, NONE); } ++void pmovzxwq(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_N4|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x34, isXMM_XMMorMEM, NONE); } ++void pmuldq(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x28, isXMM_XMMorMEM); } ++void pmulhrsw(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0x0B, T_0F38, T_66); } ++void pmulhuw(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xE4); } ++void pmulhw(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xE5); } ++void pmulld(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x40, isXMM_XMMorMEM); } ++void pmullw(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xD5); } ++void pmuludq(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xF4); } ++void popcnt(Reg reg, const Operand& op) { opCnt(reg, op, 0xB8); } + void popf() { db(0x9D); } +-void por(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xEB); } ++void por(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xEB); } + void prefetchit0(const Address& addr) { opMR(addr, Reg32(7), T_0F, 0x18); } + void prefetchit1(const Address& addr) { opMR(addr, Reg32(6), T_0F, 0x18); } + void prefetchnta(const Address& addr) { opMR(addr, Reg32(0), T_0F, 0x18); } +@@ -854,66 +854,66 @@ void prefetcht1(const Address& addr) { opMR(addr, Reg32(2), T_0F, 0x18); } + void prefetcht2(const Address& addr) { opMR(addr, Reg32(3), T_0F, 0x18); } + void prefetchw(const Address& addr) { opMR(addr, Reg32(1), T_0F, 0x0D); } + void prefetchwt1(const Address& addr) { opMR(addr, Reg32(2), T_0F, 0x0D); } +-void psadbw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xF6); } +-void pshufb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x00, T_0F38, T_66); } +-void pshufd(const Mmx& mmx, const Operand& op, uint8_t imm8) { opMMX(mmx, op, 0x70, T_0F, T_66, imm8); } +-void pshufhw(const Mmx& mmx, const Operand& op, uint8_t imm8) { opMMX(mmx, op, 0x70, T_0F, T_F3, imm8); } +-void pshuflw(const Mmx& mmx, const Operand& op, uint8_t imm8) { opMMX(mmx, op, 0x70, T_0F, T_F2, imm8); } +-void pshufw(const Mmx& mmx, const Operand& op, uint8_t imm8) { opMMX(mmx, op, 0x70, T_0F, T_NONE, imm8); } +-void psignb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x08, T_0F38, T_66); } +-void psignd(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x0A, T_0F38, T_66); } +-void psignw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x09, T_0F38, T_66); } +-void pslld(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xF2); } +-void pslld(const Mmx& mmx, int imm8) { opMMX_IMM(mmx, imm8, 0x72, 6); } +-void pslldq(const Xmm& xmm, int imm8) { opMMX_IMM(xmm, imm8, 0x73, 7); } +-void psllq(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xF3); } +-void psllq(const Mmx& mmx, int imm8) { opMMX_IMM(mmx, imm8, 0x73, 6); } +-void psllw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xF1); } +-void psllw(const Mmx& mmx, int imm8) { opMMX_IMM(mmx, imm8, 0x71, 6); } +-void psrad(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xE2); } +-void psrad(const Mmx& mmx, int imm8) { opMMX_IMM(mmx, imm8, 0x72, 4); } +-void psraw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xE1); } +-void psraw(const Mmx& mmx, int imm8) { opMMX_IMM(mmx, imm8, 0x71, 4); } +-void psrld(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xD2); } +-void psrld(const Mmx& mmx, int imm8) { opMMX_IMM(mmx, imm8, 0x72, 2); } +-void psrldq(const Xmm& xmm, int imm8) { opMMX_IMM(xmm, imm8, 0x73, 3); } +-void psrlq(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xD3); } +-void psrlq(const Mmx& mmx, int imm8) { opMMX_IMM(mmx, imm8, 0x73, 2); } +-void psrlw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xD1); } +-void psrlw(const Mmx& mmx, int imm8) { opMMX_IMM(mmx, imm8, 0x71, 2); } +-void psubb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xF8); } +-void psubd(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xFA); } +-void psubq(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xFB); } +-void psubsb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xE8); } +-void psubsw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xE9); } +-void psubusb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xD8); } +-void psubusw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xD9); } +-void psubw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xF9); } +-void ptest(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38|T_YMM, 0x17, isXMM_XMMorMEM, NONE); } +-void punpckhbw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x68); } +-void punpckhdq(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x6A); } +-void punpckhqdq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F, 0x6D, isXMM_XMMorMEM); } +-void punpckhwd(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x69); } +-void punpcklbw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x60); } +-void punpckldq(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x62); } +-void punpcklqdq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F, 0x6C, isXMM_XMMorMEM); } +-void punpcklwd(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x61); } ++void psadbw(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xF6); } ++void pshufb(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0x00, T_0F38, T_66); } ++void pshufd(Mmx mmx, const Operand& op, uint8_t imm8) { opMMX(mmx, op, 0x70, T_0F, T_66, imm8); } ++void pshufhw(Mmx mmx, const Operand& op, uint8_t imm8) { opMMX(mmx, op, 0x70, T_0F, T_F3, imm8); } ++void pshuflw(Mmx mmx, const Operand& op, uint8_t imm8) { opMMX(mmx, op, 0x70, T_0F, T_F2, imm8); } ++void pshufw(Mmx mmx, const Operand& op, uint8_t imm8) { opMMX(mmx, op, 0x70, T_0F, T_NONE, imm8); } ++void psignb(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0x08, T_0F38, T_66); } ++void psignd(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0x0A, T_0F38, T_66); } ++void psignw(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0x09, T_0F38, T_66); } ++void pslld(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xF2); } ++void pslld(Mmx mmx, int imm8) { opMMX_IMM(mmx, imm8, 0x72, 6); } ++void pslldq(Xmm xmm, int imm8) { opMMX_IMM(xmm, imm8, 0x73, 7); } ++void psllq(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xF3); } ++void psllq(Mmx mmx, int imm8) { opMMX_IMM(mmx, imm8, 0x73, 6); } ++void psllw(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xF1); } ++void psllw(Mmx mmx, int imm8) { opMMX_IMM(mmx, imm8, 0x71, 6); } ++void psrad(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xE2); } ++void psrad(Mmx mmx, int imm8) { opMMX_IMM(mmx, imm8, 0x72, 4); } ++void psraw(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xE1); } ++void psraw(Mmx mmx, int imm8) { opMMX_IMM(mmx, imm8, 0x71, 4); } ++void psrld(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xD2); } ++void psrld(Mmx mmx, int imm8) { opMMX_IMM(mmx, imm8, 0x72, 2); } ++void psrldq(Xmm xmm, int imm8) { opMMX_IMM(xmm, imm8, 0x73, 3); } ++void psrlq(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xD3); } ++void psrlq(Mmx mmx, int imm8) { opMMX_IMM(mmx, imm8, 0x73, 2); } ++void psrlw(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xD1); } ++void psrlw(Mmx mmx, int imm8) { opMMX_IMM(mmx, imm8, 0x71, 2); } ++void psubb(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xF8); } ++void psubd(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xFA); } ++void psubq(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xFB); } ++void psubsb(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xE8); } ++void psubsw(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xE9); } ++void psubusb(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xD8); } ++void psubusw(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xD9); } ++void psubw(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xF9); } ++void ptest(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38|T_YMM, 0x17, isXMM_XMMorMEM, NONE); } ++void punpckhbw(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0x68); } ++void punpckhdq(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0x6A); } ++void punpckhqdq(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F, 0x6D, isXMM_XMMorMEM); } ++void punpckhwd(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0x69); } ++void punpcklbw(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0x60); } ++void punpckldq(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0x62); } ++void punpcklqdq(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F, 0x6C, isXMM_XMMorMEM); } ++void punpcklwd(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0x61); } + void pushf() { db(0x9C); } +-void pxor(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xEF); } +-void rcl(const Operand& op, const Reg8& _cl) { opShift(op, _cl, 2); } ++void pxor(Mmx mmx, const Operand& op) { opMMX(mmx, op, 0xEF); } ++void rcl(const Operand& op, Reg8 _cl) { opShift(op, _cl, 2); } + void rcl(const Operand& op, int imm) { opShift(op, imm, 2); } +-void rcl(const Reg& d, const Operand& op, const Reg8& _cl) { opShift(op, _cl, 2, &d); } +-void rcl(const Reg& d, const Operand& op, int imm) { opShift(op, imm, 2, &d); } +-void rcpps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x53, isXMM_XMMorMEM); } +-void rcpss(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F3, 0x53, isXMM_XMMorMEM); } +-void rcr(const Operand& op, const Reg8& _cl) { opShift(op, _cl, 3); } ++void rcl(Reg d, const Operand& op, Reg8 _cl) { opShift(op, _cl, 2, &d); } ++void rcl(Reg d, const Operand& op, int imm) { opShift(op, imm, 2, &d); } ++void rcpps(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x53, isXMM_XMMorMEM); } ++void rcpss(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F3, 0x53, isXMM_XMMorMEM); } ++void rcr(const Operand& op, Reg8 _cl) { opShift(op, _cl, 3); } + void rcr(const Operand& op, int imm) { opShift(op, imm, 3); } +-void rcr(const Reg& d, const Operand& op, const Reg8& _cl) { opShift(op, _cl, 3, &d); } +-void rcr(const Reg& d, const Operand& op, int imm) { opShift(op, imm, 3, &d); } ++void rcr(Reg d, const Operand& op, Reg8 _cl) { opShift(op, _cl, 3, &d); } ++void rcr(Reg d, const Operand& op, int imm) { opShift(op, imm, 3, &d); } + void rdmsr() { db(0x0F); db(0x32); } + void rdpmc() { db(0x0F); db(0x33); } +-void rdrand(const Reg& r) { if (r.isBit(8)) XBYAK_THROW(ERR_BAD_SIZE_OF_REGISTER) opRR(Reg(6, Operand::REG, r.getBit()), r, T_0F, 0xC7); } +-void rdseed(const Reg& r) { if (r.isBit(8)) XBYAK_THROW(ERR_BAD_SIZE_OF_REGISTER) opRR(Reg(7, Operand::REG, r.getBit()), r, T_0F, 0xC7); } ++void rdrand(Reg r) { if (r.isBit(8)) XBYAK_THROW(ERR_BAD_SIZE_OF_REGISTER) opRR(Reg(6, Operand::REG, r.getBit()), r, T_0F, 0xC7); } ++void rdseed(Reg r) { if (r.isBit(8)) XBYAK_THROW(ERR_BAD_SIZE_OF_REGISTER) opRR(Reg(7, Operand::REG, r.getBit()), r, T_0F, 0xC7); } + void rdtsc() { db(0x0F); db(0x31); } + void rdtscp() { db(0x0F); db(0x01); db(0xF9); } + void rep() { db(0xF3); } +@@ -923,35 +923,35 @@ void repnz() { db(0xF2); } + void repz() { db(0xF3); } + void ret(int imm = 0) { if (imm) { db(0xC2); dw(imm); } else { db(0xC3); } } + void retf(int imm = 0) { if (imm) { db(0xCA); dw(imm); } else { db(0xCB); } } +-void rol(const Operand& op, const Reg8& _cl) { opShift(op, _cl, 8); } ++void rol(const Operand& op, Reg8 _cl) { opShift(op, _cl, 8); } + void rol(const Operand& op, int imm) { opShift(op, imm, 8); } +-void rol(const Reg& d, const Operand& op, const Reg8& _cl) { opShift(op, _cl, 8, &d); } +-void rol(const Reg& d, const Operand& op, int imm) { opShift(op, imm, 8, &d); } +-void ror(const Operand& op, const Reg8& _cl) { opShift(op, _cl, 9); } ++void rol(Reg d, const Operand& op, Reg8 _cl) { opShift(op, _cl, 8, &d); } ++void rol(Reg d, const Operand& op, int imm) { opShift(op, imm, 8, &d); } ++void ror(const Operand& op, Reg8 _cl) { opShift(op, _cl, 9); } + void ror(const Operand& op, int imm) { opShift(op, imm, 9); } +-void ror(const Reg& d, const Operand& op, const Reg8& _cl) { opShift(op, _cl, 9, &d); } +-void ror(const Reg& d, const Operand& op, int imm) { opShift(op, imm, 9, &d); } +-void rorx(const Reg32e& r, const Operand& op, uint8_t imm) { opRRO(r, Reg32e(0, r.getBit()), op, T_0F3A|T_F2|T_APX, 0xF0, imm); } +-void roundpd(const Xmm& xmm, const Operand& op, uint8_t imm) { opSSE(xmm, op, T_66|T_0F3A|T_YMM, 0x09, isXMM_XMMorMEM, imm); } +-void roundps(const Xmm& xmm, const Operand& op, uint8_t imm) { opSSE(xmm, op, T_66|T_0F3A|T_YMM, 0x08, isXMM_XMMorMEM, imm); } +-void roundsd(const Xmm& xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x0B, isXMM_XMMorMEM, static_cast(imm)); } +-void roundss(const Xmm& xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x0A, isXMM_XMMorMEM, static_cast(imm)); } +-void rsqrtps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x52, isXMM_XMMorMEM); } +-void rsqrtss(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F3, 0x52, isXMM_XMMorMEM); } ++void ror(Reg d, const Operand& op, Reg8 _cl) { opShift(op, _cl, 9, &d); } ++void ror(Reg d, const Operand& op, int imm) { opShift(op, imm, 9, &d); } ++void rorx(Reg32e r, const Operand& op, uint8_t imm) { opRRO(r, Reg32e(0, r.getBit()), op, T_0F3A|T_F2|T_APX, 0xF0, imm); } ++void roundpd(Xmm xmm, const Operand& op, uint8_t imm) { opSSE(xmm, op, T_66|T_0F3A|T_YMM, 0x09, isXMM_XMMorMEM, imm); } ++void roundps(Xmm xmm, const Operand& op, uint8_t imm) { opSSE(xmm, op, T_66|T_0F3A|T_YMM, 0x08, isXMM_XMMorMEM, imm); } ++void roundsd(Xmm xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x0B, isXMM_XMMorMEM, static_cast(imm)); } ++void roundss(Xmm xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x0A, isXMM_XMMorMEM, static_cast(imm)); } ++void rsqrtps(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x52, isXMM_XMMorMEM); } ++void rsqrtss(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F3, 0x52, isXMM_XMMorMEM); } + void sahf() { db(0x9E); } +-void sal(const Operand& op, const Reg8& _cl) { opShift(op, _cl, 12); } ++void sal(const Operand& op, Reg8 _cl) { opShift(op, _cl, 12); } + void sal(const Operand& op, int imm) { opShift(op, imm, 12); } +-void sal(const Reg& d, const Operand& op, const Reg8& _cl) { opShift(op, _cl, 12, &d); } +-void sal(const Reg& d, const Operand& op, int imm) { opShift(op, imm, 12, &d); } +-void sar(const Operand& op, const Reg8& _cl) { opShift(op, _cl, 15); } ++void sal(Reg d, const Operand& op, Reg8 _cl) { opShift(op, _cl, 12, &d); } ++void sal(Reg d, const Operand& op, int imm) { opShift(op, imm, 12, &d); } ++void sar(const Operand& op, Reg8 _cl) { opShift(op, _cl, 15); } + void sar(const Operand& op, int imm) { opShift(op, imm, 15); } +-void sar(const Reg& d, const Operand& op, const Reg8& _cl) { opShift(op, _cl, 15, &d); } +-void sar(const Reg& d, const Operand& op, int imm) { opShift(op, imm, 15, &d); } +-void sarx(const Reg32e& r1, const Operand& op, const Reg32e& r2) { opRRO(r1, r2, op, T_APX|T_F3|T_0F38, 0xf7); } ++void sar(Reg d, const Operand& op, Reg8 _cl) { opShift(op, _cl, 15, &d); } ++void sar(Reg d, const Operand& op, int imm) { opShift(op, imm, 15, &d); } ++void sarx(Reg32e r1, const Operand& op, Reg32e r2) { opRRO(r1, r2, op, T_APX|T_F3|T_0F38, 0xf7); } + void sbb(const Operand& op, uint32_t imm) { opOI(op, imm, 0x18, 3); } + void sbb(const Operand& op1, const Operand& op2) { opRO_MR(op1, op2, 0x18); } +-void sbb(const Reg& d, const Operand& op, uint32_t imm) { opROI(d, op, imm, T_NONE, 3); } +-void sbb(const Reg& d, const Operand& op1, const Operand& op2) { opROO(d, op1, op2, T_NONE, 0x18); } ++void sbb(Reg d, const Operand& op, uint32_t imm) { opROI(d, op, imm, T_NONE, 3); } ++void sbb(Reg d, const Operand& op1, const Operand& op2) { opROO(d, op1, op2, T_NONE, 0x18); } + void scasb() { db(0xAE); } + void scasd() { db(0xAF); } + void scasw() { db(0x66); db(0xAF); } +@@ -987,37 +987,37 @@ void setpo(const Operand& op) { opSetCC(op, 11); }//-V524 + void sets(const Operand& op) { opSetCC(op, 8); }//-V524 + void setz(const Operand& op) { opSetCC(op, 4); }//-V524 + void sfence() { db(0x0F); db(0xAE); db(0xF8); } +-void sha1msg1(const Xmm& x, const Operand& op) { opSSE_APX(x, op, T_0F38, 0xC9, T_MUST_EVEX, 0xD9); } +-void sha1msg2(const Xmm& x, const Operand& op) { opSSE_APX(x, op, T_0F38, 0xCA, T_MUST_EVEX, 0xDA); } +-void sha1nexte(const Xmm& x, const Operand& op) { opSSE_APX(x, op, T_0F38, 0xC8, T_MUST_EVEX, 0xD8); } +-void sha1rnds4(const Xmm& x, const Operand& op, uint8_t imm) { opSSE_APX(x, op, T_0F3A, 0xCC, T_MUST_EVEX, 0xD4, imm); } +-void sha256msg1(const Xmm& x, const Operand& op) { opSSE_APX(x, op, T_0F38, 0xCC, T_MUST_EVEX, 0xDC); } +-void sha256msg2(const Xmm& x, const Operand& op) { opSSE_APX(x, op, T_0F38, 0xCD, T_MUST_EVEX, 0xDD); } +-void sha256rnds2(const Xmm& x, const Operand& op) { opSSE_APX(x, op, T_0F38, 0xCB, T_MUST_EVEX, 0xDB); } +-void shl(const Operand& op, const Reg8& _cl) { opShift(op, _cl, 12); } ++void sha1msg1(Xmm x, const Operand& op) { opSSE_APX(x, op, T_0F38, 0xC9, T_MUST_EVEX, 0xD9); } ++void sha1msg2(Xmm x, const Operand& op) { opSSE_APX(x, op, T_0F38, 0xCA, T_MUST_EVEX, 0xDA); } ++void sha1nexte(Xmm x, const Operand& op) { opSSE_APX(x, op, T_0F38, 0xC8, T_MUST_EVEX, 0xD8); } ++void sha1rnds4(Xmm x, const Operand& op, uint8_t imm) { opSSE_APX(x, op, T_0F3A, 0xCC, T_MUST_EVEX, 0xD4, imm); } ++void sha256msg1(Xmm x, const Operand& op) { opSSE_APX(x, op, T_0F38, 0xCC, T_MUST_EVEX, 0xDC); } ++void sha256msg2(Xmm x, const Operand& op) { opSSE_APX(x, op, T_0F38, 0xCD, T_MUST_EVEX, 0xDD); } ++void sha256rnds2(Xmm x, const Operand& op) { opSSE_APX(x, op, T_0F38, 0xCB, T_MUST_EVEX, 0xDB); } ++void shl(const Operand& op, Reg8 _cl) { opShift(op, _cl, 12); } + void shl(const Operand& op, int imm) { opShift(op, imm, 12); } +-void shl(const Reg& d, const Operand& op, const Reg8& _cl) { opShift(op, _cl, 12, &d); } +-void shl(const Reg& d, const Operand& op, int imm) { opShift(op, imm, 12, &d); } +-void shld(const Operand& op, const Reg& reg, const Reg8& _cl) { opShxd(Reg(), op, reg, 0, 0xA4, 0x24, &_cl); } +-void shld(const Operand& op, const Reg& reg, uint8_t imm) { opShxd(Reg(), op, reg, imm, 0xA4, 0x24); } +-void shld(const Reg& d, const Operand& op, const Reg& reg, const Reg8& _cl) { opShxd(d, op, reg, 0, 0xA4, 0x24, &_cl); } +-void shld(const Reg& d, const Operand& op, const Reg& reg, uint8_t imm) { opShxd(d, op, reg, imm, 0xA4, 0x24); } +-void shlx(const Reg32e& r1, const Operand& op, const Reg32e& r2) { opRRO(r1, r2, op, T_APX|T_66|T_0F38, 0xf7); } +-void shr(const Operand& op, const Reg8& _cl) { opShift(op, _cl, 13); } ++void shl(Reg d, const Operand& op, Reg8 _cl) { opShift(op, _cl, 12, &d); } ++void shl(Reg d, const Operand& op, int imm) { opShift(op, imm, 12, &d); } ++void shld(const Operand& op, Reg reg, Reg8 _cl) { opShxd(Reg(), op, reg, 0, 0xA4, 0x24, &_cl); } ++void shld(const Operand& op, Reg reg, uint8_t imm) { opShxd(Reg(), op, reg, imm, 0xA4, 0x24); } ++void shld(Reg d, const Operand& op, Reg reg, Reg8 _cl) { opShxd(d, op, reg, 0, 0xA4, 0x24, &_cl); } ++void shld(Reg d, const Operand& op, Reg reg, uint8_t imm) { opShxd(d, op, reg, imm, 0xA4, 0x24); } ++void shlx(Reg32e r1, const Operand& op, Reg32e r2) { opRRO(r1, r2, op, T_APX|T_66|T_0F38, 0xf7); } ++void shr(const Operand& op, Reg8 _cl) { opShift(op, _cl, 13); } + void shr(const Operand& op, int imm) { opShift(op, imm, 13); } +-void shr(const Reg& d, const Operand& op, const Reg8& _cl) { opShift(op, _cl, 13, &d); } +-void shr(const Reg& d, const Operand& op, int imm) { opShift(op, imm, 13, &d); } +-void shrd(const Operand& op, const Reg& reg, const Reg8& _cl) { opShxd(Reg(), op, reg, 0, 0xAC, 0x2C, &_cl); } +-void shrd(const Operand& op, const Reg& reg, uint8_t imm) { opShxd(Reg(), op, reg, imm, 0xAC, 0x2C); } +-void shrd(const Reg& d, const Operand& op, const Reg& reg, const Reg8& _cl) { opShxd(d, op, reg, 0, 0xAC, 0x2C, &_cl); } +-void shrd(const Reg& d, const Operand& op, const Reg& reg, uint8_t imm) { opShxd(d, op, reg, imm, 0xAC, 0x2C); } +-void shrx(const Reg32e& r1, const Operand& op, const Reg32e& r2) { opRRO(r1, r2, op, T_APX|T_F2|T_0F38, 0xf7); } +-void shufpd(const Xmm& xmm, const Operand& op, uint8_t imm8) { opSSE(xmm, op, T_0F | T_66, 0xC6, isXMM_XMMorMEM, imm8); } +-void shufps(const Xmm& xmm, const Operand& op, uint8_t imm8) { opSSE(xmm, op, T_0F, 0xC6, isXMM_XMMorMEM, imm8); } +-void sqrtpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x51, isXMM_XMMorMEM); } +-void sqrtps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x51, isXMM_XMMorMEM); } +-void sqrtsd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F2, 0x51, isXMM_XMMorMEM); } +-void sqrtss(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F3, 0x51, isXMM_XMMorMEM); } ++void shr(Reg d, const Operand& op, Reg8 _cl) { opShift(op, _cl, 13, &d); } ++void shr(Reg d, const Operand& op, int imm) { opShift(op, imm, 13, &d); } ++void shrd(const Operand& op, Reg reg, Reg8 _cl) { opShxd(Reg(), op, reg, 0, 0xAC, 0x2C, &_cl); } ++void shrd(const Operand& op, Reg reg, uint8_t imm) { opShxd(Reg(), op, reg, imm, 0xAC, 0x2C); } ++void shrd(Reg d, const Operand& op, Reg reg, Reg8 _cl) { opShxd(d, op, reg, 0, 0xAC, 0x2C, &_cl); } ++void shrd(Reg d, const Operand& op, Reg reg, uint8_t imm) { opShxd(d, op, reg, imm, 0xAC, 0x2C); } ++void shrx(Reg32e r1, const Operand& op, Reg32e r2) { opRRO(r1, r2, op, T_APX|T_F2|T_0F38, 0xf7); } ++void shufpd(Xmm xmm, const Operand& op, uint8_t imm8) { opSSE(xmm, op, T_0F | T_66, 0xC6, isXMM_XMMorMEM, imm8); } ++void shufps(Xmm xmm, const Operand& op, uint8_t imm8) { opSSE(xmm, op, T_0F, 0xC6, isXMM_XMMorMEM, imm8); } ++void sqrtpd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x51, isXMM_XMMorMEM); } ++void sqrtps(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x51, isXMM_XMMorMEM); } ++void sqrtsd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F2, 0x51, isXMM_XMMorMEM); } ++void sqrtss(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F3, 0x51, isXMM_XMMorMEM); } + void stac() { db(0x0F); db(0x01); db(0xCB); } + void stc() { db(0xF9); } + void std() { db(0xFD); } +@@ -1028,832 +1028,832 @@ void stosd() { db(0xAB); } + void stosw() { db(0x66); db(0xAB); } + void sub(const Operand& op, uint32_t imm) { opOI(op, imm, 0x28, 5); } + void sub(const Operand& op1, const Operand& op2) { opRO_MR(op1, op2, 0x28); } +-void sub(const Reg& d, const Operand& op, uint32_t imm) { opROI(d, op, imm, T_NF|T_CODE1_IF1, 5); } +-void sub(const Reg& d, const Operand& op1, const Operand& op2) { opROO(d, op1, op2, T_NF|T_CODE1_IF1, 0x28); } +-void subpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x5C, isXMM_XMMorMEM); } +-void subps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x5C, isXMM_XMMorMEM); } +-void subsd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F2, 0x5C, isXMM_XMMorMEM); } +-void subss(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F3, 0x5C, isXMM_XMMorMEM); } ++void sub(Reg d, const Operand& op, uint32_t imm) { opROI(d, op, imm, T_NF|T_CODE1_IF1, 5); } ++void sub(Reg d, const Operand& op1, const Operand& op2) { opROO(d, op1, op2, T_NF|T_CODE1_IF1, 0x28); } ++void subpd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x5C, isXMM_XMMorMEM); } ++void subps(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x5C, isXMM_XMMorMEM); } ++void subsd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F2, 0x5C, isXMM_XMMorMEM); } ++void subss(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F3, 0x5C, isXMM_XMMorMEM); } + void sysenter() { db(0x0F); db(0x34); } + void sysexit() { db(0x0F); db(0x35); } +-void tpause(const Reg32& r) { int idx = r.getIdx(); if (idx > 7) XBYAK_THROW(ERR_BAD_PARAMETER) db(0x66); db(0x0F); db(0xAE); setModRM(3, 6, idx); } +-void tzcnt(const Reg®, const Operand& op) { if (opROO(Reg(), op, reg, T_APX|T_NF, 0xF4)) return; opCnt(reg, op, 0xBC); } +-void ucomisd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F, 0x2E, isXMM_XMMorMEM); } +-void ucomiss(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x2E, isXMM_XMMorMEM); } ++void tpause(Reg32 r) { int idx = r.getIdx(); if (idx > 7) XBYAK_THROW(ERR_BAD_PARAMETER) db(0x66); db(0x0F); db(0xAE); setModRM(3, 6, idx); } ++void tzcnt(Reg reg, const Operand& op) { if (opROO(Reg(), op, reg, T_APX|T_NF, 0xF4)) return; opCnt(reg, op, 0xBC); } ++void ucomisd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F, 0x2E, isXMM_XMMorMEM); } ++void ucomiss(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x2E, isXMM_XMMorMEM); } + void ud2() { db(0x0F); db(0x0B); } +-void umonitor(const Reg& r) { int idx = r.getIdx(); if (idx > 7) XBYAK_THROW(ERR_BAD_PARAMETER) int bit = r.getBit(); if (BIT != bit) { if ((BIT == 32 && bit == 16) || (BIT == 64 && bit == 32)) { db(0x67); } else { XBYAK_THROW(ERR_BAD_SIZE_OF_REGISTER) } } db(0xF3); db(0x0F); db(0xAE); setModRM(3, 6, idx); } +-void umwait(const Reg32& r) { int idx = r.getIdx(); if (idx > 7) XBYAK_THROW(ERR_BAD_PARAMETER) db(0xF2); db(0x0F); db(0xAE); setModRM(3, 6, idx); } +-void unpckhpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x15, isXMM_XMMorMEM); } +-void unpckhps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x15, isXMM_XMMorMEM); } +-void unpcklpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x14, isXMM_XMMorMEM); } +-void unpcklps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x14, isXMM_XMMorMEM); } +-void vaddpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_ER_Z | T_B64, 0x58); } +-void vaddps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_W0 | T_YMM | T_EVEX | T_ER_Z | T_B32, 0x58); } +-void vaddsd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F2 | T_EW1 | T_EVEX | T_ER_X | T_N8, 0x58); } +-void vaddss(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F3 | T_W0 | T_EVEX | T_ER_X | T_N4, 0x58); } +-void vaddsubpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_66|T_0F|T_YMM, 0xD0); } +-void vaddsubps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_F2|T_0F|T_YMM, 0xD0); } +-void vaesdec(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_66|T_0F38|T_YMM|T_EVEX, 0xDE); } +-void vaesdeclast(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_66|T_0F38|T_YMM|T_EVEX, 0xDF); } +-void vaesenc(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_66|T_0F38|T_YMM|T_EVEX, 0xDC); } +-void vaesenclast(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_66|T_0F38|T_YMM|T_EVEX, 0xDD); } +-void vaesimc(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F38|T_W0, 0xDB); } +-void vaeskeygenassist(const Xmm& xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_66|T_0F3A, 0xDF, imm); } +-void vandnpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_B64, 0x55); } +-void vandnps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_W0 | T_YMM | T_EVEX | T_B32, 0x55); } +-void vandpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_B64, 0x54); } +-void vandps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_W0 | T_YMM | T_EVEX | T_B32, 0x54); } +-void vbcstnebf162ps(const Xmm& x, const Address& addr) { opVex(x, 0, addr, T_F3|T_0F38|T_W0|T_YMM|T_B16, 0xB1); } +-void vbcstnesh2ps(const Xmm& x, const Address& addr) { opVex(x, 0, addr, T_66|T_0F38|T_W0|T_YMM|T_B16, 0xB1); } +-void vblendpd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM, 0x0D, imm); } +-void vblendps(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM, 0x0C, imm); } +-void vblendvpd(const Xmm& x1, const Xmm& x2, const Operand& op, const Xmm& x4) { opAVX_X_X_XM(x1, x2, op, T_0F3A | T_66 | T_YMM, 0x4B, x4.getIdx() << 4); } +-void vblendvps(const Xmm& x1, const Xmm& x2, const Operand& op, const Xmm& x4) { opAVX_X_X_XM(x1, x2, op, T_0F3A | T_66 | T_YMM, 0x4A, x4.getIdx() << 4); } +-void vbroadcastf128(const Ymm& y, const Address& addr) { opAVX_X_XM_IMM(y, addr, T_0F38 | T_66 | T_W0 | T_YMM, 0x1A); } +-void vbroadcasti128(const Ymm& y, const Address& addr) { opAVX_X_XM_IMM(y, addr, T_0F38 | T_66 | T_W0 | T_YMM, 0x5A); } +-void vbroadcastsd(const Ymm& y, const Operand& op) { if (!op.isMEM() && !(y.isYMM() && op.isXMM()) && !(y.isZMM() && op.isXMM())) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_XM_IMM(y, op, T_0F38 | T_66 | T_W0 | T_YMM | T_EVEX | T_EW1 | T_N8, 0x19); } +-void vbroadcastss(const Xmm& x, const Operand& op) { if (!(op.isXMM() || op.isMEM())) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_XM_IMM(x, op, T_N4|T_66|T_0F38|T_W0|T_YMM|T_EVEX, 0x18); } +-void vcmpeq_ospd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 16); } +-void vcmpeq_osps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 16); } +-void vcmpeq_ossd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 16); } +-void vcmpeq_osss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 16); } +-void vcmpeq_uqpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 8); } +-void vcmpeq_uqps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 8); } +-void vcmpeq_uqsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 8); } +-void vcmpeq_uqss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 8); } +-void vcmpeq_uspd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 24); } +-void vcmpeq_usps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 24); } +-void vcmpeq_ussd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 24); } +-void vcmpeq_usss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 24); } +-void vcmpeqpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 0); } +-void vcmpeqps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 0); } +-void vcmpeqsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 0); } +-void vcmpeqss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 0); } +-void vcmpfalse_ospd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 27); } +-void vcmpfalse_osps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 27); } +-void vcmpfalse_ossd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 27); } +-void vcmpfalse_osss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 27); } +-void vcmpfalsepd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 11); } +-void vcmpfalseps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 11); } +-void vcmpfalsesd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 11); } +-void vcmpfalsess(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 11); } +-void vcmpge_oqpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 29); } +-void vcmpge_oqps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 29); } +-void vcmpge_oqsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 29); } +-void vcmpge_oqss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 29); } +-void vcmpgepd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 13); } +-void vcmpgeps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 13); } +-void vcmpgesd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 13); } +-void vcmpgess(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 13); } +-void vcmpgt_oqpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 30); } +-void vcmpgt_oqps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 30); } +-void vcmpgt_oqsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 30); } +-void vcmpgt_oqss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 30); } +-void vcmpgtpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 14); } +-void vcmpgtps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 14); } +-void vcmpgtsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 14); } +-void vcmpgtss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 14); } +-void vcmple_oqpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 18); } +-void vcmple_oqps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 18); } +-void vcmple_oqsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 18); } +-void vcmple_oqss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 18); } +-void vcmplepd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 2); } +-void vcmpleps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 2); } +-void vcmplesd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 2); } +-void vcmpless(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 2); } +-void vcmplt_oqpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 17); } +-void vcmplt_oqps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 17); } +-void vcmplt_oqsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 17); } +-void vcmplt_oqss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 17); } +-void vcmpltpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 1); } +-void vcmpltps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 1); } +-void vcmpltsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 1); } +-void vcmpltss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 1); } +-void vcmpneq_oqpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 12); } +-void vcmpneq_oqps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 12); } +-void vcmpneq_oqsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 12); } +-void vcmpneq_oqss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 12); } +-void vcmpneq_ospd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 28); } +-void vcmpneq_osps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 28); } +-void vcmpneq_ossd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 28); } +-void vcmpneq_osss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 28); } +-void vcmpneq_uspd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 20); } +-void vcmpneq_usps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 20); } +-void vcmpneq_ussd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 20); } +-void vcmpneq_usss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 20); } +-void vcmpneqpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 4); } +-void vcmpneqps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 4); } +-void vcmpneqsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 4); } +-void vcmpneqss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 4); } +-void vcmpnge_uqpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 25); } +-void vcmpnge_uqps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 25); } +-void vcmpnge_uqsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 25); } +-void vcmpnge_uqss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 25); } +-void vcmpngepd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 9); } +-void vcmpngeps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 9); } +-void vcmpngesd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 9); } +-void vcmpngess(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 9); } +-void vcmpngt_uqpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 26); } +-void vcmpngt_uqps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 26); } +-void vcmpngt_uqsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 26); } +-void vcmpngt_uqss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 26); } +-void vcmpngtpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 10); } +-void vcmpngtps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 10); } +-void vcmpngtsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 10); } +-void vcmpngtss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 10); } +-void vcmpnle_uqpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 22); } +-void vcmpnle_uqps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 22); } +-void vcmpnle_uqsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 22); } +-void vcmpnle_uqss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 22); } +-void vcmpnlepd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 6); } +-void vcmpnleps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 6); } +-void vcmpnlesd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 6); } +-void vcmpnless(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 6); } +-void vcmpnlt_uqpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 21); } +-void vcmpnlt_uqps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 21); } +-void vcmpnlt_uqsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 21); } +-void vcmpnlt_uqss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 21); } +-void vcmpnltpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 5); } +-void vcmpnltps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 5); } +-void vcmpnltsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 5); } +-void vcmpnltss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 5); } +-void vcmpord_spd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 23); } +-void vcmpord_sps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 23); } +-void vcmpord_ssd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 23); } +-void vcmpord_sss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 23); } +-void vcmpordpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 7); } +-void vcmpordps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 7); } +-void vcmpordsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 7); } +-void vcmpordss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 7); } +-void vcmppd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0xC2, imm); } +-void vcmpps(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_0F|T_YMM, 0xC2, imm); } +-void vcmpsd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_F2|T_0F, 0xC2, imm); } +-void vcmpss(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_F3|T_0F, 0xC2, imm); } +-void vcmptrue_uspd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 31); } +-void vcmptrue_usps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 31); } +-void vcmptrue_ussd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 31); } +-void vcmptrue_usss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 31); } +-void vcmptruepd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 15); } +-void vcmptrueps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 15); } +-void vcmptruesd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 15); } +-void vcmptruess(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 15); } +-void vcmpunord_spd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 19); } +-void vcmpunord_sps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 19); } +-void vcmpunord_ssd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 19); } +-void vcmpunord_sss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 19); } +-void vcmpunordpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 3); } +-void vcmpunordps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 3); } +-void vcmpunordsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 3); } +-void vcmpunordss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 3); } +-void vcomisd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N8|T_66|T_0F|T_EW1|T_EVEX|T_SAE_X, 0x2F); } +-void vcomiss(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N4|T_0F|T_W0|T_EVEX|T_SAE_X, 0x2F); } +-void vcvtdq2pd(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_0F | T_F3 | T_YMM | T_EVEX | T_W0 | T_B32 | T_N8 | T_N_VL, 0xE6); } +-void vcvtdq2ps(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_0F|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0x5B); } +-void vcvtneebf162ps(const Xmm& x, const Address& addr) { opVex(x, 0, addr, T_F3|T_0F38|T_W0|T_YMM, 0xB0); } +-void vcvtneeph2ps(const Xmm& x, const Address& addr) { opVex(x, 0, addr, T_66|T_0F38|T_W0|T_YMM, 0xB0); } +-void vcvtneobf162ps(const Xmm& x, const Address& addr) { opVex(x, 0, addr, T_F2|T_0F38|T_W0|T_YMM, 0xB0); } +-void vcvtneoph2ps(const Xmm& x, const Address& addr) { opVex(x, 0, addr, T_0F38|T_W0|T_YMM, 0xB0); } +-void vcvtneps2bf16(const Xmm& x, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opCvt2(x, op, T_F3|T_0F38|T_W0|T_YMM|T_SAE_Z|T_B32|orEvexIf(encoding, 0, T_MUST_EVEX, 0), 0x72); } +-void vcvtpd2dq(const Xmm& x, const Operand& op) { opCvt2(x, op, T_0F | T_F2 | T_YMM | T_EVEX | T_EW1 | T_B64 | T_ER_Z, 0xE6); } +-void vcvtpd2ps(const Xmm& x, const Operand& op) { opCvt2(x, op, T_0F | T_66 | T_YMM | T_EVEX | T_EW1 | T_B64 | T_ER_Z, 0x5A); } +-void vcvtph2ps(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_0F38 | T_66 | T_W0 | T_EVEX | T_N8 | T_N_VL | T_SAE_Y, 0x13); } +-void vcvtps2dq(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0x5B); } +-void vcvtps2pd(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_0F | T_YMM | T_EVEX | T_W0 | T_B32 | T_N8 | T_N_VL | T_SAE_Y, 0x5A); } +-void vcvtps2ph(const Operand& op, const Xmm& x, uint8_t imm) { checkCvt1(x, op); opVex(x, 0, op, T_0F3A | T_66 | T_W0 | T_EVEX | T_N8 | T_N_VL | T_SAE_Y | T_M_K, 0x1D, imm); } +-void vcvtsd2si(const Reg32& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, T_0F | T_F2 | T_W0 | T_EVEX | T_N4 | T_ER_X, 0x2D); } +-void vcvtsd2ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_F2|T_0F|T_EW1|T_EVEX|T_ER_X, 0x5A); } +-void vcvtsi2sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opCvt3(x1, x2, op, T_0F | T_F2 | T_EVEX, T_W1 | T_EW1 | T_ER_X | T_N8, T_W0 | T_N4, 0x2A); } +-void vcvtsi2ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opCvt3(x1, x2, op, T_0F | T_F3 | T_EVEX | T_ER_X, T_W1 | T_EW1 | T_N8, T_W0 | T_N4, 0x2A); } +-void vcvtss2sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_F3|T_0F|T_W0|T_EVEX|T_SAE_X, 0x5A); } +-void vcvtss2si(const Reg32& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, T_0F | T_F3 | T_W0 | T_EVEX | T_ER_X | T_N8, 0x2D); } +-void vcvttpd2dq(const Xmm& x, const Operand& op) { opCvt2(x, op, T_66 | T_0F | T_YMM | T_EVEX |T_EW1 | T_B64 | T_SAE_Z, 0xE6); } +-void vcvttps2dq(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_F3|T_0F|T_W0|T_YMM|T_EVEX|T_SAE_Z|T_B32, 0x5B); } +-void vcvttsd2si(const Reg32& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, T_0F | T_F2 | T_W0 | T_EVEX | T_N4 | T_SAE_X, 0x2C); } +-void vcvttss2si(const Reg32& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, T_0F | T_F3 | T_W0 | T_EVEX | T_SAE_X | T_N8, 0x2C); } +-void vdivpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_ER_Z | T_B64, 0x5E); } +-void vdivps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_W0 | T_YMM | T_EVEX | T_ER_Z | T_B32, 0x5E); } +-void vdivsd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F2 | T_EW1 | T_EVEX | T_ER_X | T_N8, 0x5E); } +-void vdivss(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F3 | T_W0 | T_EVEX | T_ER_X | T_N4, 0x5E); } +-void vdppd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0, 0x41, imm); } +-void vdpps(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM, 0x40, imm); } +-void vextractf128(const Operand& op, const Ymm& y, uint8_t imm) { if (!(op.isXMEM() && y.isYMM())) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(y, 0, op, T_0F3A | T_66 | T_W0 | T_YMM, 0x19, imm); } +-void vextracti128(const Operand& op, const Ymm& y, uint8_t imm) { if (!(op.isXMEM() && y.isYMM())) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(y, 0, op, T_0F3A | T_66 | T_W0 | T_YMM, 0x39, imm); } +-void vextractps(const Operand& op, const Xmm& x, uint8_t imm) { if (!((op.isREG(32) || op.isMEM()) && x.isXMM())) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(x, 0, op, T_0F3A | T_66 | T_W0 | T_EVEX | T_N4, 0x17, imm); } +-void vfmadd132pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0x98); } +-void vfmadd132ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0x98); } +-void vfmadd132sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0x99); } +-void vfmadd132ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EVEX|T_ER_X, 0x99); } +-void vfmadd213pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0xA8); } +-void vfmadd213ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0xA8); } +-void vfmadd213sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0xA9); } +-void vfmadd213ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EVEX|T_ER_X, 0xA9); } +-void vfmadd231pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0xB8); } +-void vfmadd231ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0xB8); } +-void vfmadd231sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0xB9); } +-void vfmadd231ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EVEX|T_ER_X, 0xB9); } +-void vfmaddsub132pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0x96); } +-void vfmaddsub132ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0x96); } +-void vfmaddsub213pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0xA6); } +-void vfmaddsub213ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0xA6); } +-void vfmaddsub231pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0xB6); } +-void vfmaddsub231ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0xB6); } +-void vfmsub132pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0x9A); } +-void vfmsub132ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0x9A); } +-void vfmsub132sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0x9B); } +-void vfmsub132ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EVEX|T_ER_X, 0x9B); } +-void vfmsub213pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0xAA); } +-void vfmsub213ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0xAA); } +-void vfmsub213sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0xAB); } +-void vfmsub213ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EVEX|T_ER_X, 0xAB); } +-void vfmsub231pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0xBA); } +-void vfmsub231ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0xBA); } +-void vfmsub231sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0xBB); } +-void vfmsub231ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EVEX|T_ER_X, 0xBB); } +-void vfmsubadd132pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0x97); } +-void vfmsubadd132ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0x97); } +-void vfmsubadd213pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0xA7); } +-void vfmsubadd213ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0xA7); } +-void vfmsubadd231pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0xB7); } +-void vfmsubadd231ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0xB7); } +-void vfnmadd132pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0x9C); } +-void vfnmadd132ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0x9C); } +-void vfnmadd132sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0x9D); } +-void vfnmadd132ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EVEX|T_ER_X, 0x9D); } +-void vfnmadd213pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0xAC); } +-void vfnmadd213ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0xAC); } +-void vfnmadd213sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0xAD); } +-void vfnmadd213ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EVEX|T_ER_X, 0xAD); } +-void vfnmadd231pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0xBC); } +-void vfnmadd231ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0xBC); } +-void vfnmadd231sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0xBD); } +-void vfnmadd231ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EVEX|T_ER_X, 0xBD); } +-void vfnmsub132pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0x9E); } +-void vfnmsub132ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0x9E); } +-void vfnmsub132sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0x9F); } +-void vfnmsub132ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EVEX|T_ER_X, 0x9F); } +-void vfnmsub213pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0xAE); } +-void vfnmsub213ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0xAE); } +-void vfnmsub213sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0xAF); } +-void vfnmsub213ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EVEX|T_ER_X, 0xAF); } +-void vfnmsub231pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0xBE); } +-void vfnmsub231ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0xBE); } +-void vfnmsub231sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0xBF); } +-void vfnmsub231ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EVEX|T_ER_X, 0xBF); } +-void vgatherdpd(const Xmm& x1, const Address& addr, const Xmm& x2) { opGather(x1, addr, x2, T_0F38 | T_66 | T_YMM | T_VSIB | T_W1, 0x92, 0); } +-void vgatherdps(const Xmm& x1, const Address& addr, const Xmm& x2) { opGather(x1, addr, x2, T_0F38 | T_66 | T_YMM | T_VSIB | T_W0, 0x92, 1); } +-void vgatherqpd(const Xmm& x1, const Address& addr, const Xmm& x2) { opGather(x1, addr, x2, T_0F38 | T_66 | T_YMM | T_VSIB | T_W1, 0x93, 1); } +-void vgatherqps(const Xmm& x1, const Address& addr, const Xmm& x2) { opGather(x1, addr, x2, T_0F38 | T_66 | T_YMM | T_VSIB | T_W0, 0x93, 2); } +-void vgf2p8affineinvqb(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W1|T_EW1|T_YMM|T_EVEX|T_SAE_Z|T_B64, 0xCF, imm); } +-void vgf2p8affineqb(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W1|T_EW1|T_YMM|T_EVEX|T_SAE_Z|T_B64, 0xCE, imm); } +-void vgf2p8mulb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_SAE_Z, 0xCF); } +-void vhaddpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_66|T_0F|T_YMM, 0x7C); } +-void vhaddps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_F2|T_0F|T_YMM, 0x7C); } +-void vhsubpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_66|T_0F|T_YMM, 0x7D); } +-void vhsubps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_F2|T_0F|T_YMM, 0x7D); } +-void vinsertf128(const Ymm& y1, const Ymm& y2, const Operand& op, uint8_t imm) { if (!(y1.isYMM() && y2.isYMM() && op.isXMEM())) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(y1, &y2, op, T_0F3A | T_66 | T_W0 | T_YMM, 0x18, imm); } +-void vinserti128(const Ymm& y1, const Ymm& y2, const Operand& op, uint8_t imm) { if (!(y1.isYMM() && y2.isYMM() && op.isXMEM())) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(y1, &y2, op, T_0F3A | T_66 | T_W0 | T_YMM, 0x38, imm); } +-void vinsertps(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F3A|T_W0|T_EVEX, 0x21, imm); } +-void vlddqu(const Xmm& x, const Address& addr) { opAVX_X_X_XM(x, cvtIdx0(x), addr, T_0F | T_F2 | T_W0 | T_YMM, 0xF0); } ++void umonitor(Reg r) { int idx = r.getIdx(); if (idx > 7) XBYAK_THROW(ERR_BAD_PARAMETER) int bit = r.getBit(); if (BIT != bit) { if ((BIT == 32 && bit == 16) || (BIT == 64 && bit == 32)) { db(0x67); } else { XBYAK_THROW(ERR_BAD_SIZE_OF_REGISTER) } } db(0xF3); db(0x0F); db(0xAE); setModRM(3, 6, idx); } ++void umwait(Reg32 r) { int idx = r.getIdx(); if (idx > 7) XBYAK_THROW(ERR_BAD_PARAMETER) db(0xF2); db(0x0F); db(0xAE); setModRM(3, 6, idx); } ++void unpckhpd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x15, isXMM_XMMorMEM); } ++void unpckhps(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x15, isXMM_XMMorMEM); } ++void unpcklpd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x14, isXMM_XMMorMEM); } ++void unpcklps(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x14, isXMM_XMMorMEM); } ++void vaddpd(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_ER_Z | T_B64, 0x58); } ++void vaddps(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_W0 | T_YMM | T_EVEX | T_ER_Z | T_B32, 0x58); } ++void vaddsd(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F2 | T_EW1 | T_EVEX | T_ER_X | T_N8, 0x58); } ++void vaddss(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F3 | T_W0 | T_EVEX | T_ER_X | T_N4, 0x58); } ++void vaddsubpd(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_66|T_0F|T_YMM, 0xD0); } ++void vaddsubps(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_F2|T_0F|T_YMM, 0xD0); } ++void vaesdec(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_66|T_0F38|T_YMM|T_EVEX, 0xDE); } ++void vaesdeclast(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_66|T_0F38|T_YMM|T_EVEX, 0xDF); } ++void vaesenc(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_66|T_0F38|T_YMM|T_EVEX, 0xDC); } ++void vaesenclast(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_66|T_0F38|T_YMM|T_EVEX, 0xDD); } ++void vaesimc(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F38|T_W0, 0xDB); } ++void vaeskeygenassist(Xmm xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_66|T_0F3A, 0xDF, imm); } ++void vandnpd(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_B64, 0x55); } ++void vandnps(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_W0 | T_YMM | T_EVEX | T_B32, 0x55); } ++void vandpd(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_B64, 0x54); } ++void vandps(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_W0 | T_YMM | T_EVEX | T_B32, 0x54); } ++void vbcstnebf162ps(Xmm x, const Address& addr) { opVex(x, 0, addr, T_F3|T_0F38|T_W0|T_YMM|T_B16, 0xB1); } ++void vbcstnesh2ps(Xmm x, const Address& addr) { opVex(x, 0, addr, T_66|T_0F38|T_W0|T_YMM|T_B16, 0xB1); } ++void vblendpd(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM, 0x0D, imm); } ++void vblendps(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM, 0x0C, imm); } ++void vblendvpd(Xmm x1, Xmm x2, const Operand& op, Xmm x4) { opAVX_X_X_XM(x1, x2, op, T_0F3A | T_66 | T_YMM, 0x4B, x4.getIdx() << 4); } ++void vblendvps(Xmm x1, Xmm x2, const Operand& op, Xmm x4) { opAVX_X_X_XM(x1, x2, op, T_0F3A | T_66 | T_YMM, 0x4A, x4.getIdx() << 4); } ++void vbroadcastf128(Ymm y, const Address& addr) { opAVX_X_XM_IMM(y, addr, T_0F38 | T_66 | T_W0 | T_YMM, 0x1A); } ++void vbroadcasti128(Ymm y, const Address& addr) { opAVX_X_XM_IMM(y, addr, T_0F38 | T_66 | T_W0 | T_YMM, 0x5A); } ++void vbroadcastsd(Ymm y, const Operand& op) { if (!op.isMEM() && !(y.isYMM() && op.isXMM()) && !(y.isZMM() && op.isXMM())) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_XM_IMM(y, op, T_0F38 | T_66 | T_W0 | T_YMM | T_EVEX | T_EW1 | T_N8, 0x19); } ++void vbroadcastss(Xmm x, const Operand& op) { if (!(op.isXMM() || op.isMEM())) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_XM_IMM(x, op, T_N4|T_66|T_0F38|T_W0|T_YMM|T_EVEX, 0x18); } ++void vcmpeq_ospd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 16); } ++void vcmpeq_osps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 16); } ++void vcmpeq_ossd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 16); } ++void vcmpeq_osss(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 16); } ++void vcmpeq_uqpd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 8); } ++void vcmpeq_uqps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 8); } ++void vcmpeq_uqsd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 8); } ++void vcmpeq_uqss(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 8); } ++void vcmpeq_uspd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 24); } ++void vcmpeq_usps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 24); } ++void vcmpeq_ussd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 24); } ++void vcmpeq_usss(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 24); } ++void vcmpeqpd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 0); } ++void vcmpeqps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 0); } ++void vcmpeqsd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 0); } ++void vcmpeqss(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 0); } ++void vcmpfalse_ospd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 27); } ++void vcmpfalse_osps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 27); } ++void vcmpfalse_ossd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 27); } ++void vcmpfalse_osss(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 27); } ++void vcmpfalsepd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 11); } ++void vcmpfalseps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 11); } ++void vcmpfalsesd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 11); } ++void vcmpfalsess(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 11); } ++void vcmpge_oqpd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 29); } ++void vcmpge_oqps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 29); } ++void vcmpge_oqsd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 29); } ++void vcmpge_oqss(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 29); } ++void vcmpgepd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 13); } ++void vcmpgeps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 13); } ++void vcmpgesd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 13); } ++void vcmpgess(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 13); } ++void vcmpgt_oqpd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 30); } ++void vcmpgt_oqps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 30); } ++void vcmpgt_oqsd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 30); } ++void vcmpgt_oqss(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 30); } ++void vcmpgtpd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 14); } ++void vcmpgtps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 14); } ++void vcmpgtsd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 14); } ++void vcmpgtss(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 14); } ++void vcmple_oqpd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 18); } ++void vcmple_oqps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 18); } ++void vcmple_oqsd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 18); } ++void vcmple_oqss(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 18); } ++void vcmplepd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 2); } ++void vcmpleps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 2); } ++void vcmplesd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 2); } ++void vcmpless(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 2); } ++void vcmplt_oqpd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 17); } ++void vcmplt_oqps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 17); } ++void vcmplt_oqsd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 17); } ++void vcmplt_oqss(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 17); } ++void vcmpltpd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 1); } ++void vcmpltps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 1); } ++void vcmpltsd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 1); } ++void vcmpltss(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 1); } ++void vcmpneq_oqpd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 12); } ++void vcmpneq_oqps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 12); } ++void vcmpneq_oqsd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 12); } ++void vcmpneq_oqss(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 12); } ++void vcmpneq_ospd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 28); } ++void vcmpneq_osps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 28); } ++void vcmpneq_ossd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 28); } ++void vcmpneq_osss(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 28); } ++void vcmpneq_uspd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 20); } ++void vcmpneq_usps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 20); } ++void vcmpneq_ussd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 20); } ++void vcmpneq_usss(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 20); } ++void vcmpneqpd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 4); } ++void vcmpneqps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 4); } ++void vcmpneqsd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 4); } ++void vcmpneqss(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 4); } ++void vcmpnge_uqpd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 25); } ++void vcmpnge_uqps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 25); } ++void vcmpnge_uqsd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 25); } ++void vcmpnge_uqss(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 25); } ++void vcmpngepd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 9); } ++void vcmpngeps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 9); } ++void vcmpngesd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 9); } ++void vcmpngess(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 9); } ++void vcmpngt_uqpd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 26); } ++void vcmpngt_uqps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 26); } ++void vcmpngt_uqsd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 26); } ++void vcmpngt_uqss(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 26); } ++void vcmpngtpd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 10); } ++void vcmpngtps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 10); } ++void vcmpngtsd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 10); } ++void vcmpngtss(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 10); } ++void vcmpnle_uqpd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 22); } ++void vcmpnle_uqps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 22); } ++void vcmpnle_uqsd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 22); } ++void vcmpnle_uqss(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 22); } ++void vcmpnlepd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 6); } ++void vcmpnleps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 6); } ++void vcmpnlesd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 6); } ++void vcmpnless(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 6); } ++void vcmpnlt_uqpd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 21); } ++void vcmpnlt_uqps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 21); } ++void vcmpnlt_uqsd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 21); } ++void vcmpnlt_uqss(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 21); } ++void vcmpnltpd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 5); } ++void vcmpnltps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 5); } ++void vcmpnltsd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 5); } ++void vcmpnltss(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 5); } ++void vcmpord_spd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 23); } ++void vcmpord_sps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 23); } ++void vcmpord_ssd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 23); } ++void vcmpord_sss(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 23); } ++void vcmpordpd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 7); } ++void vcmpordps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 7); } ++void vcmpordsd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 7); } ++void vcmpordss(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 7); } ++void vcmppd(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0xC2, imm); } ++void vcmpps(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_0F|T_YMM, 0xC2, imm); } ++void vcmpsd(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_F2|T_0F, 0xC2, imm); } ++void vcmpss(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_F3|T_0F, 0xC2, imm); } ++void vcmptrue_uspd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 31); } ++void vcmptrue_usps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 31); } ++void vcmptrue_ussd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 31); } ++void vcmptrue_usss(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 31); } ++void vcmptruepd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 15); } ++void vcmptrueps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 15); } ++void vcmptruesd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 15); } ++void vcmptruess(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 15); } ++void vcmpunord_spd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 19); } ++void vcmpunord_sps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 19); } ++void vcmpunord_ssd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 19); } ++void vcmpunord_sss(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 19); } ++void vcmpunordpd(Xmm x1, Xmm x2, const Operand& op) { vcmppd(x1, x2, op, 3); } ++void vcmpunordps(Xmm x1, Xmm x2, const Operand& op) { vcmpps(x1, x2, op, 3); } ++void vcmpunordsd(Xmm x1, Xmm x2, const Operand& op) { vcmpsd(x1, x2, op, 3); } ++void vcmpunordss(Xmm x1, Xmm x2, const Operand& op) { vcmpss(x1, x2, op, 3); } ++void vcomisd(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N8|T_66|T_0F|T_EW1|T_EVEX|T_SAE_X, 0x2F); } ++void vcomiss(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N4|T_0F|T_W0|T_EVEX|T_SAE_X, 0x2F); } ++void vcvtdq2pd(Xmm x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_0F | T_F3 | T_YMM | T_EVEX | T_W0 | T_B32 | T_N8 | T_N_VL, 0xE6); } ++void vcvtdq2ps(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_0F|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0x5B); } ++void vcvtneebf162ps(Xmm x, const Address& addr) { opVex(x, 0, addr, T_F3|T_0F38|T_W0|T_YMM, 0xB0); } ++void vcvtneeph2ps(Xmm x, const Address& addr) { opVex(x, 0, addr, T_66|T_0F38|T_W0|T_YMM, 0xB0); } ++void vcvtneobf162ps(Xmm x, const Address& addr) { opVex(x, 0, addr, T_F2|T_0F38|T_W0|T_YMM, 0xB0); } ++void vcvtneoph2ps(Xmm x, const Address& addr) { opVex(x, 0, addr, T_0F38|T_W0|T_YMM, 0xB0); } ++void vcvtneps2bf16(Xmm x, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opCvt2(x, op, T_F3|T_0F38|T_W0|T_YMM|T_SAE_Z|T_B32|orEvexIf(encoding, 0, T_MUST_EVEX, 0), 0x72); } ++void vcvtpd2dq(Xmm x, const Operand& op) { opCvt2(x, op, T_0F | T_F2 | T_YMM | T_EVEX | T_EW1 | T_B64 | T_ER_Z, 0xE6); } ++void vcvtpd2ps(Xmm x, const Operand& op) { opCvt2(x, op, T_0F | T_66 | T_YMM | T_EVEX | T_EW1 | T_B64 | T_ER_Z, 0x5A); } ++void vcvtph2ps(Xmm x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_0F38 | T_66 | T_W0 | T_EVEX | T_N8 | T_N_VL | T_SAE_Y, 0x13); } ++void vcvtps2dq(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0x5B); } ++void vcvtps2pd(Xmm x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_0F | T_YMM | T_EVEX | T_W0 | T_B32 | T_N8 | T_N_VL | T_SAE_Y, 0x5A); } ++void vcvtps2ph(const Operand& op, Xmm x, uint8_t imm) { checkCvt1(x, op); opVex(x, 0, op, T_0F3A | T_66 | T_W0 | T_EVEX | T_N8 | T_N_VL | T_SAE_Y | T_M_K, 0x1D, imm); } ++void vcvtsd2si(Reg32 r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, T_0F | T_F2 | T_W0 | T_EVEX | T_N4 | T_ER_X, 0x2D); } ++void vcvtsd2ss(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_F2|T_0F|T_EW1|T_EVEX|T_ER_X, 0x5A); } ++void vcvtsi2sd(Xmm x1, Xmm x2, const Operand& op) { opCvt3(x1, x2, op, T_0F | T_F2 | T_EVEX, T_W1 | T_EW1 | T_ER_X | T_N8, T_W0 | T_N4, 0x2A); } ++void vcvtsi2ss(Xmm x1, Xmm x2, const Operand& op) { opCvt3(x1, x2, op, T_0F | T_F3 | T_EVEX | T_ER_X, T_W1 | T_EW1 | T_N8, T_W0 | T_N4, 0x2A); } ++void vcvtss2sd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_F3|T_0F|T_W0|T_EVEX|T_SAE_X, 0x5A); } ++void vcvtss2si(Reg32 r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, T_0F | T_F3 | T_W0 | T_EVEX | T_ER_X | T_N8, 0x2D); } ++void vcvttpd2dq(Xmm x, const Operand& op) { opCvt2(x, op, T_66 | T_0F | T_YMM | T_EVEX |T_EW1 | T_B64 | T_SAE_Z, 0xE6); } ++void vcvttps2dq(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_F3|T_0F|T_W0|T_YMM|T_EVEX|T_SAE_Z|T_B32, 0x5B); } ++void vcvttsd2si(Reg32 r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, T_0F | T_F2 | T_W0 | T_EVEX | T_N4 | T_SAE_X, 0x2C); } ++void vcvttss2si(Reg32 r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, T_0F | T_F3 | T_W0 | T_EVEX | T_SAE_X | T_N8, 0x2C); } ++void vdivpd(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_ER_Z | T_B64, 0x5E); } ++void vdivps(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_W0 | T_YMM | T_EVEX | T_ER_Z | T_B32, 0x5E); } ++void vdivsd(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F2 | T_EW1 | T_EVEX | T_ER_X | T_N8, 0x5E); } ++void vdivss(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F3 | T_W0 | T_EVEX | T_ER_X | T_N4, 0x5E); } ++void vdppd(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0, 0x41, imm); } ++void vdpps(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM, 0x40, imm); } ++void vextractf128(const Operand& op, Ymm y, uint8_t imm) { if (!(op.isXMEM() && y.isYMM())) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(y, 0, op, T_0F3A | T_66 | T_W0 | T_YMM, 0x19, imm); } ++void vextracti128(const Operand& op, Ymm y, uint8_t imm) { if (!(op.isXMEM() && y.isYMM())) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(y, 0, op, T_0F3A | T_66 | T_W0 | T_YMM, 0x39, imm); } ++void vextractps(const Operand& op, Xmm x, uint8_t imm) { if (!((op.isREG(32) || op.isMEM()) && x.isXMM())) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(x, 0, op, T_0F3A | T_66 | T_W0 | T_EVEX | T_N4, 0x17, imm); } ++void vfmadd132pd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0x98); } ++void vfmadd132ps(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0x98); } ++void vfmadd132sd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0x99); } ++void vfmadd132ss(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EVEX|T_ER_X, 0x99); } ++void vfmadd213pd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0xA8); } ++void vfmadd213ps(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0xA8); } ++void vfmadd213sd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0xA9); } ++void vfmadd213ss(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EVEX|T_ER_X, 0xA9); } ++void vfmadd231pd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0xB8); } ++void vfmadd231ps(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0xB8); } ++void vfmadd231sd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0xB9); } ++void vfmadd231ss(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EVEX|T_ER_X, 0xB9); } ++void vfmaddsub132pd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0x96); } ++void vfmaddsub132ps(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0x96); } ++void vfmaddsub213pd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0xA6); } ++void vfmaddsub213ps(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0xA6); } ++void vfmaddsub231pd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0xB6); } ++void vfmaddsub231ps(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0xB6); } ++void vfmsub132pd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0x9A); } ++void vfmsub132ps(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0x9A); } ++void vfmsub132sd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0x9B); } ++void vfmsub132ss(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EVEX|T_ER_X, 0x9B); } ++void vfmsub213pd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0xAA); } ++void vfmsub213ps(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0xAA); } ++void vfmsub213sd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0xAB); } ++void vfmsub213ss(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EVEX|T_ER_X, 0xAB); } ++void vfmsub231pd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0xBA); } ++void vfmsub231ps(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0xBA); } ++void vfmsub231sd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0xBB); } ++void vfmsub231ss(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EVEX|T_ER_X, 0xBB); } ++void vfmsubadd132pd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0x97); } ++void vfmsubadd132ps(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0x97); } ++void vfmsubadd213pd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0xA7); } ++void vfmsubadd213ps(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0xA7); } ++void vfmsubadd231pd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0xB7); } ++void vfmsubadd231ps(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0xB7); } ++void vfnmadd132pd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0x9C); } ++void vfnmadd132ps(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0x9C); } ++void vfnmadd132sd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0x9D); } ++void vfnmadd132ss(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EVEX|T_ER_X, 0x9D); } ++void vfnmadd213pd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0xAC); } ++void vfnmadd213ps(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0xAC); } ++void vfnmadd213sd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0xAD); } ++void vfnmadd213ss(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EVEX|T_ER_X, 0xAD); } ++void vfnmadd231pd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0xBC); } ++void vfnmadd231ps(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0xBC); } ++void vfnmadd231sd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0xBD); } ++void vfnmadd231ss(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EVEX|T_ER_X, 0xBD); } ++void vfnmsub132pd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0x9E); } ++void vfnmsub132ps(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0x9E); } ++void vfnmsub132sd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0x9F); } ++void vfnmsub132ss(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EVEX|T_ER_X, 0x9F); } ++void vfnmsub213pd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0xAE); } ++void vfnmsub213ps(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0xAE); } ++void vfnmsub213sd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0xAF); } ++void vfnmsub213ss(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EVEX|T_ER_X, 0xAF); } ++void vfnmsub231pd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0xBE); } ++void vfnmsub231ps(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0xBE); } ++void vfnmsub231sd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0xBF); } ++void vfnmsub231ss(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EVEX|T_ER_X, 0xBF); } ++void vgatherdpd(Xmm x1, const Address& addr, Xmm x2) { opGather(x1, addr, x2, T_0F38 | T_66 | T_YMM | T_VSIB | T_W1, 0x92, 0); } ++void vgatherdps(Xmm x1, const Address& addr, Xmm x2) { opGather(x1, addr, x2, T_0F38 | T_66 | T_YMM | T_VSIB | T_W0, 0x92, 1); } ++void vgatherqpd(Xmm x1, const Address& addr, Xmm x2) { opGather(x1, addr, x2, T_0F38 | T_66 | T_YMM | T_VSIB | T_W1, 0x93, 1); } ++void vgatherqps(Xmm x1, const Address& addr, Xmm x2) { opGather(x1, addr, x2, T_0F38 | T_66 | T_YMM | T_VSIB | T_W0, 0x93, 2); } ++void vgf2p8affineinvqb(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W1|T_EW1|T_YMM|T_EVEX|T_SAE_Z|T_B64, 0xCF, imm); } ++void vgf2p8affineqb(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W1|T_EW1|T_YMM|T_EVEX|T_SAE_Z|T_B64, 0xCE, imm); } ++void vgf2p8mulb(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_SAE_Z, 0xCF); } ++void vhaddpd(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_66|T_0F|T_YMM, 0x7C); } ++void vhaddps(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_F2|T_0F|T_YMM, 0x7C); } ++void vhsubpd(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_66|T_0F|T_YMM, 0x7D); } ++void vhsubps(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_F2|T_0F|T_YMM, 0x7D); } ++void vinsertf128(Ymm y1, Ymm y2, const Operand& op, uint8_t imm) { if (!(y1.isYMM() && y2.isYMM() && op.isXMEM())) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(y1, &y2, op, T_0F3A | T_66 | T_W0 | T_YMM, 0x18, imm); } ++void vinserti128(Ymm y1, Ymm y2, const Operand& op, uint8_t imm) { if (!(y1.isYMM() && y2.isYMM() && op.isXMEM())) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(y1, &y2, op, T_0F3A | T_66 | T_W0 | T_YMM, 0x38, imm); } ++void vinsertps(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F3A|T_W0|T_EVEX, 0x21, imm); } ++void vlddqu(Xmm x, const Address& addr) { opAVX_X_X_XM(x, cvtIdx0(x), addr, T_0F | T_F2 | T_W0 | T_YMM, 0xF0); } + void vldmxcsr(const Address& addr) { opAVX_X_X_XM(xm2, xm0, addr, T_0F, 0xAE); } +-void vmaskmovdqu(const Xmm& x1, const Xmm& x2) { opAVX_X_X_XM(x1, xm0, x2, T_0F | T_66, 0xF7); } +-void vmaskmovpd(const Address& addr, const Xmm& x1, const Xmm& x2) { opAVX_X_X_XM(x2, x1, addr, T_0F38 | T_66 | T_W0 | T_YMM, 0x2F); } +-void vmaskmovpd(const Xmm& x1, const Xmm& x2, const Address& addr) { opAVX_X_X_XM(x1, x2, addr, T_0F38 | T_66 | T_W0 | T_YMM, 0x2D); } +-void vmaskmovps(const Address& addr, const Xmm& x1, const Xmm& x2) { opAVX_X_X_XM(x2, x1, addr, T_0F38 | T_66 | T_W0 | T_YMM, 0x2E); } +-void vmaskmovps(const Xmm& x1, const Xmm& x2, const Address& addr) { opAVX_X_X_XM(x1, x2, addr, T_0F38 | T_66 | T_W0 | T_YMM, 0x2C); } +-void vmaxpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_SAE_Z | T_B64, 0x5F); } +-void vmaxps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_W0 | T_YMM | T_EVEX | T_SAE_Z | T_B32, 0x5F); } +-void vmaxsd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F2 | T_EW1 | T_EVEX | T_SAE_X | T_N8, 0x5F); } +-void vmaxss(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F3 | T_W0 | T_EVEX | T_SAE_X | T_N4, 0x5F); } +-void vminpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_SAE_Z | T_B64, 0x5D); } +-void vminps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_W0 | T_YMM | T_EVEX | T_SAE_Z | T_B32, 0x5D); } +-void vminsd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F2 | T_EW1 | T_EVEX | T_SAE_X | T_N8, 0x5D); } +-void vminss(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F3 | T_W0 | T_EVEX | T_SAE_X | T_N4, 0x5D); } +-void vmovapd(const Address& addr, const Xmm& xmm) { opAVX_X_XM_IMM(xmm, addr, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_M_K, 0x29); } +-void vmovapd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX, 0x28); } +-void vmovaps(const Address& addr, const Xmm& xmm) { opAVX_X_XM_IMM(xmm, addr, T_0F|T_W0|T_YMM|T_EVEX|T_M_K, 0x29); } +-void vmovaps(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_0F|T_W0|T_YMM|T_EVEX, 0x28); } +-void vmovddup(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_DUP|T_F2|T_0F|T_EW1|T_YMM|T_EVEX, 0x12); } +-void vmovdqa(const Address& addr, const Xmm& xmm) { opAVX_X_XM_IMM(xmm, addr, T_66|T_0F|T_YMM, 0x7F); } +-void vmovdqa(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F|T_YMM, 0x6F); } +-void vmovdqu(const Address& addr, const Xmm& xmm) { opAVX_X_XM_IMM(xmm, addr, T_F3|T_0F|T_YMM, 0x7F); } +-void vmovdqu(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_F3|T_0F|T_YMM, 0x6F); } +-void vmovhlps(const Xmm& x1, const Xmm& x2, const Operand& op = Operand()) { if (!op.isNone() && !op.isXMM()) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x1, x2, op, T_0F | T_EVEX | T_W0, 0x12); } +-void vmovhpd(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, xm0, addr, T_N8|T_66|T_0F|T_EW1|T_EVEX, 0x17); } +-void vmovhpd(const Xmm& x, const Operand& op1, const Operand& op2 = Operand()) { if (!op2.isNone() && !op2.isMEM()) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x, op1, op2, T_N8|T_66|T_0F|T_EW1|T_EVEX, 0x16); } +-void vmovhps(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, xm0, addr, T_N8|T_0F|T_W0|T_EVEX, 0x17); } +-void vmovhps(const Xmm& x, const Operand& op1, const Operand& op2 = Operand()) { if (!op2.isNone() && !op2.isMEM()) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x, op1, op2, T_N8|T_0F|T_W0|T_EVEX, 0x16); } +-void vmovlhps(const Xmm& x1, const Xmm& x2, const Operand& op = Operand()) { if (!op.isNone() && !op.isXMM()) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x1, x2, op, T_0F | T_EVEX | T_W0, 0x16); } +-void vmovlpd(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, xm0, addr, T_N8|T_66|T_0F|T_EW1|T_EVEX, 0x13); } +-void vmovlpd(const Xmm& x, const Operand& op1, const Operand& op2 = Operand()) { if (!op2.isNone() && !op2.isMEM()) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x, op1, op2, T_N8|T_66|T_0F|T_EW1|T_EVEX, 0x12); } +-void vmovlps(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, xm0, addr, T_N8|T_0F|T_W0|T_EVEX, 0x13); } +-void vmovlps(const Xmm& x, const Operand& op1, const Operand& op2 = Operand()) { if (!op2.isNone() && !op2.isMEM()) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x, op1, op2, T_N8|T_0F|T_W0|T_EVEX, 0x12); } +-void vmovmskpd(const Reg& r, const Xmm& x) { if (!r.isBit(i32e)) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x.isXMM() ? Xmm(r.getIdx()) : Ymm(r.getIdx()), cvtIdx0(x), x, T_0F | T_66 | T_W0 | T_YMM, 0x50); } +-void vmovmskps(const Reg& r, const Xmm& x) { if (!r.isBit(i32e)) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x.isXMM() ? Xmm(r.getIdx()) : Ymm(r.getIdx()), cvtIdx0(x), x, T_0F | T_W0 | T_YMM, 0x50); } +-void vmovntdq(const Address& addr, const Xmm& x) { opVex(x, 0, addr, T_0F | T_66 | T_YMM | T_EVEX | T_W0, 0xE7); } +-void vmovntdqa(const Xmm& x, const Address& addr) { opVex(x, 0, addr, T_0F38 | T_66 | T_YMM | T_EVEX | T_W0, 0x2A); } +-void vmovntpd(const Address& addr, const Xmm& x) { opVex(x, 0, addr, T_0F | T_66 | T_YMM | T_EVEX | T_EW1, 0x2B); } +-void vmovntps(const Address& addr, const Xmm& x) { opVex(x, 0, addr, T_0F | T_YMM | T_EVEX | T_W0, 0x2B); } +-void vmovq(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, xm0, addr, T_0F | T_66 | T_EVEX | T_EW1 | T_N8, x.getIdx() < 16 ? 0xD6 : 0x7E); } +-void vmovq(const Xmm& x, const Address& addr) { uint64_t type; uint8_t code; if (x.getIdx() < 16) { type = T_0F | T_F3; code = 0x7E; } else { type = T_0F | T_66 | T_EVEX | T_EW1 | T_N8; code = 0x6E; } opAVX_X_X_XM(x, xm0, addr, type, code); } +-void vmovq(const Xmm& x1, const Xmm& x2) { opAVX_X_X_XM(x1, xm0, x2, T_0F | T_F3 | T_EVEX | T_EW1 | T_N8, 0x7E); } +-void vmovsd(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, xm0, addr, T_N8|T_F2|T_0F|T_EW1|T_EVEX | T_M_K, 0x11); } +-void vmovsd(const Xmm& x, const Address& addr) { opAVX_X_X_XM(x, xm0, addr, T_N8|T_F2|T_0F|T_EW1|T_EVEX, 0x10); } +-void vmovsd(const Xmm& x1, const Xmm& x2, const Operand& op = Operand()) { if (!op.isNone() && !op.isXMM()) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x1, x2, op, T_N8|T_F2|T_0F|T_EW1|T_EVEX, 0x10); } +-void vmovshdup(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_F3|T_0F|T_W0|T_YMM|T_EVEX, 0x16); } +-void vmovsldup(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_F3|T_0F|T_W0|T_YMM|T_EVEX, 0x12); } +-void vmovss(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, xm0, addr, T_N4|T_F3|T_0F|T_W0|T_EVEX | T_M_K, 0x11); } +-void vmovss(const Xmm& x, const Address& addr) { opAVX_X_X_XM(x, xm0, addr, T_N4|T_F3|T_0F|T_W0|T_EVEX, 0x10); } +-void vmovss(const Xmm& x1, const Xmm& x2, const Operand& op = Operand()) { if (!op.isNone() && !op.isXMM()) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x1, x2, op, T_N4|T_F3|T_0F|T_W0|T_EVEX, 0x10); } +-void vmovupd(const Address& addr, const Xmm& xmm) { opAVX_X_XM_IMM(xmm, addr, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_M_K, 0x11); } +-void vmovupd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX, 0x10); } +-void vmovups(const Address& addr, const Xmm& xmm) { opAVX_X_XM_IMM(xmm, addr, T_0F|T_W0|T_YMM|T_EVEX|T_M_K, 0x11); } +-void vmovups(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_0F|T_W0|T_YMM|T_EVEX, 0x10); } +-void vmulpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_ER_Z | T_B64, 0x59); } +-void vmulps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_W0 | T_YMM | T_EVEX | T_ER_Z | T_B32, 0x59); } +-void vmulsd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F2 | T_EW1 | T_EVEX | T_ER_X | T_N8, 0x59); } +-void vmulss(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F3 | T_W0 | T_EVEX | T_ER_X | T_N4, 0x59); } +-void vorpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_B64, 0x56); } +-void vorps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_W0 | T_YMM | T_EVEX | T_B32, 0x56); } +-void vpabsb(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F38|T_YMM|T_EVEX, 0x1C); } +-void vpabsd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_B32, 0x1E); } +-void vpabsw(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F38|T_YMM|T_EVEX, 0x1D); } +-void vpackssdw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_W0|T_YMM|T_EVEX|T_B32, 0x6B); } +-void vpacksswb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0x63); } +-void vpackusdw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_B32, 0x2B); } +-void vpackuswb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0x67); } +-void vpaddb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xFC); } +-void vpaddd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_W0|T_YMM|T_EVEX|T_B32, 0xFE); } +-void vpaddq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_B64, 0xD4); } +-void vpaddsb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xEC); } +-void vpaddsw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xED); } +-void vpaddusb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xDC); } +-void vpaddusw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xDD); } +-void vpaddw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xFD); } +-void vpalignr(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_YMM|T_EVEX, 0x0F, imm); } +-void vpand(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0xDB); } +-void vpandn(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0xDF); } +-void vpavgb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xE0); } +-void vpavgw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xE3); } +-void vpblendd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM, 0x02, imm); } +-void vpblendvb(const Xmm& x1, const Xmm& x2, const Operand& op, const Xmm& x4) { opAVX_X_X_XM(x1, x2, op, T_0F3A | T_66 | T_YMM, 0x4C, x4.getIdx() << 4); } +-void vpblendw(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM, 0x0E, imm); } +-void vpbroadcastb(const Xmm& x, const Operand& op) { if (!(op.isXMM() || op.isMEM())) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_XM_IMM(x, op, T_N1|T_66|T_0F38|T_W0|T_YMM|T_EVEX, 0x78); } +-void vpbroadcastd(const Xmm& x, const Operand& op) { if (!(op.isXMM() || op.isMEM())) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_XM_IMM(x, op, T_N4|T_66|T_0F38|T_W0|T_YMM|T_EVEX, 0x58); } +-void vpbroadcastq(const Xmm& x, const Operand& op) { if (!(op.isXMM() || op.isMEM())) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_XM_IMM(x, op, T_N8|T_66|T_0F38|T_W0|T_EW1|T_YMM|T_EVEX, 0x59); } +-void vpbroadcastw(const Xmm& x, const Operand& op) { if (!(op.isXMM() || op.isMEM())) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_XM_IMM(x, op, T_N2|T_66|T_0F38|T_W0|T_YMM|T_EVEX, 0x79); } +-void vpclmulhqhqdq(const Xmm& x1, const Xmm& x2, const Operand& op) { vpclmulqdq(x1, x2, op, 0x11); } +-void vpclmulhqlqdq(const Xmm& x1, const Xmm& x2, const Operand& op) { vpclmulqdq(x1, x2, op, 0x01); } +-void vpclmullqhqdq(const Xmm& x1, const Xmm& x2, const Operand& op) { vpclmulqdq(x1, x2, op, 0x10); } +-void vpclmullqlqdq(const Xmm& x1, const Xmm& x2, const Operand& op) { vpclmulqdq(x1, x2, op, 0x00); } +-void vpclmulqdq(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM|T_EVEX, 0x44, imm); } +-void vpcmpeqb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0x74); } +-void vpcmpeqd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0x76); } +-void vpcmpeqq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x29); } +-void vpcmpeqw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0x75); } +-void vpcmpestri(const Xmm& xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_66|T_0F3A, 0x61, imm); } +-void vpcmpestrm(const Xmm& xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_66|T_0F3A, 0x60, imm); } +-void vpcmpgtb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0x64); } +-void vpcmpgtd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0x66); } +-void vpcmpgtq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x37); } +-void vpcmpgtw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0x65); } +-void vpcmpistri(const Xmm& xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_66|T_0F3A, 0x63, imm); } +-void vpcmpistrm(const Xmm& xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_66|T_0F3A, 0x62, imm); } +-void vpdpbusd(const Xmm& x1, const Xmm& x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_SAE_Z|T_B32, 0x50, encoding); } +-void vpdpbusds(const Xmm& x1, const Xmm& x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_SAE_Z|T_B32, 0x51, encoding); } +-void vpdpwssd(const Xmm& x1, const Xmm& x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_SAE_Z|T_B32, 0x52, encoding); } +-void vpdpwssds(const Xmm& x1, const Xmm& x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_SAE_Z|T_B32, 0x53, encoding); } +-void vperm2f128(const Ymm& y1, const Ymm& y2, const Operand& op, uint8_t imm) { if (!(y1.isYMM() && y2.isYMM() && op.isYMEM())) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(y1, &y2, op, T_0F3A | T_66 | T_W0 | T_YMM, 0x06, imm); } +-void vperm2i128(const Ymm& y1, const Ymm& y2, const Operand& op, uint8_t imm) { if (!(y1.isYMM() && y2.isYMM() && op.isYMEM())) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(y1, &y2, op, T_0F3A | T_66 | T_W0 | T_YMM, 0x46, imm); } +-void vpermd(const Ymm& y1, const Ymm& y2, const Operand& op) { opAVX_X_X_XM(y1, y2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_B32, 0x36); } +-void vpermilpd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_EW1|T_YMM|T_EVEX|T_B64, 0x0D); } +-void vpermilpd(const Xmm& xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_66|T_0F3A|T_EW1|T_YMM|T_EVEX|T_B64, 0x05, imm); } +-void vpermilps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_B32, 0x0C); } +-void vpermilps(const Xmm& xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_66|T_0F3A|T_W0|T_YMM|T_EVEX|T_B32, 0x04, imm); } +-void vpermpd(const Ymm& y, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(y, op, T_66|T_0F3A|T_W1|T_EW1|T_YMM|T_EVEX|T_B64, 0x01, imm); } +-void vpermpd(const Ymm& y1, const Ymm& y2, const Operand& op) { opAVX_X_X_XM(y1, y2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x16); } +-void vpermps(const Ymm& y1, const Ymm& y2, const Operand& op) { opAVX_X_X_XM(y1, y2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_B32, 0x16); } +-void vpermq(const Ymm& y, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(y, op, T_66|T_0F3A|T_W1|T_EW1|T_YMM|T_EVEX|T_B64, 0x00, imm); } +-void vpermq(const Ymm& y1, const Ymm& y2, const Operand& op) { opAVX_X_X_XM(y1, y2, op, T_66|T_0F38|T_EW1|T_YMM|T_EVEX|T_B64, 0x36); } +-void vpextrb(const Operand& op, const Xmm& x, uint8_t imm) { if (!((op.isREG(8|16|i32e) || op.isMEM()) && x.isXMM())) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(x, 0, op, T_0F3A | T_66 | T_EVEX | T_N1, 0x14, imm); } +-void vpextrd(const Operand& op, const Xmm& x, uint8_t imm) { if (!((op.isREG(32) || op.isMEM()) && x.isXMM())) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(x, 0, op, T_0F3A | T_66 | T_W0 | T_EVEX | T_N4, 0x16, imm); } +-void vpextrq(const Operand& op, const Xmm& x, uint8_t imm) { if (!((op.isREG(64) || op.isMEM()) && x.isXMM())) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(x, 0, op, T_0F3A | T_66 | T_W1 | T_EVEX | T_EW1 | T_N8, 0x16, imm); } +-void vpextrw(const Operand& op, const Xmm& x, uint8_t imm) { if (!((op.isREG(16|i32e) || op.isMEM()) && x.isXMM())) XBYAK_THROW(ERR_BAD_COMBINATION) if (op.isREG() && x.getIdx() < 16) { opAVX_X_X_XM(Xmm(op.getIdx()), xm0, x, T_0F | T_66, 0xC5, imm); } else { opVex(x, 0, op, T_0F3A | T_66 | T_EVEX | T_N2, 0x15, imm); } } +-void vpgatherdd(const Xmm& x1, const Address& addr, const Xmm& x2) { opGather(x1, addr, x2, T_0F38 | T_66 | T_YMM | T_VSIB | T_W0, 0x90, 1); } +-void vpgatherdq(const Xmm& x1, const Address& addr, const Xmm& x2) { opGather(x1, addr, x2, T_0F38 | T_66 | T_YMM | T_VSIB | T_W1, 0x90, 0); } +-void vpgatherqd(const Xmm& x1, const Address& addr, const Xmm& x2) { opGather(x1, addr, x2, T_0F38 | T_66 | T_YMM | T_VSIB | T_W0, 0x91, 2); } +-void vpgatherqq(const Xmm& x1, const Address& addr, const Xmm& x2) { opGather(x1, addr, x2, T_0F38 | T_66 | T_YMM | T_VSIB | T_W1, 0x91, 1); } +-void vphaddd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x02); } +-void vphaddsw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x03); } +-void vphaddw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x01); } +-void vphminposuw(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F38, 0x41); } +-void vphsubd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x06); } +-void vphsubsw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x07); } +-void vphsubw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x05); } +-void vpinsrb(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { if (!(x1.isXMM() && x2.isXMM() && (op.isREG(32) || op.isMEM()))) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(x1, &x2, op, T_0F3A | T_66 | T_EVEX | T_N1, 0x20, imm); } +-void vpinsrd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { if (!(x1.isXMM() && x2.isXMM() && (op.isREG(32) || op.isMEM()))) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(x1, &x2, op, T_0F3A | T_66 | T_W0 | T_EVEX | T_N4, 0x22, imm); } +-void vpinsrq(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { if (!(x1.isXMM() && x2.isXMM() && (op.isREG(64) || op.isMEM()))) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(x1, &x2, op, T_0F3A | T_66 | T_W1 | T_EVEX | T_EW1 | T_N8, 0x22, imm); } +-void vpinsrw(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { if (!(x1.isXMM() && x2.isXMM() && (op.isREG(32) || op.isMEM()))) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(x1, &x2, op, T_0F | T_66 | T_EVEX | T_N2, 0xC4, imm); } +-void vpmaddubsw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM|T_EVEX, 0x04); } +-void vpmaddwd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xF5); } +-void vpmaskmovd(const Address& addr, const Xmm& x1, const Xmm& x2) { opAVX_X_X_XM(x2, x1, addr, T_0F38 | T_66 | T_W0 | T_YMM, 0x8E); } +-void vpmaskmovd(const Xmm& x1, const Xmm& x2, const Address& addr) { opAVX_X_X_XM(x1, x2, addr, T_0F38 | T_66 | T_W0 | T_YMM, 0x8C); } +-void vpmaskmovq(const Address& addr, const Xmm& x1, const Xmm& x2) { opAVX_X_X_XM(x2, x1, addr, T_0F38 | T_66 | T_W1 | T_YMM, 0x8E); } +-void vpmaskmovq(const Xmm& x1, const Xmm& x2, const Address& addr) { opAVX_X_X_XM(x1, x2, addr, T_0F38 | T_66 | T_W1 | T_YMM, 0x8C); } +-void vpmaxsb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM|T_EVEX, 0x3C); } +-void vpmaxsd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_B32, 0x3D); } +-void vpmaxsw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xEE); } +-void vpmaxub(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xDE); } +-void vpmaxud(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_B32, 0x3F); } +-void vpmaxuw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM|T_EVEX, 0x3E); } +-void vpminsb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM|T_EVEX, 0x38); } +-void vpminsd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_B32, 0x39); } +-void vpminsw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xEA); } +-void vpminub(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xDA); } +-void vpminud(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_B32, 0x3B); } +-void vpminuw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM|T_EVEX, 0x3A); } +-void vpmovmskb(const Reg32e& r, const Xmm& x) { if (!x.is(Operand::XMM | Operand::YMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(x.isYMM() ? Ymm(r.getIdx()) : Xmm(r.getIdx()), 0, x, T_0F | T_66 | T_YMM, 0xD7); } +-void vpmovsxbd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N4|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x21); } +-void vpmovsxbq(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N2|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x22); } +-void vpmovsxbw(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N8|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x20); } +-void vpmovsxdq(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N8|T_N_VL|T_66|T_0F38|T_W0|T_YMM|T_EVEX, 0x25); } +-void vpmovsxwd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N8|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x23); } +-void vpmovsxwq(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N4|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x24); } +-void vpmovzxbd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N4|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x31); } +-void vpmovzxbq(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N2|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x32); } +-void vpmovzxbw(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N8|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x30); } +-void vpmovzxdq(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N8|T_N_VL|T_66|T_0F38|T_W0|T_YMM|T_EVEX, 0x35); } +-void vpmovzxwd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N8|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x33); } +-void vpmovzxwq(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N4|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x34); } +-void vpmuldq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_EVEX|T_B64, 0x28); } +-void vpmulhrsw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM|T_EVEX, 0x0B); } +-void vpmulhuw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xE4); } +-void vpmulhw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xE5); } +-void vpmulld(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_B32, 0x40); } +-void vpmullw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xD5); } +-void vpmuludq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_B64, 0xF4); } +-void vpor(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0xEB); } +-void vpsadbw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xF6); } +-void vpshufb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM|T_EVEX, 0x00); } +-void vpshufd(const Xmm& xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_66|T_0F|T_W0|T_YMM|T_EVEX|T_B32, 0x70, imm); } +-void vpshufhw(const Xmm& xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_F3|T_0F|T_YMM|T_EVEX, 0x70, imm); } +-void vpshuflw(const Xmm& xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_F2|T_0F|T_YMM|T_EVEX, 0x70, imm); } +-void vpsignb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x08); } +-void vpsignd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x0A); } +-void vpsignw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x09); } +-void vpslld(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 6), x, op, T_66|T_0F|T_W0|T_YMM|T_EVEX|T_B32|T_MEM_EVEX, 0x72, imm); } +-void vpslld(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_66|T_0F|T_W0|T_YMM|T_EVEX, 0xF2); } +-void vpslldq(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 7), x, op, T_66|T_0F|T_YMM|T_EVEX|T_MEM_EVEX, 0x73, imm); } +-void vpsllq(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 6), x, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_B64|T_MEM_EVEX, 0x73, imm); } +-void vpsllq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_66|T_0F|T_EW1|T_YMM|T_EVEX, 0xF3); } +-void vpsllvd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_B32, 0x47); } +-void vpsllvq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_B64, 0x47); } +-void vpsllw(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 6), x, op, T_66|T_0F|T_YMM|T_EVEX|T_MEM_EVEX, 0x71, imm); } +-void vpsllw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_66|T_0F|T_YMM|T_EVEX, 0xF1); } +-void vpsrad(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 4), x, op, T_66|T_0F|T_W0|T_YMM|T_EVEX|T_B32|T_MEM_EVEX, 0x72, imm); } +-void vpsrad(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_66|T_0F|T_W0|T_YMM|T_EVEX, 0xE2); } +-void vpsravd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_B32, 0x46); } +-void vpsraw(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 4), x, op, T_66|T_0F|T_YMM|T_EVEX|T_MEM_EVEX, 0x71, imm); } +-void vpsraw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_66|T_0F|T_YMM|T_EVEX, 0xE1); } +-void vpsrld(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 2), x, op, T_66|T_0F|T_W0|T_YMM|T_EVEX|T_B32|T_MEM_EVEX, 0x72, imm); } +-void vpsrld(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_66|T_0F|T_W0|T_YMM|T_EVEX, 0xD2); } +-void vpsrldq(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 3), x, op, T_66|T_0F|T_YMM|T_EVEX|T_MEM_EVEX, 0x73, imm); } +-void vpsrlq(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 2), x, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_B64|T_MEM_EVEX, 0x73, imm); } +-void vpsrlq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_66|T_0F|T_EW1|T_YMM|T_EVEX, 0xD3); } +-void vpsrlvd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_B32, 0x45); } +-void vpsrlvq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_B64, 0x45); } +-void vpsrlw(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 2), x, op, T_66|T_0F|T_YMM|T_EVEX|T_MEM_EVEX, 0x71, imm); } +-void vpsrlw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_66|T_0F|T_YMM|T_EVEX, 0xD1); } +-void vpsubb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xF8); } +-void vpsubd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_W0|T_YMM|T_EVEX|T_B32, 0xFA); } +-void vpsubq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_B64, 0xFB); } +-void vpsubsb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xE8); } +-void vpsubsw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xE9); } +-void vpsubusb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xD8); } +-void vpsubusw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xD9); } +-void vpsubw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xF9); } +-void vptest(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F38|T_YMM, 0x17); } +-void vpunpckhbw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0x68); } +-void vpunpckhdq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_W0|T_YMM|T_EVEX|T_B32, 0x6A); } +-void vpunpckhqdq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_B64, 0x6D); } +-void vpunpckhwd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0x69); } +-void vpunpcklbw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0x60); } +-void vpunpckldq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_W0|T_YMM|T_EVEX|T_B32, 0x62); } +-void vpunpcklqdq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_B64, 0x6C); } +-void vpunpcklwd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0x61); } +-void vpxor(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0xEF); } +-void vrcpps(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_0F|T_YMM, 0x53); } +-void vrcpss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F3|T_0F, 0x53); } +-void vroundpd(const Xmm& xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_66|T_0F3A|T_YMM, 0x09, imm); } +-void vroundps(const Xmm& xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_66|T_0F3A|T_YMM, 0x08, imm); } +-void vroundsd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0, 0x0B, imm); } +-void vroundss(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0, 0x0A, imm); } +-void vrsqrtps(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_0F|T_YMM, 0x52); } +-void vrsqrtss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F3|T_0F, 0x52); } +-void vsha512msg1(const Ymm& y, const Xmm& x) { if (!(y.isYMM() && x.isXMM())) XBYAK_THROW(ERR_BAD_PARAMETER) opVex(y, 0, x, T_F2 | T_0F38 | T_W0 | T_YMM, 0xCC); } +-void vsha512msg2(const Ymm& y1, const Ymm& y2) { if (!(y1.isYMM() && y2.isYMM())) XBYAK_THROW(ERR_BAD_PARAMETER) opVex(y1, 0, y2, T_F2 | T_0F38 | T_W0 | T_YMM, 0xCD); } +-void vsha512rnds2(const Ymm& y1, const Ymm& y2, const Xmm& x) { if (!(y1.isYMM() && y2.isYMM() && x.isXMM())) XBYAK_THROW(ERR_BAD_PARAMETER) opVex(y1, &y2, x, T_F2 | T_0F38 | T_W0 | T_YMM, 0xCB); } +-void vshufpd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_B64, 0xC6, imm); } +-void vshufps(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_0F|T_W0|T_YMM|T_EVEX|T_B32, 0xC6, imm); } +-void vsm3msg1(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_0F38|T_W0|T_EVEX, 0xDA); } +-void vsm3msg2(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_EVEX, 0xDA); } +-void vsm3rnds2(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_EVEX, 0xDE, imm); } +-void vsm4key4(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F3|T_0F38|T_W0|T_EVEX, 0xDA); } +-void vsm4rnds4(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F2|T_0F38|T_W0|T_EVEX, 0xDA); } +-void vsqrtpd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0x51); } +-void vsqrtps(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_0F|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0x51); } +-void vsqrtsd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_F2|T_0F|T_EW1|T_EVEX|T_ER_X, 0x51); } +-void vsqrtss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_F3|T_0F|T_W0|T_EVEX|T_ER_X, 0x51); } ++void vmaskmovdqu(Xmm x1, Xmm x2) { opAVX_X_X_XM(x1, xm0, x2, T_0F | T_66, 0xF7); } ++void vmaskmovpd(const Address& addr, Xmm x1, Xmm x2) { opAVX_X_X_XM(x2, x1, addr, T_0F38 | T_66 | T_W0 | T_YMM, 0x2F); } ++void vmaskmovpd(Xmm x1, Xmm x2, const Address& addr) { opAVX_X_X_XM(x1, x2, addr, T_0F38 | T_66 | T_W0 | T_YMM, 0x2D); } ++void vmaskmovps(const Address& addr, Xmm x1, Xmm x2) { opAVX_X_X_XM(x2, x1, addr, T_0F38 | T_66 | T_W0 | T_YMM, 0x2E); } ++void vmaskmovps(Xmm x1, Xmm x2, const Address& addr) { opAVX_X_X_XM(x1, x2, addr, T_0F38 | T_66 | T_W0 | T_YMM, 0x2C); } ++void vmaxpd(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_SAE_Z | T_B64, 0x5F); } ++void vmaxps(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_W0 | T_YMM | T_EVEX | T_SAE_Z | T_B32, 0x5F); } ++void vmaxsd(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F2 | T_EW1 | T_EVEX | T_SAE_X | T_N8, 0x5F); } ++void vmaxss(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F3 | T_W0 | T_EVEX | T_SAE_X | T_N4, 0x5F); } ++void vminpd(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_SAE_Z | T_B64, 0x5D); } ++void vminps(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_W0 | T_YMM | T_EVEX | T_SAE_Z | T_B32, 0x5D); } ++void vminsd(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F2 | T_EW1 | T_EVEX | T_SAE_X | T_N8, 0x5D); } ++void vminss(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F3 | T_W0 | T_EVEX | T_SAE_X | T_N4, 0x5D); } ++void vmovapd(const Address& addr, Xmm xmm) { opAVX_X_XM_IMM(xmm, addr, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_M_K, 0x29); } ++void vmovapd(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX, 0x28); } ++void vmovaps(const Address& addr, Xmm xmm) { opAVX_X_XM_IMM(xmm, addr, T_0F|T_W0|T_YMM|T_EVEX|T_M_K, 0x29); } ++void vmovaps(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_0F|T_W0|T_YMM|T_EVEX, 0x28); } ++void vmovddup(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_DUP|T_F2|T_0F|T_EW1|T_YMM|T_EVEX, 0x12); } ++void vmovdqa(const Address& addr, Xmm xmm) { opAVX_X_XM_IMM(xmm, addr, T_66|T_0F|T_YMM, 0x7F); } ++void vmovdqa(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F|T_YMM, 0x6F); } ++void vmovdqu(const Address& addr, Xmm xmm) { opAVX_X_XM_IMM(xmm, addr, T_F3|T_0F|T_YMM, 0x7F); } ++void vmovdqu(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_F3|T_0F|T_YMM, 0x6F); } ++void vmovhlps(Xmm x1, Xmm x2, const Operand& op = Operand()) { if (!op.isNone() && !op.isXMM()) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x1, x2, op, T_0F | T_EVEX | T_W0, 0x12); } ++void vmovhpd(const Address& addr, Xmm x) { opAVX_X_X_XM(x, xm0, addr, T_N8|T_66|T_0F|T_EW1|T_EVEX, 0x17); } ++void vmovhpd(Xmm x, const Operand& op1, const Operand& op2 = Operand()) { if (!op2.isNone() && !op2.isMEM()) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x, op1, op2, T_N8|T_66|T_0F|T_EW1|T_EVEX, 0x16); } ++void vmovhps(const Address& addr, Xmm x) { opAVX_X_X_XM(x, xm0, addr, T_N8|T_0F|T_W0|T_EVEX, 0x17); } ++void vmovhps(Xmm x, const Operand& op1, const Operand& op2 = Operand()) { if (!op2.isNone() && !op2.isMEM()) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x, op1, op2, T_N8|T_0F|T_W0|T_EVEX, 0x16); } ++void vmovlhps(Xmm x1, Xmm x2, const Operand& op = Operand()) { if (!op.isNone() && !op.isXMM()) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x1, x2, op, T_0F | T_EVEX | T_W0, 0x16); } ++void vmovlpd(const Address& addr, Xmm x) { opAVX_X_X_XM(x, xm0, addr, T_N8|T_66|T_0F|T_EW1|T_EVEX, 0x13); } ++void vmovlpd(Xmm x, const Operand& op1, const Operand& op2 = Operand()) { if (!op2.isNone() && !op2.isMEM()) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x, op1, op2, T_N8|T_66|T_0F|T_EW1|T_EVEX, 0x12); } ++void vmovlps(const Address& addr, Xmm x) { opAVX_X_X_XM(x, xm0, addr, T_N8|T_0F|T_W0|T_EVEX, 0x13); } ++void vmovlps(Xmm x, const Operand& op1, const Operand& op2 = Operand()) { if (!op2.isNone() && !op2.isMEM()) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x, op1, op2, T_N8|T_0F|T_W0|T_EVEX, 0x12); } ++void vmovmskpd(Reg r, Xmm x) { if (!r.isBit(i32e)) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x.isXMM() ? Xmm(r.getIdx()) : Ymm(r.getIdx()), cvtIdx0(x), x, T_0F | T_66 | T_W0 | T_YMM, 0x50); } ++void vmovmskps(Reg r, Xmm x) { if (!r.isBit(i32e)) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x.isXMM() ? Xmm(r.getIdx()) : Ymm(r.getIdx()), cvtIdx0(x), x, T_0F | T_W0 | T_YMM, 0x50); } ++void vmovntdq(const Address& addr, Xmm x) { opVex(x, 0, addr, T_0F | T_66 | T_YMM | T_EVEX | T_W0, 0xE7); } ++void vmovntdqa(Xmm x, const Address& addr) { opVex(x, 0, addr, T_0F38 | T_66 | T_YMM | T_EVEX | T_W0, 0x2A); } ++void vmovntpd(const Address& addr, Xmm x) { opVex(x, 0, addr, T_0F | T_66 | T_YMM | T_EVEX | T_EW1, 0x2B); } ++void vmovntps(const Address& addr, Xmm x) { opVex(x, 0, addr, T_0F | T_YMM | T_EVEX | T_W0, 0x2B); } ++void vmovq(const Address& addr, Xmm x) { opAVX_X_X_XM(x, xm0, addr, T_0F | T_66 | T_EVEX | T_EW1 | T_N8, x.getIdx() < 16 ? 0xD6 : 0x7E); } ++void vmovq(Xmm x, const Address& addr) { uint64_t type; uint8_t code; if (x.getIdx() < 16) { type = T_0F | T_F3; code = 0x7E; } else { type = T_0F | T_66 | T_EVEX | T_EW1 | T_N8; code = 0x6E; } opAVX_X_X_XM(x, xm0, addr, type, code); } ++void vmovq(Xmm x1, Xmm x2) { opAVX_X_X_XM(x1, xm0, x2, T_0F | T_F3 | T_EVEX | T_EW1 | T_N8, 0x7E); } ++void vmovsd(const Address& addr, Xmm x) { opAVX_X_X_XM(x, xm0, addr, T_N8|T_F2|T_0F|T_EW1|T_EVEX | T_M_K, 0x11); } ++void vmovsd(Xmm x, const Address& addr) { opAVX_X_X_XM(x, xm0, addr, T_N8|T_F2|T_0F|T_EW1|T_EVEX, 0x10); } ++void vmovsd(Xmm x1, Xmm x2, const Operand& op = Operand()) { if (!op.isNone() && !op.isXMM()) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x1, x2, op, T_N8|T_F2|T_0F|T_EW1|T_EVEX, 0x10); } ++void vmovshdup(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_F3|T_0F|T_W0|T_YMM|T_EVEX, 0x16); } ++void vmovsldup(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_F3|T_0F|T_W0|T_YMM|T_EVEX, 0x12); } ++void vmovss(const Address& addr, Xmm x) { opAVX_X_X_XM(x, xm0, addr, T_N4|T_F3|T_0F|T_W0|T_EVEX | T_M_K, 0x11); } ++void vmovss(Xmm x, const Address& addr) { opAVX_X_X_XM(x, xm0, addr, T_N4|T_F3|T_0F|T_W0|T_EVEX, 0x10); } ++void vmovss(Xmm x1, Xmm x2, const Operand& op = Operand()) { if (!op.isNone() && !op.isXMM()) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x1, x2, op, T_N4|T_F3|T_0F|T_W0|T_EVEX, 0x10); } ++void vmovupd(const Address& addr, Xmm xmm) { opAVX_X_XM_IMM(xmm, addr, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_M_K, 0x11); } ++void vmovupd(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX, 0x10); } ++void vmovups(const Address& addr, Xmm xmm) { opAVX_X_XM_IMM(xmm, addr, T_0F|T_W0|T_YMM|T_EVEX|T_M_K, 0x11); } ++void vmovups(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_0F|T_W0|T_YMM|T_EVEX, 0x10); } ++void vmulpd(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_ER_Z | T_B64, 0x59); } ++void vmulps(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_W0 | T_YMM | T_EVEX | T_ER_Z | T_B32, 0x59); } ++void vmulsd(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F2 | T_EW1 | T_EVEX | T_ER_X | T_N8, 0x59); } ++void vmulss(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F3 | T_W0 | T_EVEX | T_ER_X | T_N4, 0x59); } ++void vorpd(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_B64, 0x56); } ++void vorps(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_W0 | T_YMM | T_EVEX | T_B32, 0x56); } ++void vpabsb(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F38|T_YMM|T_EVEX, 0x1C); } ++void vpabsd(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_B32, 0x1E); } ++void vpabsw(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F38|T_YMM|T_EVEX, 0x1D); } ++void vpackssdw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_W0|T_YMM|T_EVEX|T_B32, 0x6B); } ++void vpacksswb(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0x63); } ++void vpackusdw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_B32, 0x2B); } ++void vpackuswb(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0x67); } ++void vpaddb(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xFC); } ++void vpaddd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_W0|T_YMM|T_EVEX|T_B32, 0xFE); } ++void vpaddq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_B64, 0xD4); } ++void vpaddsb(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xEC); } ++void vpaddsw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xED); } ++void vpaddusb(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xDC); } ++void vpaddusw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xDD); } ++void vpaddw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xFD); } ++void vpalignr(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_YMM|T_EVEX, 0x0F, imm); } ++void vpand(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0xDB); } ++void vpandn(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0xDF); } ++void vpavgb(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xE0); } ++void vpavgw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xE3); } ++void vpblendd(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM, 0x02, imm); } ++void vpblendvb(Xmm x1, Xmm x2, const Operand& op, Xmm x4) { opAVX_X_X_XM(x1, x2, op, T_0F3A | T_66 | T_YMM, 0x4C, x4.getIdx() << 4); } ++void vpblendw(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM, 0x0E, imm); } ++void vpbroadcastb(Xmm x, const Operand& op) { if (!(op.isXMM() || op.isMEM())) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_XM_IMM(x, op, T_N1|T_66|T_0F38|T_W0|T_YMM|T_EVEX, 0x78); } ++void vpbroadcastd(Xmm x, const Operand& op) { if (!(op.isXMM() || op.isMEM())) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_XM_IMM(x, op, T_N4|T_66|T_0F38|T_W0|T_YMM|T_EVEX, 0x58); } ++void vpbroadcastq(Xmm x, const Operand& op) { if (!(op.isXMM() || op.isMEM())) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_XM_IMM(x, op, T_N8|T_66|T_0F38|T_W0|T_EW1|T_YMM|T_EVEX, 0x59); } ++void vpbroadcastw(Xmm x, const Operand& op) { if (!(op.isXMM() || op.isMEM())) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_XM_IMM(x, op, T_N2|T_66|T_0F38|T_W0|T_YMM|T_EVEX, 0x79); } ++void vpclmulhqhqdq(Xmm x1, Xmm x2, const Operand& op) { vpclmulqdq(x1, x2, op, 0x11); } ++void vpclmulhqlqdq(Xmm x1, Xmm x2, const Operand& op) { vpclmulqdq(x1, x2, op, 0x01); } ++void vpclmullqhqdq(Xmm x1, Xmm x2, const Operand& op) { vpclmulqdq(x1, x2, op, 0x10); } ++void vpclmullqlqdq(Xmm x1, Xmm x2, const Operand& op) { vpclmulqdq(x1, x2, op, 0x00); } ++void vpclmulqdq(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM|T_EVEX, 0x44, imm); } ++void vpcmpeqb(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0x74); } ++void vpcmpeqd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0x76); } ++void vpcmpeqq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x29); } ++void vpcmpeqw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0x75); } ++void vpcmpestri(Xmm xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_66|T_0F3A, 0x61, imm); } ++void vpcmpestrm(Xmm xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_66|T_0F3A, 0x60, imm); } ++void vpcmpgtb(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0x64); } ++void vpcmpgtd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0x66); } ++void vpcmpgtq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x37); } ++void vpcmpgtw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0x65); } ++void vpcmpistri(Xmm xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_66|T_0F3A, 0x63, imm); } ++void vpcmpistrm(Xmm xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_66|T_0F3A, 0x62, imm); } ++void vpdpbusd(Xmm x1, Xmm x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_SAE_Z|T_B32, 0x50, encoding); } ++void vpdpbusds(Xmm x1, Xmm x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_SAE_Z|T_B32, 0x51, encoding); } ++void vpdpwssd(Xmm x1, Xmm x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_SAE_Z|T_B32, 0x52, encoding); } ++void vpdpwssds(Xmm x1, Xmm x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_SAE_Z|T_B32, 0x53, encoding); } ++void vperm2f128(Ymm y1, Ymm y2, const Operand& op, uint8_t imm) { if (!(y1.isYMM() && y2.isYMM() && op.isYMEM())) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(y1, &y2, op, T_0F3A | T_66 | T_W0 | T_YMM, 0x06, imm); } ++void vperm2i128(Ymm y1, Ymm y2, const Operand& op, uint8_t imm) { if (!(y1.isYMM() && y2.isYMM() && op.isYMEM())) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(y1, &y2, op, T_0F3A | T_66 | T_W0 | T_YMM, 0x46, imm); } ++void vpermd(Ymm y1, Ymm y2, const Operand& op) { opAVX_X_X_XM(y1, y2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_B32, 0x36); } ++void vpermilpd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_EW1|T_YMM|T_EVEX|T_B64, 0x0D); } ++void vpermilpd(Xmm xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_66|T_0F3A|T_EW1|T_YMM|T_EVEX|T_B64, 0x05, imm); } ++void vpermilps(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_B32, 0x0C); } ++void vpermilps(Xmm xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_66|T_0F3A|T_W0|T_YMM|T_EVEX|T_B32, 0x04, imm); } ++void vpermpd(Ymm y, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(y, op, T_66|T_0F3A|T_W1|T_EW1|T_YMM|T_EVEX|T_B64, 0x01, imm); } ++void vpermpd(Ymm y1, Ymm y2, const Operand& op) { opAVX_X_X_XM(y1, y2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x16); } ++void vpermps(Ymm y1, Ymm y2, const Operand& op) { opAVX_X_X_XM(y1, y2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_B32, 0x16); } ++void vpermq(Ymm y, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(y, op, T_66|T_0F3A|T_W1|T_EW1|T_YMM|T_EVEX|T_B64, 0x00, imm); } ++void vpermq(Ymm y1, Ymm y2, const Operand& op) { opAVX_X_X_XM(y1, y2, op, T_66|T_0F38|T_EW1|T_YMM|T_EVEX|T_B64, 0x36); } ++void vpextrb(const Operand& op, Xmm x, uint8_t imm) { if (!((op.isREG(8|16|i32e) || op.isMEM()) && x.isXMM())) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(x, 0, op, T_0F3A | T_66 | T_EVEX | T_N1, 0x14, imm); } ++void vpextrd(const Operand& op, Xmm x, uint8_t imm) { if (!((op.isREG(32) || op.isMEM()) && x.isXMM())) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(x, 0, op, T_0F3A | T_66 | T_W0 | T_EVEX | T_N4, 0x16, imm); } ++void vpextrq(const Operand& op, Xmm x, uint8_t imm) { if (!((op.isREG(64) || op.isMEM()) && x.isXMM())) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(x, 0, op, T_0F3A | T_66 | T_W1 | T_EVEX | T_EW1 | T_N8, 0x16, imm); } ++void vpextrw(const Operand& op, Xmm x, uint8_t imm) { if (!((op.isREG(16|i32e) || op.isMEM()) && x.isXMM())) XBYAK_THROW(ERR_BAD_COMBINATION) if (op.isREG() && x.getIdx() < 16) { opAVX_X_X_XM(Xmm(op.getIdx()), xm0, x, T_0F | T_66, 0xC5, imm); } else { opVex(x, 0, op, T_0F3A | T_66 | T_EVEX | T_N2, 0x15, imm); } } ++void vpgatherdd(Xmm x1, const Address& addr, Xmm x2) { opGather(x1, addr, x2, T_0F38 | T_66 | T_YMM | T_VSIB | T_W0, 0x90, 1); } ++void vpgatherdq(Xmm x1, const Address& addr, Xmm x2) { opGather(x1, addr, x2, T_0F38 | T_66 | T_YMM | T_VSIB | T_W1, 0x90, 0); } ++void vpgatherqd(Xmm x1, const Address& addr, Xmm x2) { opGather(x1, addr, x2, T_0F38 | T_66 | T_YMM | T_VSIB | T_W0, 0x91, 2); } ++void vpgatherqq(Xmm x1, const Address& addr, Xmm x2) { opGather(x1, addr, x2, T_0F38 | T_66 | T_YMM | T_VSIB | T_W1, 0x91, 1); } ++void vphaddd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x02); } ++void vphaddsw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x03); } ++void vphaddw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x01); } ++void vphminposuw(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F38, 0x41); } ++void vphsubd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x06); } ++void vphsubsw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x07); } ++void vphsubw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x05); } ++void vpinsrb(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { if (!(x1.isXMM() && x2.isXMM() && (op.isREG(32) || op.isMEM()))) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(x1, &x2, op, T_0F3A | T_66 | T_EVEX | T_N1, 0x20, imm); } ++void vpinsrd(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { if (!(x1.isXMM() && x2.isXMM() && (op.isREG(32) || op.isMEM()))) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(x1, &x2, op, T_0F3A | T_66 | T_W0 | T_EVEX | T_N4, 0x22, imm); } ++void vpinsrq(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { if (!(x1.isXMM() && x2.isXMM() && (op.isREG(64) || op.isMEM()))) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(x1, &x2, op, T_0F3A | T_66 | T_W1 | T_EVEX | T_EW1 | T_N8, 0x22, imm); } ++void vpinsrw(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { if (!(x1.isXMM() && x2.isXMM() && (op.isREG(32) || op.isMEM()))) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(x1, &x2, op, T_0F | T_66 | T_EVEX | T_N2, 0xC4, imm); } ++void vpmaddubsw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM|T_EVEX, 0x04); } ++void vpmaddwd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xF5); } ++void vpmaskmovd(const Address& addr, Xmm x1, Xmm x2) { opAVX_X_X_XM(x2, x1, addr, T_0F38 | T_66 | T_W0 | T_YMM, 0x8E); } ++void vpmaskmovd(Xmm x1, Xmm x2, const Address& addr) { opAVX_X_X_XM(x1, x2, addr, T_0F38 | T_66 | T_W0 | T_YMM, 0x8C); } ++void vpmaskmovq(const Address& addr, Xmm x1, Xmm x2) { opAVX_X_X_XM(x2, x1, addr, T_0F38 | T_66 | T_W1 | T_YMM, 0x8E); } ++void vpmaskmovq(Xmm x1, Xmm x2, const Address& addr) { opAVX_X_X_XM(x1, x2, addr, T_0F38 | T_66 | T_W1 | T_YMM, 0x8C); } ++void vpmaxsb(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM|T_EVEX, 0x3C); } ++void vpmaxsd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_B32, 0x3D); } ++void vpmaxsw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xEE); } ++void vpmaxub(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xDE); } ++void vpmaxud(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_B32, 0x3F); } ++void vpmaxuw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM|T_EVEX, 0x3E); } ++void vpminsb(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM|T_EVEX, 0x38); } ++void vpminsd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_B32, 0x39); } ++void vpminsw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xEA); } ++void vpminub(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xDA); } ++void vpminud(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_B32, 0x3B); } ++void vpminuw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM|T_EVEX, 0x3A); } ++void vpmovmskb(Reg32e r, Xmm x) { if (!x.is(Operand::XMM | Operand::YMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(x.isYMM() ? Ymm(r.getIdx()) : Xmm(r.getIdx()), 0, x, T_0F | T_66 | T_YMM, 0xD7); } ++void vpmovsxbd(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N4|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x21); } ++void vpmovsxbq(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N2|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x22); } ++void vpmovsxbw(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N8|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x20); } ++void vpmovsxdq(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N8|T_N_VL|T_66|T_0F38|T_W0|T_YMM|T_EVEX, 0x25); } ++void vpmovsxwd(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N8|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x23); } ++void vpmovsxwq(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N4|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x24); } ++void vpmovzxbd(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N4|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x31); } ++void vpmovzxbq(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N2|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x32); } ++void vpmovzxbw(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N8|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x30); } ++void vpmovzxdq(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N8|T_N_VL|T_66|T_0F38|T_W0|T_YMM|T_EVEX, 0x35); } ++void vpmovzxwd(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N8|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x33); } ++void vpmovzxwq(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N4|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x34); } ++void vpmuldq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_EVEX|T_B64, 0x28); } ++void vpmulhrsw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM|T_EVEX, 0x0B); } ++void vpmulhuw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xE4); } ++void vpmulhw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xE5); } ++void vpmulld(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_B32, 0x40); } ++void vpmullw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xD5); } ++void vpmuludq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_B64, 0xF4); } ++void vpor(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0xEB); } ++void vpsadbw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xF6); } ++void vpshufb(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM|T_EVEX, 0x00); } ++void vpshufd(Xmm xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_66|T_0F|T_W0|T_YMM|T_EVEX|T_B32, 0x70, imm); } ++void vpshufhw(Xmm xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_F3|T_0F|T_YMM|T_EVEX, 0x70, imm); } ++void vpshuflw(Xmm xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_F2|T_0F|T_YMM|T_EVEX, 0x70, imm); } ++void vpsignb(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x08); } ++void vpsignd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x0A); } ++void vpsignw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x09); } ++void vpslld(Xmm x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 6), x, op, T_66|T_0F|T_W0|T_YMM|T_EVEX|T_B32|T_MEM_EVEX, 0x72, imm); } ++void vpslld(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_66|T_0F|T_W0|T_YMM|T_EVEX, 0xF2); } ++void vpslldq(Xmm x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 7), x, op, T_66|T_0F|T_YMM|T_EVEX|T_MEM_EVEX, 0x73, imm); } ++void vpsllq(Xmm x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 6), x, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_B64|T_MEM_EVEX, 0x73, imm); } ++void vpsllq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_66|T_0F|T_EW1|T_YMM|T_EVEX, 0xF3); } ++void vpsllvd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_B32, 0x47); } ++void vpsllvq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_B64, 0x47); } ++void vpsllw(Xmm x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 6), x, op, T_66|T_0F|T_YMM|T_EVEX|T_MEM_EVEX, 0x71, imm); } ++void vpsllw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_66|T_0F|T_YMM|T_EVEX, 0xF1); } ++void vpsrad(Xmm x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 4), x, op, T_66|T_0F|T_W0|T_YMM|T_EVEX|T_B32|T_MEM_EVEX, 0x72, imm); } ++void vpsrad(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_66|T_0F|T_W0|T_YMM|T_EVEX, 0xE2); } ++void vpsravd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_B32, 0x46); } ++void vpsraw(Xmm x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 4), x, op, T_66|T_0F|T_YMM|T_EVEX|T_MEM_EVEX, 0x71, imm); } ++void vpsraw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_66|T_0F|T_YMM|T_EVEX, 0xE1); } ++void vpsrld(Xmm x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 2), x, op, T_66|T_0F|T_W0|T_YMM|T_EVEX|T_B32|T_MEM_EVEX, 0x72, imm); } ++void vpsrld(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_66|T_0F|T_W0|T_YMM|T_EVEX, 0xD2); } ++void vpsrldq(Xmm x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 3), x, op, T_66|T_0F|T_YMM|T_EVEX|T_MEM_EVEX, 0x73, imm); } ++void vpsrlq(Xmm x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 2), x, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_B64|T_MEM_EVEX, 0x73, imm); } ++void vpsrlq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_66|T_0F|T_EW1|T_YMM|T_EVEX, 0xD3); } ++void vpsrlvd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_EVEX|T_B32, 0x45); } ++void vpsrlvq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_B64, 0x45); } ++void vpsrlw(Xmm x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 2), x, op, T_66|T_0F|T_YMM|T_EVEX|T_MEM_EVEX, 0x71, imm); } ++void vpsrlw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_66|T_0F|T_YMM|T_EVEX, 0xD1); } ++void vpsubb(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xF8); } ++void vpsubd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_W0|T_YMM|T_EVEX|T_B32, 0xFA); } ++void vpsubq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_B64, 0xFB); } ++void vpsubsb(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xE8); } ++void vpsubsw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xE9); } ++void vpsubusb(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xD8); } ++void vpsubusw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xD9); } ++void vpsubw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xF9); } ++void vptest(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F38|T_YMM, 0x17); } ++void vpunpckhbw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0x68); } ++void vpunpckhdq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_W0|T_YMM|T_EVEX|T_B32, 0x6A); } ++void vpunpckhqdq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_B64, 0x6D); } ++void vpunpckhwd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0x69); } ++void vpunpcklbw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0x60); } ++void vpunpckldq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_W0|T_YMM|T_EVEX|T_B32, 0x62); } ++void vpunpcklqdq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_B64, 0x6C); } ++void vpunpcklwd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0x61); } ++void vpxor(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0xEF); } ++void vrcpps(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_0F|T_YMM, 0x53); } ++void vrcpss(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F3|T_0F, 0x53); } ++void vroundpd(Xmm xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_66|T_0F3A|T_YMM, 0x09, imm); } ++void vroundps(Xmm xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_66|T_0F3A|T_YMM, 0x08, imm); } ++void vroundsd(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0, 0x0B, imm); } ++void vroundss(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0, 0x0A, imm); } ++void vrsqrtps(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_0F|T_YMM, 0x52); } ++void vrsqrtss(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F3|T_0F, 0x52); } ++void vsha512msg1(Ymm y, Xmm x) { if (!(y.isYMM() && x.isXMM())) XBYAK_THROW(ERR_BAD_PARAMETER) opVex(y, 0, x, T_F2 | T_0F38 | T_W0 | T_YMM, 0xCC); } ++void vsha512msg2(Ymm y1, Ymm y2) { if (!(y1.isYMM() && y2.isYMM())) XBYAK_THROW(ERR_BAD_PARAMETER) opVex(y1, 0, y2, T_F2 | T_0F38 | T_W0 | T_YMM, 0xCD); } ++void vsha512rnds2(Ymm y1, Ymm y2, Xmm x) { if (!(y1.isYMM() && y2.isYMM() && x.isXMM())) XBYAK_THROW(ERR_BAD_PARAMETER) opVex(y1, &y2, x, T_F2 | T_0F38 | T_W0 | T_YMM, 0xCB); } ++void vshufpd(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_B64, 0xC6, imm); } ++void vshufps(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_0F|T_W0|T_YMM|T_EVEX|T_B32, 0xC6, imm); } ++void vsm3msg1(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_0F38|T_W0|T_EVEX, 0xDA); } ++void vsm3msg2(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_EVEX, 0xDA); } ++void vsm3rnds2(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_EVEX, 0xDE, imm); } ++void vsm4key4(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F3|T_0F38|T_W0|T_EVEX, 0xDA); } ++void vsm4rnds4(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F2|T_0F38|T_W0|T_EVEX, 0xDA); } ++void vsqrtpd(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0x51); } ++void vsqrtps(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_0F|T_W0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0x51); } ++void vsqrtsd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_F2|T_0F|T_EW1|T_EVEX|T_ER_X, 0x51); } ++void vsqrtss(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_F3|T_0F|T_W0|T_EVEX|T_ER_X, 0x51); } + void vstmxcsr(const Address& addr) { opAVX_X_X_XM(xm3, xm0, addr, T_0F, 0xAE); } +-void vsubpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_ER_Z | T_B64, 0x5C); } +-void vsubps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_W0 | T_YMM | T_EVEX | T_ER_Z | T_B32, 0x5C); } +-void vsubsd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F2 | T_EW1 | T_EVEX | T_ER_X | T_N8, 0x5C); } +-void vsubss(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F3 | T_W0 | T_EVEX | T_ER_X | T_N4, 0x5C); } +-void vtestpd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F38|T_YMM, 0x0F); } +-void vtestps(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F38|T_YMM, 0x0E); } +-void vucomisd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N8|T_66|T_0F|T_EW1|T_EVEX|T_SAE_X, 0x2E); } +-void vucomiss(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N4|T_0F|T_W0|T_EVEX|T_SAE_X, 0x2E); } +-void vunpckhpd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_B64, 0x15); } +-void vunpckhps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_0F|T_W0|T_YMM|T_EVEX|T_B32, 0x15); } +-void vunpcklpd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_B64, 0x14); } +-void vunpcklps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_0F|T_W0|T_YMM|T_EVEX|T_B32, 0x14); } +-void vxorpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_B64, 0x57); } +-void vxorps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_W0 | T_YMM | T_EVEX | T_B32, 0x57); } ++void vsubpd(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_ER_Z | T_B64, 0x5C); } ++void vsubps(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_W0 | T_YMM | T_EVEX | T_ER_Z | T_B32, 0x5C); } ++void vsubsd(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F2 | T_EW1 | T_EVEX | T_ER_X | T_N8, 0x5C); } ++void vsubss(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F3 | T_W0 | T_EVEX | T_ER_X | T_N4, 0x5C); } ++void vtestpd(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F38|T_YMM, 0x0F); } ++void vtestps(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F38|T_YMM, 0x0E); } ++void vucomisd(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N8|T_66|T_0F|T_EW1|T_EVEX|T_SAE_X, 0x2E); } ++void vucomiss(Xmm xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N4|T_0F|T_W0|T_EVEX|T_SAE_X, 0x2E); } ++void vunpckhpd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_B64, 0x15); } ++void vunpckhps(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_0F|T_W0|T_YMM|T_EVEX|T_B32, 0x15); } ++void vunpcklpd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_B64, 0x14); } ++void vunpcklps(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_0F|T_W0|T_YMM|T_EVEX|T_B32, 0x14); } ++void vxorpd(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_B64, 0x57); } ++void vxorps(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_W0 | T_YMM | T_EVEX | T_B32, 0x57); } + void vzeroall() { db(0xC5); db(0xFC); db(0x77); } + void vzeroupper() { db(0xC5); db(0xF8); db(0x77); } + void wait() { db(0x9B); } + void wbinvd() { db(0x0F); db(0x09); } + void wrmsr() { db(0x0F); db(0x30); } + void xabort(uint8_t imm) { db(0xC6); db(0xF8); db(imm); } +-void xadd(const Operand& op, const Reg& reg) { opRO(reg, op, T_0F, 0xC0 | (reg.isBit(8) ? 0 : 1), op.getBit() == reg.getBit()); } ++void xadd(const Operand& op, Reg reg) { opRO(reg, op, T_0F, 0xC0 | (reg.isBit(8) ? 0 : 1), op.getBit() == reg.getBit()); } + void xbegin(uint32_t rel) { db(0xC7); db(0xF8); dd(rel); } + void xend() { db(0x0F); db(0x01); db(0xD5); } + void xgetbv() { db(0x0F); db(0x01); db(0xD0); } + void xlatb() { db(0xD7); } + void xor_(const Operand& op, uint32_t imm) { opOI(op, imm, 0x30, 6); } + void xor_(const Operand& op1, const Operand& op2) { opRO_MR(op1, op2, 0x30); } +-void xor_(const Reg& d, const Operand& op, uint32_t imm) { opROI(d, op, imm, T_NF|T_CODE1_IF1, 6); } +-void xor_(const Reg& d, const Operand& op1, const Operand& op2) { opROO(d, op1, op2, T_NF|T_CODE1_IF1, 0x30); } +-void xorpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x57, isXMM_XMMorMEM); } +-void xorps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x57, isXMM_XMMorMEM); } ++void xor_(Reg d, const Operand& op, uint32_t imm) { opROI(d, op, imm, T_NF|T_CODE1_IF1, 6); } ++void xor_(Reg d, const Operand& op1, const Operand& op2) { opROO(d, op1, op2, T_NF|T_CODE1_IF1, 0x30); } ++void xorpd(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x57, isXMM_XMMorMEM); } ++void xorps(Xmm xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x57, isXMM_XMMorMEM); } + void xresldtrk() { db(0xF2); db(0x0F); db(0x01); db(0xE9); } + void xsusldtrk() { db(0xF2); db(0x0F); db(0x01); db(0xE8); } + #ifdef XBYAK_ENABLE_OMITTED_OPERAND +-void vblendpd(const Xmm& x, const Operand& op, uint8_t imm) { vblendpd(x, x, op, imm); } +-void vblendps(const Xmm& x, const Operand& op, uint8_t imm) { vblendps(x, x, op, imm); } +-void vblendvpd(const Xmm& x1, const Operand& op, const Xmm& x4) { vblendvpd(x1, x1, op, x4); } +-void vblendvps(const Xmm& x1, const Operand& op, const Xmm& x4) { vblendvps(x1, x1, op, x4); } +-void vcmpeq_ospd(const Xmm& x, const Operand& op) { vcmpeq_ospd(x, x, op); } +-void vcmpeq_osps(const Xmm& x, const Operand& op) { vcmpeq_osps(x, x, op); } +-void vcmpeq_ossd(const Xmm& x, const Operand& op) { vcmpeq_ossd(x, x, op); } +-void vcmpeq_osss(const Xmm& x, const Operand& op) { vcmpeq_osss(x, x, op); } +-void vcmpeq_uqpd(const Xmm& x, const Operand& op) { vcmpeq_uqpd(x, x, op); } +-void vcmpeq_uqps(const Xmm& x, const Operand& op) { vcmpeq_uqps(x, x, op); } +-void vcmpeq_uqsd(const Xmm& x, const Operand& op) { vcmpeq_uqsd(x, x, op); } +-void vcmpeq_uqss(const Xmm& x, const Operand& op) { vcmpeq_uqss(x, x, op); } +-void vcmpeq_uspd(const Xmm& x, const Operand& op) { vcmpeq_uspd(x, x, op); } +-void vcmpeq_usps(const Xmm& x, const Operand& op) { vcmpeq_usps(x, x, op); } +-void vcmpeq_ussd(const Xmm& x, const Operand& op) { vcmpeq_ussd(x, x, op); } +-void vcmpeq_usss(const Xmm& x, const Operand& op) { vcmpeq_usss(x, x, op); } +-void vcmpeqpd(const Xmm& x, const Operand& op) { vcmpeqpd(x, x, op); } +-void vcmpeqps(const Xmm& x, const Operand& op) { vcmpeqps(x, x, op); } +-void vcmpeqsd(const Xmm& x, const Operand& op) { vcmpeqsd(x, x, op); } +-void vcmpeqss(const Xmm& x, const Operand& op) { vcmpeqss(x, x, op); } +-void vcmpfalse_ospd(const Xmm& x, const Operand& op) { vcmpfalse_ospd(x, x, op); } +-void vcmpfalse_osps(const Xmm& x, const Operand& op) { vcmpfalse_osps(x, x, op); } +-void vcmpfalse_ossd(const Xmm& x, const Operand& op) { vcmpfalse_ossd(x, x, op); } +-void vcmpfalse_osss(const Xmm& x, const Operand& op) { vcmpfalse_osss(x, x, op); } +-void vcmpfalsepd(const Xmm& x, const Operand& op) { vcmpfalsepd(x, x, op); } +-void vcmpfalseps(const Xmm& x, const Operand& op) { vcmpfalseps(x, x, op); } +-void vcmpfalsesd(const Xmm& x, const Operand& op) { vcmpfalsesd(x, x, op); } +-void vcmpfalsess(const Xmm& x, const Operand& op) { vcmpfalsess(x, x, op); } +-void vcmpge_oqpd(const Xmm& x, const Operand& op) { vcmpge_oqpd(x, x, op); } +-void vcmpge_oqps(const Xmm& x, const Operand& op) { vcmpge_oqps(x, x, op); } +-void vcmpge_oqsd(const Xmm& x, const Operand& op) { vcmpge_oqsd(x, x, op); } +-void vcmpge_oqss(const Xmm& x, const Operand& op) { vcmpge_oqss(x, x, op); } +-void vcmpgepd(const Xmm& x, const Operand& op) { vcmpgepd(x, x, op); } +-void vcmpgeps(const Xmm& x, const Operand& op) { vcmpgeps(x, x, op); } +-void vcmpgesd(const Xmm& x, const Operand& op) { vcmpgesd(x, x, op); } +-void vcmpgess(const Xmm& x, const Operand& op) { vcmpgess(x, x, op); } +-void vcmpgt_oqpd(const Xmm& x, const Operand& op) { vcmpgt_oqpd(x, x, op); } +-void vcmpgt_oqps(const Xmm& x, const Operand& op) { vcmpgt_oqps(x, x, op); } +-void vcmpgt_oqsd(const Xmm& x, const Operand& op) { vcmpgt_oqsd(x, x, op); } +-void vcmpgt_oqss(const Xmm& x, const Operand& op) { vcmpgt_oqss(x, x, op); } +-void vcmpgtpd(const Xmm& x, const Operand& op) { vcmpgtpd(x, x, op); } +-void vcmpgtps(const Xmm& x, const Operand& op) { vcmpgtps(x, x, op); } +-void vcmpgtsd(const Xmm& x, const Operand& op) { vcmpgtsd(x, x, op); } +-void vcmpgtss(const Xmm& x, const Operand& op) { vcmpgtss(x, x, op); } +-void vcmple_oqpd(const Xmm& x, const Operand& op) { vcmple_oqpd(x, x, op); } +-void vcmple_oqps(const Xmm& x, const Operand& op) { vcmple_oqps(x, x, op); } +-void vcmple_oqsd(const Xmm& x, const Operand& op) { vcmple_oqsd(x, x, op); } +-void vcmple_oqss(const Xmm& x, const Operand& op) { vcmple_oqss(x, x, op); } +-void vcmplepd(const Xmm& x, const Operand& op) { vcmplepd(x, x, op); } +-void vcmpleps(const Xmm& x, const Operand& op) { vcmpleps(x, x, op); } +-void vcmplesd(const Xmm& x, const Operand& op) { vcmplesd(x, x, op); } +-void vcmpless(const Xmm& x, const Operand& op) { vcmpless(x, x, op); } +-void vcmplt_oqpd(const Xmm& x, const Operand& op) { vcmplt_oqpd(x, x, op); } +-void vcmplt_oqps(const Xmm& x, const Operand& op) { vcmplt_oqps(x, x, op); } +-void vcmplt_oqsd(const Xmm& x, const Operand& op) { vcmplt_oqsd(x, x, op); } +-void vcmplt_oqss(const Xmm& x, const Operand& op) { vcmplt_oqss(x, x, op); } +-void vcmpltpd(const Xmm& x, const Operand& op) { vcmpltpd(x, x, op); } +-void vcmpltps(const Xmm& x, const Operand& op) { vcmpltps(x, x, op); } +-void vcmpltsd(const Xmm& x, const Operand& op) { vcmpltsd(x, x, op); } +-void vcmpltss(const Xmm& x, const Operand& op) { vcmpltss(x, x, op); } +-void vcmpneq_oqpd(const Xmm& x, const Operand& op) { vcmpneq_oqpd(x, x, op); } +-void vcmpneq_oqps(const Xmm& x, const Operand& op) { vcmpneq_oqps(x, x, op); } +-void vcmpneq_oqsd(const Xmm& x, const Operand& op) { vcmpneq_oqsd(x, x, op); } +-void vcmpneq_oqss(const Xmm& x, const Operand& op) { vcmpneq_oqss(x, x, op); } +-void vcmpneq_ospd(const Xmm& x, const Operand& op) { vcmpneq_ospd(x, x, op); } +-void vcmpneq_osps(const Xmm& x, const Operand& op) { vcmpneq_osps(x, x, op); } +-void vcmpneq_ossd(const Xmm& x, const Operand& op) { vcmpneq_ossd(x, x, op); } +-void vcmpneq_osss(const Xmm& x, const Operand& op) { vcmpneq_osss(x, x, op); } +-void vcmpneq_uspd(const Xmm& x, const Operand& op) { vcmpneq_uspd(x, x, op); } +-void vcmpneq_usps(const Xmm& x, const Operand& op) { vcmpneq_usps(x, x, op); } +-void vcmpneq_ussd(const Xmm& x, const Operand& op) { vcmpneq_ussd(x, x, op); } +-void vcmpneq_usss(const Xmm& x, const Operand& op) { vcmpneq_usss(x, x, op); } +-void vcmpneqpd(const Xmm& x, const Operand& op) { vcmpneqpd(x, x, op); } +-void vcmpneqps(const Xmm& x, const Operand& op) { vcmpneqps(x, x, op); } +-void vcmpneqsd(const Xmm& x, const Operand& op) { vcmpneqsd(x, x, op); } +-void vcmpneqss(const Xmm& x, const Operand& op) { vcmpneqss(x, x, op); } +-void vcmpnge_uqpd(const Xmm& x, const Operand& op) { vcmpnge_uqpd(x, x, op); } +-void vcmpnge_uqps(const Xmm& x, const Operand& op) { vcmpnge_uqps(x, x, op); } +-void vcmpnge_uqsd(const Xmm& x, const Operand& op) { vcmpnge_uqsd(x, x, op); } +-void vcmpnge_uqss(const Xmm& x, const Operand& op) { vcmpnge_uqss(x, x, op); } +-void vcmpngepd(const Xmm& x, const Operand& op) { vcmpngepd(x, x, op); } +-void vcmpngeps(const Xmm& x, const Operand& op) { vcmpngeps(x, x, op); } +-void vcmpngesd(const Xmm& x, const Operand& op) { vcmpngesd(x, x, op); } +-void vcmpngess(const Xmm& x, const Operand& op) { vcmpngess(x, x, op); } +-void vcmpngt_uqpd(const Xmm& x, const Operand& op) { vcmpngt_uqpd(x, x, op); } +-void vcmpngt_uqps(const Xmm& x, const Operand& op) { vcmpngt_uqps(x, x, op); } +-void vcmpngt_uqsd(const Xmm& x, const Operand& op) { vcmpngt_uqsd(x, x, op); } +-void vcmpngt_uqss(const Xmm& x, const Operand& op) { vcmpngt_uqss(x, x, op); } +-void vcmpngtpd(const Xmm& x, const Operand& op) { vcmpngtpd(x, x, op); } +-void vcmpngtps(const Xmm& x, const Operand& op) { vcmpngtps(x, x, op); } +-void vcmpngtsd(const Xmm& x, const Operand& op) { vcmpngtsd(x, x, op); } +-void vcmpngtss(const Xmm& x, const Operand& op) { vcmpngtss(x, x, op); } +-void vcmpnle_uqpd(const Xmm& x, const Operand& op) { vcmpnle_uqpd(x, x, op); } +-void vcmpnle_uqps(const Xmm& x, const Operand& op) { vcmpnle_uqps(x, x, op); } +-void vcmpnle_uqsd(const Xmm& x, const Operand& op) { vcmpnle_uqsd(x, x, op); } +-void vcmpnle_uqss(const Xmm& x, const Operand& op) { vcmpnle_uqss(x, x, op); } +-void vcmpnlepd(const Xmm& x, const Operand& op) { vcmpnlepd(x, x, op); } +-void vcmpnleps(const Xmm& x, const Operand& op) { vcmpnleps(x, x, op); } +-void vcmpnlesd(const Xmm& x, const Operand& op) { vcmpnlesd(x, x, op); } +-void vcmpnless(const Xmm& x, const Operand& op) { vcmpnless(x, x, op); } +-void vcmpnlt_uqpd(const Xmm& x, const Operand& op) { vcmpnlt_uqpd(x, x, op); } +-void vcmpnlt_uqps(const Xmm& x, const Operand& op) { vcmpnlt_uqps(x, x, op); } +-void vcmpnlt_uqsd(const Xmm& x, const Operand& op) { vcmpnlt_uqsd(x, x, op); } +-void vcmpnlt_uqss(const Xmm& x, const Operand& op) { vcmpnlt_uqss(x, x, op); } +-void vcmpnltpd(const Xmm& x, const Operand& op) { vcmpnltpd(x, x, op); } +-void vcmpnltps(const Xmm& x, const Operand& op) { vcmpnltps(x, x, op); } +-void vcmpnltsd(const Xmm& x, const Operand& op) { vcmpnltsd(x, x, op); } +-void vcmpnltss(const Xmm& x, const Operand& op) { vcmpnltss(x, x, op); } +-void vcmpord_spd(const Xmm& x, const Operand& op) { vcmpord_spd(x, x, op); } +-void vcmpord_sps(const Xmm& x, const Operand& op) { vcmpord_sps(x, x, op); } +-void vcmpord_ssd(const Xmm& x, const Operand& op) { vcmpord_ssd(x, x, op); } +-void vcmpord_sss(const Xmm& x, const Operand& op) { vcmpord_sss(x, x, op); } +-void vcmpordpd(const Xmm& x, const Operand& op) { vcmpordpd(x, x, op); } +-void vcmpordps(const Xmm& x, const Operand& op) { vcmpordps(x, x, op); } +-void vcmpordsd(const Xmm& x, const Operand& op) { vcmpordsd(x, x, op); } +-void vcmpordss(const Xmm& x, const Operand& op) { vcmpordss(x, x, op); } +-void vcmppd(const Xmm& x, const Operand& op, uint8_t imm) { vcmppd(x, x, op, imm); } +-void vcmpps(const Xmm& x, const Operand& op, uint8_t imm) { vcmpps(x, x, op, imm); } +-void vcmpsd(const Xmm& x, const Operand& op, uint8_t imm) { vcmpsd(x, x, op, imm); } +-void vcmpss(const Xmm& x, const Operand& op, uint8_t imm) { vcmpss(x, x, op, imm); } +-void vcmptrue_uspd(const Xmm& x, const Operand& op) { vcmptrue_uspd(x, x, op); } +-void vcmptrue_usps(const Xmm& x, const Operand& op) { vcmptrue_usps(x, x, op); } +-void vcmptrue_ussd(const Xmm& x, const Operand& op) { vcmptrue_ussd(x, x, op); } +-void vcmptrue_usss(const Xmm& x, const Operand& op) { vcmptrue_usss(x, x, op); } +-void vcmptruepd(const Xmm& x, const Operand& op) { vcmptruepd(x, x, op); } +-void vcmptrueps(const Xmm& x, const Operand& op) { vcmptrueps(x, x, op); } +-void vcmptruesd(const Xmm& x, const Operand& op) { vcmptruesd(x, x, op); } +-void vcmptruess(const Xmm& x, const Operand& op) { vcmptruess(x, x, op); } +-void vcmpunord_spd(const Xmm& x, const Operand& op) { vcmpunord_spd(x, x, op); } +-void vcmpunord_sps(const Xmm& x, const Operand& op) { vcmpunord_sps(x, x, op); } +-void vcmpunord_ssd(const Xmm& x, const Operand& op) { vcmpunord_ssd(x, x, op); } +-void vcmpunord_sss(const Xmm& x, const Operand& op) { vcmpunord_sss(x, x, op); } +-void vcmpunordpd(const Xmm& x, const Operand& op) { vcmpunordpd(x, x, op); } +-void vcmpunordps(const Xmm& x, const Operand& op) { vcmpunordps(x, x, op); } +-void vcmpunordsd(const Xmm& x, const Operand& op) { vcmpunordsd(x, x, op); } +-void vcmpunordss(const Xmm& x, const Operand& op) { vcmpunordss(x, x, op); } +-void vcvtsd2ss(const Xmm& x, const Operand& op) { vcvtsd2ss(x, x, op); } +-void vcvtsi2sd(const Xmm& x, const Operand& op) { vcvtsi2sd(x, x, op); } +-void vcvtsi2ss(const Xmm& x, const Operand& op) { vcvtsi2ss(x, x, op); } +-void vcvtss2sd(const Xmm& x, const Operand& op) { vcvtss2sd(x, x, op); } +-void vdppd(const Xmm& x, const Operand& op, uint8_t imm) { vdppd(x, x, op, imm); } +-void vdpps(const Xmm& x, const Operand& op, uint8_t imm) { vdpps(x, x, op, imm); } +-void vinsertps(const Xmm& x, const Operand& op, uint8_t imm) { vinsertps(x, x, op, imm); } +-void vmpsadbw(const Xmm& x, const Operand& op, uint8_t imm) { vmpsadbw(x, x, op, imm); } +-void vpackssdw(const Xmm& x, const Operand& op) { vpackssdw(x, x, op); } +-void vpacksswb(const Xmm& x, const Operand& op) { vpacksswb(x, x, op); } +-void vpackusdw(const Xmm& x, const Operand& op) { vpackusdw(x, x, op); } +-void vpackuswb(const Xmm& x, const Operand& op) { vpackuswb(x, x, op); } +-void vpaddb(const Xmm& x, const Operand& op) { vpaddb(x, x, op); } +-void vpaddd(const Xmm& x, const Operand& op) { vpaddd(x, x, op); } +-void vpaddq(const Xmm& x, const Operand& op) { vpaddq(x, x, op); } +-void vpaddsb(const Xmm& x, const Operand& op) { vpaddsb(x, x, op); } +-void vpaddsw(const Xmm& x, const Operand& op) { vpaddsw(x, x, op); } +-void vpaddusb(const Xmm& x, const Operand& op) { vpaddusb(x, x, op); } +-void vpaddusw(const Xmm& x, const Operand& op) { vpaddusw(x, x, op); } +-void vpaddw(const Xmm& x, const Operand& op) { vpaddw(x, x, op); } +-void vpalignr(const Xmm& x, const Operand& op, uint8_t imm) { vpalignr(x, x, op, imm); } +-void vpand(const Xmm& x, const Operand& op) { vpand(x, x, op); } +-void vpandn(const Xmm& x, const Operand& op) { vpandn(x, x, op); } +-void vpavgb(const Xmm& x, const Operand& op) { vpavgb(x, x, op); } +-void vpavgw(const Xmm& x, const Operand& op) { vpavgw(x, x, op); } +-void vpblendd(const Xmm& x, const Operand& op, uint8_t imm) { vpblendd(x, x, op, imm); } +-void vpblendvb(const Xmm& x1, const Operand& op, const Xmm& x4) { vpblendvb(x1, x1, op, x4); } +-void vpblendw(const Xmm& x, const Operand& op, uint8_t imm) { vpblendw(x, x, op, imm); } +-void vpclmulqdq(const Xmm& x, const Operand& op, uint8_t imm) { vpclmulqdq(x, x, op, imm); } +-void vpcmpeqb(const Xmm& x, const Operand& op) { vpcmpeqb(x, x, op); } +-void vpcmpeqd(const Xmm& x, const Operand& op) { vpcmpeqd(x, x, op); } +-void vpcmpeqq(const Xmm& x, const Operand& op) { vpcmpeqq(x, x, op); } +-void vpcmpeqw(const Xmm& x, const Operand& op) { vpcmpeqw(x, x, op); } +-void vpcmpgtb(const Xmm& x, const Operand& op) { vpcmpgtb(x, x, op); } +-void vpcmpgtd(const Xmm& x, const Operand& op) { vpcmpgtd(x, x, op); } +-void vpcmpgtq(const Xmm& x, const Operand& op) { vpcmpgtq(x, x, op); } +-void vpcmpgtw(const Xmm& x, const Operand& op) { vpcmpgtw(x, x, op); } +-void vphaddd(const Xmm& x, const Operand& op) { vphaddd(x, x, op); } +-void vphaddsw(const Xmm& x, const Operand& op) { vphaddsw(x, x, op); } +-void vphaddw(const Xmm& x, const Operand& op) { vphaddw(x, x, op); } +-void vphsubd(const Xmm& x, const Operand& op) { vphsubd(x, x, op); } +-void vphsubsw(const Xmm& x, const Operand& op) { vphsubsw(x, x, op); } +-void vphsubw(const Xmm& x, const Operand& op) { vphsubw(x, x, op); } +-void vpinsrb(const Xmm& x, const Operand& op, uint8_t imm) { vpinsrb(x, x, op, imm); } +-void vpinsrd(const Xmm& x, const Operand& op, uint8_t imm) { vpinsrd(x, x, op, imm); } +-void vpinsrq(const Xmm& x, const Operand& op, uint8_t imm) { vpinsrq(x, x, op, imm); } +-void vpinsrw(const Xmm& x, const Operand& op, uint8_t imm) { vpinsrw(x, x, op, imm); } +-void vpmaddubsw(const Xmm& x, const Operand& op) { vpmaddubsw(x, x, op); } +-void vpmaddwd(const Xmm& x, const Operand& op) { vpmaddwd(x, x, op); } +-void vpmaxsb(const Xmm& x, const Operand& op) { vpmaxsb(x, x, op); } +-void vpmaxsd(const Xmm& x, const Operand& op) { vpmaxsd(x, x, op); } +-void vpmaxsw(const Xmm& x, const Operand& op) { vpmaxsw(x, x, op); } +-void vpmaxub(const Xmm& x, const Operand& op) { vpmaxub(x, x, op); } +-void vpmaxud(const Xmm& x, const Operand& op) { vpmaxud(x, x, op); } +-void vpmaxuw(const Xmm& x, const Operand& op) { vpmaxuw(x, x, op); } +-void vpminsb(const Xmm& x, const Operand& op) { vpminsb(x, x, op); } +-void vpminsd(const Xmm& x, const Operand& op) { vpminsd(x, x, op); } +-void vpminsw(const Xmm& x, const Operand& op) { vpminsw(x, x, op); } +-void vpminub(const Xmm& x, const Operand& op) { vpminub(x, x, op); } +-void vpminud(const Xmm& x, const Operand& op) { vpminud(x, x, op); } +-void vpminuw(const Xmm& x, const Operand& op) { vpminuw(x, x, op); } +-void vpmuldq(const Xmm& x, const Operand& op) { vpmuldq(x, x, op); } +-void vpmulhrsw(const Xmm& x, const Operand& op) { vpmulhrsw(x, x, op); } +-void vpmulhuw(const Xmm& x, const Operand& op) { vpmulhuw(x, x, op); } +-void vpmulhw(const Xmm& x, const Operand& op) { vpmulhw(x, x, op); } +-void vpmulld(const Xmm& x, const Operand& op) { vpmulld(x, x, op); } +-void vpmullw(const Xmm& x, const Operand& op) { vpmullw(x, x, op); } +-void vpmuludq(const Xmm& x, const Operand& op) { vpmuludq(x, x, op); } +-void vpor(const Xmm& x, const Operand& op) { vpor(x, x, op); } +-void vpsadbw(const Xmm& x, const Operand& op) { vpsadbw(x, x, op); } +-void vpsignb(const Xmm& x, const Operand& op) { vpsignb(x, x, op); } +-void vpsignd(const Xmm& x, const Operand& op) { vpsignd(x, x, op); } +-void vpsignw(const Xmm& x, const Operand& op) { vpsignw(x, x, op); } +-void vpslld(const Xmm& x, const Operand& op) { vpslld(x, x, op); } +-void vpslld(const Xmm& x, uint8_t imm) { vpslld(x, x, imm); } +-void vpslldq(const Xmm& x, uint8_t imm) { vpslldq(x, x, imm); } +-void vpsllq(const Xmm& x, const Operand& op) { vpsllq(x, x, op); } +-void vpsllq(const Xmm& x, uint8_t imm) { vpsllq(x, x, imm); } +-void vpsllw(const Xmm& x, const Operand& op) { vpsllw(x, x, op); } +-void vpsllw(const Xmm& x, uint8_t imm) { vpsllw(x, x, imm); } +-void vpsrad(const Xmm& x, const Operand& op) { vpsrad(x, x, op); } +-void vpsrad(const Xmm& x, uint8_t imm) { vpsrad(x, x, imm); } +-void vpsraw(const Xmm& x, const Operand& op) { vpsraw(x, x, op); } +-void vpsraw(const Xmm& x, uint8_t imm) { vpsraw(x, x, imm); } +-void vpsrld(const Xmm& x, const Operand& op) { vpsrld(x, x, op); } +-void vpsrld(const Xmm& x, uint8_t imm) { vpsrld(x, x, imm); } +-void vpsrldq(const Xmm& x, uint8_t imm) { vpsrldq(x, x, imm); } +-void vpsrlq(const Xmm& x, const Operand& op) { vpsrlq(x, x, op); } +-void vpsrlq(const Xmm& x, uint8_t imm) { vpsrlq(x, x, imm); } +-void vpsrlw(const Xmm& x, const Operand& op) { vpsrlw(x, x, op); } +-void vpsrlw(const Xmm& x, uint8_t imm) { vpsrlw(x, x, imm); } +-void vpsubb(const Xmm& x, const Operand& op) { vpsubb(x, x, op); } +-void vpsubd(const Xmm& x, const Operand& op) { vpsubd(x, x, op); } +-void vpsubq(const Xmm& x, const Operand& op) { vpsubq(x, x, op); } +-void vpsubsb(const Xmm& x, const Operand& op) { vpsubsb(x, x, op); } +-void vpsubsw(const Xmm& x, const Operand& op) { vpsubsw(x, x, op); } +-void vpsubusb(const Xmm& x, const Operand& op) { vpsubusb(x, x, op); } +-void vpsubusw(const Xmm& x, const Operand& op) { vpsubusw(x, x, op); } +-void vpsubw(const Xmm& x, const Operand& op) { vpsubw(x, x, op); } +-void vpunpckhbw(const Xmm& x, const Operand& op) { vpunpckhbw(x, x, op); } +-void vpunpckhdq(const Xmm& x, const Operand& op) { vpunpckhdq(x, x, op); } +-void vpunpckhqdq(const Xmm& x, const Operand& op) { vpunpckhqdq(x, x, op); } +-void vpunpckhwd(const Xmm& x, const Operand& op) { vpunpckhwd(x, x, op); } +-void vpunpcklbw(const Xmm& x, const Operand& op) { vpunpcklbw(x, x, op); } +-void vpunpckldq(const Xmm& x, const Operand& op) { vpunpckldq(x, x, op); } +-void vpunpcklqdq(const Xmm& x, const Operand& op) { vpunpcklqdq(x, x, op); } +-void vpunpcklwd(const Xmm& x, const Operand& op) { vpunpcklwd(x, x, op); } +-void vpxor(const Xmm& x, const Operand& op) { vpxor(x, x, op); } +-void vrcpss(const Xmm& x, const Operand& op) { vrcpss(x, x, op); } +-void vroundsd(const Xmm& x, const Operand& op, uint8_t imm) { vroundsd(x, x, op, imm); } +-void vroundss(const Xmm& x, const Operand& op, uint8_t imm) { vroundss(x, x, op, imm); } +-void vrsqrtss(const Xmm& x, const Operand& op) { vrsqrtss(x, x, op); } +-void vshufpd(const Xmm& x, const Operand& op, uint8_t imm) { vshufpd(x, x, op, imm); } +-void vshufps(const Xmm& x, const Operand& op, uint8_t imm) { vshufps(x, x, op, imm); } +-void vsqrtsd(const Xmm& x, const Operand& op) { vsqrtsd(x, x, op); } +-void vsqrtss(const Xmm& x, const Operand& op) { vsqrtss(x, x, op); } +-void vunpckhpd(const Xmm& x, const Operand& op) { vunpckhpd(x, x, op); } +-void vunpckhps(const Xmm& x, const Operand& op) { vunpckhps(x, x, op); } +-void vunpcklpd(const Xmm& x, const Operand& op) { vunpcklpd(x, x, op); } +-void vunpcklps(const Xmm& x, const Operand& op) { vunpcklps(x, x, op); } ++void vblendpd(Xmm x, const Operand& op, uint8_t imm) { vblendpd(x, x, op, imm); } ++void vblendps(Xmm x, const Operand& op, uint8_t imm) { vblendps(x, x, op, imm); } ++void vblendvpd(Xmm x1, const Operand& op, Xmm x4) { vblendvpd(x1, x1, op, x4); } ++void vblendvps(Xmm x1, const Operand& op, Xmm x4) { vblendvps(x1, x1, op, x4); } ++void vcmpeq_ospd(Xmm x, const Operand& op) { vcmpeq_ospd(x, x, op); } ++void vcmpeq_osps(Xmm x, const Operand& op) { vcmpeq_osps(x, x, op); } ++void vcmpeq_ossd(Xmm x, const Operand& op) { vcmpeq_ossd(x, x, op); } ++void vcmpeq_osss(Xmm x, const Operand& op) { vcmpeq_osss(x, x, op); } ++void vcmpeq_uqpd(Xmm x, const Operand& op) { vcmpeq_uqpd(x, x, op); } ++void vcmpeq_uqps(Xmm x, const Operand& op) { vcmpeq_uqps(x, x, op); } ++void vcmpeq_uqsd(Xmm x, const Operand& op) { vcmpeq_uqsd(x, x, op); } ++void vcmpeq_uqss(Xmm x, const Operand& op) { vcmpeq_uqss(x, x, op); } ++void vcmpeq_uspd(Xmm x, const Operand& op) { vcmpeq_uspd(x, x, op); } ++void vcmpeq_usps(Xmm x, const Operand& op) { vcmpeq_usps(x, x, op); } ++void vcmpeq_ussd(Xmm x, const Operand& op) { vcmpeq_ussd(x, x, op); } ++void vcmpeq_usss(Xmm x, const Operand& op) { vcmpeq_usss(x, x, op); } ++void vcmpeqpd(Xmm x, const Operand& op) { vcmpeqpd(x, x, op); } ++void vcmpeqps(Xmm x, const Operand& op) { vcmpeqps(x, x, op); } ++void vcmpeqsd(Xmm x, const Operand& op) { vcmpeqsd(x, x, op); } ++void vcmpeqss(Xmm x, const Operand& op) { vcmpeqss(x, x, op); } ++void vcmpfalse_ospd(Xmm x, const Operand& op) { vcmpfalse_ospd(x, x, op); } ++void vcmpfalse_osps(Xmm x, const Operand& op) { vcmpfalse_osps(x, x, op); } ++void vcmpfalse_ossd(Xmm x, const Operand& op) { vcmpfalse_ossd(x, x, op); } ++void vcmpfalse_osss(Xmm x, const Operand& op) { vcmpfalse_osss(x, x, op); } ++void vcmpfalsepd(Xmm x, const Operand& op) { vcmpfalsepd(x, x, op); } ++void vcmpfalseps(Xmm x, const Operand& op) { vcmpfalseps(x, x, op); } ++void vcmpfalsesd(Xmm x, const Operand& op) { vcmpfalsesd(x, x, op); } ++void vcmpfalsess(Xmm x, const Operand& op) { vcmpfalsess(x, x, op); } ++void vcmpge_oqpd(Xmm x, const Operand& op) { vcmpge_oqpd(x, x, op); } ++void vcmpge_oqps(Xmm x, const Operand& op) { vcmpge_oqps(x, x, op); } ++void vcmpge_oqsd(Xmm x, const Operand& op) { vcmpge_oqsd(x, x, op); } ++void vcmpge_oqss(Xmm x, const Operand& op) { vcmpge_oqss(x, x, op); } ++void vcmpgepd(Xmm x, const Operand& op) { vcmpgepd(x, x, op); } ++void vcmpgeps(Xmm x, const Operand& op) { vcmpgeps(x, x, op); } ++void vcmpgesd(Xmm x, const Operand& op) { vcmpgesd(x, x, op); } ++void vcmpgess(Xmm x, const Operand& op) { vcmpgess(x, x, op); } ++void vcmpgt_oqpd(Xmm x, const Operand& op) { vcmpgt_oqpd(x, x, op); } ++void vcmpgt_oqps(Xmm x, const Operand& op) { vcmpgt_oqps(x, x, op); } ++void vcmpgt_oqsd(Xmm x, const Operand& op) { vcmpgt_oqsd(x, x, op); } ++void vcmpgt_oqss(Xmm x, const Operand& op) { vcmpgt_oqss(x, x, op); } ++void vcmpgtpd(Xmm x, const Operand& op) { vcmpgtpd(x, x, op); } ++void vcmpgtps(Xmm x, const Operand& op) { vcmpgtps(x, x, op); } ++void vcmpgtsd(Xmm x, const Operand& op) { vcmpgtsd(x, x, op); } ++void vcmpgtss(Xmm x, const Operand& op) { vcmpgtss(x, x, op); } ++void vcmple_oqpd(Xmm x, const Operand& op) { vcmple_oqpd(x, x, op); } ++void vcmple_oqps(Xmm x, const Operand& op) { vcmple_oqps(x, x, op); } ++void vcmple_oqsd(Xmm x, const Operand& op) { vcmple_oqsd(x, x, op); } ++void vcmple_oqss(Xmm x, const Operand& op) { vcmple_oqss(x, x, op); } ++void vcmplepd(Xmm x, const Operand& op) { vcmplepd(x, x, op); } ++void vcmpleps(Xmm x, const Operand& op) { vcmpleps(x, x, op); } ++void vcmplesd(Xmm x, const Operand& op) { vcmplesd(x, x, op); } ++void vcmpless(Xmm x, const Operand& op) { vcmpless(x, x, op); } ++void vcmplt_oqpd(Xmm x, const Operand& op) { vcmplt_oqpd(x, x, op); } ++void vcmplt_oqps(Xmm x, const Operand& op) { vcmplt_oqps(x, x, op); } ++void vcmplt_oqsd(Xmm x, const Operand& op) { vcmplt_oqsd(x, x, op); } ++void vcmplt_oqss(Xmm x, const Operand& op) { vcmplt_oqss(x, x, op); } ++void vcmpltpd(Xmm x, const Operand& op) { vcmpltpd(x, x, op); } ++void vcmpltps(Xmm x, const Operand& op) { vcmpltps(x, x, op); } ++void vcmpltsd(Xmm x, const Operand& op) { vcmpltsd(x, x, op); } ++void vcmpltss(Xmm x, const Operand& op) { vcmpltss(x, x, op); } ++void vcmpneq_oqpd(Xmm x, const Operand& op) { vcmpneq_oqpd(x, x, op); } ++void vcmpneq_oqps(Xmm x, const Operand& op) { vcmpneq_oqps(x, x, op); } ++void vcmpneq_oqsd(Xmm x, const Operand& op) { vcmpneq_oqsd(x, x, op); } ++void vcmpneq_oqss(Xmm x, const Operand& op) { vcmpneq_oqss(x, x, op); } ++void vcmpneq_ospd(Xmm x, const Operand& op) { vcmpneq_ospd(x, x, op); } ++void vcmpneq_osps(Xmm x, const Operand& op) { vcmpneq_osps(x, x, op); } ++void vcmpneq_ossd(Xmm x, const Operand& op) { vcmpneq_ossd(x, x, op); } ++void vcmpneq_osss(Xmm x, const Operand& op) { vcmpneq_osss(x, x, op); } ++void vcmpneq_uspd(Xmm x, const Operand& op) { vcmpneq_uspd(x, x, op); } ++void vcmpneq_usps(Xmm x, const Operand& op) { vcmpneq_usps(x, x, op); } ++void vcmpneq_ussd(Xmm x, const Operand& op) { vcmpneq_ussd(x, x, op); } ++void vcmpneq_usss(Xmm x, const Operand& op) { vcmpneq_usss(x, x, op); } ++void vcmpneqpd(Xmm x, const Operand& op) { vcmpneqpd(x, x, op); } ++void vcmpneqps(Xmm x, const Operand& op) { vcmpneqps(x, x, op); } ++void vcmpneqsd(Xmm x, const Operand& op) { vcmpneqsd(x, x, op); } ++void vcmpneqss(Xmm x, const Operand& op) { vcmpneqss(x, x, op); } ++void vcmpnge_uqpd(Xmm x, const Operand& op) { vcmpnge_uqpd(x, x, op); } ++void vcmpnge_uqps(Xmm x, const Operand& op) { vcmpnge_uqps(x, x, op); } ++void vcmpnge_uqsd(Xmm x, const Operand& op) { vcmpnge_uqsd(x, x, op); } ++void vcmpnge_uqss(Xmm x, const Operand& op) { vcmpnge_uqss(x, x, op); } ++void vcmpngepd(Xmm x, const Operand& op) { vcmpngepd(x, x, op); } ++void vcmpngeps(Xmm x, const Operand& op) { vcmpngeps(x, x, op); } ++void vcmpngesd(Xmm x, const Operand& op) { vcmpngesd(x, x, op); } ++void vcmpngess(Xmm x, const Operand& op) { vcmpngess(x, x, op); } ++void vcmpngt_uqpd(Xmm x, const Operand& op) { vcmpngt_uqpd(x, x, op); } ++void vcmpngt_uqps(Xmm x, const Operand& op) { vcmpngt_uqps(x, x, op); } ++void vcmpngt_uqsd(Xmm x, const Operand& op) { vcmpngt_uqsd(x, x, op); } ++void vcmpngt_uqss(Xmm x, const Operand& op) { vcmpngt_uqss(x, x, op); } ++void vcmpngtpd(Xmm x, const Operand& op) { vcmpngtpd(x, x, op); } ++void vcmpngtps(Xmm x, const Operand& op) { vcmpngtps(x, x, op); } ++void vcmpngtsd(Xmm x, const Operand& op) { vcmpngtsd(x, x, op); } ++void vcmpngtss(Xmm x, const Operand& op) { vcmpngtss(x, x, op); } ++void vcmpnle_uqpd(Xmm x, const Operand& op) { vcmpnle_uqpd(x, x, op); } ++void vcmpnle_uqps(Xmm x, const Operand& op) { vcmpnle_uqps(x, x, op); } ++void vcmpnle_uqsd(Xmm x, const Operand& op) { vcmpnle_uqsd(x, x, op); } ++void vcmpnle_uqss(Xmm x, const Operand& op) { vcmpnle_uqss(x, x, op); } ++void vcmpnlepd(Xmm x, const Operand& op) { vcmpnlepd(x, x, op); } ++void vcmpnleps(Xmm x, const Operand& op) { vcmpnleps(x, x, op); } ++void vcmpnlesd(Xmm x, const Operand& op) { vcmpnlesd(x, x, op); } ++void vcmpnless(Xmm x, const Operand& op) { vcmpnless(x, x, op); } ++void vcmpnlt_uqpd(Xmm x, const Operand& op) { vcmpnlt_uqpd(x, x, op); } ++void vcmpnlt_uqps(Xmm x, const Operand& op) { vcmpnlt_uqps(x, x, op); } ++void vcmpnlt_uqsd(Xmm x, const Operand& op) { vcmpnlt_uqsd(x, x, op); } ++void vcmpnlt_uqss(Xmm x, const Operand& op) { vcmpnlt_uqss(x, x, op); } ++void vcmpnltpd(Xmm x, const Operand& op) { vcmpnltpd(x, x, op); } ++void vcmpnltps(Xmm x, const Operand& op) { vcmpnltps(x, x, op); } ++void vcmpnltsd(Xmm x, const Operand& op) { vcmpnltsd(x, x, op); } ++void vcmpnltss(Xmm x, const Operand& op) { vcmpnltss(x, x, op); } ++void vcmpord_spd(Xmm x, const Operand& op) { vcmpord_spd(x, x, op); } ++void vcmpord_sps(Xmm x, const Operand& op) { vcmpord_sps(x, x, op); } ++void vcmpord_ssd(Xmm x, const Operand& op) { vcmpord_ssd(x, x, op); } ++void vcmpord_sss(Xmm x, const Operand& op) { vcmpord_sss(x, x, op); } ++void vcmpordpd(Xmm x, const Operand& op) { vcmpordpd(x, x, op); } ++void vcmpordps(Xmm x, const Operand& op) { vcmpordps(x, x, op); } ++void vcmpordsd(Xmm x, const Operand& op) { vcmpordsd(x, x, op); } ++void vcmpordss(Xmm x, const Operand& op) { vcmpordss(x, x, op); } ++void vcmppd(Xmm x, const Operand& op, uint8_t imm) { vcmppd(x, x, op, imm); } ++void vcmpps(Xmm x, const Operand& op, uint8_t imm) { vcmpps(x, x, op, imm); } ++void vcmpsd(Xmm x, const Operand& op, uint8_t imm) { vcmpsd(x, x, op, imm); } ++void vcmpss(Xmm x, const Operand& op, uint8_t imm) { vcmpss(x, x, op, imm); } ++void vcmptrue_uspd(Xmm x, const Operand& op) { vcmptrue_uspd(x, x, op); } ++void vcmptrue_usps(Xmm x, const Operand& op) { vcmptrue_usps(x, x, op); } ++void vcmptrue_ussd(Xmm x, const Operand& op) { vcmptrue_ussd(x, x, op); } ++void vcmptrue_usss(Xmm x, const Operand& op) { vcmptrue_usss(x, x, op); } ++void vcmptruepd(Xmm x, const Operand& op) { vcmptruepd(x, x, op); } ++void vcmptrueps(Xmm x, const Operand& op) { vcmptrueps(x, x, op); } ++void vcmptruesd(Xmm x, const Operand& op) { vcmptruesd(x, x, op); } ++void vcmptruess(Xmm x, const Operand& op) { vcmptruess(x, x, op); } ++void vcmpunord_spd(Xmm x, const Operand& op) { vcmpunord_spd(x, x, op); } ++void vcmpunord_sps(Xmm x, const Operand& op) { vcmpunord_sps(x, x, op); } ++void vcmpunord_ssd(Xmm x, const Operand& op) { vcmpunord_ssd(x, x, op); } ++void vcmpunord_sss(Xmm x, const Operand& op) { vcmpunord_sss(x, x, op); } ++void vcmpunordpd(Xmm x, const Operand& op) { vcmpunordpd(x, x, op); } ++void vcmpunordps(Xmm x, const Operand& op) { vcmpunordps(x, x, op); } ++void vcmpunordsd(Xmm x, const Operand& op) { vcmpunordsd(x, x, op); } ++void vcmpunordss(Xmm x, const Operand& op) { vcmpunordss(x, x, op); } ++void vcvtsd2ss(Xmm x, const Operand& op) { vcvtsd2ss(x, x, op); } ++void vcvtsi2sd(Xmm x, const Operand& op) { vcvtsi2sd(x, x, op); } ++void vcvtsi2ss(Xmm x, const Operand& op) { vcvtsi2ss(x, x, op); } ++void vcvtss2sd(Xmm x, const Operand& op) { vcvtss2sd(x, x, op); } ++void vdppd(Xmm x, const Operand& op, uint8_t imm) { vdppd(x, x, op, imm); } ++void vdpps(Xmm x, const Operand& op, uint8_t imm) { vdpps(x, x, op, imm); } ++void vinsertps(Xmm x, const Operand& op, uint8_t imm) { vinsertps(x, x, op, imm); } ++void vmpsadbw(Xmm x, const Operand& op, uint8_t imm) { vmpsadbw(x, x, op, imm); } ++void vpackssdw(Xmm x, const Operand& op) { vpackssdw(x, x, op); } ++void vpacksswb(Xmm x, const Operand& op) { vpacksswb(x, x, op); } ++void vpackusdw(Xmm x, const Operand& op) { vpackusdw(x, x, op); } ++void vpackuswb(Xmm x, const Operand& op) { vpackuswb(x, x, op); } ++void vpaddb(Xmm x, const Operand& op) { vpaddb(x, x, op); } ++void vpaddd(Xmm x, const Operand& op) { vpaddd(x, x, op); } ++void vpaddq(Xmm x, const Operand& op) { vpaddq(x, x, op); } ++void vpaddsb(Xmm x, const Operand& op) { vpaddsb(x, x, op); } ++void vpaddsw(Xmm x, const Operand& op) { vpaddsw(x, x, op); } ++void vpaddusb(Xmm x, const Operand& op) { vpaddusb(x, x, op); } ++void vpaddusw(Xmm x, const Operand& op) { vpaddusw(x, x, op); } ++void vpaddw(Xmm x, const Operand& op) { vpaddw(x, x, op); } ++void vpalignr(Xmm x, const Operand& op, uint8_t imm) { vpalignr(x, x, op, imm); } ++void vpand(Xmm x, const Operand& op) { vpand(x, x, op); } ++void vpandn(Xmm x, const Operand& op) { vpandn(x, x, op); } ++void vpavgb(Xmm x, const Operand& op) { vpavgb(x, x, op); } ++void vpavgw(Xmm x, const Operand& op) { vpavgw(x, x, op); } ++void vpblendd(Xmm x, const Operand& op, uint8_t imm) { vpblendd(x, x, op, imm); } ++void vpblendvb(Xmm x1, const Operand& op, Xmm x4) { vpblendvb(x1, x1, op, x4); } ++void vpblendw(Xmm x, const Operand& op, uint8_t imm) { vpblendw(x, x, op, imm); } ++void vpclmulqdq(Xmm x, const Operand& op, uint8_t imm) { vpclmulqdq(x, x, op, imm); } ++void vpcmpeqb(Xmm x, const Operand& op) { vpcmpeqb(x, x, op); } ++void vpcmpeqd(Xmm x, const Operand& op) { vpcmpeqd(x, x, op); } ++void vpcmpeqq(Xmm x, const Operand& op) { vpcmpeqq(x, x, op); } ++void vpcmpeqw(Xmm x, const Operand& op) { vpcmpeqw(x, x, op); } ++void vpcmpgtb(Xmm x, const Operand& op) { vpcmpgtb(x, x, op); } ++void vpcmpgtd(Xmm x, const Operand& op) { vpcmpgtd(x, x, op); } ++void vpcmpgtq(Xmm x, const Operand& op) { vpcmpgtq(x, x, op); } ++void vpcmpgtw(Xmm x, const Operand& op) { vpcmpgtw(x, x, op); } ++void vphaddd(Xmm x, const Operand& op) { vphaddd(x, x, op); } ++void vphaddsw(Xmm x, const Operand& op) { vphaddsw(x, x, op); } ++void vphaddw(Xmm x, const Operand& op) { vphaddw(x, x, op); } ++void vphsubd(Xmm x, const Operand& op) { vphsubd(x, x, op); } ++void vphsubsw(Xmm x, const Operand& op) { vphsubsw(x, x, op); } ++void vphsubw(Xmm x, const Operand& op) { vphsubw(x, x, op); } ++void vpinsrb(Xmm x, const Operand& op, uint8_t imm) { vpinsrb(x, x, op, imm); } ++void vpinsrd(Xmm x, const Operand& op, uint8_t imm) { vpinsrd(x, x, op, imm); } ++void vpinsrq(Xmm x, const Operand& op, uint8_t imm) { vpinsrq(x, x, op, imm); } ++void vpinsrw(Xmm x, const Operand& op, uint8_t imm) { vpinsrw(x, x, op, imm); } ++void vpmaddubsw(Xmm x, const Operand& op) { vpmaddubsw(x, x, op); } ++void vpmaddwd(Xmm x, const Operand& op) { vpmaddwd(x, x, op); } ++void vpmaxsb(Xmm x, const Operand& op) { vpmaxsb(x, x, op); } ++void vpmaxsd(Xmm x, const Operand& op) { vpmaxsd(x, x, op); } ++void vpmaxsw(Xmm x, const Operand& op) { vpmaxsw(x, x, op); } ++void vpmaxub(Xmm x, const Operand& op) { vpmaxub(x, x, op); } ++void vpmaxud(Xmm x, const Operand& op) { vpmaxud(x, x, op); } ++void vpmaxuw(Xmm x, const Operand& op) { vpmaxuw(x, x, op); } ++void vpminsb(Xmm x, const Operand& op) { vpminsb(x, x, op); } ++void vpminsd(Xmm x, const Operand& op) { vpminsd(x, x, op); } ++void vpminsw(Xmm x, const Operand& op) { vpminsw(x, x, op); } ++void vpminub(Xmm x, const Operand& op) { vpminub(x, x, op); } ++void vpminud(Xmm x, const Operand& op) { vpminud(x, x, op); } ++void vpminuw(Xmm x, const Operand& op) { vpminuw(x, x, op); } ++void vpmuldq(Xmm x, const Operand& op) { vpmuldq(x, x, op); } ++void vpmulhrsw(Xmm x, const Operand& op) { vpmulhrsw(x, x, op); } ++void vpmulhuw(Xmm x, const Operand& op) { vpmulhuw(x, x, op); } ++void vpmulhw(Xmm x, const Operand& op) { vpmulhw(x, x, op); } ++void vpmulld(Xmm x, const Operand& op) { vpmulld(x, x, op); } ++void vpmullw(Xmm x, const Operand& op) { vpmullw(x, x, op); } ++void vpmuludq(Xmm x, const Operand& op) { vpmuludq(x, x, op); } ++void vpor(Xmm x, const Operand& op) { vpor(x, x, op); } ++void vpsadbw(Xmm x, const Operand& op) { vpsadbw(x, x, op); } ++void vpsignb(Xmm x, const Operand& op) { vpsignb(x, x, op); } ++void vpsignd(Xmm x, const Operand& op) { vpsignd(x, x, op); } ++void vpsignw(Xmm x, const Operand& op) { vpsignw(x, x, op); } ++void vpslld(Xmm x, const Operand& op) { vpslld(x, x, op); } ++void vpslld(Xmm x, uint8_t imm) { vpslld(x, x, imm); } ++void vpslldq(Xmm x, uint8_t imm) { vpslldq(x, x, imm); } ++void vpsllq(Xmm x, const Operand& op) { vpsllq(x, x, op); } ++void vpsllq(Xmm x, uint8_t imm) { vpsllq(x, x, imm); } ++void vpsllw(Xmm x, const Operand& op) { vpsllw(x, x, op); } ++void vpsllw(Xmm x, uint8_t imm) { vpsllw(x, x, imm); } ++void vpsrad(Xmm x, const Operand& op) { vpsrad(x, x, op); } ++void vpsrad(Xmm x, uint8_t imm) { vpsrad(x, x, imm); } ++void vpsraw(Xmm x, const Operand& op) { vpsraw(x, x, op); } ++void vpsraw(Xmm x, uint8_t imm) { vpsraw(x, x, imm); } ++void vpsrld(Xmm x, const Operand& op) { vpsrld(x, x, op); } ++void vpsrld(Xmm x, uint8_t imm) { vpsrld(x, x, imm); } ++void vpsrldq(Xmm x, uint8_t imm) { vpsrldq(x, x, imm); } ++void vpsrlq(Xmm x, const Operand& op) { vpsrlq(x, x, op); } ++void vpsrlq(Xmm x, uint8_t imm) { vpsrlq(x, x, imm); } ++void vpsrlw(Xmm x, const Operand& op) { vpsrlw(x, x, op); } ++void vpsrlw(Xmm x, uint8_t imm) { vpsrlw(x, x, imm); } ++void vpsubb(Xmm x, const Operand& op) { vpsubb(x, x, op); } ++void vpsubd(Xmm x, const Operand& op) { vpsubd(x, x, op); } ++void vpsubq(Xmm x, const Operand& op) { vpsubq(x, x, op); } ++void vpsubsb(Xmm x, const Operand& op) { vpsubsb(x, x, op); } ++void vpsubsw(Xmm x, const Operand& op) { vpsubsw(x, x, op); } ++void vpsubusb(Xmm x, const Operand& op) { vpsubusb(x, x, op); } ++void vpsubusw(Xmm x, const Operand& op) { vpsubusw(x, x, op); } ++void vpsubw(Xmm x, const Operand& op) { vpsubw(x, x, op); } ++void vpunpckhbw(Xmm x, const Operand& op) { vpunpckhbw(x, x, op); } ++void vpunpckhdq(Xmm x, const Operand& op) { vpunpckhdq(x, x, op); } ++void vpunpckhqdq(Xmm x, const Operand& op) { vpunpckhqdq(x, x, op); } ++void vpunpckhwd(Xmm x, const Operand& op) { vpunpckhwd(x, x, op); } ++void vpunpcklbw(Xmm x, const Operand& op) { vpunpcklbw(x, x, op); } ++void vpunpckldq(Xmm x, const Operand& op) { vpunpckldq(x, x, op); } ++void vpunpcklqdq(Xmm x, const Operand& op) { vpunpcklqdq(x, x, op); } ++void vpunpcklwd(Xmm x, const Operand& op) { vpunpcklwd(x, x, op); } ++void vpxor(Xmm x, const Operand& op) { vpxor(x, x, op); } ++void vrcpss(Xmm x, const Operand& op) { vrcpss(x, x, op); } ++void vroundsd(Xmm x, const Operand& op, uint8_t imm) { vroundsd(x, x, op, imm); } ++void vroundss(Xmm x, const Operand& op, uint8_t imm) { vroundss(x, x, op, imm); } ++void vrsqrtss(Xmm x, const Operand& op) { vrsqrtss(x, x, op); } ++void vshufpd(Xmm x, const Operand& op, uint8_t imm) { vshufpd(x, x, op, imm); } ++void vshufps(Xmm x, const Operand& op, uint8_t imm) { vshufps(x, x, op, imm); } ++void vsqrtsd(Xmm x, const Operand& op) { vsqrtsd(x, x, op); } ++void vsqrtss(Xmm x, const Operand& op) { vsqrtss(x, x, op); } ++void vunpckhpd(Xmm x, const Operand& op) { vunpckhpd(x, x, op); } ++void vunpckhps(Xmm x, const Operand& op) { vunpckhps(x, x, op); } ++void vunpcklpd(Xmm x, const Operand& op) { vunpcklpd(x, x, op); } ++void vunpcklps(Xmm x, const Operand& op) { vunpcklps(x, x, op); } + #endif + #ifdef XBYAK64 + void jecxz(std::string label) { db(0x67); opJmp(label, T_SHORT, 0xe3, 0, 0); } +@@ -1877,54 +1877,54 @@ void testui() { db(0xF3); db(0x0F); db(0x01); db(0xED); } + void uiret() { db(0xF3); db(0x0F); db(0x01); db(0xEC); } + void cmpxchg16b(const Address& addr) { opMR(addr, Reg64(1), T_0F|T_ALLOW_DIFF_SIZE, 0xC7); } + void fxrstor64(const Address& addr) { opMR(addr, Reg64(1), T_0F, 0xAE); } +-void movq(const Reg64& reg, const Mmx& mmx) { if (mmx.isXMM()) db(0x66); opSSE(mmx, reg, T_0F, 0x7E); } +-void movq(const Mmx& mmx, const Reg64& reg) { if (mmx.isXMM()) db(0x66); opSSE(mmx, reg, T_0F, 0x6E); } +-void movrs(const Reg& reg, const Address& addr) { opMR(addr, reg, T_0F38, reg.isBit(8) ? 0x8A : 0x8B); } +-void movsxd(const Reg64& reg, const Operand& op) { if (!op.isBit(32)) XBYAK_THROW(ERR_BAD_COMBINATION) opRO(reg, op, T_ALLOW_DIFF_SIZE, 0x63); } +-void pextrq(const Operand& op, const Xmm& xmm, uint8_t imm) { if (!op.isREG(64) && !op.isMEM()) XBYAK_THROW(ERR_BAD_COMBINATION) opSSE(Reg64(xmm.getIdx()), op, T_66 | T_0F3A, 0x16, 0, imm); } +-void pinsrq(const Xmm& xmm, const Operand& op, uint8_t imm) { if (!op.isREG(64) && !op.isMEM()) XBYAK_THROW(ERR_BAD_COMBINATION) opSSE(Reg64(xmm.getIdx()), op, T_66 | T_0F3A, 0x22, 0, imm); } +-void senduipi(const Reg64& r) { opRR(Reg32(6), r.cvt32(), T_F3 | T_0F, 0xC7); } +-void vcvtss2si(const Reg64& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, T_0F | T_F3 | T_W1 | T_EVEX | T_EW1 | T_ER_X | T_N8, 0x2D); } +-void vcvttss2si(const Reg64& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, T_0F | T_F3 | T_W1 | T_EVEX | T_EW1 | T_SAE_X | T_N8, 0x2C); } +-void vcvtsd2si(const Reg64& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, T_0F | T_F2 | T_W1 | T_EVEX | T_EW1 | T_N4 | T_ER_X, 0x2D); } +-void vcvttsd2si(const Reg64& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, T_0F | T_F2 | T_W1 | T_EVEX | T_EW1 | T_N4 | T_SAE_X, 0x2C); } +-void vmovq(const Xmm& x, const Reg64& r) { opAVX_X_X_XM(x, xm0, Xmm(r.getIdx()), T_66 | T_0F | T_W1 | T_EVEX | T_EW1, 0x6E); } +-void vmovq(const Reg64& r, const Xmm& x) { opAVX_X_X_XM(x, xm0, Xmm(r.getIdx()), T_66 | T_0F | T_W1 | T_EVEX | T_EW1, 0x7E); } ++void movq(Reg64 reg, Mmx mmx) { if (mmx.isXMM()) db(0x66); opSSE(mmx, reg, T_0F, 0x7E); } ++void movq(Mmx mmx, Reg64 reg) { if (mmx.isXMM()) db(0x66); opSSE(mmx, reg, T_0F, 0x6E); } ++void movrs(Reg reg, const Address& addr) { opMR(addr, reg, T_0F38, reg.isBit(8) ? 0x8A : 0x8B); } ++void movsxd(Reg64 reg, const Operand& op) { if (!op.isBit(32)) XBYAK_THROW(ERR_BAD_COMBINATION) opRO(reg, op, T_ALLOW_DIFF_SIZE, 0x63); } ++void pextrq(const Operand& op, Xmm xmm, uint8_t imm) { if (!op.isREG(64) && !op.isMEM()) XBYAK_THROW(ERR_BAD_COMBINATION) opSSE(Reg64(xmm.getIdx()), op, T_66 | T_0F3A, 0x16, 0, imm); } ++void pinsrq(Xmm xmm, const Operand& op, uint8_t imm) { if (!op.isREG(64) && !op.isMEM()) XBYAK_THROW(ERR_BAD_COMBINATION) opSSE(Reg64(xmm.getIdx()), op, T_66 | T_0F3A, 0x22, 0, imm); } ++void senduipi(Reg64 r) { opRR(Reg32(6), r.cvt32(), T_F3 | T_0F, 0xC7); } ++void vcvtss2si(Reg64 r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, T_0F | T_F3 | T_W1 | T_EVEX | T_EW1 | T_ER_X | T_N8, 0x2D); } ++void vcvttss2si(Reg64 r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, T_0F | T_F3 | T_W1 | T_EVEX | T_EW1 | T_SAE_X | T_N8, 0x2C); } ++void vcvtsd2si(Reg64 r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, T_0F | T_F2 | T_W1 | T_EVEX | T_EW1 | T_N4 | T_ER_X, 0x2D); } ++void vcvttsd2si(Reg64 r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, T_0F | T_F2 | T_W1 | T_EVEX | T_EW1 | T_N4 | T_SAE_X, 0x2C); } ++void vmovq(Xmm x, Reg64 r) { opAVX_X_X_XM(x, xm0, Xmm(r.getIdx()), T_66 | T_0F | T_W1 | T_EVEX | T_EW1, 0x6E); } ++void vmovq(Reg64 r, Xmm x) { opAVX_X_X_XM(x, xm0, Xmm(r.getIdx()), T_66 | T_0F | T_W1 | T_EVEX | T_EW1, 0x7E); } + void jmpabs(uint64_t addr) { db(0xD5); db(0x00); db(0xA1); dq(addr); } +-void push2(const Reg64& r1, const Reg64& r2) { opROO(r1, r2, Reg64(6), T_APX|T_ND1|T_W0, 0xFF); } +-void push2p(const Reg64& r1, const Reg64& r2) { opROO(r1, r2, Reg64(6), T_APX|T_ND1|T_W1, 0xFF); } +-void pop2(const Reg64& r1, const Reg64& r2) { opROO(r1, r2, Reg64(0), T_APX|T_ND1|T_W0, 0x8F); } +-void pop2p(const Reg64& r1, const Reg64& r2) { opROO(r1, r2, Reg64(0), T_APX|T_ND1|T_W1, 0x8F); } +-void cmpbexadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xE6); } +-void cmpbxadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xE2); } +-void cmplexadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xEE); } +-void cmplxadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xEC); } +-void cmpnbexadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xE7); } +-void cmpnbxadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xE3); } +-void cmpnlexadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xEF); } +-void cmpnlxadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xED); } +-void cmpnoxadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xE1); } +-void cmpnpxadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xEB); } +-void cmpnsxadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xE9); } +-void cmpnzxadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xE5); } +-void cmpoxadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xE0); } +-void cmppxadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xEA); } +-void cmpsxadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xE8); } +-void cmpzxadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xE4); } +-void aesdec128kl(const Xmm& x, const Address& addr) { opSSE_APX(x, addr, T_F3|T_0F38, 0xDD, T_F3|T_MUST_EVEX, 0xDD); } +-void aesdec256kl(const Xmm& x, const Address& addr) { opSSE_APX(x, addr, T_F3|T_0F38, 0xDF, T_F3|T_MUST_EVEX, 0xDF); } ++void push2(Reg64 r1, Reg64 r2) { opROO(r1, r2, Reg64(6), T_APX|T_ND1|T_W0, 0xFF); } ++void push2p(Reg64 r1, Reg64 r2) { opROO(r1, r2, Reg64(6), T_APX|T_ND1|T_W1, 0xFF); } ++void pop2(Reg64 r1, Reg64 r2) { opROO(r1, r2, Reg64(0), T_APX|T_ND1|T_W0, 0x8F); } ++void pop2p(Reg64 r1, Reg64 r2) { opROO(r1, r2, Reg64(0), T_APX|T_ND1|T_W1, 0x8F); } ++void cmpbexadd(const Address& addr, Reg32e r1, Reg32e r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xE6); } ++void cmpbxadd(const Address& addr, Reg32e r1, Reg32e r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xE2); } ++void cmplexadd(const Address& addr, Reg32e r1, Reg32e r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xEE); } ++void cmplxadd(const Address& addr, Reg32e r1, Reg32e r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xEC); } ++void cmpnbexadd(const Address& addr, Reg32e r1, Reg32e r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xE7); } ++void cmpnbxadd(const Address& addr, Reg32e r1, Reg32e r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xE3); } ++void cmpnlexadd(const Address& addr, Reg32e r1, Reg32e r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xEF); } ++void cmpnlxadd(const Address& addr, Reg32e r1, Reg32e r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xED); } ++void cmpnoxadd(const Address& addr, Reg32e r1, Reg32e r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xE1); } ++void cmpnpxadd(const Address& addr, Reg32e r1, Reg32e r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xEB); } ++void cmpnsxadd(const Address& addr, Reg32e r1, Reg32e r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xE9); } ++void cmpnzxadd(const Address& addr, Reg32e r1, Reg32e r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xE5); } ++void cmpoxadd(const Address& addr, Reg32e r1, Reg32e r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xE0); } ++void cmppxadd(const Address& addr, Reg32e r1, Reg32e r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xEA); } ++void cmpsxadd(const Address& addr, Reg32e r1, Reg32e r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xE8); } ++void cmpzxadd(const Address& addr, Reg32e r1, Reg32e r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xE4); } ++void aesdec128kl(Xmm x, const Address& addr) { opSSE_APX(x, addr, T_F3|T_0F38, 0xDD, T_F3|T_MUST_EVEX, 0xDD); } ++void aesdec256kl(Xmm x, const Address& addr) { opSSE_APX(x, addr, T_F3|T_0F38, 0xDF, T_F3|T_MUST_EVEX, 0xDF); } + void aesdecwide128kl(const Address& addr) { opSSE_APX(xmm1, addr, T_F3|T_0F38, 0xD8, T_F3|T_MUST_EVEX, 0xD8); } + void aesdecwide256kl(const Address& addr) { opSSE_APX(xmm3, addr, T_F3|T_0F38, 0xD8, T_F3|T_MUST_EVEX, 0xD8); } +-void aesenc128kl(const Xmm& x, const Address& addr) { opSSE_APX(x, addr, T_F3|T_0F38, 0xDC, T_F3|T_MUST_EVEX, 0xDC); } +-void aesenc256kl(const Xmm& x, const Address& addr) { opSSE_APX(x, addr, T_F3|T_0F38, 0xDE, T_F3|T_MUST_EVEX, 0xDE); } ++void aesenc128kl(Xmm x, const Address& addr) { opSSE_APX(x, addr, T_F3|T_0F38, 0xDC, T_F3|T_MUST_EVEX, 0xDC); } ++void aesenc256kl(Xmm x, const Address& addr) { opSSE_APX(x, addr, T_F3|T_0F38, 0xDE, T_F3|T_MUST_EVEX, 0xDE); } + void aesencwide128kl(const Address& addr) { opSSE_APX(xmm0, addr, T_F3|T_0F38, 0xD8, T_F3|T_MUST_EVEX, 0xD8); } + void aesencwide256kl(const Address& addr) { opSSE_APX(xmm2, addr, T_F3|T_0F38, 0xD8, T_F3|T_MUST_EVEX, 0xD8); } +-void encodekey128(const Reg32& r1, const Reg32& r2) { opEncodeKey(r1, r2, 0xFA, 0xDA); } +-void encodekey256(const Reg32& r1, const Reg32& r2) { opEncodeKey(r1, r2, 0xFB, 0xDB); } +-void rdfsbase(const Reg32e& r) { opRR(eax, r, T_F3|T_0F|T_ALLOW_DIFF_SIZE, 0xAE); } +-void rdgsbase(const Reg32e& r) { opRR(ecx, r, T_F3|T_0F|T_ALLOW_DIFF_SIZE, 0xAE); } +-void wrfsbase(const Reg32e& r) { opRR(edx, r, T_F3|T_0F|T_ALLOW_DIFF_SIZE, 0xAE); } +-void wrgsbase(const Reg32e& r) { opRR(ebx, r, T_F3|T_0F|T_ALLOW_DIFF_SIZE, 0xAE); } ++void encodekey128(Reg32 r1, Reg32 r2) { opEncodeKey(r1, r2, 0xFA, 0xDA); } ++void encodekey256(Reg32 r1, Reg32 r2) { opEncodeKey(r1, r2, 0xFB, 0xDB); } ++void rdfsbase(Reg32e r) { opRR(eax, r, T_F3|T_0F|T_ALLOW_DIFF_SIZE, 0xAE); } ++void rdgsbase(Reg32e r) { opRR(ecx, r, T_F3|T_0F|T_ALLOW_DIFF_SIZE, 0xAE); } ++void wrfsbase(Reg32e r) { opRR(edx, r, T_F3|T_0F|T_ALLOW_DIFF_SIZE, 0xAE); } ++void wrgsbase(Reg32e r) { opRR(ebx, r, T_F3|T_0F|T_ALLOW_DIFF_SIZE, 0xAE); } + void tdpbssd(const Tmm& x1, const Tmm& x2, const Tmm& x3) { opVex(x1, &x3, x2, T_F2|T_0F38|T_W0, 0x5E); } + void tdpbsud(const Tmm& x1, const Tmm& x2, const Tmm& x3) { opVex(x1, &x3, x2, T_F3|T_0F38|T_W0, 0x5E); } + void tdpbusd(const Tmm& x1, const Tmm& x2, const Tmm& x3) { opVex(x1, &x3, x2, T_66|T_0F38|T_W0, 0x5E); } +@@ -1965,8 +1965,8 @@ void pusha() { db(0x60); } + void pushad() { db(0x60); } + void pushfd() { db(0x9C); } + void popa() { db(0x61); } +-void lds(const Reg& reg, const Address& addr) { opLoadSeg(addr, reg, T_NONE, 0xC5); } +-void les(const Reg& reg, const Address& addr) { opLoadSeg(addr, reg, T_NONE, 0xC4); } ++void lds(Reg reg, const Address& addr) { opLoadSeg(addr, reg, T_NONE, 0xC5); } ++void les(Reg reg, const Address& addr) { opLoadSeg(addr, reg, T_NONE, 0xC4); } + #endif + #ifndef XBYAK_NO_OP_NAMES + void and(const Operand& op1, const Operand& op2) { and_(op1, op2); } +@@ -1992,15 +1992,15 @@ void kandq(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2 + void kandw(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_W0, 0x41); } + void kmovb(const Address& addr, const Opmask& k) { opKmov(k, addr, true, 8); } + void kmovb(const Opmask& k, const Operand& op) { opKmov(k, op, false, 8); } +-void kmovb(const Reg32& r, const Opmask& k) { opKmov(k, r, true, 8); } ++void kmovb(Reg32 r, const Opmask& k) { opKmov(k, r, true, 8); } + void kmovd(const Address& addr, const Opmask& k) { opKmov(k, addr, true, 32); } + void kmovd(const Opmask& k, const Operand& op) { opKmov(k, op, false, 32); } +-void kmovd(const Reg32& r, const Opmask& k) { opKmov(k, r, true, 32); } ++void kmovd(Reg32 r, const Opmask& k) { opKmov(k, r, true, 32); } + void kmovq(const Address& addr, const Opmask& k) { opKmov(k, addr, true, 64); } + void kmovq(const Opmask& k, const Operand& op) { opKmov(k, op, false, 64); } + void kmovw(const Address& addr, const Opmask& k) { opKmov(k, addr, true, 16); } + void kmovw(const Opmask& k, const Operand& op) { opKmov(k, op, false, 16); } +-void kmovw(const Reg32& r, const Opmask& k) { opKmov(k, r, true, 16); } ++void kmovw(Reg32 r, const Opmask& k) { opKmov(k, r, true, 16); } + void knotb(const Opmask& r1, const Opmask& r2) { opVex(r1, 0, r2, T_0F | T_66 | T_W0, 0x44); } + void knotd(const Opmask& r1, const Opmask& r2) { opVex(r1, 0, r2, T_0F | T_66 | T_W1, 0x44); } + void knotq(const Opmask& r1, const Opmask& r2) { opVex(r1, 0, r2, T_0F | T_W1, 0x44); } +@@ -2036,332 +2036,332 @@ void kxorb(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2 + void kxord(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_66 | T_W1, 0x47); } + void kxorq(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_W1, 0x47); } + void kxorw(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_W0, 0x47); } +-void v4fmaddps(const Zmm& z1, const Zmm& z2, const Address& addr) { opAVX_X_X_XM(z1, z2, addr, T_0F38 | T_F2 | T_W0 | T_YMM | T_MUST_EVEX | T_N16, 0x9A); } +-void v4fmaddss(const Xmm& x1, const Xmm& x2, const Address& addr) { opAVX_X_X_XM(x1, x2, addr, T_0F38 | T_F2 | T_W0 | T_MUST_EVEX | T_N16, 0x9B); } +-void v4fnmaddps(const Zmm& z1, const Zmm& z2, const Address& addr) { opAVX_X_X_XM(z1, z2, addr, T_0F38 | T_F2 | T_W0 | T_YMM | T_MUST_EVEX | T_N16, 0xAA); } +-void v4fnmaddss(const Xmm& x1, const Xmm& x2, const Address& addr) { opAVX_X_X_XM(x1, x2, addr, T_0F38 | T_F2 | T_W0 | T_MUST_EVEX | T_N16, 0xAB); } +-void vaddbf16(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x58); } +-void vaddph(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_W0 | T_YMM | T_MUST_EVEX | T_ER_Z | T_B16, 0x58); } +-void vaddsh(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_F3 | T_W0 | T_MUST_EVEX | T_ER_X | T_N2, 0x58); } +-void valignd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM|T_MUST_EVEX, 0x03, imm); } +-void valignq(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x03, imm); } +-void vblendmpd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x65); } +-void vblendmps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x65); } +-void vbroadcastf32x2(const Ymm& y, const Operand& op) { opAVX_X_XM_IMM(y, op, T_66 | T_0F38 | T_YMM | T_MUST_EVEX | T_W0 | T_N8, 0x19); } +-void vbroadcastf32x4(const Ymm& y, const Address& addr) { opAVX_X_XM_IMM(y, addr, T_66 | T_0F38 | T_YMM | T_MUST_EVEX | T_W0 | T_N16, 0x1A); } +-void vbroadcastf32x8(const Zmm& y, const Address& addr) { opAVX_X_XM_IMM(y, addr, T_66 | T_0F38 | T_YMM | T_MUST_EVEX | T_W0 | T_N32, 0x1B); } +-void vbroadcastf64x2(const Ymm& y, const Address& addr) { opAVX_X_XM_IMM(y, addr, T_66 | T_0F38 | T_YMM | T_MUST_EVEX | T_EW1 | T_N16, 0x1A); } +-void vbroadcastf64x4(const Zmm& y, const Address& addr) { opAVX_X_XM_IMM(y, addr, T_66 | T_0F38 | T_YMM | T_MUST_EVEX | T_EW1 | T_N32, 0x1B); } +-void vbroadcasti32x2(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66 | T_0F38 | T_YMM | T_MUST_EVEX | T_W0 | T_N8, 0x59); } +-void vbroadcasti32x4(const Ymm& y, const Operand& op) { opAVX_X_XM_IMM(y, op, T_66 | T_0F38 | T_YMM | T_MUST_EVEX | T_W0 | T_N16, 0x5A); } +-void vbroadcasti32x8(const Zmm& z, const Operand& op) { opAVX_X_XM_IMM(z, op, T_66 | T_0F38 | T_YMM | T_MUST_EVEX | T_W0 | T_N32, 0x5B); } +-void vbroadcasti64x2(const Ymm& y, const Operand& op) { opAVX_X_XM_IMM(y, op, T_66 | T_0F38 | T_YMM | T_MUST_EVEX | T_EW1 | T_N16, 0x5A); } +-void vbroadcasti64x4(const Zmm& z, const Operand& op) { opAVX_X_XM_IMM(z, op, T_66 | T_0F38 | T_YMM | T_MUST_EVEX | T_EW1 | T_N32, 0x5B); } +-void vcmpbf16(const Opmask& k, const Xmm& x, const Operand& op, uint8_t imm) { opVex(k, &x, op, T_MUST_EVEX|T_F2|T_0F3A|T_W0|T_YMM|T_B16, 0xC2, imm); } +-void vcmpeq_ospd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 16); } +-void vcmpeq_osps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 16); } +-void vcmpeq_ossd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 16); } +-void vcmpeq_osss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 16); } +-void vcmpeq_uqpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 8); } +-void vcmpeq_uqps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 8); } +-void vcmpeq_uqsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 8); } +-void vcmpeq_uqss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 8); } +-void vcmpeq_uspd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 24); } +-void vcmpeq_usps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 24); } +-void vcmpeq_ussd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 24); } +-void vcmpeq_usss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 24); } +-void vcmpeqpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 0); } +-void vcmpeqps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 0); } +-void vcmpeqsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 0); } +-void vcmpeqss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 0); } +-void vcmpfalse_ospd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 27); } +-void vcmpfalse_osps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 27); } +-void vcmpfalse_ossd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 27); } +-void vcmpfalse_osss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 27); } +-void vcmpfalsepd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 11); } +-void vcmpfalseps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 11); } +-void vcmpfalsesd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 11); } +-void vcmpfalsess(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 11); } +-void vcmpge_oqpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 29); } +-void vcmpge_oqps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 29); } +-void vcmpge_oqsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 29); } +-void vcmpge_oqss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 29); } +-void vcmpgepd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 13); } +-void vcmpgeps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 13); } +-void vcmpgesd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 13); } +-void vcmpgess(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 13); } +-void vcmpgt_oqpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 30); } +-void vcmpgt_oqps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 30); } +-void vcmpgt_oqsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 30); } +-void vcmpgt_oqss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 30); } +-void vcmpgtpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 14); } +-void vcmpgtps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 14); } +-void vcmpgtsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 14); } +-void vcmpgtss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 14); } +-void vcmple_oqpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 18); } +-void vcmple_oqps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 18); } +-void vcmple_oqsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 18); } +-void vcmple_oqss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 18); } +-void vcmplepd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 2); } +-void vcmpleps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 2); } +-void vcmplesd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 2); } +-void vcmpless(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 2); } +-void vcmplt_oqpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 17); } +-void vcmplt_oqps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 17); } +-void vcmplt_oqsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 17); } +-void vcmplt_oqss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 17); } +-void vcmpltpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 1); } +-void vcmpltps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 1); } +-void vcmpltsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 1); } +-void vcmpltss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 1); } +-void vcmpneq_oqpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 12); } +-void vcmpneq_oqps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 12); } +-void vcmpneq_oqsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 12); } +-void vcmpneq_oqss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 12); } +-void vcmpneq_ospd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 28); } +-void vcmpneq_osps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 28); } +-void vcmpneq_ossd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 28); } +-void vcmpneq_osss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 28); } +-void vcmpneq_uspd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 20); } +-void vcmpneq_usps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 20); } +-void vcmpneq_ussd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 20); } +-void vcmpneq_usss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 20); } +-void vcmpneqpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 4); } +-void vcmpneqps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 4); } +-void vcmpneqsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 4); } +-void vcmpneqss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 4); } +-void vcmpnge_uqpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 25); } +-void vcmpnge_uqps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 25); } +-void vcmpnge_uqsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 25); } +-void vcmpnge_uqss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 25); } +-void vcmpngepd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 9); } +-void vcmpngeps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 9); } +-void vcmpngesd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 9); } +-void vcmpngess(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 9); } +-void vcmpngt_uqpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 26); } +-void vcmpngt_uqps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 26); } +-void vcmpngt_uqsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 26); } +-void vcmpngt_uqss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 26); } +-void vcmpngtpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 10); } +-void vcmpngtps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 10); } +-void vcmpngtsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 10); } +-void vcmpngtss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 10); } +-void vcmpnle_uqpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 22); } +-void vcmpnle_uqps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 22); } +-void vcmpnle_uqsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 22); } +-void vcmpnle_uqss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 22); } +-void vcmpnlepd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 6); } +-void vcmpnleps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 6); } +-void vcmpnlesd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 6); } +-void vcmpnless(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 6); } +-void vcmpnlt_uqpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 21); } +-void vcmpnlt_uqps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 21); } +-void vcmpnlt_uqsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 21); } +-void vcmpnlt_uqss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 21); } +-void vcmpnltpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 5); } +-void vcmpnltps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 5); } +-void vcmpnltsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 5); } +-void vcmpnltss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 5); } +-void vcmpord_spd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 23); } +-void vcmpord_sps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 23); } +-void vcmpord_ssd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 23); } +-void vcmpord_sss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 23); } +-void vcmpordpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 7); } +-void vcmpordps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 7); } +-void vcmpordsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 7); } +-void vcmpordss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 7); } +-void vcmppd(const Opmask& k, const Xmm& x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_66|T_0F|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0xC2, imm); } +-void vcmpph(const Opmask& k, const Xmm& x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_0F3A|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B16, 0xC2, imm); } +-void vcmpps(const Opmask& k, const Xmm& x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_0F|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0xC2, imm); } +-void vcmpsd(const Opmask& k, const Xmm& x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_N8|T_F2|T_0F|T_EW1|T_SAE_Z|T_MUST_EVEX, 0xC2, imm); } +-void vcmpsh(const Opmask& k, const Xmm& x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_N2|T_F3|T_0F3A|T_W0|T_SAE_X|T_MUST_EVEX, 0xC2, imm); } +-void vcmpss(const Opmask& k, const Xmm& x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_N4|T_F3|T_0F|T_W0|T_SAE_Z|T_MUST_EVEX, 0xC2, imm); } +-void vcmptrue_uspd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 31); } +-void vcmptrue_usps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 31); } +-void vcmptrue_ussd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 31); } +-void vcmptrue_usss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 31); } +-void vcmptruepd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 15); } +-void vcmptrueps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 15); } +-void vcmptruesd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 15); } +-void vcmptruess(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 15); } +-void vcmpunord_spd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 19); } +-void vcmpunord_sps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 19); } +-void vcmpunord_ssd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 19); } +-void vcmpunord_sss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 19); } +-void vcmpunordpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 3); } +-void vcmpunordps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 3); } +-void vcmpunordsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 3); } +-void vcmpunordss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 3); } +-void vcomisbf16(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N2|T_66|T_MAP5|T_W0|T_MUST_EVEX, 0x2F); } +-void vcomish(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N2|T_MAP5|T_W0|T_SAE_X|T_MUST_EVEX, 0x2F); } +-void vcompresspd(const Operand& op, const Xmm& x) { opAVX_X_XM_IMM(x, op, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x8A); } +-void vcompressps(const Operand& op, const Xmm& x) { opAVX_X_XM_IMM(x, op, T_N4|T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX, 0x8A); } +-void vcomxsd(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N8|T_F2|T_0F|T_EW1|T_SAE_X|T_MUST_EVEX, 0x2F); } +-void vcomxsh(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N2|T_F3|T_MAP5|T_W0|T_SAE_X|T_MUST_EVEX, 0x2F); } +-void vcomxss(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N4|T_F3|T_0F|T_W0|T_SAE_X|T_MUST_EVEX, 0x2F); } +-void vcvt2ph2bf8(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_N_VL|T_F2|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x74); } +-void vcvt2ph2bf8s(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_N_VL|T_F2|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x74); } +-void vcvt2ph2hf8(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_N_VL|T_F2|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x18); } +-void vcvt2ph2hf8s(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_N_VL|T_F2|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x1B); } +-void vcvt2ps2phx(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0x67); } +-void vcvtbf162ibs(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F2|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x69); } +-void vcvtbf162iubs(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F2|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x6B); } +-void vcvtbiasph2bf8(const Xmm& x1, const Xmm& x2, const Operand& op) { opCvt6(x1, x2, op, T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x74); } +-void vcvtbiasph2bf8s(const Xmm& x1, const Xmm& x2, const Operand& op) { opCvt6(x1, x2, op, T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x74); } +-void vcvtbiasph2hf8(const Xmm& x1, const Xmm& x2, const Operand& op) { opCvt6(x1, x2, op, T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x18); } +-void vcvtbiasph2hf8s(const Xmm& x1, const Xmm& x2, const Operand& op) { opCvt6(x1, x2, op, T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x1B); } +-void vcvtdq2ph(const Xmm& x, const Operand& op) { checkCvt4(x, op); opCvt(x, op, T_N16|T_N_VL|T_MAP5|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0x5B); } +-void vcvthf82ph(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_MUST_EVEX|T_F2|T_MAP5|T_W0|T_YMM|T_N8|T_N_VL, 0x1E); } +-void vcvtne2ps2bf16(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F2|T_0F38|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x72); } +-void vcvtpd2ph(const Xmm& x, const Operand& op) { opCvt5(x, op, T_N16|T_N_VL|T_66|T_MAP5|T_EW1|T_ER_Z|T_MUST_EVEX|T_B64, 0x5A); } +-void vcvtpd2qq(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F|T_EW1|T_YMM|T_ER_Z|T_MUST_EVEX|T_B64, 0x7B); } +-void vcvtpd2udq(const Xmm& x, const Operand& op) { opCvt2(x, op, T_0F|T_EW1|T_YMM|T_ER_Z|T_MUST_EVEX|T_B64, 0x79); } +-void vcvtpd2uqq(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F|T_EW1|T_YMM|T_ER_Z|T_MUST_EVEX|T_B64, 0x79); } +-void vcvtph2bf8(const Xmm& x, const Operand& op) { opCvt2(x, op, T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x74); } +-void vcvtph2bf8s(const Xmm& x, const Operand& op) { opCvt2(x, op, T_F3|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x74); } +-void vcvtph2dq(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_66|T_MAP5|T_W0|T_YMM|T_ER_Y|T_MUST_EVEX|T_B16, 0x5B); } +-void vcvtph2hf8(const Xmm& x, const Operand& op) { opCvt2(x, op, T_F3|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x18); } +-void vcvtph2hf8s(const Xmm& x, const Operand& op) { opCvt2(x, op, T_F3|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x1B); } +-void vcvtph2ibs(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP5|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x69); } +-void vcvtph2iubs(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP5|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x6B); } +-void vcvtph2pd(const Xmm& x, const Operand& op) { if (!op.isXMM() && !op.isMEM()) XBYAK_THROW(ERR_BAD_MEM_SIZE) opVex(x, 0, op, T_N4|T_N_VL|T_MAP5|T_W0|T_YMM|T_SAE_X|T_MUST_EVEX|T_B16, 0x5A); } +-void vcvtph2psx(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_66|T_MAP6|T_W0|T_YMM|T_SAE_Y|T_MUST_EVEX|T_B16, 0x13); } +-void vcvtph2qq(const Xmm& x, const Operand& op) { if (!op.isXMM() && !op.isMEM()) XBYAK_THROW(ERR_BAD_MEM_SIZE) opVex(x, 0, op, T_N4|T_N_VL|T_66|T_MAP5|T_W0|T_YMM|T_ER_X|T_MUST_EVEX|T_B16, 0x7B); } +-void vcvtph2udq(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_MAP5|T_W0|T_YMM|T_ER_Y|T_MUST_EVEX|T_B16, 0x79); } +-void vcvtph2uqq(const Xmm& x, const Operand& op) { if (!op.isXMM() && !op.isMEM()) XBYAK_THROW(ERR_BAD_MEM_SIZE) opVex(x, 0, op, T_N4|T_N_VL|T_66|T_MAP5|T_W0|T_YMM|T_ER_X|T_MUST_EVEX|T_B16, 0x79); } +-void vcvtph2uw(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP5|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x7D); } +-void vcvtph2w(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_MAP5|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x7D); } +-void vcvtps2ibs(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_MAP5|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0x69); } +-void vcvtps2iubs(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_MAP5|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0x6B); } +-void vcvtps2phx(const Xmm& x, const Operand& op) { checkCvt4(x, op); opCvt(x, op, T_N16|T_N_VL|T_66|T_MAP5|T_W0|T_ER_Z|T_MUST_EVEX|T_B32, 0x1D); } +-void vcvtps2qq(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_66|T_0F|T_W0|T_YMM|T_ER_Y|T_MUST_EVEX|T_B32, 0x7B); } +-void vcvtps2udq(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_0F|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0x79); } +-void vcvtps2uqq(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_66|T_0F|T_W0|T_YMM|T_ER_Y|T_MUST_EVEX|T_B32, 0x79); } +-void vcvtqq2pd(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F3|T_0F|T_EW1|T_YMM|T_ER_Z|T_MUST_EVEX|T_B64, 0xE6); } +-void vcvtqq2ph(const Xmm& x, const Operand& op) { opCvt5(x, op, T_N16|T_N_VL|T_MAP5|T_EW1|T_ER_Z|T_MUST_EVEX|T_B64, 0x5B); } +-void vcvtqq2ps(const Xmm& x, const Operand& op) { opCvt2(x, op, T_0F|T_EW1|T_YMM|T_ER_Z|T_MUST_EVEX|T_B64, 0x5B); } +-void vcvtsd2sh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_F2|T_MAP5|T_EW1|T_ER_X|T_MUST_EVEX, 0x5A); } +-void vcvtsd2usi(const Reg32e& r, const Operand& op) { uint64_t type = (T_N8|T_F2|T_0F|T_ER_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_W0); opVex(r, &xm0, op, type, 0x79); } +-void vcvtsh2sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_F3|T_MAP5|T_W0|T_SAE_X|T_MUST_EVEX, 0x5A); } +-void vcvtsh2si(const Reg32e& r, const Operand& op) { uint64_t type = (T_N2|T_F3|T_MAP5|T_ER_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_W0); opVex(r, &xm0, op, type, 0x2D); } +-void vcvtsh2ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_MAP6|T_W0|T_SAE_X|T_MUST_EVEX, 0x13); } +-void vcvtsh2usi(const Reg32e& r, const Operand& op) { uint64_t type = (T_N2|T_F3|T_MAP5|T_ER_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_W0); opVex(r, &xm0, op, type, 0x79); } +-void vcvtsi2sh(const Xmm& x1, const Xmm& x2, const Operand& op) { if (!(x1.isXMM() && x2.isXMM() && op.isBit(32|64))) XBYAK_THROW(ERR_BAD_COMBINATION) uint64_t type = (T_F3|T_MAP5|T_ER_R|T_MUST_EVEX|T_M_K) | (op.isBit(32) ? (T_W0 | T_N4) : (T_EW1 | T_N8)); opVex(x1, &x2, op, type, 0x2A); } +-void vcvtss2sh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_MAP5|T_W0|T_ER_X|T_MUST_EVEX, 0x1D); } +-void vcvtss2usi(const Reg32e& r, const Operand& op) { uint64_t type = (T_N4|T_F3|T_0F|T_ER_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_W0); opVex(r, &xm0, op, type, 0x79); } +-void vcvttbf162ibs(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F2|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x68); } +-void vcvttbf162iubs(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F2|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x6A); } +-void vcvttpd2dqs(const Xmm& x, const Operand& op) { opCvt2(x, op, T_MAP5|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x6D); } +-void vcvttpd2qq(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x7A); } +-void vcvttpd2qqs(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_MAP5|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x6D); } +-void vcvttpd2udq(const Xmm& x, const Operand& op) { opCvt2(x, op, T_0F|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x78); } +-void vcvttpd2udqs(const Xmm& x, const Operand& op) { opCvt2(x, op, T_MAP5|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x6C); } +-void vcvttpd2uqq(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x78); } +-void vcvttpd2uqqs(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_MAP5|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x6C); } +-void vcvttph2dq(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_F3|T_MAP5|T_W0|T_YMM|T_SAE_Y|T_MUST_EVEX|T_B16, 0x5B); } +-void vcvttph2ibs(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP5|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x68); } +-void vcvttph2iubs(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP5|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x6A); } +-void vcvttph2qq(const Xmm& x, const Operand& op) { if (!op.isXMM() && !op.isMEM()) XBYAK_THROW(ERR_BAD_MEM_SIZE) opVex(x, 0, op, T_N4|T_N_VL|T_66|T_MAP5|T_W0|T_YMM|T_SAE_X|T_MUST_EVEX|T_B16, 0x7A); } +-void vcvttph2udq(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_MAP5|T_W0|T_YMM|T_SAE_Y|T_MUST_EVEX|T_B16, 0x78); } +-void vcvttph2uqq(const Xmm& x, const Operand& op) { if (!op.isXMM() && !op.isMEM()) XBYAK_THROW(ERR_BAD_MEM_SIZE) opVex(x, 0, op, T_N4|T_N_VL|T_66|T_MAP5|T_W0|T_YMM|T_SAE_X|T_MUST_EVEX|T_B16, 0x78); } +-void vcvttph2uw(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP5|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B16, 0x7C); } +-void vcvttph2w(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_MAP5|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B16, 0x7C); } +-void vcvttps2dqs(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP5|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x6D); } +-void vcvttps2ibs(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_MAP5|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0x68); } +-void vcvttps2iubs(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_MAP5|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0x6A); } +-void vcvttps2qq(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_66|T_0F|T_W0|T_YMM|T_SAE_Y|T_MUST_EVEX|T_B32, 0x7A); } +-void vcvttps2qqs(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_66|T_MAP5|T_W0|T_YMM|T_SAE_Y|T_MUST_EVEX|T_B32, 0x6D); } +-void vcvttps2udq(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_0F|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x78); } +-void vcvttps2udqs(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP5|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x6C); } +-void vcvttps2uqq(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_66|T_0F|T_W0|T_YMM|T_SAE_Y|T_MUST_EVEX|T_B32, 0x78); } +-void vcvttps2uqqs(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_66|T_MAP5|T_W0|T_YMM|T_SAE_Y|T_MUST_EVEX|T_B32, 0x6C); } +-void vcvttsd2sis(const Reg32e& r, const Operand& op) { uint64_t type = (T_N8|T_F2|T_MAP5|T_SAE_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_W0); opVex(r, &xm0, op, type, 0x6D); } +-void vcvttsd2usi(const Reg32e& r, const Operand& op) { uint64_t type = (T_N8|T_F2|T_0F|T_SAE_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_W0); opVex(r, &xm0, op, type, 0x78); } +-void vcvttsd2usis(const Reg32e& r, const Operand& op) { uint64_t type = (T_N8|T_F2|T_MAP5|T_SAE_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_W0); opVex(r, &xm0, op, type, 0x6C); } +-void vcvttsh2si(const Reg32e& r, const Operand& op) { uint64_t type = (T_N2|T_F3|T_MAP5|T_SAE_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_W0); opVex(r, &xm0, op, type, 0x2C); } +-void vcvttsh2usi(const Reg32e& r, const Operand& op) { uint64_t type = (T_N2|T_F3|T_MAP5|T_SAE_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_W0); opVex(r, &xm0, op, type, 0x78); } +-void vcvttss2sis(const Reg32e& r, const Operand& op) { uint64_t type = (T_N4|T_F3|T_MAP5|T_SAE_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_W0); opVex(r, &xm0, op, type, 0x6D); } +-void vcvttss2usi(const Reg32e& r, const Operand& op) { uint64_t type = (T_N4|T_F3|T_0F|T_SAE_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_W0); opVex(r, &xm0, op, type, 0x78); } +-void vcvttss2usis(const Reg32e& r, const Operand& op) { uint64_t type = (T_N4|T_F3|T_MAP5|T_SAE_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_W0); opVex(r, &xm0, op, type, 0x6C); } +-void vcvtudq2pd(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_F3|T_0F|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x7A); } +-void vcvtudq2ph(const Xmm& x, const Operand& op) { checkCvt4(x, op); opCvt(x, op, T_N16|T_N_VL|T_F2|T_MAP5|T_W0|T_ER_Z|T_MUST_EVEX|T_B32, 0x7A); } +-void vcvtudq2ps(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F2|T_0F|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0x7A); } +-void vcvtuqq2pd(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F3|T_0F|T_EW1|T_YMM|T_ER_Z|T_MUST_EVEX|T_B64, 0x7A); } +-void vcvtuqq2ph(const Xmm& x, const Operand& op) { opCvt5(x, op, T_N16|T_N_VL|T_F2|T_MAP5|T_EW1|T_ER_Z|T_MUST_EVEX|T_B64, 0x7A); } +-void vcvtuqq2ps(const Xmm& x, const Operand& op) { opCvt2(x, op, T_F2|T_0F|T_EW1|T_YMM|T_ER_Z|T_MUST_EVEX|T_B64, 0x7A); } +-void vcvtusi2sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opCvt3(x1, x2, op, T_F2 | T_0F | T_MUST_EVEX, T_W1 | T_EW1 | T_ER_X | T_N8, T_W0 | T_N4, 0x7B); } +-void vcvtusi2sh(const Xmm& x1, const Xmm& x2, const Operand& op) { if (!(x1.isXMM() && x2.isXMM() && op.isBit(32|64))) XBYAK_THROW(ERR_BAD_COMBINATION) uint64_t type = (T_F3|T_MAP5|T_ER_R|T_MUST_EVEX|T_M_K) | (op.isBit(32) ? (T_W0 | T_N4) : (T_EW1 | T_N8)); opVex(x1, &x2, op, type, 0x7B); } +-void vcvtusi2ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opCvt3(x1, x2, op, T_F3 | T_0F | T_MUST_EVEX | T_ER_X, T_W1 | T_EW1 | T_N8, T_W0 | T_N4, 0x7B); } +-void vcvtuw2ph(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F2|T_MAP5|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x7D); } +-void vcvtw2ph(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F3|T_MAP5|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x7D); } +-void vdbpsadbw(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM|T_MUST_EVEX, 0x42, imm); } +-void vdivbf16(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x5E); } +-void vdivph(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_W0 | T_YMM | T_MUST_EVEX | T_ER_Z | T_B16, 0x5E); } +-void vdivsh(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_F3 | T_W0 | T_MUST_EVEX | T_ER_X | T_N2, 0x5E); } +-void vdpbf16ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F3|T_0F38|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x52); } +-void vdpphps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_0F38|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x52); } +-void vexp2pd(const Zmm& z, const Operand& op) { opAVX_X_XM_IMM(z, op, T_66 | T_0F38 | T_MUST_EVEX | T_YMM | T_EW1 | T_B64 | T_SAE_Z, 0xC8); } +-void vexp2ps(const Zmm& z, const Operand& op) { opAVX_X_XM_IMM(z, op, T_66 | T_0F38 | T_MUST_EVEX | T_YMM | T_W0 | T_B32 | T_SAE_Z, 0xC8); } +-void vexpandpd(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x88); } +-void vexpandps(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N4|T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX, 0x88); } +-void vextractf32x4(const Operand& op, const Ymm& r, uint8_t imm) { if (!op.is(Operand::MEM | Operand::XMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r, 0, op, T_N16|T_66|T_0F3A|T_W0|T_YMM|T_MUST_EVEX, 0x19, imm); } +-void vextractf32x8(const Operand& op, const Zmm& r, uint8_t imm) { if (!op.is(Operand::MEM | Operand::YMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r, 0, op, T_N32|T_66|T_0F3A|T_W0|T_YMM|T_MUST_EVEX, 0x1B, imm); } +-void vextractf64x2(const Operand& op, const Ymm& r, uint8_t imm) { if (!op.is(Operand::MEM | Operand::XMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r, 0, op, T_N16|T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x19, imm); } +-void vextractf64x4(const Operand& op, const Zmm& r, uint8_t imm) { if (!op.is(Operand::MEM | Operand::YMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r, 0, op, T_N32|T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x1B, imm); } +-void vextracti32x4(const Operand& op, const Ymm& r, uint8_t imm) { if (!op.is(Operand::MEM | Operand::XMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r, 0, op, T_N16|T_66|T_0F3A|T_W0|T_YMM|T_MUST_EVEX, 0x39, imm); } +-void vextracti32x8(const Operand& op, const Zmm& r, uint8_t imm) { if (!op.is(Operand::MEM | Operand::YMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r, 0, op, T_N32|T_66|T_0F3A|T_W0|T_YMM|T_MUST_EVEX, 0x3B, imm); } +-void vextracti64x2(const Operand& op, const Ymm& r, uint8_t imm) { if (!op.is(Operand::MEM | Operand::XMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r, 0, op, T_N16|T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x39, imm); } +-void vextracti64x4(const Operand& op, const Zmm& r, uint8_t imm) { if (!op.is(Operand::MEM | Operand::YMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r, 0, op, T_N32|T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x3B, imm); } +-void vfcmaddcph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F2|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0x56); } +-void vfcmulcph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F2|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0xD6); } +-void vfixupimmpd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x54, imm); } +-void vfixupimmps(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x54, imm); } +-void vfixupimmsd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F3A|T_EW1|T_SAE_Z|T_MUST_EVEX, 0x55, imm); } +-void vfixupimmss(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F3A|T_W0|T_SAE_Z|T_MUST_EVEX, 0x55, imm); } +-void vfmadd132bf16(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x98); } +-void vfmadd132ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x98); } +-void vfmadd132sh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_ER_X|T_MUST_EVEX, 0x99); } +-void vfmadd213bf16(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0xA8); } +-void vfmadd213ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xA8); } +-void vfmadd213sh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_ER_X|T_MUST_EVEX, 0xA9); } +-void vfmadd231bf16(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0xB8); } +-void vfmadd231ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xB8); } +-void vfmadd231sh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_ER_X|T_MUST_EVEX, 0xB9); } +-void vfmaddcph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F3|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0x56); } +-void vfmaddsub132ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x96); } +-void vfmaddsub213ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xA6); } +-void vfmaddsub231ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xB6); } +-void vfmsub132bf16(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x9A); } +-void vfmsub132ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x9A); } +-void vfmsub132sh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_ER_X|T_MUST_EVEX, 0x9B); } +-void vfmsub213bf16(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0xAA); } +-void vfmsub213ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xAA); } +-void vfmsub213sh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_ER_X|T_MUST_EVEX, 0xAB); } +-void vfmsub231bf16(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0xBA); } +-void vfmsub231ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xBA); } +-void vfmsub231sh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_ER_X|T_MUST_EVEX, 0xBB); } +-void vfmsubadd132ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x97); } +-void vfmsubadd213ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xA7); } +-void vfmsubadd231ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xB7); } +-void vfmulcph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F3|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0xD6); } +-void vfnmadd132bf16(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x9C); } +-void vfnmadd132ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x9C); } +-void vfnmadd132sh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_ER_X|T_MUST_EVEX, 0x9D); } +-void vfnmadd213bf16(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0xAC); } +-void vfnmadd213ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xAC); } +-void vfnmadd213sh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_ER_X|T_MUST_EVEX, 0xAD); } +-void vfnmadd231bf16(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0xBC); } +-void vfnmadd231ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xBC); } +-void vfnmadd231sh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_ER_X|T_MUST_EVEX, 0xBD); } +-void vfnmsub132bf16(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x9E); } +-void vfnmsub132ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x9E); } +-void vfnmsub132sh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_ER_X|T_MUST_EVEX, 0x9F); } +-void vfnmsub213bf16(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0xAE); } +-void vfnmsub213ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xAE); } +-void vfnmsub213sh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_ER_X|T_MUST_EVEX, 0xAF); } +-void vfnmsub231bf16(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0xBE); } +-void vfnmsub231ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xBE); } +-void vfnmsub231sh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_ER_X|T_MUST_EVEX, 0xBF); } ++void v4fmaddps(Zmm z1, Zmm z2, const Address& addr) { opAVX_X_X_XM(z1, z2, addr, T_0F38 | T_F2 | T_W0 | T_YMM | T_MUST_EVEX | T_N16, 0x9A); } ++void v4fmaddss(Xmm x1, Xmm x2, const Address& addr) { opAVX_X_X_XM(x1, x2, addr, T_0F38 | T_F2 | T_W0 | T_MUST_EVEX | T_N16, 0x9B); } ++void v4fnmaddps(Zmm z1, Zmm z2, const Address& addr) { opAVX_X_X_XM(z1, z2, addr, T_0F38 | T_F2 | T_W0 | T_YMM | T_MUST_EVEX | T_N16, 0xAA); } ++void v4fnmaddss(Xmm x1, Xmm x2, const Address& addr) { opAVX_X_X_XM(x1, x2, addr, T_0F38 | T_F2 | T_W0 | T_MUST_EVEX | T_N16, 0xAB); } ++void vaddbf16(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x58); } ++void vaddph(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_W0 | T_YMM | T_MUST_EVEX | T_ER_Z | T_B16, 0x58); } ++void vaddsh(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_F3 | T_W0 | T_MUST_EVEX | T_ER_X | T_N2, 0x58); } ++void valignd(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM|T_MUST_EVEX, 0x03, imm); } ++void valignq(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x03, imm); } ++void vblendmpd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x65); } ++void vblendmps(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x65); } ++void vbroadcastf32x2(Ymm y, const Operand& op) { opAVX_X_XM_IMM(y, op, T_66 | T_0F38 | T_YMM | T_MUST_EVEX | T_W0 | T_N8, 0x19); } ++void vbroadcastf32x4(Ymm y, const Address& addr) { opAVX_X_XM_IMM(y, addr, T_66 | T_0F38 | T_YMM | T_MUST_EVEX | T_W0 | T_N16, 0x1A); } ++void vbroadcastf32x8(Zmm y, const Address& addr) { opAVX_X_XM_IMM(y, addr, T_66 | T_0F38 | T_YMM | T_MUST_EVEX | T_W0 | T_N32, 0x1B); } ++void vbroadcastf64x2(Ymm y, const Address& addr) { opAVX_X_XM_IMM(y, addr, T_66 | T_0F38 | T_YMM | T_MUST_EVEX | T_EW1 | T_N16, 0x1A); } ++void vbroadcastf64x4(Zmm y, const Address& addr) { opAVX_X_XM_IMM(y, addr, T_66 | T_0F38 | T_YMM | T_MUST_EVEX | T_EW1 | T_N32, 0x1B); } ++void vbroadcasti32x2(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66 | T_0F38 | T_YMM | T_MUST_EVEX | T_W0 | T_N8, 0x59); } ++void vbroadcasti32x4(Ymm y, const Operand& op) { opAVX_X_XM_IMM(y, op, T_66 | T_0F38 | T_YMM | T_MUST_EVEX | T_W0 | T_N16, 0x5A); } ++void vbroadcasti32x8(Zmm z, const Operand& op) { opAVX_X_XM_IMM(z, op, T_66 | T_0F38 | T_YMM | T_MUST_EVEX | T_W0 | T_N32, 0x5B); } ++void vbroadcasti64x2(Ymm y, const Operand& op) { opAVX_X_XM_IMM(y, op, T_66 | T_0F38 | T_YMM | T_MUST_EVEX | T_EW1 | T_N16, 0x5A); } ++void vbroadcasti64x4(Zmm z, const Operand& op) { opAVX_X_XM_IMM(z, op, T_66 | T_0F38 | T_YMM | T_MUST_EVEX | T_EW1 | T_N32, 0x5B); } ++void vcmpbf16(const Opmask& k, Xmm x, const Operand& op, uint8_t imm) { opVex(k, &x, op, T_MUST_EVEX|T_F2|T_0F3A|T_W0|T_YMM|T_B16, 0xC2, imm); } ++void vcmpeq_ospd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 16); } ++void vcmpeq_osps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 16); } ++void vcmpeq_ossd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 16); } ++void vcmpeq_osss(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 16); } ++void vcmpeq_uqpd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 8); } ++void vcmpeq_uqps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 8); } ++void vcmpeq_uqsd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 8); } ++void vcmpeq_uqss(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 8); } ++void vcmpeq_uspd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 24); } ++void vcmpeq_usps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 24); } ++void vcmpeq_ussd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 24); } ++void vcmpeq_usss(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 24); } ++void vcmpeqpd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 0); } ++void vcmpeqps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 0); } ++void vcmpeqsd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 0); } ++void vcmpeqss(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 0); } ++void vcmpfalse_ospd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 27); } ++void vcmpfalse_osps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 27); } ++void vcmpfalse_ossd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 27); } ++void vcmpfalse_osss(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 27); } ++void vcmpfalsepd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 11); } ++void vcmpfalseps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 11); } ++void vcmpfalsesd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 11); } ++void vcmpfalsess(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 11); } ++void vcmpge_oqpd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 29); } ++void vcmpge_oqps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 29); } ++void vcmpge_oqsd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 29); } ++void vcmpge_oqss(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 29); } ++void vcmpgepd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 13); } ++void vcmpgeps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 13); } ++void vcmpgesd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 13); } ++void vcmpgess(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 13); } ++void vcmpgt_oqpd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 30); } ++void vcmpgt_oqps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 30); } ++void vcmpgt_oqsd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 30); } ++void vcmpgt_oqss(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 30); } ++void vcmpgtpd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 14); } ++void vcmpgtps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 14); } ++void vcmpgtsd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 14); } ++void vcmpgtss(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 14); } ++void vcmple_oqpd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 18); } ++void vcmple_oqps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 18); } ++void vcmple_oqsd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 18); } ++void vcmple_oqss(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 18); } ++void vcmplepd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 2); } ++void vcmpleps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 2); } ++void vcmplesd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 2); } ++void vcmpless(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 2); } ++void vcmplt_oqpd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 17); } ++void vcmplt_oqps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 17); } ++void vcmplt_oqsd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 17); } ++void vcmplt_oqss(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 17); } ++void vcmpltpd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 1); } ++void vcmpltps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 1); } ++void vcmpltsd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 1); } ++void vcmpltss(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 1); } ++void vcmpneq_oqpd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 12); } ++void vcmpneq_oqps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 12); } ++void vcmpneq_oqsd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 12); } ++void vcmpneq_oqss(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 12); } ++void vcmpneq_ospd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 28); } ++void vcmpneq_osps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 28); } ++void vcmpneq_ossd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 28); } ++void vcmpneq_osss(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 28); } ++void vcmpneq_uspd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 20); } ++void vcmpneq_usps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 20); } ++void vcmpneq_ussd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 20); } ++void vcmpneq_usss(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 20); } ++void vcmpneqpd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 4); } ++void vcmpneqps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 4); } ++void vcmpneqsd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 4); } ++void vcmpneqss(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 4); } ++void vcmpnge_uqpd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 25); } ++void vcmpnge_uqps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 25); } ++void vcmpnge_uqsd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 25); } ++void vcmpnge_uqss(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 25); } ++void vcmpngepd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 9); } ++void vcmpngeps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 9); } ++void vcmpngesd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 9); } ++void vcmpngess(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 9); } ++void vcmpngt_uqpd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 26); } ++void vcmpngt_uqps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 26); } ++void vcmpngt_uqsd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 26); } ++void vcmpngt_uqss(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 26); } ++void vcmpngtpd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 10); } ++void vcmpngtps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 10); } ++void vcmpngtsd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 10); } ++void vcmpngtss(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 10); } ++void vcmpnle_uqpd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 22); } ++void vcmpnle_uqps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 22); } ++void vcmpnle_uqsd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 22); } ++void vcmpnle_uqss(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 22); } ++void vcmpnlepd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 6); } ++void vcmpnleps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 6); } ++void vcmpnlesd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 6); } ++void vcmpnless(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 6); } ++void vcmpnlt_uqpd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 21); } ++void vcmpnlt_uqps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 21); } ++void vcmpnlt_uqsd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 21); } ++void vcmpnlt_uqss(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 21); } ++void vcmpnltpd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 5); } ++void vcmpnltps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 5); } ++void vcmpnltsd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 5); } ++void vcmpnltss(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 5); } ++void vcmpord_spd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 23); } ++void vcmpord_sps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 23); } ++void vcmpord_ssd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 23); } ++void vcmpord_sss(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 23); } ++void vcmpordpd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 7); } ++void vcmpordps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 7); } ++void vcmpordsd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 7); } ++void vcmpordss(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 7); } ++void vcmppd(const Opmask& k, Xmm x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_66|T_0F|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0xC2, imm); } ++void vcmpph(const Opmask& k, Xmm x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_0F3A|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B16, 0xC2, imm); } ++void vcmpps(const Opmask& k, Xmm x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_0F|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0xC2, imm); } ++void vcmpsd(const Opmask& k, Xmm x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_N8|T_F2|T_0F|T_EW1|T_SAE_Z|T_MUST_EVEX, 0xC2, imm); } ++void vcmpsh(const Opmask& k, Xmm x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_N2|T_F3|T_0F3A|T_W0|T_SAE_X|T_MUST_EVEX, 0xC2, imm); } ++void vcmpss(const Opmask& k, Xmm x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_N4|T_F3|T_0F|T_W0|T_SAE_Z|T_MUST_EVEX, 0xC2, imm); } ++void vcmptrue_uspd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 31); } ++void vcmptrue_usps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 31); } ++void vcmptrue_ussd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 31); } ++void vcmptrue_usss(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 31); } ++void vcmptruepd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 15); } ++void vcmptrueps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 15); } ++void vcmptruesd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 15); } ++void vcmptruess(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 15); } ++void vcmpunord_spd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 19); } ++void vcmpunord_sps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 19); } ++void vcmpunord_ssd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 19); } ++void vcmpunord_sss(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 19); } ++void vcmpunordpd(const Opmask& k, Xmm x, const Operand& op) { vcmppd(k, x, op, 3); } ++void vcmpunordps(const Opmask& k, Xmm x, const Operand& op) { vcmpps(k, x, op, 3); } ++void vcmpunordsd(const Opmask& k, Xmm x, const Operand& op) { vcmpsd(k, x, op, 3); } ++void vcmpunordss(const Opmask& k, Xmm x, const Operand& op) { vcmpss(k, x, op, 3); } ++void vcomisbf16(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N2|T_66|T_MAP5|T_W0|T_MUST_EVEX, 0x2F); } ++void vcomish(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N2|T_MAP5|T_W0|T_SAE_X|T_MUST_EVEX, 0x2F); } ++void vcompresspd(const Operand& op, Xmm x) { opAVX_X_XM_IMM(x, op, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x8A); } ++void vcompressps(const Operand& op, Xmm x) { opAVX_X_XM_IMM(x, op, T_N4|T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX, 0x8A); } ++void vcomxsd(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N8|T_F2|T_0F|T_EW1|T_SAE_X|T_MUST_EVEX, 0x2F); } ++void vcomxsh(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N2|T_F3|T_MAP5|T_W0|T_SAE_X|T_MUST_EVEX, 0x2F); } ++void vcomxss(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N4|T_F3|T_0F|T_W0|T_SAE_X|T_MUST_EVEX, 0x2F); } ++void vcvt2ph2bf8(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_N_VL|T_F2|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x74); } ++void vcvt2ph2bf8s(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_N_VL|T_F2|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x74); } ++void vcvt2ph2hf8(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_N_VL|T_F2|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x18); } ++void vcvt2ph2hf8s(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_N_VL|T_F2|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x1B); } ++void vcvt2ps2phx(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0x67); } ++void vcvtbf162ibs(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F2|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x69); } ++void vcvtbf162iubs(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F2|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x6B); } ++void vcvtbiasph2bf8(Xmm x1, Xmm x2, const Operand& op) { opCvt6(x1, x2, op, T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x74); } ++void vcvtbiasph2bf8s(Xmm x1, Xmm x2, const Operand& op) { opCvt6(x1, x2, op, T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x74); } ++void vcvtbiasph2hf8(Xmm x1, Xmm x2, const Operand& op) { opCvt6(x1, x2, op, T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x18); } ++void vcvtbiasph2hf8s(Xmm x1, Xmm x2, const Operand& op) { opCvt6(x1, x2, op, T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x1B); } ++void vcvtdq2ph(Xmm x, const Operand& op) { checkCvt4(x, op); opCvt(x, op, T_N16|T_N_VL|T_MAP5|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0x5B); } ++void vcvthf82ph(Xmm x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_MUST_EVEX|T_F2|T_MAP5|T_W0|T_YMM|T_N8|T_N_VL, 0x1E); } ++void vcvtne2ps2bf16(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F2|T_0F38|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x72); } ++void vcvtpd2ph(Xmm x, const Operand& op) { opCvt5(x, op, T_N16|T_N_VL|T_66|T_MAP5|T_EW1|T_ER_Z|T_MUST_EVEX|T_B64, 0x5A); } ++void vcvtpd2qq(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F|T_EW1|T_YMM|T_ER_Z|T_MUST_EVEX|T_B64, 0x7B); } ++void vcvtpd2udq(Xmm x, const Operand& op) { opCvt2(x, op, T_0F|T_EW1|T_YMM|T_ER_Z|T_MUST_EVEX|T_B64, 0x79); } ++void vcvtpd2uqq(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F|T_EW1|T_YMM|T_ER_Z|T_MUST_EVEX|T_B64, 0x79); } ++void vcvtph2bf8(Xmm x, const Operand& op) { opCvt2(x, op, T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x74); } ++void vcvtph2bf8s(Xmm x, const Operand& op) { opCvt2(x, op, T_F3|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x74); } ++void vcvtph2dq(Xmm x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_66|T_MAP5|T_W0|T_YMM|T_ER_Y|T_MUST_EVEX|T_B16, 0x5B); } ++void vcvtph2hf8(Xmm x, const Operand& op) { opCvt2(x, op, T_F3|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x18); } ++void vcvtph2hf8s(Xmm x, const Operand& op) { opCvt2(x, op, T_F3|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x1B); } ++void vcvtph2ibs(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP5|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x69); } ++void vcvtph2iubs(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP5|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x6B); } ++void vcvtph2pd(Xmm x, const Operand& op) { if (!op.isXMM() && !op.isMEM()) XBYAK_THROW(ERR_BAD_MEM_SIZE) opVex(x, 0, op, T_N4|T_N_VL|T_MAP5|T_W0|T_YMM|T_SAE_X|T_MUST_EVEX|T_B16, 0x5A); } ++void vcvtph2psx(Xmm x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_66|T_MAP6|T_W0|T_YMM|T_SAE_Y|T_MUST_EVEX|T_B16, 0x13); } ++void vcvtph2qq(Xmm x, const Operand& op) { if (!op.isXMM() && !op.isMEM()) XBYAK_THROW(ERR_BAD_MEM_SIZE) opVex(x, 0, op, T_N4|T_N_VL|T_66|T_MAP5|T_W0|T_YMM|T_ER_X|T_MUST_EVEX|T_B16, 0x7B); } ++void vcvtph2udq(Xmm x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_MAP5|T_W0|T_YMM|T_ER_Y|T_MUST_EVEX|T_B16, 0x79); } ++void vcvtph2uqq(Xmm x, const Operand& op) { if (!op.isXMM() && !op.isMEM()) XBYAK_THROW(ERR_BAD_MEM_SIZE) opVex(x, 0, op, T_N4|T_N_VL|T_66|T_MAP5|T_W0|T_YMM|T_ER_X|T_MUST_EVEX|T_B16, 0x79); } ++void vcvtph2uw(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP5|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x7D); } ++void vcvtph2w(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_MAP5|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x7D); } ++void vcvtps2ibs(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_MAP5|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0x69); } ++void vcvtps2iubs(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_MAP5|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0x6B); } ++void vcvtps2phx(Xmm x, const Operand& op) { checkCvt4(x, op); opCvt(x, op, T_N16|T_N_VL|T_66|T_MAP5|T_W0|T_ER_Z|T_MUST_EVEX|T_B32, 0x1D); } ++void vcvtps2qq(Xmm x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_66|T_0F|T_W0|T_YMM|T_ER_Y|T_MUST_EVEX|T_B32, 0x7B); } ++void vcvtps2udq(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_0F|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0x79); } ++void vcvtps2uqq(Xmm x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_66|T_0F|T_W0|T_YMM|T_ER_Y|T_MUST_EVEX|T_B32, 0x79); } ++void vcvtqq2pd(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F3|T_0F|T_EW1|T_YMM|T_ER_Z|T_MUST_EVEX|T_B64, 0xE6); } ++void vcvtqq2ph(Xmm x, const Operand& op) { opCvt5(x, op, T_N16|T_N_VL|T_MAP5|T_EW1|T_ER_Z|T_MUST_EVEX|T_B64, 0x5B); } ++void vcvtqq2ps(Xmm x, const Operand& op) { opCvt2(x, op, T_0F|T_EW1|T_YMM|T_ER_Z|T_MUST_EVEX|T_B64, 0x5B); } ++void vcvtsd2sh(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_F2|T_MAP5|T_EW1|T_ER_X|T_MUST_EVEX, 0x5A); } ++void vcvtsd2usi(Reg32e r, const Operand& op) { uint64_t type = (T_N8|T_F2|T_0F|T_ER_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_W0); opVex(r, &xm0, op, type, 0x79); } ++void vcvtsh2sd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_F3|T_MAP5|T_W0|T_SAE_X|T_MUST_EVEX, 0x5A); } ++void vcvtsh2si(Reg32e r, const Operand& op) { uint64_t type = (T_N2|T_F3|T_MAP5|T_ER_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_W0); opVex(r, &xm0, op, type, 0x2D); } ++void vcvtsh2ss(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_MAP6|T_W0|T_SAE_X|T_MUST_EVEX, 0x13); } ++void vcvtsh2usi(Reg32e r, const Operand& op) { uint64_t type = (T_N2|T_F3|T_MAP5|T_ER_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_W0); opVex(r, &xm0, op, type, 0x79); } ++void vcvtsi2sh(Xmm x1, Xmm x2, const Operand& op) { if (!(x1.isXMM() && x2.isXMM() && op.isBit(32|64))) XBYAK_THROW(ERR_BAD_COMBINATION) uint64_t type = (T_F3|T_MAP5|T_ER_R|T_MUST_EVEX|T_M_K) | (op.isBit(32) ? (T_W0 | T_N4) : (T_EW1 | T_N8)); opVex(x1, &x2, op, type, 0x2A); } ++void vcvtss2sh(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_MAP5|T_W0|T_ER_X|T_MUST_EVEX, 0x1D); } ++void vcvtss2usi(Reg32e r, const Operand& op) { uint64_t type = (T_N4|T_F3|T_0F|T_ER_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_W0); opVex(r, &xm0, op, type, 0x79); } ++void vcvttbf162ibs(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F2|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x68); } ++void vcvttbf162iubs(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F2|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x6A); } ++void vcvttpd2dqs(Xmm x, const Operand& op) { opCvt2(x, op, T_MAP5|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x6D); } ++void vcvttpd2qq(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x7A); } ++void vcvttpd2qqs(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_MAP5|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x6D); } ++void vcvttpd2udq(Xmm x, const Operand& op) { opCvt2(x, op, T_0F|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x78); } ++void vcvttpd2udqs(Xmm x, const Operand& op) { opCvt2(x, op, T_MAP5|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x6C); } ++void vcvttpd2uqq(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x78); } ++void vcvttpd2uqqs(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_MAP5|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x6C); } ++void vcvttph2dq(Xmm x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_F3|T_MAP5|T_W0|T_YMM|T_SAE_Y|T_MUST_EVEX|T_B16, 0x5B); } ++void vcvttph2ibs(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP5|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x68); } ++void vcvttph2iubs(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP5|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x6A); } ++void vcvttph2qq(Xmm x, const Operand& op) { if (!op.isXMM() && !op.isMEM()) XBYAK_THROW(ERR_BAD_MEM_SIZE) opVex(x, 0, op, T_N4|T_N_VL|T_66|T_MAP5|T_W0|T_YMM|T_SAE_X|T_MUST_EVEX|T_B16, 0x7A); } ++void vcvttph2udq(Xmm x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_MAP5|T_W0|T_YMM|T_SAE_Y|T_MUST_EVEX|T_B16, 0x78); } ++void vcvttph2uqq(Xmm x, const Operand& op) { if (!op.isXMM() && !op.isMEM()) XBYAK_THROW(ERR_BAD_MEM_SIZE) opVex(x, 0, op, T_N4|T_N_VL|T_66|T_MAP5|T_W0|T_YMM|T_SAE_X|T_MUST_EVEX|T_B16, 0x78); } ++void vcvttph2uw(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP5|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B16, 0x7C); } ++void vcvttph2w(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_MAP5|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B16, 0x7C); } ++void vcvttps2dqs(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP5|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x6D); } ++void vcvttps2ibs(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_MAP5|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0x68); } ++void vcvttps2iubs(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_MAP5|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0x6A); } ++void vcvttps2qq(Xmm x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_66|T_0F|T_W0|T_YMM|T_SAE_Y|T_MUST_EVEX|T_B32, 0x7A); } ++void vcvttps2qqs(Xmm x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_66|T_MAP5|T_W0|T_YMM|T_SAE_Y|T_MUST_EVEX|T_B32, 0x6D); } ++void vcvttps2udq(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_0F|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x78); } ++void vcvttps2udqs(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP5|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x6C); } ++void vcvttps2uqq(Xmm x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_66|T_0F|T_W0|T_YMM|T_SAE_Y|T_MUST_EVEX|T_B32, 0x78); } ++void vcvttps2uqqs(Xmm x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_66|T_MAP5|T_W0|T_YMM|T_SAE_Y|T_MUST_EVEX|T_B32, 0x6C); } ++void vcvttsd2sis(Reg32e r, const Operand& op) { uint64_t type = (T_N8|T_F2|T_MAP5|T_SAE_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_W0); opVex(r, &xm0, op, type, 0x6D); } ++void vcvttsd2usi(Reg32e r, const Operand& op) { uint64_t type = (T_N8|T_F2|T_0F|T_SAE_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_W0); opVex(r, &xm0, op, type, 0x78); } ++void vcvttsd2usis(Reg32e r, const Operand& op) { uint64_t type = (T_N8|T_F2|T_MAP5|T_SAE_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_W0); opVex(r, &xm0, op, type, 0x6C); } ++void vcvttsh2si(Reg32e r, const Operand& op) { uint64_t type = (T_N2|T_F3|T_MAP5|T_SAE_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_W0); opVex(r, &xm0, op, type, 0x2C); } ++void vcvttsh2usi(Reg32e r, const Operand& op) { uint64_t type = (T_N2|T_F3|T_MAP5|T_SAE_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_W0); opVex(r, &xm0, op, type, 0x78); } ++void vcvttss2sis(Reg32e r, const Operand& op) { uint64_t type = (T_N4|T_F3|T_MAP5|T_SAE_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_W0); opVex(r, &xm0, op, type, 0x6D); } ++void vcvttss2usi(Reg32e r, const Operand& op) { uint64_t type = (T_N4|T_F3|T_0F|T_SAE_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_W0); opVex(r, &xm0, op, type, 0x78); } ++void vcvttss2usis(Reg32e r, const Operand& op) { uint64_t type = (T_N4|T_F3|T_MAP5|T_SAE_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_W0); opVex(r, &xm0, op, type, 0x6C); } ++void vcvtudq2pd(Xmm x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_F3|T_0F|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x7A); } ++void vcvtudq2ph(Xmm x, const Operand& op) { checkCvt4(x, op); opCvt(x, op, T_N16|T_N_VL|T_F2|T_MAP5|T_W0|T_ER_Z|T_MUST_EVEX|T_B32, 0x7A); } ++void vcvtudq2ps(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F2|T_0F|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0x7A); } ++void vcvtuqq2pd(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F3|T_0F|T_EW1|T_YMM|T_ER_Z|T_MUST_EVEX|T_B64, 0x7A); } ++void vcvtuqq2ph(Xmm x, const Operand& op) { opCvt5(x, op, T_N16|T_N_VL|T_F2|T_MAP5|T_EW1|T_ER_Z|T_MUST_EVEX|T_B64, 0x7A); } ++void vcvtuqq2ps(Xmm x, const Operand& op) { opCvt2(x, op, T_F2|T_0F|T_EW1|T_YMM|T_ER_Z|T_MUST_EVEX|T_B64, 0x7A); } ++void vcvtusi2sd(Xmm x1, Xmm x2, const Operand& op) { opCvt3(x1, x2, op, T_F2 | T_0F | T_MUST_EVEX, T_W1 | T_EW1 | T_ER_X | T_N8, T_W0 | T_N4, 0x7B); } ++void vcvtusi2sh(Xmm x1, Xmm x2, const Operand& op) { if (!(x1.isXMM() && x2.isXMM() && op.isBit(32|64))) XBYAK_THROW(ERR_BAD_COMBINATION) uint64_t type = (T_F3|T_MAP5|T_ER_R|T_MUST_EVEX|T_M_K) | (op.isBit(32) ? (T_W0 | T_N4) : (T_EW1 | T_N8)); opVex(x1, &x2, op, type, 0x7B); } ++void vcvtusi2ss(Xmm x1, Xmm x2, const Operand& op) { opCvt3(x1, x2, op, T_F3 | T_0F | T_MUST_EVEX | T_ER_X, T_W1 | T_EW1 | T_N8, T_W0 | T_N4, 0x7B); } ++void vcvtuw2ph(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F2|T_MAP5|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x7D); } ++void vcvtw2ph(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F3|T_MAP5|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x7D); } ++void vdbpsadbw(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM|T_MUST_EVEX, 0x42, imm); } ++void vdivbf16(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x5E); } ++void vdivph(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_W0 | T_YMM | T_MUST_EVEX | T_ER_Z | T_B16, 0x5E); } ++void vdivsh(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_F3 | T_W0 | T_MUST_EVEX | T_ER_X | T_N2, 0x5E); } ++void vdpbf16ps(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F3|T_0F38|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x52); } ++void vdpphps(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_0F38|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x52); } ++void vexp2pd(Zmm z, const Operand& op) { opAVX_X_XM_IMM(z, op, T_66 | T_0F38 | T_MUST_EVEX | T_YMM | T_EW1 | T_B64 | T_SAE_Z, 0xC8); } ++void vexp2ps(Zmm z, const Operand& op) { opAVX_X_XM_IMM(z, op, T_66 | T_0F38 | T_MUST_EVEX | T_YMM | T_W0 | T_B32 | T_SAE_Z, 0xC8); } ++void vexpandpd(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x88); } ++void vexpandps(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N4|T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX, 0x88); } ++void vextractf32x4(const Operand& op, Ymm r, uint8_t imm) { if (!op.is(Operand::MEM | Operand::XMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r, 0, op, T_N16|T_66|T_0F3A|T_W0|T_YMM|T_MUST_EVEX, 0x19, imm); } ++void vextractf32x8(const Operand& op, Zmm r, uint8_t imm) { if (!op.is(Operand::MEM | Operand::YMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r, 0, op, T_N32|T_66|T_0F3A|T_W0|T_YMM|T_MUST_EVEX, 0x1B, imm); } ++void vextractf64x2(const Operand& op, Ymm r, uint8_t imm) { if (!op.is(Operand::MEM | Operand::XMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r, 0, op, T_N16|T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x19, imm); } ++void vextractf64x4(const Operand& op, Zmm r, uint8_t imm) { if (!op.is(Operand::MEM | Operand::YMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r, 0, op, T_N32|T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x1B, imm); } ++void vextracti32x4(const Operand& op, Ymm r, uint8_t imm) { if (!op.is(Operand::MEM | Operand::XMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r, 0, op, T_N16|T_66|T_0F3A|T_W0|T_YMM|T_MUST_EVEX, 0x39, imm); } ++void vextracti32x8(const Operand& op, Zmm r, uint8_t imm) { if (!op.is(Operand::MEM | Operand::YMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r, 0, op, T_N32|T_66|T_0F3A|T_W0|T_YMM|T_MUST_EVEX, 0x3B, imm); } ++void vextracti64x2(const Operand& op, Ymm r, uint8_t imm) { if (!op.is(Operand::MEM | Operand::XMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r, 0, op, T_N16|T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x39, imm); } ++void vextracti64x4(const Operand& op, Zmm r, uint8_t imm) { if (!op.is(Operand::MEM | Operand::YMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r, 0, op, T_N32|T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x3B, imm); } ++void vfcmaddcph(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F2|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0x56); } ++void vfcmulcph(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F2|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0xD6); } ++void vfixupimmpd(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x54, imm); } ++void vfixupimmps(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x54, imm); } ++void vfixupimmsd(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F3A|T_EW1|T_SAE_Z|T_MUST_EVEX, 0x55, imm); } ++void vfixupimmss(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F3A|T_W0|T_SAE_Z|T_MUST_EVEX, 0x55, imm); } ++void vfmadd132bf16(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x98); } ++void vfmadd132ph(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x98); } ++void vfmadd132sh(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_ER_X|T_MUST_EVEX, 0x99); } ++void vfmadd213bf16(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0xA8); } ++void vfmadd213ph(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xA8); } ++void vfmadd213sh(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_ER_X|T_MUST_EVEX, 0xA9); } ++void vfmadd231bf16(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0xB8); } ++void vfmadd231ph(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xB8); } ++void vfmadd231sh(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_ER_X|T_MUST_EVEX, 0xB9); } ++void vfmaddcph(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F3|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0x56); } ++void vfmaddsub132ph(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x96); } ++void vfmaddsub213ph(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xA6); } ++void vfmaddsub231ph(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xB6); } ++void vfmsub132bf16(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x9A); } ++void vfmsub132ph(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x9A); } ++void vfmsub132sh(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_ER_X|T_MUST_EVEX, 0x9B); } ++void vfmsub213bf16(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0xAA); } ++void vfmsub213ph(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xAA); } ++void vfmsub213sh(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_ER_X|T_MUST_EVEX, 0xAB); } ++void vfmsub231bf16(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0xBA); } ++void vfmsub231ph(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xBA); } ++void vfmsub231sh(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_ER_X|T_MUST_EVEX, 0xBB); } ++void vfmsubadd132ph(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x97); } ++void vfmsubadd213ph(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xA7); } ++void vfmsubadd231ph(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xB7); } ++void vfmulcph(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F3|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0xD6); } ++void vfnmadd132bf16(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x9C); } ++void vfnmadd132ph(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x9C); } ++void vfnmadd132sh(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_ER_X|T_MUST_EVEX, 0x9D); } ++void vfnmadd213bf16(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0xAC); } ++void vfnmadd213ph(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xAC); } ++void vfnmadd213sh(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_ER_X|T_MUST_EVEX, 0xAD); } ++void vfnmadd231bf16(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0xBC); } ++void vfnmadd231ph(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xBC); } ++void vfnmadd231sh(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_ER_X|T_MUST_EVEX, 0xBD); } ++void vfnmsub132bf16(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x9E); } ++void vfnmsub132ph(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x9E); } ++void vfnmsub132sh(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_ER_X|T_MUST_EVEX, 0x9F); } ++void vfnmsub213bf16(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0xAE); } ++void vfnmsub213ph(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xAE); } ++void vfnmsub213sh(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_ER_X|T_MUST_EVEX, 0xAF); } ++void vfnmsub231bf16(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0xBE); } ++void vfnmsub231ph(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xBE); } ++void vfnmsub231sh(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_ER_X|T_MUST_EVEX, 0xBF); } + void vfpclassbf16(const Opmask& k, const Operand& op, uint8_t imm) { opVex(k.changeBit(op.getBit()), 0, op, T_MUST_EVEX|T_F2|T_0F3A|T_W0|T_YMM|T_B16, 0x66, imm); } + void vfpclasspd(const Opmask& k, const Operand& op, uint8_t imm) { if (!op.isBit(128|256|512)) XBYAK_THROW(ERR_BAD_MEM_SIZE) opVex(k.changeBit(op.getBit()), 0, op, T_66 | T_0F3A | T_MUST_EVEX | T_YMM | T_EW1 | T_B64, 0x66, imm); } + void vfpclassph(const Opmask& k, const Operand& op, uint8_t imm) { if (!op.isBit(128|256|512)) XBYAK_THROW(ERR_BAD_MEM_SIZE) opVex(k.changeBit(op.getBit()), 0, op, T_0F3A | T_MUST_EVEX | T_YMM | T_W0 | T_B16, 0x66, imm); } +@@ -2369,8 +2369,8 @@ void vfpclassps(const Opmask& k, const Operand& op, uint8_t imm) { if (!op.isBit + void vfpclasssd(const Opmask& k, const Operand& op, uint8_t imm) { if (!op.isXMEM()) XBYAK_THROW(ERR_BAD_MEM_SIZE) opVex(k, 0, op, T_66 | T_0F3A | T_MUST_EVEX | T_EW1 | T_N8, 0x67, imm); } + void vfpclasssh(const Opmask& k, const Operand& op, uint8_t imm) { if (!op.isXMEM()) XBYAK_THROW(ERR_BAD_MEM_SIZE) opVex(k, 0, op, T_0F3A | T_MUST_EVEX | T_W0 | T_N2, 0x67, imm); } + void vfpclassss(const Opmask& k, const Operand& op, uint8_t imm) { if (!op.isXMEM()) XBYAK_THROW(ERR_BAD_MEM_SIZE) opVex(k, 0, op, T_66 | T_0F3A | T_MUST_EVEX | T_W0 | T_N4, 0x67, imm); } +-void vgatherdpd(const Xmm& x, const Address& addr) { opGather2(x, addr, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_VSIB, 0x92, 1); } +-void vgatherdps(const Xmm& x, const Address& addr) { opGather2(x, addr, T_N4|T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_VSIB, 0x92, 0); } ++void vgatherdpd(Xmm x, const Address& addr) { opGather2(x, addr, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_VSIB, 0x92, 1); } ++void vgatherdps(Xmm x, const Address& addr) { opGather2(x, addr, T_N4|T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_VSIB, 0x92, 0); } + void vgatherpf0dpd(const Address& addr) { opGatherFetch(addr, zm1, T_N8|T_66|T_0F38|T_EW1|T_MUST_EVEX|T_M_K|T_VSIB, 0xC6, Operand::YMM); } + void vgatherpf0dps(const Address& addr) { opGatherFetch(addr, zm1, T_N4|T_66|T_0F38|T_W0|T_MUST_EVEX|T_M_K|T_VSIB, 0xC6, Operand::ZMM); } + void vgatherpf0qpd(const Address& addr) { opGatherFetch(addr, zm1, T_N8|T_66|T_0F38|T_EW1|T_MUST_EVEX|T_M_K|T_VSIB, 0xC7, Operand::ZMM); } +@@ -2379,271 +2379,271 @@ void vgatherpf1dpd(const Address& addr) { opGatherFetch(addr, zm2, T_N8|T_66|T_0 + void vgatherpf1dps(const Address& addr) { opGatherFetch(addr, zm2, T_N4|T_66|T_0F38|T_W0|T_MUST_EVEX|T_M_K|T_VSIB, 0xC6, Operand::ZMM); } + void vgatherpf1qpd(const Address& addr) { opGatherFetch(addr, zm2, T_N8|T_66|T_0F38|T_EW1|T_MUST_EVEX|T_M_K|T_VSIB, 0xC7, Operand::ZMM); } + void vgatherpf1qps(const Address& addr) { opGatherFetch(addr, zm2, T_N4|T_66|T_0F38|T_W0|T_MUST_EVEX|T_M_K|T_VSIB, 0xC7, Operand::ZMM); } +-void vgatherqpd(const Xmm& x, const Address& addr) { opGather2(x, addr, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_VSIB, 0x93, 0); } +-void vgatherqps(const Xmm& x, const Address& addr) { opGather2(x, addr, T_N4|T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_VSIB, 0x93, 2); } +-void vgetexpbf16(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x42); } +-void vgetexppd(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x42); } +-void vgetexpph(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_MAP6|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B16, 0x42); } +-void vgetexpps(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x42); } +-void vgetexpsd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_EW1|T_SAE_X|T_MUST_EVEX, 0x43); } +-void vgetexpsh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_SAE_X|T_MUST_EVEX, 0x43); } +-void vgetexpss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_SAE_X|T_MUST_EVEX, 0x43); } +-void vgetmantbf16(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_F2|T_0F3A|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x26, imm); } +-void vgetmantpd(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_66|T_0F3A|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x26, imm); } +-void vgetmantph(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_0F3A|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B16, 0x26, imm); } +-void vgetmantps(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_66|T_0F3A|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x26, imm); } +-void vgetmantsd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F3A|T_EW1|T_SAE_X|T_MUST_EVEX, 0x27, imm); } +-void vgetmantsh(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N2|T_0F3A|T_W0|T_SAE_X|T_MUST_EVEX, 0x27, imm); } +-void vgetmantss(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F3A|T_W0|T_SAE_X|T_MUST_EVEX, 0x27, imm); } +-void vinsertf32x4(const Ymm& r1, const Ymm& r2, const Operand& op, uint8_t imm) {if (!(r1.getKind() == r2.getKind() && op.is(Operand::MEM | Operand::XMM))) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r1, &r2, op, T_N16|T_66|T_0F3A|T_W0|T_YMM|T_MUST_EVEX, 0x18, imm); } +-void vinsertf32x8(const Zmm& r1, const Zmm& r2, const Operand& op, uint8_t imm) {if (!op.is(Operand::MEM | Operand::YMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r1, &r2, op, T_N32|T_66|T_0F3A|T_W0|T_YMM|T_MUST_EVEX, 0x1A, imm); } +-void vinsertf64x2(const Ymm& r1, const Ymm& r2, const Operand& op, uint8_t imm) {if (!(r1.getKind() == r2.getKind() && op.is(Operand::MEM | Operand::XMM))) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r1, &r2, op, T_N16|T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x18, imm); } +-void vinsertf64x4(const Zmm& r1, const Zmm& r2, const Operand& op, uint8_t imm) {if (!op.is(Operand::MEM | Operand::YMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r1, &r2, op, T_N32|T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x1A, imm); } +-void vinserti32x4(const Ymm& r1, const Ymm& r2, const Operand& op, uint8_t imm) {if (!(r1.getKind() == r2.getKind() && op.is(Operand::MEM | Operand::XMM))) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r1, &r2, op, T_N16|T_66|T_0F3A|T_W0|T_YMM|T_MUST_EVEX, 0x38, imm); } +-void vinserti32x8(const Zmm& r1, const Zmm& r2, const Operand& op, uint8_t imm) {if (!op.is(Operand::MEM | Operand::YMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r1, &r2, op, T_N32|T_66|T_0F3A|T_W0|T_YMM|T_MUST_EVEX, 0x3A, imm); } +-void vinserti64x2(const Ymm& r1, const Ymm& r2, const Operand& op, uint8_t imm) {if (!(r1.getKind() == r2.getKind() && op.is(Operand::MEM | Operand::XMM))) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r1, &r2, op, T_N16|T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x38, imm); } +-void vinserti64x4(const Zmm& r1, const Zmm& r2, const Operand& op, uint8_t imm) {if (!op.is(Operand::MEM | Operand::YMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r1, &r2, op, T_N32|T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x3A, imm); } +-void vmaxbf16(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x5F); } +-void vmaxph(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_W0 | T_YMM | T_MUST_EVEX | T_SAE_Z | T_B16, 0x5F); } +-void vmaxsh(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_F3 | T_W0 | T_MUST_EVEX | T_SAE_X | T_N2, 0x5F); } +-void vminbf16(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x5D); } +-void vminmaxbf16(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_F2|T_0F3A|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x52, imm); } +-void vminmaxpd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x52, imm); } +-void vminmaxph(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_0F3A|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B16, 0x52, imm); } +-void vminmaxps(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x52, imm); } +-void vminmaxsd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F3A|T_EW1|T_SAE_X|T_MUST_EVEX, 0x53, imm); } +-void vminmaxsh(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N2|T_0F3A|T_W0|T_SAE_X|T_MUST_EVEX, 0x53, imm); } +-void vminmaxss(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F3A|T_W0|T_SAE_X|T_MUST_EVEX, 0x53, imm); } +-void vminph(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_W0 | T_YMM | T_MUST_EVEX | T_SAE_Z | T_B16, 0x5D); } +-void vminsh(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_F3 | T_W0 | T_MUST_EVEX | T_SAE_X | T_N2, 0x5D); } +-void vmovdqa32(const Address& addr, const Xmm& x) { opAVX_X_XM_IMM(x, addr, T_66|T_0F|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x7F); } +-void vmovdqa32(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F|T_W0|T_YMM|T_MUST_EVEX, 0x6F); } +-void vmovdqa64(const Address& addr, const Xmm& x) { opAVX_X_XM_IMM(x, addr, T_66|T_0F|T_EW1|T_YMM|T_MUST_EVEX|T_M_K, 0x7F); } +-void vmovdqa64(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F|T_EW1|T_YMM|T_MUST_EVEX, 0x6F); } +-void vmovdqu16(const Address& addr, const Xmm& x) { opAVX_X_XM_IMM(x, addr, T_F2|T_0F|T_EW1|T_YMM|T_MUST_EVEX|T_M_K, 0x7F); } +-void vmovdqu16(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F2|T_0F|T_EW1|T_YMM|T_MUST_EVEX, 0x6F); } +-void vmovdqu32(const Address& addr, const Xmm& x) { opAVX_X_XM_IMM(x, addr, T_F3|T_0F|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x7F); } +-void vmovdqu32(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F3|T_0F|T_W0|T_YMM|T_MUST_EVEX, 0x6F); } +-void vmovdqu64(const Address& addr, const Xmm& x) { opAVX_X_XM_IMM(x, addr, T_F3|T_0F|T_EW1|T_YMM|T_MUST_EVEX|T_M_K, 0x7F); } +-void vmovdqu64(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F3|T_0F|T_EW1|T_YMM|T_MUST_EVEX, 0x6F); } +-void vmovdqu8(const Address& addr, const Xmm& x) { opAVX_X_XM_IMM(x, addr, T_F2|T_0F|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x7F); } +-void vmovdqu8(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F2|T_0F|T_W0|T_YMM|T_MUST_EVEX, 0x6F); } +-void vmovsh(const Address& addr, const Xmm& x) { opAVX_X_XM_IMM(x, addr, T_N2|T_F3|T_MAP5|T_W0|T_MUST_EVEX|T_M_K, 0x11); } +-void vmovsh(const Xmm& x, const Address& addr) { opAVX_X_X_XM(x, xm0, addr, T_N2|T_F3|T_MAP5|T_W0|T_MUST_EVEX, 0x10); } +-void vmovsh(const Xmm& x1, const Xmm& x2, const Xmm& x3) { opAVX_X_X_XM(x1, x2, x3, T_N2|T_F3|T_MAP5|T_W0|T_MUST_EVEX, 0x10); } +-void vmpsadbw(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_0F3A|T_YMM, 0x42, encoding, imm, T_66|T_YMM, T_F3|T_0F3A|T_B32, 1); } +-void vmulbf16(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x59); } +-void vmulph(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_W0 | T_YMM | T_MUST_EVEX | T_ER_Z | T_B16, 0x59); } +-void vmulsh(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_F3 | T_W0 | T_MUST_EVEX | T_ER_X | T_N2, 0x59); } +-void vp2intersectd(const Opmask& k, const Xmm& x, const Operand& op) { if (k.getOpmaskIdx() != 0) XBYAK_THROW(ERR_OPMASK_IS_ALREADY_SET) opAVX_K_X_XM(k, x, op, T_F2 | T_0F38 | T_YMM | T_EVEX | T_W0 | T_B32, 0x68); } +-void vp2intersectq(const Opmask& k, const Xmm& x, const Operand& op) { if (k.getOpmaskIdx() != 0) XBYAK_THROW(ERR_OPMASK_IS_ALREADY_SET) opAVX_K_X_XM(k, x, op, T_F2 | T_0F38 | T_YMM | T_EVEX | T_EW1 | T_B64, 0x68); } +-void vp4dpwssd(const Zmm& z1, const Zmm& z2, const Address& addr) { opAVX_X_X_XM(z1, z2, addr, T_0F38 | T_F2 | T_W0 | T_YMM | T_MUST_EVEX | T_N16, 0x52); } +-void vp4dpwssds(const Zmm& z1, const Zmm& z2, const Address& addr) { opAVX_X_X_XM(z1, z2, addr, T_0F38 | T_F2 | T_W0 | T_YMM | T_MUST_EVEX | T_N16, 0x53); } +-void vpabsq(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66 | T_0F38 | T_MUST_EVEX | T_EW1 | T_B64 | T_YMM, 0x1F); } +-void vpandd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0xDB); } +-void vpandnd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0xDF); } +-void vpandnq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0xDF); } +-void vpandq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0xDB); } +-void vpblendmb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX, 0x66); } +-void vpblendmd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x64); } +-void vpblendmq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x64); } +-void vpblendmw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x66); } +-void vpbroadcastb(const Xmm& x, const Reg8& r) { opVex(x, 0, r, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX, 0x7A); } +-void vpbroadcastd(const Xmm& x, const Reg32& r) { opVex(x, 0, r, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX, 0x7C); } +-void vpbroadcastmb2q(const Xmm& x, const Opmask& k) { opVex(x, 0, k, T_F3 | T_0F38 | T_YMM | T_MUST_EVEX | T_EW1, 0x2A); } +-void vpbroadcastmw2d(const Xmm& x, const Opmask& k) { opVex(x, 0, k, T_F3 | T_0F38 | T_YMM | T_MUST_EVEX | T_W0, 0x3A); } +-void vpbroadcastw(const Xmm& x, const Reg16& r) { opVex(x, 0, r, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX, 0x7B); } +-void vpcmpb(const Opmask& k, const Xmm& x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_66|T_0F3A|T_W0|T_YMM|T_MUST_EVEX, 0x3F, imm); } +-void vpcmpd(const Opmask& k, const Xmm& x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_66|T_0F3A|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x1F, imm); } +-void vpcmpeqb(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F|T_YMM|T_MUST_EVEX, 0x74); } +-void vpcmpeqd(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F|T_YMM|T_MUST_EVEX|T_B32, 0x76); } +-void vpcmpeqq(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x29); } +-void vpcmpeqw(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F|T_YMM|T_MUST_EVEX, 0x75); } +-void vpcmpgtb(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F|T_YMM|T_MUST_EVEX, 0x64); } +-void vpcmpgtd(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x66); } +-void vpcmpgtq(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x37); } +-void vpcmpgtw(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F|T_YMM|T_MUST_EVEX, 0x65); } +-void vpcmpq(const Opmask& k, const Xmm& x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x1F, imm); } +-void vpcmpub(const Opmask& k, const Xmm& x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_66|T_0F3A|T_W0|T_YMM|T_MUST_EVEX, 0x3E, imm); } +-void vpcmpud(const Opmask& k, const Xmm& x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_66|T_0F3A|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x1E, imm); } +-void vpcmpuq(const Opmask& k, const Xmm& x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x1E, imm); } +-void vpcmpuw(const Opmask& k, const Xmm& x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x3E, imm); } +-void vpcmpw(const Opmask& k, const Xmm& x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x3F, imm); } +-void vpcompressb(const Operand& op, const Xmm& x) { opAVX_X_XM_IMM(x, op, T_N1|T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX, 0x63); } +-void vpcompressd(const Operand& op, const Xmm& x) { opAVX_X_XM_IMM(x, op, T_N4|T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX, 0x8B); } +-void vpcompressq(const Operand& op, const Xmm& x) { opAVX_X_XM_IMM(x, op, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x8B); } +-void vpcompressw(const Operand& op, const Xmm& x) { opAVX_X_XM_IMM(x, op, T_N2|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x63); } +-void vpconflictd(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0xC4); } +-void vpconflictq(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0xC4); } +-void vpdpbssd(const Xmm& x1, const Xmm& x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_F2|T_0F38|T_W0|T_YMM, 0x50, encoding, NONE, T_NONE, T_B32, 1); } +-void vpdpbssds(const Xmm& x1, const Xmm& x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_F2|T_0F38|T_W0|T_YMM, 0x51, encoding, NONE, T_NONE, T_B32, 1); } +-void vpdpbsud(const Xmm& x1, const Xmm& x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_F3|T_0F38|T_W0|T_YMM, 0x50, encoding, NONE, T_NONE, T_B32, 1); } +-void vpdpbsuds(const Xmm& x1, const Xmm& x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_F3|T_0F38|T_W0|T_YMM, 0x51, encoding, NONE, T_NONE, T_B32, 1); } +-void vpdpbuud(const Xmm& x1, const Xmm& x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_0F38|T_W0|T_YMM, 0x50, encoding, NONE, T_NONE, T_B32, 1); } +-void vpdpbuuds(const Xmm& x1, const Xmm& x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_0F38|T_W0|T_YMM, 0x51, encoding, NONE, T_NONE, T_B32, 1); } +-void vpdpwsud(const Xmm& x1, const Xmm& x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_F3|T_0F38|T_W0|T_YMM, 0xD2, encoding, NONE, T_NONE, T_B32, 1); } +-void vpdpwsuds(const Xmm& x1, const Xmm& x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_F3|T_0F38|T_W0|T_YMM, 0xD3, encoding, NONE, T_NONE, T_B32, 1); } +-void vpdpwusd(const Xmm& x1, const Xmm& x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_66|T_0F38|T_W0|T_YMM, 0xD2, encoding, NONE, T_NONE, T_B32, 1); } +-void vpdpwusds(const Xmm& x1, const Xmm& x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_66|T_0F38|T_W0|T_YMM, 0xD3, encoding, NONE, T_NONE, T_B32, 1); } +-void vpdpwuud(const Xmm& x1, const Xmm& x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_0F38|T_W0|T_YMM, 0xD2, encoding, NONE, T_NONE, T_B32, 1); } +-void vpdpwuuds(const Xmm& x1, const Xmm& x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_0F38|T_W0|T_YMM, 0xD3, encoding, NONE, T_NONE, T_B32, 1); } +-void vpermb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX, 0x8D); } +-void vpermi2b(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX, 0x75); } +-void vpermi2d(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x76); } +-void vpermi2pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x77); } +-void vpermi2ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x77); } +-void vpermi2q(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x76); } +-void vpermi2w(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x75); } +-void vpermt2b(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX, 0x7D); } +-void vpermt2d(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x7E); } +-void vpermt2pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x7F); } +-void vpermt2ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x7F); } +-void vpermt2q(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x7E); } +-void vpermt2w(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x7D); } +-void vpermw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x8D); } +-void vpexpandb(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N1|T_66|T_0F38|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX, 0x62); } +-void vpexpandd(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N4|T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX, 0x89); } +-void vpexpandq(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x89); } +-void vpexpandw(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N2|T_66|T_0F38|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX, 0x62); } +-void vpgatherdd(const Xmm& x, const Address& addr) { opGather2(x, addr, T_N4|T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_VSIB, 0x90, 0); } +-void vpgatherdq(const Xmm& x, const Address& addr) { opGather2(x, addr, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_VSIB, 0x90, 1); } +-void vpgatherqd(const Xmm& x, const Address& addr) { opGather2(x, addr, T_N4|T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_VSIB, 0x91, 2); } +-void vpgatherqq(const Xmm& x, const Address& addr) { opGather2(x, addr, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_VSIB, 0x91, 0); } +-void vplzcntd(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x44); } +-void vplzcntq(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x44); } +-void vpmadd52huq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0xB5); } +-void vpmadd52luq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0xB4); } +-void vpmaxsq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x3D); } +-void vpmaxuq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x3F); } +-void vpminsq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x39); } +-void vpminuq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x3B); } +-void vpmovb2m(const Opmask& k, const Xmm& x) { opVex(k, 0, x, T_F3 | T_0F38 | T_MUST_EVEX | T_YMM | T_W0, 0x29); } +-void vpmovd2m(const Opmask& k, const Xmm& x) { opVex(k, 0, x, T_F3 | T_0F38 | T_MUST_EVEX | T_YMM | T_W0, 0x39); } +-void vpmovdb(const Operand& op, const Xmm& x) { opVmov(op, x, T_N4|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x31, false); } +-void vpmovdw(const Operand& op, const Xmm& x) { opVmov(op, x, T_N8|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x33, true); } +-void vpmovm2b(const Xmm& x, const Opmask& k) { opVex(x, 0, k, T_F3 | T_0F38 | T_MUST_EVEX | T_YMM | T_W0, 0x28); } +-void vpmovm2d(const Xmm& x, const Opmask& k) { opVex(x, 0, k, T_F3 | T_0F38 | T_MUST_EVEX | T_YMM | T_W0, 0x38); } +-void vpmovm2q(const Xmm& x, const Opmask& k) { opVex(x, 0, k, T_F3 | T_0F38 | T_MUST_EVEX | T_YMM | T_EW1, 0x38); } +-void vpmovm2w(const Xmm& x, const Opmask& k) { opVex(x, 0, k, T_F3 | T_0F38 | T_MUST_EVEX | T_YMM | T_EW1, 0x28); } +-void vpmovq2m(const Opmask& k, const Xmm& x) { opVex(k, 0, x, T_F3 | T_0F38 | T_MUST_EVEX | T_YMM | T_EW1, 0x39); } +-void vpmovqb(const Operand& op, const Xmm& x) { opVmov(op, x, T_N2|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x32, false); } +-void vpmovqd(const Operand& op, const Xmm& x) { opVmov(op, x, T_N8|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x35, true); } +-void vpmovqw(const Operand& op, const Xmm& x) { opVmov(op, x, T_N4|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x34, false); } +-void vpmovsdb(const Operand& op, const Xmm& x) { opVmov(op, x, T_N4|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x21, false); } +-void vpmovsdw(const Operand& op, const Xmm& x) { opVmov(op, x, T_N8|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x23, true); } +-void vpmovsqb(const Operand& op, const Xmm& x) { opVmov(op, x, T_N2|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x22, false); } +-void vpmovsqd(const Operand& op, const Xmm& x) { opVmov(op, x, T_N8|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x25, true); } +-void vpmovsqw(const Operand& op, const Xmm& x) { opVmov(op, x, T_N4|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x24, false); } +-void vpmovswb(const Operand& op, const Xmm& x) { opVmov(op, x, T_N8|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x20, true); } +-void vpmovusdb(const Operand& op, const Xmm& x) { opVmov(op, x, T_N4|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x11, false); } +-void vpmovusdw(const Operand& op, const Xmm& x) { opVmov(op, x, T_N8|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x13, true); } +-void vpmovusqb(const Operand& op, const Xmm& x) { opVmov(op, x, T_N2|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x12, false); } +-void vpmovusqd(const Operand& op, const Xmm& x) { opVmov(op, x, T_N8|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x15, true); } +-void vpmovusqw(const Operand& op, const Xmm& x) { opVmov(op, x, T_N4|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x14, false); } +-void vpmovuswb(const Operand& op, const Xmm& x) { opVmov(op, x, T_N8|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x10, true); } +-void vpmovw2m(const Opmask& k, const Xmm& x) { opVex(k, 0, x, T_F3 | T_0F38 | T_MUST_EVEX | T_YMM | T_EW1, 0x29); } +-void vpmovwb(const Operand& op, const Xmm& x) { opVmov(op, x, T_N8|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x30, true); } +-void vpmullq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x40); } +-void vpmultishiftqb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x83); } +-void vpopcntb(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX, 0x54); } +-void vpopcntd(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x55); } +-void vpopcntq(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x55); } +-void vpopcntw(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX, 0x54); } +-void vpord(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0xEB); } +-void vporq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0xEB); } +-void vprold(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 1), x, op, T_66|T_0F|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x72, imm); } +-void vprolq(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 1), x, op, T_66|T_0F|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x72, imm); } +-void vprolvd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x15); } +-void vprolvq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x15); } +-void vprord(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 0), x, op, T_66|T_0F|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x72, imm); } +-void vprorq(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 0), x, op, T_66|T_0F|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x72, imm); } +-void vprorvd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x14); } +-void vprorvq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x14); } +-void vpscatterdd(const Address& addr, const Xmm& x) { opGather2(x, addr, T_N4|T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K|T_VSIB, 0xA0, 0); } +-void vpscatterdq(const Address& addr, const Xmm& x) { opGather2(x, addr, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_M_K|T_VSIB, 0xA0, 1); } +-void vpscatterqd(const Address& addr, const Xmm& x) { opGather2(x, addr, T_N4|T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K|T_VSIB, 0xA1, 2); } +-void vpscatterqq(const Address& addr, const Xmm& x) { opGather2(x, addr, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_M_K|T_VSIB, 0xA1, 0); } +-void vpshldd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x71, imm); } +-void vpshldq(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x71, imm); } +-void vpshldvd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x71); } +-void vpshldvq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x71); } +-void vpshldvw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX, 0x70); } +-void vpshldw(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX, 0x70, imm); } +-void vpshrdd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x73, imm); } +-void vpshrdq(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x73, imm); } +-void vpshrdvd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x73); } +-void vpshrdvq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x73); } +-void vpshrdvw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX, 0x72); } +-void vpshrdw(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX, 0x72, imm); } +-void vpshufbitqmb(const Opmask& k, const Xmm& x, const Operand& op) { opVex(k, &x, op, T_66 | T_0F38 | T_W0 | T_YMM | T_MUST_EVEX, 0x8F); } +-void vpsllvw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x12); } +-void vpsraq(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 4), x, op, T_66|T_0F|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x72, imm); } +-void vpsraq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_66|T_0F|T_EW1|T_YMM|T_MUST_EVEX, 0xE2); } +-void vpsravq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x46); } +-void vpsravw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x11); } +-void vpsrlvw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x10); } +-void vpternlogd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x25, imm); } +-void vpternlogq(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x25, imm); } +-void vptestmb(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX, 0x26); } +-void vptestmd(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x27); } +-void vptestmq(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x27); } +-void vptestmw(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x26); } +-void vptestnmb(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX, 0x26); } +-void vptestnmd(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x27); } +-void vptestnmq(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_F3|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x27); } +-void vptestnmw(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_F3|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x26); } +-void vpxord(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0xEF); } +-void vpxorq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0xEF); } +-void vrangepd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x50, imm); } +-void vrangeps(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x50, imm); } +-void vrangesd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F3A|T_EW1|T_SAE_X|T_MUST_EVEX, 0x51, imm); } +-void vrangess(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F3A|T_W0|T_SAE_X|T_MUST_EVEX, 0x51, imm); } +-void vrcp14pd(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x4C); } +-void vrcp14ps(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x4C); } +-void vrcp14sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_EW1|T_MUST_EVEX, 0x4D); } +-void vrcp14ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_MUST_EVEX, 0x4D); } +-void vrcp28pd(const Zmm& z, const Operand& op) { opAVX_X_XM_IMM(z, op, T_66 | T_0F38 | T_MUST_EVEX | T_YMM | T_EW1 | T_B64 | T_SAE_Z, 0xCA); } +-void vrcp28ps(const Zmm& z, const Operand& op) { opAVX_X_XM_IMM(z, op, T_66 | T_0F38 | T_MUST_EVEX | T_YMM | T_W0 | T_B32 | T_SAE_Z, 0xCA); } +-void vrcp28sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_EW1|T_SAE_X|T_MUST_EVEX, 0xCB); } +-void vrcp28ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_SAE_X|T_MUST_EVEX, 0xCB); } +-void vrcpbf16(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x4C); } +-void vrcpph(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x4C); } +-void vrcpsh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_MUST_EVEX, 0x4D); } +-void vreducebf16(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_F2|T_0F3A|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x56, imm); } +-void vreducepd(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_66|T_0F3A|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x56, imm); } +-void vreduceph(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_0F3A|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B16, 0x56, imm); } +-void vreduceps(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_66|T_0F3A|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x56, imm); } +-void vreducesd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F3A|T_EW1|T_SAE_X|T_MUST_EVEX, 0x57, imm); } +-void vreducesh(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N2|T_0F3A|T_W0|T_SAE_X|T_MUST_EVEX, 0x57, imm); } +-void vreducess(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F3A|T_W0|T_SAE_X|T_MUST_EVEX, 0x57, imm); } +-void vrndscalebf16(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_F2|T_0F3A|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x08, imm); } +-void vrndscalepd(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_66|T_0F3A|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x09, imm); } +-void vrndscaleph(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_0F3A|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B16, 0x08, imm); } +-void vrndscaleps(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_66|T_0F3A|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x08, imm); } +-void vrndscalesd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F3A|T_EW1|T_SAE_X|T_MUST_EVEX, 0x0B, imm); } +-void vrndscalesh(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N2|T_0F3A|T_W0|T_SAE_X|T_MUST_EVEX, 0x0A, imm); } +-void vrndscaless(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F3A|T_W0|T_SAE_X|T_MUST_EVEX, 0x0A, imm); } +-void vrsqrt14pd(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x4E); } +-void vrsqrt14ps(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x4E); } +-void vrsqrt14sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x4F); } +-void vrsqrt14ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX, 0x4F); } +-void vrsqrt28pd(const Zmm& z, const Operand& op) { opAVX_X_XM_IMM(z, op, T_66 | T_0F38 | T_MUST_EVEX | T_YMM | T_EW1 | T_B64 | T_SAE_Z, 0xCC); } +-void vrsqrt28ps(const Zmm& z, const Operand& op) { opAVX_X_XM_IMM(z, op, T_66 | T_0F38 | T_MUST_EVEX | T_YMM | T_W0 | T_B32 | T_SAE_Z, 0xCC); } +-void vrsqrt28sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_EW1|T_SAE_X|T_MUST_EVEX, 0xCD); } +-void vrsqrt28ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_SAE_X|T_MUST_EVEX, 0xCD); } +-void vrsqrtbf16(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x4E); } +-void vrsqrtph(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x4E); } +-void vrsqrtsh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_MUST_EVEX, 0x4F); } +-void vscalefbf16(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x2C); } +-void vscalefbf16(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x2C); } +-void vscalefpd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_ER_Z|T_MUST_EVEX|T_B64, 0x2C); } +-void vscalefph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x2C); } +-void vscalefps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0x2C); } +-void vscalefsd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_EW1|T_ER_X|T_MUST_EVEX, 0x2D); } +-void vscalefsh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_ER_X|T_MUST_EVEX, 0x2D); } +-void vscalefss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_ER_X|T_MUST_EVEX, 0x2D); } +-void vscatterdpd(const Address& addr, const Xmm& x) { opGather2(x, addr, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_M_K|T_VSIB, 0xA2, 1); } +-void vscatterdps(const Address& addr, const Xmm& x) { opGather2(x, addr, T_N4|T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K|T_VSIB, 0xA2, 0); } ++void vgatherqpd(Xmm x, const Address& addr) { opGather2(x, addr, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_VSIB, 0x93, 0); } ++void vgatherqps(Xmm x, const Address& addr) { opGather2(x, addr, T_N4|T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_VSIB, 0x93, 2); } ++void vgetexpbf16(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x42); } ++void vgetexppd(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x42); } ++void vgetexpph(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_MAP6|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B16, 0x42); } ++void vgetexpps(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x42); } ++void vgetexpsd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_EW1|T_SAE_X|T_MUST_EVEX, 0x43); } ++void vgetexpsh(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_SAE_X|T_MUST_EVEX, 0x43); } ++void vgetexpss(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_SAE_X|T_MUST_EVEX, 0x43); } ++void vgetmantbf16(Xmm x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_F2|T_0F3A|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x26, imm); } ++void vgetmantpd(Xmm x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_66|T_0F3A|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x26, imm); } ++void vgetmantph(Xmm x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_0F3A|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B16, 0x26, imm); } ++void vgetmantps(Xmm x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_66|T_0F3A|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x26, imm); } ++void vgetmantsd(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F3A|T_EW1|T_SAE_X|T_MUST_EVEX, 0x27, imm); } ++void vgetmantsh(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N2|T_0F3A|T_W0|T_SAE_X|T_MUST_EVEX, 0x27, imm); } ++void vgetmantss(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F3A|T_W0|T_SAE_X|T_MUST_EVEX, 0x27, imm); } ++void vinsertf32x4(Ymm r1, Ymm r2, const Operand& op, uint8_t imm) {if (!(r1.getKind() == r2.getKind() && op.is(Operand::MEM | Operand::XMM))) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r1, &r2, op, T_N16|T_66|T_0F3A|T_W0|T_YMM|T_MUST_EVEX, 0x18, imm); } ++void vinsertf32x8(Zmm r1, Zmm r2, const Operand& op, uint8_t imm) {if (!op.is(Operand::MEM | Operand::YMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r1, &r2, op, T_N32|T_66|T_0F3A|T_W0|T_YMM|T_MUST_EVEX, 0x1A, imm); } ++void vinsertf64x2(Ymm r1, Ymm r2, const Operand& op, uint8_t imm) {if (!(r1.getKind() == r2.getKind() && op.is(Operand::MEM | Operand::XMM))) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r1, &r2, op, T_N16|T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x18, imm); } ++void vinsertf64x4(Zmm r1, Zmm r2, const Operand& op, uint8_t imm) {if (!op.is(Operand::MEM | Operand::YMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r1, &r2, op, T_N32|T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x1A, imm); } ++void vinserti32x4(Ymm r1, Ymm r2, const Operand& op, uint8_t imm) {if (!(r1.getKind() == r2.getKind() && op.is(Operand::MEM | Operand::XMM))) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r1, &r2, op, T_N16|T_66|T_0F3A|T_W0|T_YMM|T_MUST_EVEX, 0x38, imm); } ++void vinserti32x8(Zmm r1, Zmm r2, const Operand& op, uint8_t imm) {if (!op.is(Operand::MEM | Operand::YMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r1, &r2, op, T_N32|T_66|T_0F3A|T_W0|T_YMM|T_MUST_EVEX, 0x3A, imm); } ++void vinserti64x2(Ymm r1, Ymm r2, const Operand& op, uint8_t imm) {if (!(r1.getKind() == r2.getKind() && op.is(Operand::MEM | Operand::XMM))) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r1, &r2, op, T_N16|T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x38, imm); } ++void vinserti64x4(Zmm r1, Zmm r2, const Operand& op, uint8_t imm) {if (!op.is(Operand::MEM | Operand::YMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r1, &r2, op, T_N32|T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x3A, imm); } ++void vmaxbf16(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x5F); } ++void vmaxph(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_W0 | T_YMM | T_MUST_EVEX | T_SAE_Z | T_B16, 0x5F); } ++void vmaxsh(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_F3 | T_W0 | T_MUST_EVEX | T_SAE_X | T_N2, 0x5F); } ++void vminbf16(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x5D); } ++void vminmaxbf16(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_F2|T_0F3A|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x52, imm); } ++void vminmaxpd(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x52, imm); } ++void vminmaxph(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_0F3A|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B16, 0x52, imm); } ++void vminmaxps(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x52, imm); } ++void vminmaxsd(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F3A|T_EW1|T_SAE_X|T_MUST_EVEX, 0x53, imm); } ++void vminmaxsh(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N2|T_0F3A|T_W0|T_SAE_X|T_MUST_EVEX, 0x53, imm); } ++void vminmaxss(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F3A|T_W0|T_SAE_X|T_MUST_EVEX, 0x53, imm); } ++void vminph(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_W0 | T_YMM | T_MUST_EVEX | T_SAE_Z | T_B16, 0x5D); } ++void vminsh(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_F3 | T_W0 | T_MUST_EVEX | T_SAE_X | T_N2, 0x5D); } ++void vmovdqa32(const Address& addr, Xmm x) { opAVX_X_XM_IMM(x, addr, T_66|T_0F|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x7F); } ++void vmovdqa32(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F|T_W0|T_YMM|T_MUST_EVEX, 0x6F); } ++void vmovdqa64(const Address& addr, Xmm x) { opAVX_X_XM_IMM(x, addr, T_66|T_0F|T_EW1|T_YMM|T_MUST_EVEX|T_M_K, 0x7F); } ++void vmovdqa64(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F|T_EW1|T_YMM|T_MUST_EVEX, 0x6F); } ++void vmovdqu16(const Address& addr, Xmm x) { opAVX_X_XM_IMM(x, addr, T_F2|T_0F|T_EW1|T_YMM|T_MUST_EVEX|T_M_K, 0x7F); } ++void vmovdqu16(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F2|T_0F|T_EW1|T_YMM|T_MUST_EVEX, 0x6F); } ++void vmovdqu32(const Address& addr, Xmm x) { opAVX_X_XM_IMM(x, addr, T_F3|T_0F|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x7F); } ++void vmovdqu32(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F3|T_0F|T_W0|T_YMM|T_MUST_EVEX, 0x6F); } ++void vmovdqu64(const Address& addr, Xmm x) { opAVX_X_XM_IMM(x, addr, T_F3|T_0F|T_EW1|T_YMM|T_MUST_EVEX|T_M_K, 0x7F); } ++void vmovdqu64(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F3|T_0F|T_EW1|T_YMM|T_MUST_EVEX, 0x6F); } ++void vmovdqu8(const Address& addr, Xmm x) { opAVX_X_XM_IMM(x, addr, T_F2|T_0F|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x7F); } ++void vmovdqu8(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F2|T_0F|T_W0|T_YMM|T_MUST_EVEX, 0x6F); } ++void vmovsh(const Address& addr, Xmm x) { opAVX_X_XM_IMM(x, addr, T_N2|T_F3|T_MAP5|T_W0|T_MUST_EVEX|T_M_K, 0x11); } ++void vmovsh(Xmm x, const Address& addr) { opAVX_X_X_XM(x, xm0, addr, T_N2|T_F3|T_MAP5|T_W0|T_MUST_EVEX, 0x10); } ++void vmovsh(Xmm x1, Xmm x2, Xmm x3) { opAVX_X_X_XM(x1, x2, x3, T_N2|T_F3|T_MAP5|T_W0|T_MUST_EVEX, 0x10); } ++void vmpsadbw(Xmm x1, Xmm x2, const Operand& op, uint8_t imm, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_0F3A|T_YMM, 0x42, encoding, imm, T_66|T_YMM, T_F3|T_0F3A|T_B32, 1); } ++void vmulbf16(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x59); } ++void vmulph(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_W0 | T_YMM | T_MUST_EVEX | T_ER_Z | T_B16, 0x59); } ++void vmulsh(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_F3 | T_W0 | T_MUST_EVEX | T_ER_X | T_N2, 0x59); } ++void vp2intersectd(const Opmask& k, Xmm x, const Operand& op) { if (k.getOpmaskIdx() != 0) XBYAK_THROW(ERR_OPMASK_IS_ALREADY_SET) opAVX_K_X_XM(k, x, op, T_F2 | T_0F38 | T_YMM | T_EVEX | T_W0 | T_B32, 0x68); } ++void vp2intersectq(const Opmask& k, Xmm x, const Operand& op) { if (k.getOpmaskIdx() != 0) XBYAK_THROW(ERR_OPMASK_IS_ALREADY_SET) opAVX_K_X_XM(k, x, op, T_F2 | T_0F38 | T_YMM | T_EVEX | T_EW1 | T_B64, 0x68); } ++void vp4dpwssd(Zmm z1, Zmm z2, const Address& addr) { opAVX_X_X_XM(z1, z2, addr, T_0F38 | T_F2 | T_W0 | T_YMM | T_MUST_EVEX | T_N16, 0x52); } ++void vp4dpwssds(Zmm z1, Zmm z2, const Address& addr) { opAVX_X_X_XM(z1, z2, addr, T_0F38 | T_F2 | T_W0 | T_YMM | T_MUST_EVEX | T_N16, 0x53); } ++void vpabsq(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66 | T_0F38 | T_MUST_EVEX | T_EW1 | T_B64 | T_YMM, 0x1F); } ++void vpandd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0xDB); } ++void vpandnd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0xDF); } ++void vpandnq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0xDF); } ++void vpandq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0xDB); } ++void vpblendmb(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX, 0x66); } ++void vpblendmd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x64); } ++void vpblendmq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x64); } ++void vpblendmw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x66); } ++void vpbroadcastb(Xmm x, Reg8 r) { opVex(x, 0, r, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX, 0x7A); } ++void vpbroadcastd(Xmm x, Reg32 r) { opVex(x, 0, r, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX, 0x7C); } ++void vpbroadcastmb2q(Xmm x, const Opmask& k) { opVex(x, 0, k, T_F3 | T_0F38 | T_YMM | T_MUST_EVEX | T_EW1, 0x2A); } ++void vpbroadcastmw2d(Xmm x, const Opmask& k) { opVex(x, 0, k, T_F3 | T_0F38 | T_YMM | T_MUST_EVEX | T_W0, 0x3A); } ++void vpbroadcastw(Xmm x, Reg16 r) { opVex(x, 0, r, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX, 0x7B); } ++void vpcmpb(const Opmask& k, Xmm x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_66|T_0F3A|T_W0|T_YMM|T_MUST_EVEX, 0x3F, imm); } ++void vpcmpd(const Opmask& k, Xmm x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_66|T_0F3A|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x1F, imm); } ++void vpcmpeqb(const Opmask& k, Xmm x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F|T_YMM|T_MUST_EVEX, 0x74); } ++void vpcmpeqd(const Opmask& k, Xmm x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F|T_YMM|T_MUST_EVEX|T_B32, 0x76); } ++void vpcmpeqq(const Opmask& k, Xmm x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x29); } ++void vpcmpeqw(const Opmask& k, Xmm x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F|T_YMM|T_MUST_EVEX, 0x75); } ++void vpcmpgtb(const Opmask& k, Xmm x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F|T_YMM|T_MUST_EVEX, 0x64); } ++void vpcmpgtd(const Opmask& k, Xmm x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x66); } ++void vpcmpgtq(const Opmask& k, Xmm x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x37); } ++void vpcmpgtw(const Opmask& k, Xmm x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F|T_YMM|T_MUST_EVEX, 0x65); } ++void vpcmpq(const Opmask& k, Xmm x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x1F, imm); } ++void vpcmpub(const Opmask& k, Xmm x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_66|T_0F3A|T_W0|T_YMM|T_MUST_EVEX, 0x3E, imm); } ++void vpcmpud(const Opmask& k, Xmm x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_66|T_0F3A|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x1E, imm); } ++void vpcmpuq(const Opmask& k, Xmm x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x1E, imm); } ++void vpcmpuw(const Opmask& k, Xmm x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x3E, imm); } ++void vpcmpw(const Opmask& k, Xmm x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x3F, imm); } ++void vpcompressb(const Operand& op, Xmm x) { opAVX_X_XM_IMM(x, op, T_N1|T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX, 0x63); } ++void vpcompressd(const Operand& op, Xmm x) { opAVX_X_XM_IMM(x, op, T_N4|T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX, 0x8B); } ++void vpcompressq(const Operand& op, Xmm x) { opAVX_X_XM_IMM(x, op, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x8B); } ++void vpcompressw(const Operand& op, Xmm x) { opAVX_X_XM_IMM(x, op, T_N2|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x63); } ++void vpconflictd(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0xC4); } ++void vpconflictq(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0xC4); } ++void vpdpbssd(Xmm x1, Xmm x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_F2|T_0F38|T_W0|T_YMM, 0x50, encoding, NONE, T_NONE, T_B32, 1); } ++void vpdpbssds(Xmm x1, Xmm x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_F2|T_0F38|T_W0|T_YMM, 0x51, encoding, NONE, T_NONE, T_B32, 1); } ++void vpdpbsud(Xmm x1, Xmm x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_F3|T_0F38|T_W0|T_YMM, 0x50, encoding, NONE, T_NONE, T_B32, 1); } ++void vpdpbsuds(Xmm x1, Xmm x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_F3|T_0F38|T_W0|T_YMM, 0x51, encoding, NONE, T_NONE, T_B32, 1); } ++void vpdpbuud(Xmm x1, Xmm x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_0F38|T_W0|T_YMM, 0x50, encoding, NONE, T_NONE, T_B32, 1); } ++void vpdpbuuds(Xmm x1, Xmm x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_0F38|T_W0|T_YMM, 0x51, encoding, NONE, T_NONE, T_B32, 1); } ++void vpdpwsud(Xmm x1, Xmm x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_F3|T_0F38|T_W0|T_YMM, 0xD2, encoding, NONE, T_NONE, T_B32, 1); } ++void vpdpwsuds(Xmm x1, Xmm x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_F3|T_0F38|T_W0|T_YMM, 0xD3, encoding, NONE, T_NONE, T_B32, 1); } ++void vpdpwusd(Xmm x1, Xmm x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_66|T_0F38|T_W0|T_YMM, 0xD2, encoding, NONE, T_NONE, T_B32, 1); } ++void vpdpwusds(Xmm x1, Xmm x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_66|T_0F38|T_W0|T_YMM, 0xD3, encoding, NONE, T_NONE, T_B32, 1); } ++void vpdpwuud(Xmm x1, Xmm x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_0F38|T_W0|T_YMM, 0xD2, encoding, NONE, T_NONE, T_B32, 1); } ++void vpdpwuuds(Xmm x1, Xmm x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_0F38|T_W0|T_YMM, 0xD3, encoding, NONE, T_NONE, T_B32, 1); } ++void vpermb(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX, 0x8D); } ++void vpermi2b(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX, 0x75); } ++void vpermi2d(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x76); } ++void vpermi2pd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x77); } ++void vpermi2ps(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x77); } ++void vpermi2q(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x76); } ++void vpermi2w(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x75); } ++void vpermt2b(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX, 0x7D); } ++void vpermt2d(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x7E); } ++void vpermt2pd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x7F); } ++void vpermt2ps(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x7F); } ++void vpermt2q(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x7E); } ++void vpermt2w(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x7D); } ++void vpermw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x8D); } ++void vpexpandb(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N1|T_66|T_0F38|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX, 0x62); } ++void vpexpandd(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N4|T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX, 0x89); } ++void vpexpandq(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x89); } ++void vpexpandw(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N2|T_66|T_0F38|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX, 0x62); } ++void vpgatherdd(Xmm x, const Address& addr) { opGather2(x, addr, T_N4|T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_VSIB, 0x90, 0); } ++void vpgatherdq(Xmm x, const Address& addr) { opGather2(x, addr, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_VSIB, 0x90, 1); } ++void vpgatherqd(Xmm x, const Address& addr) { opGather2(x, addr, T_N4|T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_VSIB, 0x91, 2); } ++void vpgatherqq(Xmm x, const Address& addr) { opGather2(x, addr, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_VSIB, 0x91, 0); } ++void vplzcntd(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x44); } ++void vplzcntq(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x44); } ++void vpmadd52huq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0xB5); } ++void vpmadd52luq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0xB4); } ++void vpmaxsq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x3D); } ++void vpmaxuq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x3F); } ++void vpminsq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x39); } ++void vpminuq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x3B); } ++void vpmovb2m(const Opmask& k, Xmm x) { opVex(k, 0, x, T_F3 | T_0F38 | T_MUST_EVEX | T_YMM | T_W0, 0x29); } ++void vpmovd2m(const Opmask& k, Xmm x) { opVex(k, 0, x, T_F3 | T_0F38 | T_MUST_EVEX | T_YMM | T_W0, 0x39); } ++void vpmovdb(const Operand& op, Xmm x) { opVmov(op, x, T_N4|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x31, false); } ++void vpmovdw(const Operand& op, Xmm x) { opVmov(op, x, T_N8|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x33, true); } ++void vpmovm2b(Xmm x, const Opmask& k) { opVex(x, 0, k, T_F3 | T_0F38 | T_MUST_EVEX | T_YMM | T_W0, 0x28); } ++void vpmovm2d(Xmm x, const Opmask& k) { opVex(x, 0, k, T_F3 | T_0F38 | T_MUST_EVEX | T_YMM | T_W0, 0x38); } ++void vpmovm2q(Xmm x, const Opmask& k) { opVex(x, 0, k, T_F3 | T_0F38 | T_MUST_EVEX | T_YMM | T_EW1, 0x38); } ++void vpmovm2w(Xmm x, const Opmask& k) { opVex(x, 0, k, T_F3 | T_0F38 | T_MUST_EVEX | T_YMM | T_EW1, 0x28); } ++void vpmovq2m(const Opmask& k, Xmm x) { opVex(k, 0, x, T_F3 | T_0F38 | T_MUST_EVEX | T_YMM | T_EW1, 0x39); } ++void vpmovqb(const Operand& op, Xmm x) { opVmov(op, x, T_N2|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x32, false); } ++void vpmovqd(const Operand& op, Xmm x) { opVmov(op, x, T_N8|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x35, true); } ++void vpmovqw(const Operand& op, Xmm x) { opVmov(op, x, T_N4|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x34, false); } ++void vpmovsdb(const Operand& op, Xmm x) { opVmov(op, x, T_N4|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x21, false); } ++void vpmovsdw(const Operand& op, Xmm x) { opVmov(op, x, T_N8|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x23, true); } ++void vpmovsqb(const Operand& op, Xmm x) { opVmov(op, x, T_N2|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x22, false); } ++void vpmovsqd(const Operand& op, Xmm x) { opVmov(op, x, T_N8|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x25, true); } ++void vpmovsqw(const Operand& op, Xmm x) { opVmov(op, x, T_N4|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x24, false); } ++void vpmovswb(const Operand& op, Xmm x) { opVmov(op, x, T_N8|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x20, true); } ++void vpmovusdb(const Operand& op, Xmm x) { opVmov(op, x, T_N4|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x11, false); } ++void vpmovusdw(const Operand& op, Xmm x) { opVmov(op, x, T_N8|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x13, true); } ++void vpmovusqb(const Operand& op, Xmm x) { opVmov(op, x, T_N2|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x12, false); } ++void vpmovusqd(const Operand& op, Xmm x) { opVmov(op, x, T_N8|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x15, true); } ++void vpmovusqw(const Operand& op, Xmm x) { opVmov(op, x, T_N4|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x14, false); } ++void vpmovuswb(const Operand& op, Xmm x) { opVmov(op, x, T_N8|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x10, true); } ++void vpmovw2m(const Opmask& k, Xmm x) { opVex(k, 0, x, T_F3 | T_0F38 | T_MUST_EVEX | T_YMM | T_EW1, 0x29); } ++void vpmovwb(const Operand& op, Xmm x) { opVmov(op, x, T_N8|T_N_VL|T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K, 0x30, true); } ++void vpmullq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x40); } ++void vpmultishiftqb(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x83); } ++void vpopcntb(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX, 0x54); } ++void vpopcntd(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x55); } ++void vpopcntq(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x55); } ++void vpopcntw(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX, 0x54); } ++void vpord(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0xEB); } ++void vporq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0xEB); } ++void vprold(Xmm x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 1), x, op, T_66|T_0F|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x72, imm); } ++void vprolq(Xmm x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 1), x, op, T_66|T_0F|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x72, imm); } ++void vprolvd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x15); } ++void vprolvq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x15); } ++void vprord(Xmm x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 0), x, op, T_66|T_0F|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x72, imm); } ++void vprorq(Xmm x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 0), x, op, T_66|T_0F|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x72, imm); } ++void vprorvd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x14); } ++void vprorvq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x14); } ++void vpscatterdd(const Address& addr, Xmm x) { opGather2(x, addr, T_N4|T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K|T_VSIB, 0xA0, 0); } ++void vpscatterdq(const Address& addr, Xmm x) { opGather2(x, addr, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_M_K|T_VSIB, 0xA0, 1); } ++void vpscatterqd(const Address& addr, Xmm x) { opGather2(x, addr, T_N4|T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K|T_VSIB, 0xA1, 2); } ++void vpscatterqq(const Address& addr, Xmm x) { opGather2(x, addr, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_M_K|T_VSIB, 0xA1, 0); } ++void vpshldd(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x71, imm); } ++void vpshldq(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x71, imm); } ++void vpshldvd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x71); } ++void vpshldvq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x71); } ++void vpshldvw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX, 0x70); } ++void vpshldw(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX, 0x70, imm); } ++void vpshrdd(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x73, imm); } ++void vpshrdq(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x73, imm); } ++void vpshrdvd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x73); } ++void vpshrdvq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x73); } ++void vpshrdvw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX, 0x72); } ++void vpshrdw(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX, 0x72, imm); } ++void vpshufbitqmb(const Opmask& k, Xmm x, const Operand& op) { opVex(k, &x, op, T_66 | T_0F38 | T_W0 | T_YMM | T_MUST_EVEX, 0x8F); } ++void vpsllvw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x12); } ++void vpsraq(Xmm x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 4), x, op, T_66|T_0F|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x72, imm); } ++void vpsraq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_66|T_0F|T_EW1|T_YMM|T_MUST_EVEX, 0xE2); } ++void vpsravq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x46); } ++void vpsravw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x11); } ++void vpsrlvw(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x10); } ++void vpternlogd(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x25, imm); } ++void vpternlogq(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x25, imm); } ++void vptestmb(const Opmask& k, Xmm x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX, 0x26); } ++void vptestmd(const Opmask& k, Xmm x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x27); } ++void vptestmq(const Opmask& k, Xmm x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x27); } ++void vptestmw(const Opmask& k, Xmm x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x26); } ++void vptestnmb(const Opmask& k, Xmm x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX, 0x26); } ++void vptestnmd(const Opmask& k, Xmm x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_F3|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x27); } ++void vptestnmq(const Opmask& k, Xmm x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_F3|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x27); } ++void vptestnmw(const Opmask& k, Xmm x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_F3|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x26); } ++void vpxord(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0xEF); } ++void vpxorq(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0xEF); } ++void vrangepd(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x50, imm); } ++void vrangeps(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x50, imm); } ++void vrangesd(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F3A|T_EW1|T_SAE_X|T_MUST_EVEX, 0x51, imm); } ++void vrangess(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F3A|T_W0|T_SAE_X|T_MUST_EVEX, 0x51, imm); } ++void vrcp14pd(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x4C); } ++void vrcp14ps(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x4C); } ++void vrcp14sd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_EW1|T_MUST_EVEX, 0x4D); } ++void vrcp14ss(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_MUST_EVEX, 0x4D); } ++void vrcp28pd(Zmm z, const Operand& op) { opAVX_X_XM_IMM(z, op, T_66 | T_0F38 | T_MUST_EVEX | T_YMM | T_EW1 | T_B64 | T_SAE_Z, 0xCA); } ++void vrcp28ps(Zmm z, const Operand& op) { opAVX_X_XM_IMM(z, op, T_66 | T_0F38 | T_MUST_EVEX | T_YMM | T_W0 | T_B32 | T_SAE_Z, 0xCA); } ++void vrcp28sd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_EW1|T_SAE_X|T_MUST_EVEX, 0xCB); } ++void vrcp28ss(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_SAE_X|T_MUST_EVEX, 0xCB); } ++void vrcpbf16(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x4C); } ++void vrcpph(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x4C); } ++void vrcpsh(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_MUST_EVEX, 0x4D); } ++void vreducebf16(Xmm x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_F2|T_0F3A|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x56, imm); } ++void vreducepd(Xmm x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_66|T_0F3A|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x56, imm); } ++void vreduceph(Xmm x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_0F3A|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B16, 0x56, imm); } ++void vreduceps(Xmm x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_66|T_0F3A|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x56, imm); } ++void vreducesd(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F3A|T_EW1|T_SAE_X|T_MUST_EVEX, 0x57, imm); } ++void vreducesh(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N2|T_0F3A|T_W0|T_SAE_X|T_MUST_EVEX, 0x57, imm); } ++void vreducess(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F3A|T_W0|T_SAE_X|T_MUST_EVEX, 0x57, imm); } ++void vrndscalebf16(Xmm x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_F2|T_0F3A|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x08, imm); } ++void vrndscalepd(Xmm x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_66|T_0F3A|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x09, imm); } ++void vrndscaleph(Xmm x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_0F3A|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B16, 0x08, imm); } ++void vrndscaleps(Xmm x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_66|T_0F3A|T_W0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x08, imm); } ++void vrndscalesd(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F3A|T_EW1|T_SAE_X|T_MUST_EVEX, 0x0B, imm); } ++void vrndscalesh(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N2|T_0F3A|T_W0|T_SAE_X|T_MUST_EVEX, 0x0A, imm); } ++void vrndscaless(Xmm x1, Xmm x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F3A|T_W0|T_SAE_X|T_MUST_EVEX, 0x0A, imm); } ++void vrsqrt14pd(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x4E); } ++void vrsqrt14ps(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_B32, 0x4E); } ++void vrsqrt14sd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x4F); } ++void vrsqrt14ss(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX, 0x4F); } ++void vrsqrt28pd(Zmm z, const Operand& op) { opAVX_X_XM_IMM(z, op, T_66 | T_0F38 | T_MUST_EVEX | T_YMM | T_EW1 | T_B64 | T_SAE_Z, 0xCC); } ++void vrsqrt28ps(Zmm z, const Operand& op) { opAVX_X_XM_IMM(z, op, T_66 | T_0F38 | T_MUST_EVEX | T_YMM | T_W0 | T_B32 | T_SAE_Z, 0xCC); } ++void vrsqrt28sd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_EW1|T_SAE_X|T_MUST_EVEX, 0xCD); } ++void vrsqrt28ss(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_SAE_X|T_MUST_EVEX, 0xCD); } ++void vrsqrtbf16(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x4E); } ++void vrsqrtph(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x4E); } ++void vrsqrtsh(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_MUST_EVEX, 0x4F); } ++void vscalefbf16(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x2C); } ++void vscalefbf16(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_MAP6|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x2C); } ++void vscalefpd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_ER_Z|T_MUST_EVEX|T_B64, 0x2C); } ++void vscalefph(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x2C); } ++void vscalefps(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0x2C); } ++void vscalefsd(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_EW1|T_ER_X|T_MUST_EVEX, 0x2D); } ++void vscalefsh(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_W0|T_ER_X|T_MUST_EVEX, 0x2D); } ++void vscalefss(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_ER_X|T_MUST_EVEX, 0x2D); } ++void vscatterdpd(const Address& addr, Xmm x) { opGather2(x, addr, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_M_K|T_VSIB, 0xA2, 1); } ++void vscatterdps(const Address& addr, Xmm x) { opGather2(x, addr, T_N4|T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K|T_VSIB, 0xA2, 0); } + void vscatterpf0dpd(const Address& addr) { opGatherFetch(addr, zm5, T_N8|T_66|T_0F38|T_EW1|T_MUST_EVEX|T_M_K|T_VSIB, 0xC6, Operand::YMM); } + void vscatterpf0dps(const Address& addr) { opGatherFetch(addr, zm5, T_N4|T_66|T_0F38|T_W0|T_MUST_EVEX|T_M_K|T_VSIB, 0xC6, Operand::ZMM); } + void vscatterpf0qpd(const Address& addr) { opGatherFetch(addr, zm5, T_N8|T_66|T_0F38|T_EW1|T_MUST_EVEX|T_M_K|T_VSIB, 0xC7, Operand::ZMM); } +@@ -2652,40 +2652,40 @@ void vscatterpf1dpd(const Address& addr) { opGatherFetch(addr, zm6, T_N8|T_66|T_ + void vscatterpf1dps(const Address& addr) { opGatherFetch(addr, zm6, T_N4|T_66|T_0F38|T_W0|T_MUST_EVEX|T_M_K|T_VSIB, 0xC6, Operand::ZMM); } + void vscatterpf1qpd(const Address& addr) { opGatherFetch(addr, zm6, T_N8|T_66|T_0F38|T_EW1|T_MUST_EVEX|T_M_K|T_VSIB, 0xC7, Operand::ZMM); } + void vscatterpf1qps(const Address& addr) { opGatherFetch(addr, zm6, T_N4|T_66|T_0F38|T_W0|T_MUST_EVEX|T_M_K|T_VSIB, 0xC7, Operand::ZMM); } +-void vscatterqpd(const Address& addr, const Xmm& x) { opGather2(x, addr, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_M_K|T_VSIB, 0xA3, 0); } +-void vscatterqps(const Address& addr, const Xmm& x) { opGather2(x, addr, T_N4|T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K|T_VSIB, 0xA3, 2); } +-void vshuff32x4(const Ymm& y1, const Ymm& y2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(y1, y2, op, T_66 | T_0F3A | T_YMM | T_MUST_EVEX | T_W0 | T_B32, 0x23, imm); } +-void vshuff64x2(const Ymm& y1, const Ymm& y2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(y1, y2, op, T_66 | T_0F3A | T_YMM | T_MUST_EVEX | T_EW1 | T_B64, 0x23, imm); } +-void vshufi32x4(const Ymm& y1, const Ymm& y2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(y1, y2, op, T_66 | T_0F3A | T_YMM | T_MUST_EVEX | T_W0 | T_B32, 0x43, imm); } +-void vshufi64x2(const Ymm& y1, const Ymm& y2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(y1, y2, op, T_66 | T_0F3A | T_YMM | T_MUST_EVEX | T_EW1 | T_B64, 0x43, imm); } +-void vsqrtbf16(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x51); } +-void vsqrtph(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP5|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x51); } +-void vsqrtsh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_F3|T_MAP5|T_W0|T_ER_X|T_MUST_EVEX, 0x51); } +-void vsubbf16(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x5C); } +-void vsubph(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_W0 | T_YMM | T_MUST_EVEX | T_ER_Z | T_B16, 0x5C); } +-void vsubsh(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_F3 | T_W0 | T_MUST_EVEX | T_ER_X | T_N2, 0x5C); } +-void vucomish(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N2|T_MAP5|T_W0|T_SAE_X|T_MUST_EVEX, 0x2E); } +-void vucomxsd(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N8|T_F2|T_0F|T_EW1|T_SAE_X|T_MUST_EVEX, 0x2E); } +-void vucomxsh(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N2|T_F3|T_MAP5|T_W0|T_SAE_X|T_MUST_EVEX, 0x2E); } +-void vucomxss(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N4|T_F3|T_0F|T_W0|T_SAE_X|T_MUST_EVEX, 0x2E); } ++void vscatterqpd(const Address& addr, Xmm x) { opGather2(x, addr, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_M_K|T_VSIB, 0xA3, 0); } ++void vscatterqps(const Address& addr, Xmm x) { opGather2(x, addr, T_N4|T_66|T_0F38|T_W0|T_YMM|T_MUST_EVEX|T_M_K|T_VSIB, 0xA3, 2); } ++void vshuff32x4(Ymm y1, Ymm y2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(y1, y2, op, T_66 | T_0F3A | T_YMM | T_MUST_EVEX | T_W0 | T_B32, 0x23, imm); } ++void vshuff64x2(Ymm y1, Ymm y2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(y1, y2, op, T_66 | T_0F3A | T_YMM | T_MUST_EVEX | T_EW1 | T_B64, 0x23, imm); } ++void vshufi32x4(Ymm y1, Ymm y2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(y1, y2, op, T_66 | T_0F3A | T_YMM | T_MUST_EVEX | T_W0 | T_B32, 0x43, imm); } ++void vshufi64x2(Ymm y1, Ymm y2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(y1, y2, op, T_66 | T_0F3A | T_YMM | T_MUST_EVEX | T_EW1 | T_B64, 0x43, imm); } ++void vsqrtbf16(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x51); } ++void vsqrtph(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP5|T_W0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x51); } ++void vsqrtsh(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_F3|T_MAP5|T_W0|T_ER_X|T_MUST_EVEX, 0x51); } ++void vsubbf16(Xmm x1, Xmm x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP5|T_W0|T_YMM|T_MUST_EVEX|T_B16, 0x5C); } ++void vsubph(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_W0 | T_YMM | T_MUST_EVEX | T_ER_Z | T_B16, 0x5C); } ++void vsubsh(Xmm xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_F3 | T_W0 | T_MUST_EVEX | T_ER_X | T_N2, 0x5C); } ++void vucomish(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N2|T_MAP5|T_W0|T_SAE_X|T_MUST_EVEX, 0x2E); } ++void vucomxsd(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N8|T_F2|T_0F|T_EW1|T_SAE_X|T_MUST_EVEX, 0x2E); } ++void vucomxsh(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N2|T_F3|T_MAP5|T_W0|T_SAE_X|T_MUST_EVEX, 0x2E); } ++void vucomxss(Xmm x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N4|T_F3|T_0F|T_W0|T_SAE_X|T_MUST_EVEX, 0x2E); } + #ifdef XBYAK64 +-void kmovq(const Reg64& r, const Opmask& k) { opKmov(k, r, true, 64); } +-void tcvtrowd2ps(const Zmm& z, const Tmm& t, const Reg32& r) { opVex(z, &r, t, T_F3|T_0F38|T_W0|T_MUST_EVEX, 0x4A); } +-void tcvtrowd2ps(const Zmm& z, const Tmm& t, uint8_t imm) { opVex(z, 0, t, T_F3|T_0F3A|T_W0|T_MUST_EVEX, 0x07, imm); } +-void tcvtrowps2bf16h(const Zmm& z, const Tmm& t, const Reg32& r) { opVex(z, &r, t, T_F2|T_0F38|T_W0|T_MUST_EVEX, 0x6D); } +-void tcvtrowps2bf16h(const Zmm& z, const Tmm& t, uint8_t imm) { opVex(z, 0, t, T_F2|T_0F3A|T_W0|T_MUST_EVEX, 0x07, imm); } +-void tcvtrowps2bf16l(const Zmm& z, const Tmm& t, const Reg32& r) { opVex(z, &r, t, T_F3|T_0F38|T_W0|T_MUST_EVEX, 0x6D); } +-void tcvtrowps2bf16l(const Zmm& z, const Tmm& t, uint8_t imm) { opVex(z, 0, t, T_F3|T_0F3A|T_W0|T_MUST_EVEX, 0x77, imm); } +-void tcvtrowps2phh(const Zmm& z, const Tmm& t, const Reg32& r) { opVex(z, &r, t, T_0F38|T_W0|T_MUST_EVEX, 0x6D); } +-void tcvtrowps2phh(const Zmm& z, const Tmm& t, uint8_t imm) { opVex(z, 0, t, T_0F3A|T_W0|T_MUST_EVEX, 0x07, imm); } +-void tcvtrowps2phl(const Zmm& z, const Tmm& t, const Reg32& r) { opVex(z, &r, t, T_66|T_0F38|T_W0|T_MUST_EVEX, 0x6D); } +-void tcvtrowps2phl(const Zmm& z, const Tmm& t, uint8_t imm) { opVex(z, 0, t, T_F2|T_0F3A|T_W0|T_MUST_EVEX, 0x77, imm); } +-void tilemovrow(const Zmm& z, const Tmm& t, const Reg32& r) { opVex(z, &r, t, T_66|T_0F38|T_W0|T_MUST_EVEX, 0x4A); } +-void tilemovrow(const Zmm& z, const Tmm& t, uint8_t imm) { opVex(z, 0, t, T_66|T_0F3A|T_W0|T_MUST_EVEX, 0x07, imm); } +-void vmovrsb(const Xmm& x, const Address& addr) { opVex(x, 0, addr, T_F2|T_MAP5|T_W0|T_MUST_EVEX, 0x6F); } +-void vmovrsd(const Xmm& x, const Address& addr) { opVex(x, 0, addr, T_F3|T_MAP5|T_W0|T_MUST_EVEX, 0x6F); } +-void vmovrsq(const Xmm& x, const Address& addr) { opVex(x, 0, addr, T_F3|T_MAP5|T_EW1|T_MUST_EVEX, 0x6F); } +-void vmovrsw(const Xmm& x, const Address& addr) { opVex(x, 0, addr, T_F2|T_MAP5|T_EW1|T_MUST_EVEX, 0x6F); } +-void vpbroadcastq(const Xmm& x, const Reg64& r) { opVex(x, 0, r, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x7C); } ++void kmovq(Reg64 r, const Opmask& k) { opKmov(k, r, true, 64); } ++void tcvtrowd2ps(Zmm z, const Tmm& t, Reg32 r) { opVex(z, &r, t, T_F3|T_0F38|T_W0|T_MUST_EVEX, 0x4A); } ++void tcvtrowd2ps(Zmm z, const Tmm& t, uint8_t imm) { opVex(z, 0, t, T_F3|T_0F3A|T_W0|T_MUST_EVEX, 0x07, imm); } ++void tcvtrowps2bf16h(Zmm z, const Tmm& t, Reg32 r) { opVex(z, &r, t, T_F2|T_0F38|T_W0|T_MUST_EVEX, 0x6D); } ++void tcvtrowps2bf16h(Zmm z, const Tmm& t, uint8_t imm) { opVex(z, 0, t, T_F2|T_0F3A|T_W0|T_MUST_EVEX, 0x07, imm); } ++void tcvtrowps2bf16l(Zmm z, const Tmm& t, Reg32 r) { opVex(z, &r, t, T_F3|T_0F38|T_W0|T_MUST_EVEX, 0x6D); } ++void tcvtrowps2bf16l(Zmm z, const Tmm& t, uint8_t imm) { opVex(z, 0, t, T_F3|T_0F3A|T_W0|T_MUST_EVEX, 0x77, imm); } ++void tcvtrowps2phh(Zmm z, const Tmm& t, Reg32 r) { opVex(z, &r, t, T_0F38|T_W0|T_MUST_EVEX, 0x6D); } ++void tcvtrowps2phh(Zmm z, const Tmm& t, uint8_t imm) { opVex(z, 0, t, T_0F3A|T_W0|T_MUST_EVEX, 0x07, imm); } ++void tcvtrowps2phl(Zmm z, const Tmm& t, Reg32 r) { opVex(z, &r, t, T_66|T_0F38|T_W0|T_MUST_EVEX, 0x6D); } ++void tcvtrowps2phl(Zmm z, const Tmm& t, uint8_t imm) { opVex(z, 0, t, T_F2|T_0F3A|T_W0|T_MUST_EVEX, 0x77, imm); } ++void tilemovrow(Zmm z, const Tmm& t, Reg32 r) { opVex(z, &r, t, T_66|T_0F38|T_W0|T_MUST_EVEX, 0x4A); } ++void tilemovrow(Zmm z, const Tmm& t, uint8_t imm) { opVex(z, 0, t, T_66|T_0F3A|T_W0|T_MUST_EVEX, 0x07, imm); } ++void vmovrsb(Xmm x, const Address& addr) { opVex(x, 0, addr, T_F2|T_MAP5|T_W0|T_MUST_EVEX, 0x6F); } ++void vmovrsd(Xmm x, const Address& addr) { opVex(x, 0, addr, T_F3|T_MAP5|T_W0|T_MUST_EVEX, 0x6F); } ++void vmovrsq(Xmm x, const Address& addr) { opVex(x, 0, addr, T_F3|T_MAP5|T_EW1|T_MUST_EVEX, 0x6F); } ++void vmovrsw(Xmm x, const Address& addr) { opVex(x, 0, addr, T_F2|T_MAP5|T_EW1|T_MUST_EVEX, 0x6F); } ++void vpbroadcastq(Xmm x, Reg64 r) { opVex(x, 0, r, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x7C); } + #endif + #endif diff --git a/CMakeModules/GenerateSCMRev.cmake b/CMakeModules/GenerateSCMRev.cmake index 947a4963ee..2b028b4846 100644 --- a/CMakeModules/GenerateSCMRev.cmake +++ b/CMakeModules/GenerateSCMRev.cmake @@ -35,17 +35,17 @@ set(GIT_DESC ${BUILD_VERSION}) # Generate cpp with Git revision from template # Also if this is a CI build, add the build name (ie: Nightly, Canary) to the scm_rev file as well -# Auto-updater metadata! Must somewhat mirror GitHub API endpoint +# Auto-updater metadata! Must somewhat mirror GitHub/Forgejo API endpoint + +set(BUILD_AUTO_UPDATE_API_PATH "/latest/release.json") if (NIGHTLY_BUILD) set(BUILD_AUTO_UPDATE_WEBSITE "https://git.eden-emu.dev") - set(BUILD_AUTO_UPDATE_API "git.eden-emu.dev") - set(BUILD_AUTO_UPDATE_API_PATH "/api/v1/repos/") + set(BUILD_AUTO_UPDATE_API "nightly.eden-emu.dev") set(BUILD_AUTO_UPDATE_REPO "eden-ci/nightly") set(REPO_NAME "Eden Nightly") else() set(BUILD_AUTO_UPDATE_WEBSITE "https://git.eden-emu.dev") - set(BUILD_AUTO_UPDATE_API "git.eden-emu.dev") - set(BUILD_AUTO_UPDATE_API_PATH "/api/v1/repos/") + set(BUILD_AUTO_UPDATE_API "stable.eden-emu.dev") set(BUILD_AUTO_UPDATE_REPO "eden-emu/eden") set(REPO_NAME "Eden") endif() diff --git a/dist/languages/ar.ts b/dist/languages/ar.ts index c414cbd5d8..88a83a26a7 100644 --- a/dist/languages/ar.ts +++ b/dist/languages/ar.ts @@ -454,7 +454,7 @@ This would ban both their forum username and their IP address. Enable Overlay Applet - تمكين الطبقة للتطبيق الصغير + تمكين التطبيق المصغر للطبقة @@ -799,23 +799,35 @@ This feature is experimental. + Use asynchronous GPU emulation + استخدم محاكاة وحدة معالجة الرسومات غير المتزامنة + + + + Uses an extra CPU thread for rendering. +This option should always remain enabled. + يستخدم خيط معالجة إضافي للمعالجة الرسومية. +يجب أن يبقى هذا الخيار مُفعّلاً دائماً. + + + NVDEC emulation: NVDEC محاكاة: - + Specifies how videos should be decoded. It can either use the CPU or the GPU for decoding, or perform no decoding at all (black screen on videos). In most cases, GPU decoding provides the best performance. يُحدد كيفية فك تشفير الفيديوهات.يمكن استخدام وحدة المعالجة المركزية CPU أو وحدة معالجة الرسومات GPU لفك التشفير، أو عدم فك التشفير إطلاقًا (شاشة سوداء على الفيديوهات).في معظم الحالات، يُوفر فك تشفير وحدة معالجة الرسومات GPU أفضل أداء. - + ASTC Decoding Method: ASTC طريقة فك تشفير: - + This option controls how ASTC textures should be decoded. CPU: Use the CPU for decoding. GPU: Use the GPU's compute shaders to decode ASTC textures (recommended). @@ -827,12 +839,12 @@ stuttering but may present artifacts. وحدة المعالجة المركزية بشكل غير متزامن: استخدمها لفك تشفير قوام ASTC عند الطلب. يزيل هذا الخيار تقطع فك تشفير ASTC، ولكنه قد يُظهر بعض العيوب. - + ASTC Recompression Method: ASTC طريقة إعادة ضغط: - + Most GPUs lack support for ASTC textures and must decompress to anintermediate format: RGBA8. BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, saving VRAM but degrading image quality. @@ -840,44 +852,44 @@ BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, BC1/BC3: سيتم إعادة ضغط الصيغة الوسيطة إلى صيغة BC1 أو BC3، مما يوفر مساحة على ذاكرة الوصول العشوائي للفيديو VRAM ولكنه يُضعف جودة الصورة. - + Frame Pacing Mode (Vulkan only) (Vulkan فقط) وضع توقيت الإطارات - + Controls how the emulator manages frame pacing to reduce stuttering and make the frame rate smoother and more consistent. يتحكم في كيفية إدارة المحاكي لسرعة الإطارات لتقليل التقطع وجعل معدل الإطارات أكثر سلاسة واتساقًا. - + VRAM Usage Mode: VRAM وضع استهلاك: - + Selects whether the emulator should prefer to conserve memory or make maximum usage of available video memory for performance. Aggressive mode may impact performance of other applications such as recording software. يُحدد ما إذا كان ينبغي على المُحاكي تفضيل توفير الذاكرة أو الاستفادة القصوى من ذاكرة الفيديو المُتاحة لتحسين الأداء. قد يؤثر الوضع المُكثّف على أداء تطبيقات أخرى، مثل برامج التسجيل. - + Skip CPU Inner Invalidation تخطي إبطال وحدة المعالجة المركزية الداخلية - + Skips certain cache invalidations during memory updates, reducing CPU usage and improving latency. This may cause soft-crashes. يتخطى بعض عمليات إبطال ذاكرة التخزين المؤقتة أثناء تحديثات الذاكرة، مما يقلل من استخدام وحدة المعالجة المركزية ويحسّن زمن الوصول. قد يؤدي هذا إلى أعطال مؤقتة. - + VSync Mode: VSync وضع: - + FIFO (VSync) does not drop frames or exhibit tearing but is limited by the screen refresh rate. FIFO Relaxed allows tearing as it recovers from a slow down. Mailbox can have lower latency than FIFO and does not tear but may drop frames. @@ -888,12 +900,12 @@ Immediate (no synchronization) presents whatever is available and can exhibit te يُظهر الوضع الفوري (بدون مزامنة) كل ما هو متاح، وقد يُظهر تمزقًا. - + Sync Memory Operations مزامنة عمليات الذاكرة - + Ensures data consistency between compute and memory operations. This option fixes issues in games, but may degrade performance. Unreal Engine 4 games often see the most significant changes thereof. @@ -902,99 +914,99 @@ Unreal Engine 4 games often see the most significant changes thereof. التغييرات الأكثر أهمية Unreal Engine 4 غالبًا ما تشهد ألعاب. - + Enable asynchronous presentation (Vulkan only) (Vulkan فقط) تمكين العرض التقديمي غير المتزامن - + Slightly improves performance by moving presentation to a separate CPU thread. تحسين الأداء بشكل طفيف عن طريق نقل العرض التقديمي إلى مؤشر ترابط منفصل في وحدة المعالجة المركزية. - + Force maximum clocks (Vulkan only) (Vulkan فقط) فرض الحد الأقصى للساعات - + Runs work in the background while waiting for graphics commands to keep the GPU from lowering its clock speed. يعمل في الخلفية أثناء انتظار أوامر الرسومات لمنع وحدة معالجة الرسومات من خفض سرعة الساعة. - + Anisotropic Filtering: الترشيح المتباين الخواص: - + Controls the quality of texture rendering at oblique angles. Safe to set at 16x on most GPUs. يتحكم بجودة عرض الملمس بزوايا مائلة. من الآمن ضبطه على 16x على معظم وحدات معالجة الرسومات. - + GPU Mode: وضع وحدة معالجة الرسومات: - + Controls the GPU emulation mode. Most games render fine with Fast or Balanced modes, but Accurate is still required for some. Particles tend to only render correctly with Accurate mode. يتحكم في وضع محاكاة وحدة معالجة الرسومات.تُعرض معظم الألعاب بشكل جيد في الوضعين السريع أو المتوازن، ولكن الوضع الدقيق لا يزال مطلوبًا لبعض الألعاب.تميل الجسيمات إلى العرض بشكل صحيح فقط في الوضع الدقيق. - + DMA Accuracy: DMA دقة: - + Controls the DMA precision accuracy. Safe precision fixes issues in some games but may degrade performance. الدقة الآمنة تعمل على إصلاح المشكلات في بعض الألعاب ولكنها قد تؤدي إلى انخفاض الأداء DMA يتحكم في دقة - + Enable asynchronous shader compilation تفعيل تجميع التظليل غير المتزامن - + May reduce shader stutter. قد يقلل من تقطع التظليل. - + Fast GPU Time وقت معالجة الرسومات السريع - + Overclocks the emulated GPU to increase dynamic resolution and render distance. Use 256 for maximal performance and 512 for maximal graphics fidelity. يزيد من سرعة وحدة معالجة الرسومات المحاكية لزيادة الدقة الديناميكية ومسافة العرض.استخدم 256 للحصول على أقصى أداء و 512 للحصول على أقصى دقة للرسومات. - + GPU Unswizzle إلغاء ترتيب بيانات وحدة معالجة الرسومات - + Accelerates BCn 3D texture decoding using GPU compute. Disable if experiencing crashes or graphical glitches. باستخدام حوسبة وحدة معالجة الرسومات BCn 3D يسرع فك تشفير نسيج. قم بتعطيله في حالة حدوث أعطال أو مشاكل في الرسومات. - + GPU Unswizzle Max Texture Size الحد الأقصى لحجم النسيج في وحدة معالجة الرسومات بعد إعادة ترتيب البيانات - + Sets the maximum size (MiB) for GPU-based texture unswizzling. While the GPU is faster for medium and large textures, the CPU may be more efficient for very small ones. Adjust this to find the balance between GPU acceleration and CPU overhead. @@ -1003,48 +1015,48 @@ Adjust this to find the balance between GPU acceleration and CPU overhead. - + GPU Unswizzle Stream Size حجم تدفق إلغاء ترتيب بيانات وحدة معالجة الرسومات - + Sets the maximum amount of texture data (in MiB) processed per frame. Higher values can reduce stutter during texture loading but may impact frame consistency. يحدد الحد الأقصى لكمية بيانات النسيج (بالميغابايت) التي تتم معالجتها لكل إطار. يمكن أن تقلل القيم الأعلى من التقطع أثناء تحميل النسيج، ولكنها قد تؤثر على اتساق الإطارات. - + GPU Unswizzle Chunk Size حجم كتلة إلغاء ترتيب بيانات وحدة معالجة الرسومات - + Determines the number of depth slices processed in a single dispatch. Increasing this can improve throughput on high-end GPUs but may cause TDR or driver timeouts on weaker hardware. يُحدد هذا الخيار عدد شرائح العمق التي تتم معالجتها في عملية إرسال واحدة. زيادة هذا الخيار قد تُحسّن الإنتاجية على وحدات معالجة الرسومات المتطورة، ولكنها قد تُسبب أخطاء في إعادة تعيين وقت الاستجابة أو انقطاع الاتصال ببرنامج التشغيل على الأجهزة ذات المواصفات الأقل. - + Use Vulkan pipeline cache Vulkan استخدام ذاكرة التخزين المؤقتة لخط أنابيب - + Enables GPU vendor-specific pipeline cache. This option can improve shader loading time significantly in cases where the Vulkan driver does not store pipeline cache files internally. يُفعّل ذاكرة التخزين المؤقت لخطوط الأنابيب الخاصة ببائع وحدة معالجة الرسومات. بتخزين ملفات ذاكرة التخزين المؤقتة للخطوط الداخلية Vulkan يمكن أن يؤدي هذا الخيار إلى تحسين وقت تحميل التظليل بشكل كبير في الحالات التي لا يقوم فيها برنامج تشغيل. - + Enable Compute Pipelines (Intel Vulkan Only) (Intel Vulkan فقط) تمكين خطوط أنابيب الحوسبة - + Required by some games. This setting only exists for Intel proprietary drivers and may crash if enabled. Compute pipelines are always enabled on all other drivers. @@ -1053,182 +1065,182 @@ Compute pipelines are always enabled on all other drivers. خطوط أنابيب الحوسبة مفعلة دائمًا على جميع برامج التشغيل الأخرى. - + Enable Reactive Flushing تمكين التنظيف التفاعلي - + Uses reactive flushing instead of predictive flushing, allowing more accurate memory syncing. يستخدم التنظيف التفاعلي بدلاً من التنظيف التنبئي، مما يسمح بمزامنة الذاكرة بشكل أكثر دقة. - + Sync to framerate of video playback المزامنة مع معدل الإطارات لتشغيل الفيديو - + Run the game at normal speed during video playback, even when the framerate is unlocked. قم بتشغيل اللعبة بالسرعة العادية أثناء تشغيل الفيديو، حتى عندما يكون معدل الإطارات مفتوحًا. - + Barrier feedback loops حلقات التغذية الراجعة للحواجز - + Improves rendering of transparency effects in specific games. يحسن عرض تأثيرات الشفافية في بعض الألعاب المحددة. - + Enable buffer history تمكين سجل التخزين المؤقت - + Enables access to previous buffer states. This option may improve rendering quality and performance consistency in some games. يُتيح هذا الخيار الوصول إلى حالات التخزين المؤقت السابقة. وقد يُحسّن جودة العرض وثبات الأداء في بعض الألعاب. - + Fix bloom effects إصلاح تأثيرات التوهج - + Removes bloom in Burnout. يزيل التوهج في وضع الاحتراق. - + Enable Legacy Rescale Pass تفعيل ميزة إعادة التحجيم القديمة - + May fix rescale issues in some games by relying on behavior from the previous implementation. Legacy behavior workaround that fixes line artifacts on AMD and Intel GPUs, and grey texture flicker on Nvidia GPUs in Luigis Mansion 3. قد يصلح مشاكل إعادة القياس في بعض الألعاب بالاعتماد على سلوك من التنفيذ السابق. حل لسلوك قديم يصلح تشوهات الخطوط على بطاقات AMD وIntel الرسومية، ووميض النسيج الرمادي على بطاقات Nvidia الرسومية في لعبة Luigi's Mansion 3. - + Extended Dynamic State الحالة الديناميكية الموسعة - + Controls the number of features that can be used in Extended Dynamic State. Higher states allow for more features and can increase performance, but may cause additional graphical issues. يتحكم في عدد الميزات التي يمكن استخدامها في الحالة الديناميكية الموسعة.تسمح الحالات الأعلى بمزيد من الميزات ويمكن أن تزيد من الأداء، ولكنها قد تسبب مشكلات رسومية إضافية. - + Vertex Input Dynamic State حالة ديناميكية لإدخال الرأس - + Enables vertex input dynamic state feature for better quality and performance. يتيح ميزة الحالة الديناميكية لإدخال الرأس لتحسين الجودة والأداء. - + Sample Shading تظليل العينة - + Allows the fragment shader to execute per sample in a multi-sampled fragment instead of once per fragment. Improves graphics quality at the cost of performance. Higher values improve quality but degrade performance. يسمح لمظلل الأجزاء بالتنفيذ لكل عينة في جزء متعدد العينات بدلاً من مرة واحدة لكل جزء. يحسن جودة الرسومات على حساب الأداء. القيم الأعلى تحسن الجودة ولكنها تقلل من الأداء. - + RNG Seed مولد الأرقام العشوائية - + Controls the seed of the random number generator. Mainly used for speedrunning. يتحكم في بذرة مولد الأرقام العشوائية. يُستخدم بشكل رئيسي في سباقات السرعة. - + Device Name اسم الجهاز - + The name of the console. اسم وحدة التحكم. - + Custom RTC Date: المخصص RTC تاريخ: - + This option allows to change the clock of the console. Can be used to manipulate time in games. يتيح لك هذا الخيار تغيير ساعة وحدة التحكم. يمكن استخدامه للتحكم بالوقت في الألعاب. - + The number of seconds from the current unix time عدد الثواني من وقت يونكس الحالي - + Language: اللغة: - + This option can be overridden when region setting is auto-select يمكن تجاوز هذا الخيار عند تحديد إعداد المنطقة تلقائيًا - + Region: المنطقة: - + The region of the console. منطقة وحدة التحكم. - + Time Zone: المنطقة الزمنية: - + The time zone of the console. المنطقة الزمنية لوحدة التحكم. - + Sound Output Mode: وضع إخراج الصوت: - + Console Mode: وضع وحدة التحكم: - + Selects if the console is in Docked or Handheld mode. Games will change their resolution, details and supported controllers and depending on this setting. Setting to Handheld can help improve performance for low end systems. @@ -1237,1046 +1249,1031 @@ Setting to Handheld can help improve performance for low end systems. يُمكن أن يُساعد الضبط على الوضع المحمول على تحسين أداء الأجهزة منخفضة المواصفات. - - Unit Serial - الرقم التسلسلي للوحدة - - - - Battery Serial - الرقم التسلسلي للبطارية - - - - Debug knobs - مقابض تصحيح الأخطاء - - - + Prompt for user profile on boot المطالبة بملف تعريف المستخدم عند التشغيل - + Useful if multiple people use the same PC. مفيد إذا كان هناك عدة أشخاص يستخدمون نفس الكمبيوتر. - + Pause when not in focus توقف عند عدم التركيز - + Pauses emulation when focusing on other windows. يوقف المحاكاة عند التركيز على نوافذ أخرى. - + Confirm before stopping emulation تأكيد قبل إيقاف المحاكاة - + Overrides prompts asking to confirm stopping the emulation. Enabling it bypasses such prompts and directly exits the emulation. يتجاوز المطالبات التي تطلب تأكيد إيقاف المحاكاة. يؤدي تمكينه إلى تجاوز هذه المطالبات والخروج مباشرة من المحاكاة. - + Hide mouse on inactivity إخفاء الماوس عند عدم النشاط - + Hides the mouse after 2.5s of inactivity. يخفي الماوس بعد 2.5 ثانية من عدم النشاط. - + Disable controller applet تعطيل تطبيق التحكم - + Forcibly disables the use of the controller applet in emulated programs. When a program attempts to open the controller applet, it is immediately closed. يُعطّل استخدام أداة التحكم في البرامج المُحاكاة قسرًا. عند محاولة أي برنامج فتح أداة التحكم، تُغلق فورًا. - + Check for updates التحقق من توفر التحديثات - + Whether or not to check for updates upon startup. ما إذا كان يجب التحقق من التحديثات عند بدء التشغيل أم لا. - + Enable Gamemode تمكين وضع اللعبة - + Force X11 as Graphics Backend كخلفية رسومات X11 فرض - + Custom frontend الواجهة الأمامية المخصصة - + Real applet تطبيق صغير حقيقي - + Never أبداً - + On Load عند التحميل - + Always دائماً - + CPU وحدة المعالجة المركزية - + GPU وحدة معالجة الرسومات - + CPU Asynchronous وحدة المعالجة المركزية غير المتزامنة - + Uncompressed (Best quality) Uncompressed (أفضل جودة) - + BC1 (Low quality) BC1 (جودة منخفضة) - + BC3 (Medium quality) BC3 (جودة متوسطة) - - + + Auto تلقائي - + 30 FPS 30 إطارًا في الثانية - + 60 FPS 60 إطارًا في الثانية - + 90 FPS 90 إطارًا في الثانية - + 120 FPS 120 إطارًا في الثانية - + Conservative محافظ - + Aggressive عدواني - + Vulkan Vulkan - + OpenGL GLSL OpenGL GLSL - + OpenGL GLASM (Assembly Shaders, NVIDIA Only) OpenGL GLASM (Assembly Shaders, NVIDIA Only) - + OpenGL SPIR-V (Experimental, AMD/Mesa Only) OpenGL SPIR-V (Experimental, AMD/Mesa Only) - + Null لا شيء - + Fast سريع - + Balanced متوازن - - + + Accurate دقه - - + + Default افتراضي - + Unsafe (fast) غير آمن (سريع) - + Safe (stable) آمن (مستقر) - + Unsafe غير آمن - + Paranoid (disables most optimizations) جنون العظمة (يعطل معظم التحسينات) - + Debugging تصحيح الأخطاء - + Dynarmic Dynarmic - + NCE NCE - + Borderless Windowed نافذة بلا حدود - + Exclusive Fullscreen شاشة كاملة حصرية - + No Video Output لا يوجد إخراج فيديو - + CPU Video Decoding فك تشفير فيديو وحدة المعالجة المركزية - + GPU Video Decoding (Default) فك تشفير فيديو وحدة معالجة الرسومات (افتراضي) - + 0.25X (180p/270p) [EXPERIMENTAL] 0.25X (180p/270p) [تجريبي] - + 0.5X (360p/540p) [EXPERIMENTAL] 0.5X (360p/540p) [تجريبي] - + 0.75X (540p/810p) [EXPERIMENTAL] 0.75X (540p/810p) [تجريبي] - + 1X (720p/1080p) 1X (720p/1080p) - + 1.25X (900p/1350p) [EXPERIMENTAL] 1.25X (900p/1350p) [تجريبي] - + 1.5X (1080p/1620p) [EXPERIMENTAL] 1.5X (1080p/1620p) [تجريبي] - + 2X (1440p/2160p) 2X (1440p/2160p) - + 3X (2160p/3240p) 3X (2160p/3240p) - + 4X (2880p/4320p) 4X (2880p/4320p) - + 5X (3600p/5400p) 5X (3600p/5400p) - + 6X (4320p/6480p) 6X (4320p/6480p) - + 7X (5040p/7560p) 7X (5040p/7560p) - + 8X (5760p/8640p) 8X (5760p/8640p) - + Nearest Neighbor Nearest Neighbor - + Bilinear Bilinear - + Bicubic Bicubic - + Gaussian Gaussian - + Lanczos Lanczos - + ScaleForce ScaleForce - + AMD FidelityFX Super Resolution AMD FidelityFX Super Resolution - + Area Area - + MMPX MMPX - + Zero-Tangent Zero-Tangent - + B-Spline B-Spline - + Mitchell Mitchell - + Spline-1 Spline-1 - - + + None لا شيء - + FXAA FXAA - + SMAA SMAA - + Default (16:9) (16:9) افتراضي - + Force 4:3 4:3 فرض - + Force 21:9 21:9 فرض - + Force 16:10 16:10 فرض - + Stretch to Window تمديد إلى النافذة - + Automatic تلقائي - + 2x 2x - + 4x 4x - + 8x 8x - + 16x 16x - + 32x 32x - + 64x 64x - + Japanese (日本語) اليابانية (日本語) - + American English الإنجليزية الأمريكية - + French (français) الفرنسية (français) - + German (Deutsch) الألمانية (Deutsch) - + Italian (italiano) الإيطالية (Italiano) - + Spanish (español) الإسبانية (español) - + Chinese الصينية - + Korean (한국어) الكورية (한국어) - + Dutch (Nederlands) الهولندية (Nederlands) - + Portuguese (português) البرتغالية (Português) - + Russian (Русский) الروسية (Русский) - + Taiwanese تايواني - + British English الإنكليزية البريطانية - + Canadian French الكندية الفرنسية - + Latin American Spanish أمريكا اللاتينية الإسبانية - + Simplified Chinese الصينية المبسطة - + Traditional Chinese (正體中文) الصينية التقليدية (正體中文) - + Brazilian Portuguese (português do Brasil) البرتغالية البرازيلية (português do Brasil) - + Polish (polska) البولندية (polska) - + Thai (แบบไทย) التايلاندية (แบบไทย) - - + + Japan اليابان - + USA الولايات المتحدة الأمريكية - + Europe أوروبا - + Australia أستراليا - + China الصين - + Korea كوريا - + Taiwan تايوان - + Auto (%1) Auto select time zone تلقائي (%1) - + Default (%1) Default time zone افتراضي (%1) - + CET CET - + CST6CDT CST6CDT - + Cuba Cuba - + EET EET - + Egypt Egypt - + Eire Eire - + EST EST - + EST5EDT EST5EDT - + GB GB - + GB-Eire GB-Eire - + GMT GMT - + GMT+0 GMT+0 - + GMT-0 GMT-0 - + GMT0 GMT0 - + Greenwich Greenwich - + Hongkong Hongkong - + HST HST - + Iceland Iceland - + Iran Iran - + Israel Israel - + Jamaica Jamaica - + Kwajalein Kwajalein - + Libya Libya - + MET MET - + MST MST - + MST7MDT MST7MDT - + Navajo Navajo - + NZ NZ - + NZ-CHAT NZ-CHAT - + Poland Poland - + Portugal Portugal - + PRC PRC - + PST8PDT PST8PDT - + ROC ROC - + ROK ROK - + Singapore Singapore - + Turkey Turkey - + UCT UCT - + Universal عالمي - + UTC UTC - + W-SU W-SU - + WET WET - + Zulu Zulu - + Mono أحادي - + Stereo مجسم - + Surround محيطي - + 4GB DRAM (Default) 4GB DRAM (افتراضي) - + 6GB DRAM (Unsafe) 6GB DRAM (غير آمنة) - + 8GB DRAM 8GB DRAM - + 10GB DRAM (Unsafe) 10GB DRAM (غير آمنة) - + 12GB DRAM (Unsafe) 12GB DRAM (غير آمنة) - + Docked الإرساء - + Handheld محمول - - + + Off تعطيل - + Boost (1700MHz) تعزيز (1700 ميجا هرتز) - + Fast (2000MHz) سريع (2000 ميجاهرتز) - + Always ask (Default) اسأل دائمًا (افتراضي) - + Only if game specifies not to stop فقط إذا حددت اللعبة عدم التوقف - + Never ask لا تسأل أبدا - - + + Medium (256) متوسط (256) - - + + High (512) عالي (512) - + Very Small (16 MB) صغير جدًا (16 ميغابايت) - + Small (32 MB) صغير (32 ميغابايت) - + Normal (128 MB) قياسي (128 ميغابايت) - + Large (256 MB) كبير (256 ميغابايت) - + Very Large (512 MB) كبير جدًا (512 ميغابايت) - + Very Low (4 MB) منخفض جدًا (4 ميغابايت) - + Low (8 MB) منخفض (8 ميغابايت) - + Normal (16 MB) قياسي (16 ميغابايت) - + Medium (32 MB) متوسط (32 ميغابايت) - + High (64 MB) عالي (64 ميغابايت) - + Very Low (32) منخفض جدًا (32) - + Low (64) منخفض (64) - + Normal (128) قياسي (128) - + Disabled معطل - + ExtendedDynamicState 1 الحالة الديناميكية الممتدة 1 - + ExtendedDynamicState 2 الحالة الديناميكية الممتدة 2 - + ExtendedDynamicState 3 الحالة الديناميكية الممتدة 3 - + Tree View عرض قائمة - + Grid View عرض شبكة @@ -2409,7 +2406,7 @@ When a program attempts to open the controller applet, it is immediately closed. Toggle CPU Optimizations - تبديل تحسينات وحدة المعالجة المركزية + تشغيل/إيقاف تحسينات وحدة المعالجة المركزية @@ -2823,7 +2820,7 @@ When a program attempts to open the controller applet, it is immediately closed. Bitmask for quick development toggles - قناع بت للتبديل السريع بين أوضاع التطوير + قناع بتات للتبديل السريع بين خيارات التطوير @@ -2833,7 +2830,7 @@ When a program attempts to open the controller applet, it is immediately closed. 16-bit debug knob set for quick development toggles - مجموعة أزرار تصحيح أخطاء 16 بت للتبديل السريع بين أوضاع التطوير + مجموعة أزرار تصحيح الأخطاء ذات 16 بت للتبديل السريع أثناء التطوير @@ -4230,7 +4227,7 @@ Would you like to delete the old save data? Toggle button - زر التبديل + زر تشغيل/إيقاف @@ -4259,7 +4256,7 @@ Would you like to delete the old save data? Toggle axis - تبديل المحور + تشغيل/إيقاف المحور @@ -4493,7 +4490,7 @@ To invert the axes, first move your joystick vertically, and then horizontally.< Touch from button profile: - اللمس من ملف تعريف الزر: + :اللمس من ملف تعريف الزر @@ -5790,7 +5787,7 @@ Drag points to change position, or double-click table cells to edit values.إدارة البيانات - + Deleting ANY data is IRREVERSABLE! حذف أي بيانات أمر لا رجعة فيه! @@ -5801,13 +5798,13 @@ Drag points to change position, or double-click table cells to edit values. - UserNAND - UserNAND + User NAND + ذاكرة المستخدم الداخلية - SysNAND - SysNAND + System NAND + ذاكرة النظام الداخلية @@ -5853,7 +5850,7 @@ Drag points to change position, or double-click table cells to edit values.استيراد البيانات لهذا المجلد. قد يستغرق هذا بعض الوقت، وسيؤدي إلى حذف جميع البيانات الموجودة! - + Calculating... يتم الحساب... @@ -6642,27 +6639,27 @@ Debug Message: TAS Start/Stop - TAS بدء/إيقاف + TAS تشغيل/إيقاف Toggle Filter Bar - تبديل شريط التصفية + تشغيل/إيقاف شريط التصفية Toggle Framerate Limit - تبديل حد معدل الإطارات + تشغيل/إيقاف حد معدل الإطارات Toggle Turbo Speed - تبديل سرعة تيربو + تشغيل/إيقاف سرعة تيربو Toggle Slow Speed - تبديل السرعة البطيئة + تشغيل/إيقاف السرعة البطيئة @@ -6672,17 +6669,17 @@ Debug Message: Toggle Renderdoc Capture - Renderdoc تبديل التقاط + Renderdoc تشغيل/إيقاف التقاط Toggle Status Bar - تبديل شريط الحالة + تشغيل/إيقاف شريط الحالة Toggle Performance Overlay - تبديل طبقة الأداء + تشغيل/إيقاف طبقة الأداء @@ -6802,7 +6799,7 @@ Debug Message: Password Required to Join - كلمة المرور مطلوبة للإنظمام + مطلوب إدخال كلمة مرور للانضمام @@ -6890,7 +6887,7 @@ Debug Message: Game &Icon Size - اللعبة وحجم الأيقونة + حجم &أيقونة اللعبة @@ -7021,7 +7018,7 @@ Debug Message: Enable Overlay Display Applet - تمكين الطبقة للعرض التطبيق الصغير + تمكين التطبيق المصغر لعرض الطبقة @@ -7091,7 +7088,7 @@ Debug Message: Open &Quickstart Guide - &دليل البدء السريع + دليل &البدء السريع @@ -7597,7 +7594,7 @@ Debug Message: Switch Executable (%1);;All Files (*.*) %1 is an identifier for the Switch executable file extensions. - تبديل الملف القابل للتنفيذ (%1);;جميع الملفات (*.*) + تشغيل الملف القابل للتنفيذ (%1)؛؛جميع الملفات (*.*) diff --git a/dist/languages/ca.ts b/dist/languages/ca.ts index 757179b435..5b9c9301f9 100644 --- a/dist/languages/ca.ts +++ b/dist/languages/ca.ts @@ -767,23 +767,34 @@ This feature is experimental. + Use asynchronous GPU emulation + + + + + Uses an extra CPU thread for rendering. +This option should always remain enabled. + + + + NVDEC emulation: Emulació NVDEC: - + Specifies how videos should be decoded. It can either use the CPU or the GPU for decoding, or perform no decoding at all (black screen on videos). In most cases, GPU decoding provides the best performance. - + ASTC Decoding Method: - + This option controls how ASTC textures should be decoded. CPU: Use the CPU for decoding. GPU: Use the GPU's compute shaders to decode ASTC textures (recommended). @@ -792,55 +803,55 @@ stuttering but may present artifacts. - + ASTC Recompression Method: - + Most GPUs lack support for ASTC textures and must decompress to anintermediate format: RGBA8. BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, saving VRAM but degrading image quality. - + Frame Pacing Mode (Vulkan only) - + Controls how the emulator manages frame pacing to reduce stuttering and make the frame rate smoother and more consistent. - + VRAM Usage Mode: - + Selects whether the emulator should prefer to conserve memory or make maximum usage of available video memory for performance. Aggressive mode may impact performance of other applications such as recording software. - + Skip CPU Inner Invalidation - + Skips certain cache invalidations during memory updates, reducing CPU usage and improving latency. This may cause soft-crashes. - + VSync Mode: Mode de sincronització vertical: - + FIFO (VSync) does not drop frames or exhibit tearing but is limited by the screen refresh rate. FIFO Relaxed allows tearing as it recovers from a slow down. Mailbox can have lower latency than FIFO and does not tear but may drop frames. @@ -848,1376 +859,1361 @@ Immediate (no synchronization) presents whatever is available and can exhibit te - + Sync Memory Operations - + Ensures data consistency between compute and memory operations. This option fixes issues in games, but may degrade performance. Unreal Engine 4 games often see the most significant changes thereof. - + Enable asynchronous presentation (Vulkan only) - + Slightly improves performance by moving presentation to a separate CPU thread. - + Force maximum clocks (Vulkan only) - + Runs work in the background while waiting for graphics commands to keep the GPU from lowering its clock speed. - + Anisotropic Filtering: Filtrat anisotròpic: - + Controls the quality of texture rendering at oblique angles. Safe to set at 16x on most GPUs. - + GPU Mode: Mode de la GPU: - + Controls the GPU emulation mode. Most games render fine with Fast or Balanced modes, but Accurate is still required for some. Particles tend to only render correctly with Accurate mode. - + DMA Accuracy: Precisió DMA: - + Controls the DMA precision accuracy. Safe precision fixes issues in some games but may degrade performance. - + Enable asynchronous shader compilation - + May reduce shader stutter. - + Fast GPU Time - + Overclocks the emulated GPU to increase dynamic resolution and render distance. Use 256 for maximal performance and 512 for maximal graphics fidelity. - + GPU Unswizzle - + Accelerates BCn 3D texture decoding using GPU compute. Disable if experiencing crashes or graphical glitches. - + GPU Unswizzle Max Texture Size - + Sets the maximum size (MiB) for GPU-based texture unswizzling. While the GPU is faster for medium and large textures, the CPU may be more efficient for very small ones. Adjust this to find the balance between GPU acceleration and CPU overhead. - + GPU Unswizzle Stream Size - + Sets the maximum amount of texture data (in MiB) processed per frame. Higher values can reduce stutter during texture loading but may impact frame consistency. - + GPU Unswizzle Chunk Size - + Determines the number of depth slices processed in a single dispatch. Increasing this can improve throughput on high-end GPUs but may cause TDR or driver timeouts on weaker hardware. - + Use Vulkan pipeline cache - + Enables GPU vendor-specific pipeline cache. This option can improve shader loading time significantly in cases where the Vulkan driver does not store pipeline cache files internally. - + Enable Compute Pipelines (Intel Vulkan Only) - + Required by some games. This setting only exists for Intel proprietary drivers and may crash if enabled. Compute pipelines are always enabled on all other drivers. - + Enable Reactive Flushing - + Uses reactive flushing instead of predictive flushing, allowing more accurate memory syncing. - + Sync to framerate of video playback - + Run the game at normal speed during video playback, even when the framerate is unlocked. - + Barrier feedback loops - + Improves rendering of transparency effects in specific games. - + Enable buffer history - + Enables access to previous buffer states. This option may improve rendering quality and performance consistency in some games. - + Fix bloom effects - + Removes bloom in Burnout. - + Enable Legacy Rescale Pass - + May fix rescale issues in some games by relying on behavior from the previous implementation. Legacy behavior workaround that fixes line artifacts on AMD and Intel GPUs, and grey texture flicker on Nvidia GPUs in Luigis Mansion 3. - + Extended Dynamic State - + Controls the number of features that can be used in Extended Dynamic State. Higher states allow for more features and can increase performance, but may cause additional graphical issues. - + Vertex Input Dynamic State - + Enables vertex input dynamic state feature for better quality and performance. - + Sample Shading - + Allows the fragment shader to execute per sample in a multi-sampled fragment instead of once per fragment. Improves graphics quality at the cost of performance. Higher values improve quality but degrade performance. - + RNG Seed Llavor de GNA - + Controls the seed of the random number generator. Mainly used for speedrunning. - + Device Name Nom del dispositiu - + The name of the console. - + Custom RTC Date: - + This option allows to change the clock of the console. Can be used to manipulate time in games. - + The number of seconds from the current unix time - + Language: Idioma: - + This option can be overridden when region setting is auto-select - + Region: Regió: - + The region of the console. - + Time Zone: Zona horària: - + The time zone of the console. - + Sound Output Mode: - + Console Mode: Mode de la consola - + Selects if the console is in Docked or Handheld mode. Games will change their resolution, details and supported controllers and depending on this setting. Setting to Handheld can help improve performance for low end systems. - - Unit Serial - - - - - Battery Serial - - - - - Debug knobs - - - - + Prompt for user profile on boot - + Useful if multiple people use the same PC. - + Pause when not in focus - + Pauses emulation when focusing on other windows. - + Confirm before stopping emulation - + Overrides prompts asking to confirm stopping the emulation. Enabling it bypasses such prompts and directly exits the emulation. - + Hide mouse on inactivity Ocultar el cursor del ratolí en cas d'inactivitat - + Hides the mouse after 2.5s of inactivity. - + Disable controller applet - + Forcibly disables the use of the controller applet in emulated programs. When a program attempts to open the controller applet, it is immediately closed. - + Check for updates - + Whether or not to check for updates upon startup. - + Enable Gamemode Activa el mode joc - + Force X11 as Graphics Backend - + Custom frontend - + Real applet - + Never Mai - + On Load - + Always Sempre - + CPU CPU - + GPU GPU - + CPU Asynchronous - + Uncompressed (Best quality) - + BC1 (Low quality) - + BC3 (Medium quality) - - + + Auto Auto - + 30 FPS 30 FPS - + 60 FPS 60 FPS - + 90 FPS 90 FPS - + 120 FPS 120 FPS - + Conservative Conservador - + Aggressive Agressiu - + Vulkan Vulkan - + OpenGL GLSL OpenGL GLSL - + OpenGL GLASM (Assembly Shaders, NVIDIA Only) OpenGL GLASM (Ensamblat d'ombrejadors, només NVIDIA) - + OpenGL SPIR-V (Experimental, AMD/Mesa Only) OpenGL SPIR-V (Experimental, només AMD/Mesa) - + Null Nul - + Fast Ràpid - + Balanced Equilibrat - - + + Accurate Precís - - + + Default Valor predeterminat - + Unsafe (fast) Insegur (ràpid) - + Safe (stable) Segur (estable) - + Unsafe Insegur - + Paranoid (disables most optimizations) Paranoic (desactiva la majoria d'optimitzacions) - + Debugging Depuració - + Dynarmic Dynarmic - + NCE NCE - + Borderless Windowed Finestra sense vores - + Exclusive Fullscreen Pantalla completa exclusiva - + No Video Output Sense sortida de vídeo - + CPU Video Decoding Descodificació de vídeo a la CPU - + GPU Video Decoding (Default) Descodificació de vídeo a la GPU (Valor predeterminat) - + 0.25X (180p/270p) [EXPERIMENTAL] 0.25X (180p/270p) [EXPERIMENTAL] - + 0.5X (360p/540p) [EXPERIMENTAL] 0.5X (360p/540p) [EXPERIMENTAL] - + 0.75X (540p/810p) [EXPERIMENTAL] 0.75X (540p/810p) [EXPERIMENTAL] - + 1X (720p/1080p) 1X (720p/1080p) - + 1.25X (900p/1350p) [EXPERIMENTAL] 1.25X (900p/1350p) [EXPERIMENTAL] - + 1.5X (1080p/1620p) [EXPERIMENTAL] 1.5X (1080p/1620p) [EXPERIMENTAL] - + 2X (1440p/2160p) 2X (1440p/2160p) - + 3X (2160p/3240p) 3X (2160p/3240p) - + 4X (2880p/4320p) 4X (2880p/4320p) - + 5X (3600p/5400p) 5X (3600p/5400p) - + 6X (4320p/6480p) 6X (4320p/6480p) - + 7X (5040p/7560p) 7X (5040p/7560p) - + 8X (5760p/8640p) 8X (5760p/8640p) - + Nearest Neighbor Veí més proper - + Bilinear Bilineal - + Bicubic Bicúbic - + Gaussian Gaussià - + Lanczos Lanczos - + ScaleForce ScaleForce - + AMD FidelityFX Super Resolution Super resolució AMD FidelityFX - + Area Àrea - + MMPX MMPX - + Zero-Tangent Tangència zero - + B-Spline B-Spline - + Mitchell Mitchell - + Spline-1 Spline-1 - - + + None Cap - + FXAA FXAA - + SMAA SMAA - + Default (16:9) Valor predeterminat (16:9) - + Force 4:3 Forçar 4:3 - + Force 21:9 Forçar 21:9 - + Force 16:10 - + Stretch to Window Estirar a la finestra - + Automatic Automàtic - + 2x 2x - + 4x 4x - + 8x 8x - + 16x 16x - + 32x 32x - + 64x 64x - + Japanese (日本語) Japonès (日本語) - + American English Anglès americà - + French (français) Francès (français) - + German (Deutsch) Alemany (Deutsch) - + Italian (italiano) Italià (italiano) - + Spanish (español) Castellà (español) - + Chinese Xinès - + Korean (한국어) Coreà (한국어) - + Dutch (Nederlands) Holandès (Nederlands) - + Portuguese (português) Portuguès (português) - + Russian (Русский) Rus (Русский) - + Taiwanese Taiwanès - + British English Anglès britànic - + Canadian French Francès canadenc - + Latin American Spanish Espanyol llatinoamericà - + Simplified Chinese Xinès simplificat - + Traditional Chinese (正體中文) Xinès tradicional (正體中文) - + Brazilian Portuguese (português do Brasil) Portuguès brasiler (português do Brasil) - + Polish (polska) Polonès (polska) - + Thai (แบบไทย) Tailandès (แบบไทย) - - + + Japan Japó - + USA EUA - + Europe Europa - + Australia Austràlia - + China Xina - + Korea Corea - + Taiwan Taiwan - + Auto (%1) Auto select time zone Auto (%1) - + Default (%1) Default time zone Per defecte (%1) - + CET CET - + CST6CDT CST6CDT - + Cuba Cuba - + EET EET - + Egypt Egipte - + Eire Eire - + EST EST - + EST5EDT EST5EDT - + GB GB - + GB-Eire GB-Eire - + GMT GMT - + GMT+0 GMT+0 - + GMT-0 GMT-0 - + GMT0 GMT0 - + Greenwich Greenwich - + Hongkong Hong Kong - + HST HST - + Iceland Islàndia - + Iran Iran - + Israel Isreal - + Jamaica Jamaica - + Kwajalein Kwajalein - + Libya Líbia - + MET MET - + MST MST - + MST7MDT MST7MDT - + Navajo Navajo - + NZ NZ - + NZ-CHAT NZ-CHAT - + Poland Polònia - + Portugal Portugal - + PRC PRC - + PST8PDT PST8PDT - + ROC ROC - + ROK ROK - + Singapore Singapur - + Turkey Turquia - + UCT UCT - + Universal Universal - + UTC UTC - + W-SU W-SU - + WET WET - + Zulu Zulu - + Mono Mono - + Stereo Estèreo - + Surround Envoltant - + 4GB DRAM (Default) 4GB DRAM (Insegur) - + 6GB DRAM (Unsafe) 6GB DRAM (Insegur) - + 8GB DRAM 8GB DRAM - + 10GB DRAM (Unsafe) 10GB DRAM (Insegur) - + 12GB DRAM (Unsafe) 12GB DRAM (Insegur) - + Docked Sobretaula - + Handheld Portàtil - - + + Off - + Boost (1700MHz) - + Fast (2000MHz) - + Always ask (Default) - + Only if game specifies not to stop Tan sols si el joc especifica no parar - + Never ask No preguntar mai - - + + Medium (256) - - + + High (512) - + Very Small (16 MB) - + Small (32 MB) - + Normal (128 MB) - + Large (256 MB) - + Very Large (512 MB) - + Very Low (4 MB) - + Low (8 MB) - + Normal (16 MB) - + Medium (32 MB) - + High (64 MB) - + Very Low (32) - + Low (64) - + Normal (128) - + Disabled - + ExtendedDynamicState 1 - + ExtendedDynamicState 2 - + ExtendedDynamicState 3 - + Tree View - + Grid View @@ -5724,7 +5720,7 @@ Arrossegui els punts per a canviar la posició, o faci doble clic a les cel·les - + Deleting ANY data is IRREVERSABLE! @@ -5735,12 +5731,12 @@ Arrossegui els punts per a canviar la posició, o faci doble clic a les cel·les - UserNAND + User NAND - SysNAND + System NAND @@ -5787,7 +5783,7 @@ Arrossegui els punts per a canviar la posició, o faci doble clic a les cel·les - + Calculating... diff --git a/dist/languages/cs.ts b/dist/languages/cs.ts index e3b70766f3..14aa5503a4 100644 --- a/dist/languages/cs.ts +++ b/dist/languages/cs.ts @@ -767,23 +767,34 @@ This feature is experimental. - NVDEC emulation: + Use asynchronous GPU emulation + Uses an extra CPU thread for rendering. +This option should always remain enabled. + + + + + NVDEC emulation: + + + + Specifies how videos should be decoded. It can either use the CPU or the GPU for decoding, or perform no decoding at all (black screen on videos). In most cases, GPU decoding provides the best performance. - + ASTC Decoding Method: - + This option controls how ASTC textures should be decoded. CPU: Use the CPU for decoding. GPU: Use the GPU's compute shaders to decode ASTC textures (recommended). @@ -792,55 +803,55 @@ stuttering but may present artifacts. - + ASTC Recompression Method: - + Most GPUs lack support for ASTC textures and must decompress to anintermediate format: RGBA8. BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, saving VRAM but degrading image quality. - + Frame Pacing Mode (Vulkan only) - + Controls how the emulator manages frame pacing to reduce stuttering and make the frame rate smoother and more consistent. - + VRAM Usage Mode: - + Selects whether the emulator should prefer to conserve memory or make maximum usage of available video memory for performance. Aggressive mode may impact performance of other applications such as recording software. - + Skip CPU Inner Invalidation - + Skips certain cache invalidations during memory updates, reducing CPU usage and improving latency. This may cause soft-crashes. - + VSync Mode: - + FIFO (VSync) does not drop frames or exhibit tearing but is limited by the screen refresh rate. FIFO Relaxed allows tearing as it recovers from a slow down. Mailbox can have lower latency than FIFO and does not tear but may drop frames. @@ -848,1376 +859,1361 @@ Immediate (no synchronization) presents whatever is available and can exhibit te - + Sync Memory Operations - + Ensures data consistency between compute and memory operations. This option fixes issues in games, but may degrade performance. Unreal Engine 4 games often see the most significant changes thereof. - + Enable asynchronous presentation (Vulkan only) - + Slightly improves performance by moving presentation to a separate CPU thread. - + Force maximum clocks (Vulkan only) - + Runs work in the background while waiting for graphics commands to keep the GPU from lowering its clock speed. - + Anisotropic Filtering: Anizotropní filtrování: - + Controls the quality of texture rendering at oblique angles. Safe to set at 16x on most GPUs. - + GPU Mode: - + Controls the GPU emulation mode. Most games render fine with Fast or Balanced modes, but Accurate is still required for some. Particles tend to only render correctly with Accurate mode. - + DMA Accuracy: - + Controls the DMA precision accuracy. Safe precision fixes issues in some games but may degrade performance. - + Enable asynchronous shader compilation - + May reduce shader stutter. - + Fast GPU Time - + Overclocks the emulated GPU to increase dynamic resolution and render distance. Use 256 for maximal performance and 512 for maximal graphics fidelity. - + GPU Unswizzle - + Accelerates BCn 3D texture decoding using GPU compute. Disable if experiencing crashes or graphical glitches. - + GPU Unswizzle Max Texture Size - + Sets the maximum size (MiB) for GPU-based texture unswizzling. While the GPU is faster for medium and large textures, the CPU may be more efficient for very small ones. Adjust this to find the balance between GPU acceleration and CPU overhead. - + GPU Unswizzle Stream Size - + Sets the maximum amount of texture data (in MiB) processed per frame. Higher values can reduce stutter during texture loading but may impact frame consistency. - + GPU Unswizzle Chunk Size - + Determines the number of depth slices processed in a single dispatch. Increasing this can improve throughput on high-end GPUs but may cause TDR or driver timeouts on weaker hardware. - + Use Vulkan pipeline cache - + Enables GPU vendor-specific pipeline cache. This option can improve shader loading time significantly in cases where the Vulkan driver does not store pipeline cache files internally. - + Enable Compute Pipelines (Intel Vulkan Only) - + Required by some games. This setting only exists for Intel proprietary drivers and may crash if enabled. Compute pipelines are always enabled on all other drivers. - + Enable Reactive Flushing - + Uses reactive flushing instead of predictive flushing, allowing more accurate memory syncing. - + Sync to framerate of video playback - + Run the game at normal speed during video playback, even when the framerate is unlocked. - + Barrier feedback loops - + Improves rendering of transparency effects in specific games. - + Enable buffer history - + Enables access to previous buffer states. This option may improve rendering quality and performance consistency in some games. - + Fix bloom effects - + Removes bloom in Burnout. - + Enable Legacy Rescale Pass - + May fix rescale issues in some games by relying on behavior from the previous implementation. Legacy behavior workaround that fixes line artifacts on AMD and Intel GPUs, and grey texture flicker on Nvidia GPUs in Luigis Mansion 3. - + Extended Dynamic State - + Controls the number of features that can be used in Extended Dynamic State. Higher states allow for more features and can increase performance, but may cause additional graphical issues. - + Vertex Input Dynamic State - + Enables vertex input dynamic state feature for better quality and performance. - + Sample Shading - + Allows the fragment shader to execute per sample in a multi-sampled fragment instead of once per fragment. Improves graphics quality at the cost of performance. Higher values improve quality but degrade performance. - + RNG Seed RNG Seed - + Controls the seed of the random number generator. Mainly used for speedrunning. - + Device Name Název Zařízení - + The name of the console. - + Custom RTC Date: - + This option allows to change the clock of the console. Can be used to manipulate time in games. - + The number of seconds from the current unix time - + Language: Jazyk: - + This option can be overridden when region setting is auto-select - + Region: Region: - + The region of the console. - + Time Zone: Časové Pásmo: - + The time zone of the console. - + Sound Output Mode: - + Console Mode: - + Selects if the console is in Docked or Handheld mode. Games will change their resolution, details and supported controllers and depending on this setting. Setting to Handheld can help improve performance for low end systems. - - Unit Serial - - - - - Battery Serial - - - - - Debug knobs - - - - + Prompt for user profile on boot - + Useful if multiple people use the same PC. - + Pause when not in focus - + Pauses emulation when focusing on other windows. - + Confirm before stopping emulation Potvrzení před zastavením emulace - + Overrides prompts asking to confirm stopping the emulation. Enabling it bypasses such prompts and directly exits the emulation. - + Hide mouse on inactivity Skrýt myš při neaktivitě - + Hides the mouse after 2.5s of inactivity. - + Disable controller applet - + Forcibly disables the use of the controller applet in emulated programs. When a program attempts to open the controller applet, it is immediately closed. - + Check for updates - + Whether or not to check for updates upon startup. - + Enable Gamemode - + Force X11 as Graphics Backend - + Custom frontend - + Real applet - + Never - + On Load - + Always - + CPU CPU - + GPU - + CPU Asynchronous - + Uncompressed (Best quality) - + BC1 (Low quality) - + BC3 (Medium quality) - - + + Auto Automatické - + 30 FPS - + 60 FPS - + 90 FPS - + 120 FPS - + Conservative - + Aggressive - + Vulkan Vulkan - + OpenGL GLSL - + OpenGL GLASM (Assembly Shaders, NVIDIA Only) - + OpenGL SPIR-V (Experimental, AMD/Mesa Only) - + Null - + Fast - + Balanced - - + + Accurate Přesné - - + + Default Výchozí - + Unsafe (fast) - + Safe (stable) - + Unsafe Nebezpečné - + Paranoid (disables most optimizations) Paranoidní (zakáže většinu optimizací) - + Debugging - + Dynarmic - + NCE - + Borderless Windowed Okno bez okrajů - + Exclusive Fullscreen Exkluzivní - + No Video Output - + CPU Video Decoding - + GPU Video Decoding (Default) - + 0.25X (180p/270p) [EXPERIMENTAL] - + 0.5X (360p/540p) [EXPERIMENTAL] - + 0.75X (540p/810p) [EXPERIMENTAL] - + 1X (720p/1080p) 1X (720p/1080p) - + 1.25X (900p/1350p) [EXPERIMENTAL] - + 1.5X (1080p/1620p) [EXPERIMENTAL] - + 2X (1440p/2160p) - + 3X (2160p/3240p) - + 4X (2880p/4320p) - + 5X (3600p/5400p) - + 6X (4320p/6480p) - + 7X (5040p/7560p) - + 8X (5760p/8640p) - + Nearest Neighbor - + Bilinear Bilineární - + Bicubic - + Gaussian - + Lanczos - + ScaleForce - + AMD FidelityFX Super Resolution - + Area - + MMPX - + Zero-Tangent - + B-Spline - + Mitchell - + Spline-1 - - + + None Žádné - + FXAA FXAA - + SMAA SMAA - + Default (16:9) Výchozí (16:9) - + Force 4:3 Vynutit 4:3 - + Force 21:9 Vynutit 21:9 - + Force 16:10 - + Stretch to Window Roztáhnout podle okna - + Automatic - + 2x 2x - + 4x 4x - + 8x 8x - + 16x 16x - + 32x - + 64x - + Japanese (日本語) Japonština (日本語) - + American English - + French (français) Francouzština (français) - + German (Deutsch) Nemčina (Deutsch) - + Italian (italiano) Italština (Italiano) - + Spanish (español) Španělština (español) - + Chinese Čínština - + Korean (한국어) Korejština (한국어) - + Dutch (Nederlands) Holandština (Nederlands) - + Portuguese (português) Portugalština (português) - + Russian (Русский) Ruština (Русский) - + Taiwanese Tajwanština - + British English Britská Angličtina - + Canadian French Kanadská Francouzština - + Latin American Spanish Latinsko Americká Španělština - + Simplified Chinese Zjednodušená Čínština - + Traditional Chinese (正體中文) Tradiční Čínština (正體中文) - + Brazilian Portuguese (português do Brasil) Brazilská Portugalština (português do Brasil) - + Polish (polska) - + Thai (แบบไทย) - - + + Japan Japonsko - + USA USA - + Europe Evropa - + Australia Austrálie - + China Čína - + Korea Korea - + Taiwan Taiwan - + Auto (%1) Auto select time zone - + Default (%1) Default time zone - + CET CET - + CST6CDT CST6CDT - + Cuba Cuba - + EET EET - + Egypt Egypt - + Eire Eire - + EST EST - + EST5EDT EST5EDT - + GB GB - + GB-Eire GB-Eire - + GMT GMT - + GMT+0 GMT+0 - + GMT-0 GMT-0 - + GMT0 GMT0 - + Greenwich Greenwich - + Hongkong Hongkong - + HST HST - + Iceland Island - + Iran Iran - + Israel Israel - + Jamaica Jamajka - + Kwajalein Kwajalein - + Libya Lybie - + MET MET - + MST MST - + MST7MDT MST7MDT - + Navajo Navajo - + NZ NZ - + NZ-CHAT NZ-CHAT - + Poland Polsko - + Portugal Portugalsko - + PRC PRC - + PST8PDT PST8PDT - + ROC ROC - + ROK ROK - + Singapore Singapur - + Turkey Turecko - + UCT UCT - + Universal Univerzální - + UTC UTC - + W-SU W-SU - + WET WET - + Zulu Zulu - + Mono Mono - + Stereo Stereo - + Surround Surround - + 4GB DRAM (Default) - + 6GB DRAM (Unsafe) - + 8GB DRAM - + 10GB DRAM (Unsafe) - + 12GB DRAM (Unsafe) - + Docked Zadokovaná - + Handheld Příruční - - + + Off - + Boost (1700MHz) - + Fast (2000MHz) - + Always ask (Default) Vždy se zeptat (Výchozí) - + Only if game specifies not to stop - + Never ask + + + + Medium (256) + + - Medium (256) - - - - - High (512) - + Very Small (16 MB) - + Small (32 MB) - + Normal (128 MB) - + Large (256 MB) - + Very Large (512 MB) - + Very Low (4 MB) - + Low (8 MB) - + Normal (16 MB) - + Medium (32 MB) - + High (64 MB) - + Very Low (32) - + Low (64) - + Normal (128) - + Disabled - + ExtendedDynamicState 1 - + ExtendedDynamicState 2 - + ExtendedDynamicState 3 - + Tree View - + Grid View @@ -5715,7 +5711,7 @@ Táhněte body pro změnu pozice nebo dvojitě klikněte na buňky tabulky pro z - + Deleting ANY data is IRREVERSABLE! @@ -5726,12 +5722,12 @@ Táhněte body pro změnu pozice nebo dvojitě klikněte na buňky tabulky pro z - UserNAND + User NAND - SysNAND + System NAND @@ -5778,7 +5774,7 @@ Táhněte body pro změnu pozice nebo dvojitě klikněte na buňky tabulky pro z - + Calculating... diff --git a/dist/languages/da.ts b/dist/languages/da.ts index 80acf90c5c..bd3478d2af 100644 --- a/dist/languages/da.ts +++ b/dist/languages/da.ts @@ -769,23 +769,34 @@ This feature is experimental. + Use asynchronous GPU emulation + + + + + Uses an extra CPU thread for rendering. +This option should always remain enabled. + + + + NVDEC emulation: NVDEC-emulering: - + Specifies how videos should be decoded. It can either use the CPU or the GPU for decoding, or perform no decoding at all (black screen on videos). In most cases, GPU decoding provides the best performance. - + ASTC Decoding Method: - + This option controls how ASTC textures should be decoded. CPU: Use the CPU for decoding. GPU: Use the GPU's compute shaders to decode ASTC textures (recommended). @@ -794,55 +805,55 @@ stuttering but may present artifacts. - + ASTC Recompression Method: - + Most GPUs lack support for ASTC textures and must decompress to anintermediate format: RGBA8. BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, saving VRAM but degrading image quality. - + Frame Pacing Mode (Vulkan only) - + Controls how the emulator manages frame pacing to reduce stuttering and make the frame rate smoother and more consistent. - + VRAM Usage Mode: - + Selects whether the emulator should prefer to conserve memory or make maximum usage of available video memory for performance. Aggressive mode may impact performance of other applications such as recording software. - + Skip CPU Inner Invalidation - + Skips certain cache invalidations during memory updates, reducing CPU usage and improving latency. This may cause soft-crashes. - + VSync Mode: - + FIFO (VSync) does not drop frames or exhibit tearing but is limited by the screen refresh rate. FIFO Relaxed allows tearing as it recovers from a slow down. Mailbox can have lower latency than FIFO and does not tear but may drop frames. @@ -850,1376 +861,1361 @@ Immediate (no synchronization) presents whatever is available and can exhibit te - + Sync Memory Operations - + Ensures data consistency between compute and memory operations. This option fixes issues in games, but may degrade performance. Unreal Engine 4 games often see the most significant changes thereof. - + Enable asynchronous presentation (Vulkan only) - + Slightly improves performance by moving presentation to a separate CPU thread. - + Force maximum clocks (Vulkan only) - + Runs work in the background while waiting for graphics commands to keep the GPU from lowering its clock speed. - + Anisotropic Filtering: Anisotropisk Filtrering: - + Controls the quality of texture rendering at oblique angles. Safe to set at 16x on most GPUs. - + GPU Mode: - + Controls the GPU emulation mode. Most games render fine with Fast or Balanced modes, but Accurate is still required for some. Particles tend to only render correctly with Accurate mode. - + DMA Accuracy: - + Controls the DMA precision accuracy. Safe precision fixes issues in some games but may degrade performance. - + Enable asynchronous shader compilation - + May reduce shader stutter. - + Fast GPU Time - + Overclocks the emulated GPU to increase dynamic resolution and render distance. Use 256 for maximal performance and 512 for maximal graphics fidelity. - + GPU Unswizzle - + Accelerates BCn 3D texture decoding using GPU compute. Disable if experiencing crashes or graphical glitches. - + GPU Unswizzle Max Texture Size - + Sets the maximum size (MiB) for GPU-based texture unswizzling. While the GPU is faster for medium and large textures, the CPU may be more efficient for very small ones. Adjust this to find the balance between GPU acceleration and CPU overhead. - + GPU Unswizzle Stream Size - + Sets the maximum amount of texture data (in MiB) processed per frame. Higher values can reduce stutter during texture loading but may impact frame consistency. - + GPU Unswizzle Chunk Size - + Determines the number of depth slices processed in a single dispatch. Increasing this can improve throughput on high-end GPUs but may cause TDR or driver timeouts on weaker hardware. - + Use Vulkan pipeline cache - + Enables GPU vendor-specific pipeline cache. This option can improve shader loading time significantly in cases where the Vulkan driver does not store pipeline cache files internally. - + Enable Compute Pipelines (Intel Vulkan Only) - + Required by some games. This setting only exists for Intel proprietary drivers and may crash if enabled. Compute pipelines are always enabled on all other drivers. - + Enable Reactive Flushing - + Uses reactive flushing instead of predictive flushing, allowing more accurate memory syncing. - + Sync to framerate of video playback - + Run the game at normal speed during video playback, even when the framerate is unlocked. - + Barrier feedback loops - + Improves rendering of transparency effects in specific games. - + Enable buffer history - + Enables access to previous buffer states. This option may improve rendering quality and performance consistency in some games. - + Fix bloom effects - + Removes bloom in Burnout. - + Enable Legacy Rescale Pass - + May fix rescale issues in some games by relying on behavior from the previous implementation. Legacy behavior workaround that fixes line artifacts on AMD and Intel GPUs, and grey texture flicker on Nvidia GPUs in Luigis Mansion 3. - + Extended Dynamic State - + Controls the number of features that can be used in Extended Dynamic State. Higher states allow for more features and can increase performance, but may cause additional graphical issues. - + Vertex Input Dynamic State - + Enables vertex input dynamic state feature for better quality and performance. - + Sample Shading - + Allows the fragment shader to execute per sample in a multi-sampled fragment instead of once per fragment. Improves graphics quality at the cost of performance. Higher values improve quality but degrade performance. - + RNG Seed RNG-Seed - + Controls the seed of the random number generator. Mainly used for speedrunning. - + Device Name - + The name of the console. - + Custom RTC Date: - + This option allows to change the clock of the console. Can be used to manipulate time in games. - + The number of seconds from the current unix time - + Language: - + This option can be overridden when region setting is auto-select - + Region: Region - + The region of the console. - + Time Zone: Tidszone - + The time zone of the console. - + Sound Output Mode: - + Console Mode: - + Selects if the console is in Docked or Handheld mode. Games will change their resolution, details and supported controllers and depending on this setting. Setting to Handheld can help improve performance for low end systems. - - Unit Serial - - - - - Battery Serial - - - - - Debug knobs - - - - + Prompt for user profile on boot - + Useful if multiple people use the same PC. - + Pause when not in focus - + Pauses emulation when focusing on other windows. - + Confirm before stopping emulation - + Overrides prompts asking to confirm stopping the emulation. Enabling it bypasses such prompts and directly exits the emulation. - + Hide mouse on inactivity Skjul mus ved inaktivitet - + Hides the mouse after 2.5s of inactivity. - + Disable controller applet - + Forcibly disables the use of the controller applet in emulated programs. When a program attempts to open the controller applet, it is immediately closed. - + Check for updates - + Whether or not to check for updates upon startup. - + Enable Gamemode - + Force X11 as Graphics Backend - + Custom frontend - + Real applet - + Never - + On Load - + Always - + CPU CPU - + GPU - + CPU Asynchronous - + Uncompressed (Best quality) - + BC1 (Low quality) - + BC3 (Medium quality) - - + + Auto Automatisk - + 30 FPS - + 60 FPS - + 90 FPS - + 120 FPS - + Conservative - + Aggressive - + Vulkan - + OpenGL GLSL - + OpenGL GLASM (Assembly Shaders, NVIDIA Only) - + OpenGL SPIR-V (Experimental, AMD/Mesa Only) - + Null - + Fast - + Balanced - - + + Accurate Nøjagtig - - + + Default Standard - + Unsafe (fast) - + Safe (stable) - + Unsafe Usikker - + Paranoid (disables most optimizations) Paranoid (deaktiverer de fleste optimeringer) - + Debugging - + Dynarmic - + NCE - + Borderless Windowed Uindrammet Vindue - + Exclusive Fullscreen Eksklusiv Fuld Skærm - + No Video Output Ingen Video-Output - + CPU Video Decoding CPU-Video Afkodning - + GPU Video Decoding (Default) GPU-Video Afkodning (Standard) - + 0.25X (180p/270p) [EXPERIMENTAL] - + 0.5X (360p/540p) [EXPERIMENTAL] - + 0.75X (540p/810p) [EXPERIMENTAL] 0,75X (540p/810p) [EKSPERIMENTEL] - + 1X (720p/1080p) 1X (720p/1080p) - + 1.25X (900p/1350p) [EXPERIMENTAL] - + 1.5X (1080p/1620p) [EXPERIMENTAL] - + 2X (1440p/2160p) 2X (1440p/2160p) - + 3X (2160p/3240p) 3X (2160p/3240p) - + 4X (2880p/4320p) 4X (2880p/4320p) - + 5X (3600p/5400p) 5X (3600p/5400p) - + 6X (4320p/6480p) 6X (4320p/6480p) - + 7X (5040p/7560p) - + 8X (5760p/8640p) - + Nearest Neighbor Nærmeste Nabo - + Bilinear Bilineær - + Bicubic Bikubisk - + Gaussian Gausisk - + Lanczos - + ScaleForce ScaleForce - + AMD FidelityFX Super Resolution - + Area - + MMPX - + Zero-Tangent - + B-Spline - + Mitchell - + Spline-1 - - + + None Ingen - + FXAA FXAA - + SMAA - + Default (16:9) Standard (16:9) - + Force 4:3 Tving 4:3 - + Force 21:9 Tving 21:9 - + Force 16:10 - + Stretch to Window Stræk til Vindue - + Automatic - + 2x - + 4x - + 8x - + 16x - + 32x - + 64x - + Japanese (日本語) Japansk (日本語) - + American English - + French (français) Fransk (français) - + German (Deutsch) Tysk (Deutsch) - + Italian (italiano) Italiensk (italiano) - + Spanish (español) Spansk (español) - + Chinese Kinesisk - + Korean (한국어) Koreansk (한국어) - + Dutch (Nederlands) Hollandsk (Nederlands) - + Portuguese (português) Portugisisk (português) - + Russian (Русский) Russisk (Русский) - + Taiwanese Taiwanesisk - + British English Britisk Engelsk - + Canadian French Candadisk Fransk - + Latin American Spanish Latinamerikansk Spansk - + Simplified Chinese Forenklet Kinesisk - + Traditional Chinese (正體中文) Traditionelt Kinesisk (正體中文) - + Brazilian Portuguese (português do Brasil) Braziliansk Portugisisk (português do Brasil) - + Polish (polska) - + Thai (แบบไทย) - - + + Japan Japan - + USA USA - + Europe Europa - + Australia Australien - + China Kina - + Korea Korea - + Taiwan Taiwan - + Auto (%1) Auto select time zone - + Default (%1) Default time zone - + CET CET - + CST6CDT CST6CDT - + Cuba Cuba - + EET EET - + Egypt Ægypten - + Eire Eire - + EST EST - + EST5EDT EST5EDT - + GB GB - + GB-Eire GB-Eire - + GMT GMT - + GMT+0 GMT+0 - + GMT-0 GMT-0 - + GMT0 GMT0 - + Greenwich Greenwich - + Hongkong Hongkong - + HST HST - + Iceland Island - + Iran Iran - + Israel Israel - + Jamaica Jamaica - + Kwajalein Kwajalein - + Libya Libyen - + MET MET - + MST MST - + MST7MDT MST7MDT - + Navajo Navajo - + NZ NZ - + NZ-CHAT NZ-CHAT - + Poland Polen - + Portugal Portugal - + PRC PRC - + PST8PDT PST8PDT - + ROC ROC - + ROK ROK - + Singapore Singapore - + Turkey Tyrkiet - + UCT UCT - + Universal Universel - + UTC UTC - + W-SU W-SU - + WET WET - + Zulu Zulu - + Mono Mono - + Stereo Stereo - + Surround Surround - + 4GB DRAM (Default) - + 6GB DRAM (Unsafe) - + 8GB DRAM - + 10GB DRAM (Unsafe) - + 12GB DRAM (Unsafe) - + Docked Dokket - + Handheld Håndholdt - - + + Off - + Boost (1700MHz) - + Fast (2000MHz) - + Always ask (Default) - + Only if game specifies not to stop - + Never ask + + + + Medium (256) + + - Medium (256) - - - - - High (512) - + Very Small (16 MB) - + Small (32 MB) - + Normal (128 MB) - + Large (256 MB) - + Very Large (512 MB) - + Very Low (4 MB) - + Low (8 MB) - + Normal (16 MB) - + Medium (32 MB) - + High (64 MB) - + Very Low (32) - + Low (64) - + Normal (128) - + Disabled - + ExtendedDynamicState 1 - + ExtendedDynamicState 2 - + ExtendedDynamicState 3 - + Tree View - + Grid View @@ -5723,7 +5719,7 @@ Træk punkter, for at skifte position, eller dobbeltklik i tabelceller, for at r - + Deleting ANY data is IRREVERSABLE! @@ -5734,12 +5730,12 @@ Træk punkter, for at skifte position, eller dobbeltklik i tabelceller, for at r - UserNAND + User NAND - SysNAND + System NAND @@ -5786,7 +5782,7 @@ Træk punkter, for at skifte position, eller dobbeltklik i tabelceller, for at r - + Calculating... diff --git a/dist/languages/de.ts b/dist/languages/de.ts index f5f542ce42..7e2f73180d 100644 --- a/dist/languages/de.ts +++ b/dist/languages/de.ts @@ -773,23 +773,34 @@ This feature is experimental. + Use asynchronous GPU emulation + + + + + Uses an extra CPU thread for rendering. +This option should always remain enabled. + + + + NVDEC emulation: NVDEC-Emulation: - + Specifies how videos should be decoded. It can either use the CPU or the GPU for decoding, or perform no decoding at all (black screen on videos). In most cases, GPU decoding provides the best performance. - + ASTC Decoding Method: ASTC-Dekodier-Methode: - + This option controls how ASTC textures should be decoded. CPU: Use the CPU for decoding. GPU: Use the GPU's compute shaders to decode ASTC textures (recommended). @@ -798,55 +809,55 @@ stuttering but may present artifacts. - + ASTC Recompression Method: ASTC-Rekompression-Methode: - + Most GPUs lack support for ASTC textures and must decompress to anintermediate format: RGBA8. BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, saving VRAM but degrading image quality. - + Frame Pacing Mode (Vulkan only) - + Controls how the emulator manages frame pacing to reduce stuttering and make the frame rate smoother and more consistent. - + VRAM Usage Mode: VRAM-Nutzungs Modus: - + Selects whether the emulator should prefer to conserve memory or make maximum usage of available video memory for performance. Aggressive mode may impact performance of other applications such as recording software. - + Skip CPU Inner Invalidation CPU-interne Invalidierung überspringen - + Skips certain cache invalidations during memory updates, reducing CPU usage and improving latency. This may cause soft-crashes. Überspringt bestimmte Cache-Invalidierungen auf CPU-Seite während Speicherupdates, reduziert die CPU-Auslastung und verbessert die Leistung. Dies verursacht vielleicht Abstürze. - + VSync Mode: VSync-Modus: - + FIFO (VSync) does not drop frames or exhibit tearing but is limited by the screen refresh rate. FIFO Relaxed allows tearing as it recovers from a slow down. Mailbox can have lower latency than FIFO and does not tear but may drop frames. @@ -854,109 +865,109 @@ Immediate (no synchronization) presents whatever is available and can exhibit te - + Sync Memory Operations Speicheroperationen synchronisieren - + Ensures data consistency between compute and memory operations. This option fixes issues in games, but may degrade performance. Unreal Engine 4 games often see the most significant changes thereof. - + Enable asynchronous presentation (Vulkan only) Aktiviere asynchrone Präsentation (Nur Vulkan) - + Slightly improves performance by moving presentation to a separate CPU thread. - + Force maximum clocks (Vulkan only) Erzwinge Maximale Taktrate (Vulkan only) - + Runs work in the background while waiting for graphics commands to keep the GPU from lowering its clock speed. Lässt im Hintergrund die GPU Aufgaben erledigen während diese auf Grafikbefehle wartet, damit diese nicht herunter taktet. - + Anisotropic Filtering: Anisotrope Filterung: - + Controls the quality of texture rendering at oblique angles. Safe to set at 16x on most GPUs. - + GPU Mode: GPU-Modus: - + Controls the GPU emulation mode. Most games render fine with Fast or Balanced modes, but Accurate is still required for some. Particles tend to only render correctly with Accurate mode. Steuert den GPU-Emulationsmodus. Die meisten Spiele werden im Modus Schnell oder Ausgeglichen gut gerendert, für einige ist jedoch weiterhin der Modus Akkurat erforderlich. Partikel werden in der Regel nur im Modus Akkurat korrekt gerendert. - + DMA Accuracy: DMA-Genauigkeit: - + Controls the DMA precision accuracy. Safe precision fixes issues in some games but may degrade performance. - + Enable asynchronous shader compilation Aktiviere asynchrones Shader-Kompilieren - + May reduce shader stutter. Reduziert vielleicht Shader stottern. - + Fast GPU Time Schnelle GPU-Zeit - + Overclocks the emulated GPU to increase dynamic resolution and render distance. Use 256 for maximal performance and 512 for maximal graphics fidelity. - + GPU Unswizzle GPU-Unswizzle - + Accelerates BCn 3D texture decoding using GPU compute. Disable if experiencing crashes or graphical glitches. - + GPU Unswizzle Max Texture Size GPU-Unswizzle max. Texturgröße - + Sets the maximum size (MiB) for GPU-based texture unswizzling. While the GPU is faster for medium and large textures, the CPU may be more efficient for very small ones. Adjust this to find the balance between GPU acceleration and CPU overhead. @@ -965,45 +976,45 @@ Während die GPU für mittelgroße und große Texturen schneller ist, kann die C Passen Sie diesen Wert an, um das Gleichgewicht zwischen GPU-Beschleunigung und CPU-Overhead zu finden. - + GPU Unswizzle Stream Size GPU-Unswizzle-Streamgröße - + Sets the maximum amount of texture data (in MiB) processed per frame. Higher values can reduce stutter during texture loading but may impact frame consistency. - + GPU Unswizzle Chunk Size GPU-Unswizzle Chunk-Größe - + Determines the number of depth slices processed in a single dispatch. Increasing this can improve throughput on high-end GPUs but may cause TDR or driver timeouts on weaker hardware. - + Use Vulkan pipeline cache Vulkan-Pipeline-Cache verwenden - + Enables GPU vendor-specific pipeline cache. This option can improve shader loading time significantly in cases where the Vulkan driver does not store pipeline cache files internally. - + Enable Compute Pipelines (Intel Vulkan Only) Aktiviere Compute-Pipelines (Nur Intel Vulkan) - + Required by some games. This setting only exists for Intel proprietary drivers and may crash if enabled. Compute pipelines are always enabled on all other drivers. @@ -1012,1223 +1023,1208 @@ Diese Einstellung ist nur für proprietäre Intel-Treiber und kann bei Aktivieru Bei allen anderen Treibern sind Compute-Pipelines immer aktiviert - + Enable Reactive Flushing Aktiviere Reactives Flushing - + Uses reactive flushing instead of predictive flushing, allowing more accurate memory syncing. Benutzt Reactive-Flushing anstatt Predictive-Flushing, welches akkurateres Speicher-Synchronisieren erlaubt. - + Sync to framerate of video playback Synchronisiere mit Bildrate von Video-Wiedergaben - + Run the game at normal speed during video playback, even when the framerate is unlocked. Lasse das Spiel in der normalen Geschwindigkeit abspielen, trotz freigeschalteter Bildrate (FPS) - + Barrier feedback loops Barrier-Feedback-Loops - + Improves rendering of transparency effects in specific games. Verbessert das Rendering von Transparenzeffekten in bestimmten Spielen. - + Enable buffer history Aktiviere Puffer Verlauf - + Enables access to previous buffer states. This option may improve rendering quality and performance consistency in some games. - + Fix bloom effects Behebt Boomeffekte - + Removes bloom in Burnout. Entfernt Bloom in Burnout. - + Enable Legacy Rescale Pass - + May fix rescale issues in some games by relying on behavior from the previous implementation. Legacy behavior workaround that fixes line artifacts on AMD and Intel GPUs, and grey texture flicker on Nvidia GPUs in Luigis Mansion 3. - + Extended Dynamic State - + Controls the number of features that can be used in Extended Dynamic State. Higher states allow for more features and can increase performance, but may cause additional graphical issues. - + Vertex Input Dynamic State - + Enables vertex input dynamic state feature for better quality and performance. - + Sample Shading - + Allows the fragment shader to execute per sample in a multi-sampled fragment instead of once per fragment. Improves graphics quality at the cost of performance. Higher values improve quality but degrade performance. - + RNG Seed RNG-Seed - + Controls the seed of the random number generator. Mainly used for speedrunning. - + Device Name Gerätename - + The name of the console. Der Name der Konsole. - + Custom RTC Date: Benutzerdefinierte Echtzeituhrdatum: - + This option allows to change the clock of the console. Can be used to manipulate time in games. Diese Option erlaubt die Änderung der Uhr der Konsole. Kann benutzt werden um Zeit in Spielen zu manipulieren. - + The number of seconds from the current unix time - + Language: Sprache: - + This option can be overridden when region setting is auto-select Diese Einstellung kann überschrieben werden, falls deine Region auf Automatisch eingestellt ist. - + Region: Region: - + The region of the console. Die Region der Konsole. - + Time Zone: Zeitzone: - + The time zone of the console. Die Zeitzone der Konsole. - + Sound Output Mode: Tonausgangsmodus: - + Console Mode: Konsolenmodus: - + Selects if the console is in Docked or Handheld mode. Games will change their resolution, details and supported controllers and depending on this setting. Setting to Handheld can help improve performance for low end systems. - - Unit Serial - - - - - Battery Serial - - - - - Debug knobs - - - - + Prompt for user profile on boot Beim Start nach Nutzer fragen - + Useful if multiple people use the same PC. Nützlich falls mehrere Personen den gleichen Computer benutzen. - + Pause when not in focus Pausiere falls nicht im Fokus - + Pauses emulation when focusing on other windows. Pausiere Emulation falls andere Fenster im Fokus/Vordergrund sind. - + Confirm before stopping emulation Vor dem Stoppen der Emulation bestätigen - + Overrides prompts asking to confirm stopping the emulation. Enabling it bypasses such prompts and directly exits the emulation. - + Hide mouse on inactivity Mauszeiger verstecken - + Hides the mouse after 2.5s of inactivity. Den Mauszeiger nach 2,5 Sekunden Inaktivität verstecken. - + Disable controller applet Deaktiviere Controller-Applet - + Forcibly disables the use of the controller applet in emulated programs. When a program attempts to open the controller applet, it is immediately closed. - + Check for updates Auf Updates überprüfen - + Whether or not to check for updates upon startup. Ob nach Updates während des Startens gesucht werden soll. - + Enable Gamemode GameMode aktivieren - + Force X11 as Graphics Backend - + Custom frontend Benutzerdefinierte Frontend - + Real applet Echtes Applet - + Never Niemals - + On Load Beim Laden - + Always Immer - + CPU CPU - + GPU GPU - + CPU Asynchronous CPU Asynchron - + Uncompressed (Best quality) Unkomprimiert (Beste Qualität) - + BC1 (Low quality) BC1 (Niedrige Qualität) - + BC3 (Medium quality) BC3 (Mittlere Qualität) - - + + Auto Auto - + 30 FPS 30 FPS - + 60 FPS 60 FPS - + 90 FPS 90 FPS - + 120 FPS 120 FPS - + Conservative Konservativ - + Aggressive Aggressiv - + Vulkan Vulkan - + OpenGL GLSL - + OpenGL GLASM (Assembly Shaders, NVIDIA Only) - + OpenGL SPIR-V (Experimental, AMD/Mesa Only) - + Null Null - + Fast Schnell - + Balanced Ausgeglichen - - + + Accurate Akkurat - - + + Default Standard - + Unsafe (fast) Unsicher (schnell) - + Safe (stable) Sicher (stabil) - + Unsafe Unsicher - + Paranoid (disables most optimizations) Paranoid (deaktiviert die meisten Optimierungen) - + Debugging Debugging - + Dynarmic Dynarmic - + NCE NCE - + Borderless Windowed Rahmenloses Fenster - + Exclusive Fullscreen Exklusiver Vollbildmodus - + No Video Output Keine Videoausgabe - + CPU Video Decoding CPU Video Dekodierung - + GPU Video Decoding (Default) GPU Video Dekodierung (Standard) - + 0.25X (180p/270p) [EXPERIMENTAL] 0.25X (180p/270p) [EXPERIMENTELL] - + 0.5X (360p/540p) [EXPERIMENTAL] 0,5X (360p/540p) [EXPERIMENTELL] - + 0.75X (540p/810p) [EXPERIMENTAL] 0,75X (540p/810p) [EXPERIMENTELL] - + 1X (720p/1080p) 1X (720p/1080p) - + 1.25X (900p/1350p) [EXPERIMENTAL] 1.25X (900p/1350p) [EXPERIMENTELL] - + 1.5X (1080p/1620p) [EXPERIMENTAL] 1,5X (1080p/1620p) [EXPERIMENTELL] - + 2X (1440p/2160p) 2X (1440p/2160p) - + 3X (2160p/3240p) 3X (2160p/3240p) - + 4X (2880p/4320p) 4X (2880p/4320p) - + 5X (3600p/5400p) 5X (3600p/5400p) - + 6X (4320p/6480p) 6X (4320p/6480p) - + 7X (5040p/7560p) 7X (5040p/7560p) - + 8X (5760p/8640p) 8X (5760p/8640p) - + Nearest Neighbor Nearest-Neighbor - + Bilinear Bilinear - + Bicubic Bikubisch - + Gaussian Gaussian - + Lanczos - + ScaleForce ScaleForce - + AMD FidelityFX Super Resolution - + Area - + MMPX - + Zero-Tangent - + B-Spline - + Mitchell - + Spline-1 - - + + None Keiner - + FXAA FXAA - + SMAA SMAA - + Default (16:9) Standard (16:9) - + Force 4:3 Erzwinge 4:3 - + Force 21:9 Erzwinge 21:9 - + Force 16:10 Erzwinge 16:10 - + Stretch to Window Auf Fenster anpassen - + Automatic Automatisch - + 2x 2x - + 4x 4x - + 8x 8x - + 16x 16x - + 32x - + 64x - + Japanese (日本語) Japanisch (日本語) - + American English Amerikanisches Englisch - + French (français) Französisch (français) - + German (Deutsch) Deutsch (German) - + Italian (italiano) Italienisch (italiano) - + Spanish (español) Spanisch (español) - + Chinese Chinesisch - + Korean (한국어) Koreanisch (한국어) - + Dutch (Nederlands) Niederländisch (Nederlands) - + Portuguese (português) Portugiesisch (português) - + Russian (Русский) Russisch (Русский) - + Taiwanese Taiwanesisch - + British English Britisches Englisch - + Canadian French Kanadisches Französisch - + Latin American Spanish Lateinamerikanisches Spanisch - + Simplified Chinese Vereinfachtes Chinesisch - + Traditional Chinese (正體中文) Traditionelles Chinesisch (正體中文) - + Brazilian Portuguese (português do Brasil) Brasilianisches Portugiesisch (português do Brasil) - + Polish (polska) - + Thai (แบบไทย) - - + + Japan Japan - + USA USA - + Europe Europa - + Australia Australien - + China China - + Korea Korea - + Taiwan Taiwan - + Auto (%1) Auto select time zone Automatisch (%1) - + Default (%1) Default time zone Standard (%1) - + CET CET - + CST6CDT CST6CDT - + Cuba Kuba - + EET EET - + Egypt Ägypten - + Eire Eire - + EST EST - + EST5EDT EST5EDT - + GB GB - + GB-Eire GB-Eire - + GMT GMT - + GMT+0 GMT+0 - + GMT-0 GMT-0 - + GMT0 GMT0 - + Greenwich Greenwich - + Hongkong Hongkong - + HST HST - + Iceland Island - + Iran Iran - + Israel Israel - + Jamaica Jamaika - + Kwajalein Kwajalein - + Libya Libyen - + MET MET - + MST MST - + MST7MDT MST7MDT - + Navajo Navajo - + NZ NZ - + NZ-CHAT NZ-CHAT - + Poland Polen - + Portugal Portugal - + PRC PRC - + PST8PDT PST8PDT - + ROC ROC - + ROK ROK - + Singapore Singapur - + Turkey Türkei - + UCT UCT - + Universal Universal - + UTC UTC - + W-SU W-SU - + WET WET - + Zulu Zulu - + Mono Mono - + Stereo Stereo - + Surround Surround - + 4GB DRAM (Default) 4GB DRAM (Standard) - + 6GB DRAM (Unsafe) 6GB DRAM (Unsicher) - + 8GB DRAM 8GB DRAM - + 10GB DRAM (Unsafe) 10GB DRAM (Unsicher) - + 12GB DRAM (Unsafe) 12GB DRAM (Unsicher) - + Docked Im Dock - + Handheld Handheld - - + + Off Aus - + Boost (1700MHz) Boost (1700MHz) - + Fast (2000MHz) Schnell (2000MHz) - + Always ask (Default) Immer fragen (Standard) - + Only if game specifies not to stop Nur wenn ein Spiel vorgibt, nicht zu stoppen - + Never ask Niemals fragen - - + + Medium (256) Mittel (256) - - + + High (512) Hoch (512) - + Very Small (16 MB) Sehr klein (16 MB) - + Small (32 MB) Klein (32 MB) - + Normal (128 MB) Normal (128 MB) - + Large (256 MB) Groß (256 MB) - + Very Large (512 MB) Sehr groß (512 MB) - + Very Low (4 MB) Sehr niedrig (4 MB) - + Low (8 MB) Niedrig (8 MB) - + Normal (16 MB) Normal (16 MB) - + Medium (32 MB) Mittel (32 MB) - + High (64 MB) Hoch (64 MB) - + Very Low (32) Sehr niedrig (32) - + Low (64) Niedrig (64) - + Normal (128) Normal (128) - + Disabled Deaktiviert - + ExtendedDynamicState 1 - + ExtendedDynamicState 2 - + ExtendedDynamicState 3 - + Tree View Baum Ansicht - + Grid View Raster Ansicht @@ -5738,7 +5734,7 @@ Ziehe die Punkte mit deiner Maus, um ihre Position zu ändern. Doppelklicke auf Datenmanager - + Deleting ANY data is IRREVERSABLE! Das Löschen JEGLICHER Daten ist UNUMKEHRBAR! @@ -5749,12 +5745,12 @@ Ziehe die Punkte mit deiner Maus, um ihre Position zu ändern. Doppelklicke auf - UserNAND + User NAND - SysNAND + System NAND @@ -5801,7 +5797,7 @@ Ziehe die Punkte mit deiner Maus, um ihre Position zu ändern. Doppelklicke auf - + Calculating... Berechnen... diff --git a/dist/languages/el.ts b/dist/languages/el.ts index 5af33cbd25..c9fb878c95 100644 --- a/dist/languages/el.ts +++ b/dist/languages/el.ts @@ -769,23 +769,34 @@ This feature is experimental. + Use asynchronous GPU emulation + + + + + Uses an extra CPU thread for rendering. +This option should always remain enabled. + + + + NVDEC emulation: Εξομοίωση NVDEC: - + Specifies how videos should be decoded. It can either use the CPU or the GPU for decoding, or perform no decoding at all (black screen on videos). In most cases, GPU decoding provides the best performance. - + ASTC Decoding Method: - + This option controls how ASTC textures should be decoded. CPU: Use the CPU for decoding. GPU: Use the GPU's compute shaders to decode ASTC textures (recommended). @@ -794,55 +805,55 @@ stuttering but may present artifacts. - + ASTC Recompression Method: - + Most GPUs lack support for ASTC textures and must decompress to anintermediate format: RGBA8. BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, saving VRAM but degrading image quality. - + Frame Pacing Mode (Vulkan only) - + Controls how the emulator manages frame pacing to reduce stuttering and make the frame rate smoother and more consistent. - + VRAM Usage Mode: - + Selects whether the emulator should prefer to conserve memory or make maximum usage of available video memory for performance. Aggressive mode may impact performance of other applications such as recording software. - + Skip CPU Inner Invalidation - + Skips certain cache invalidations during memory updates, reducing CPU usage and improving latency. This may cause soft-crashes. - + VSync Mode: - + FIFO (VSync) does not drop frames or exhibit tearing but is limited by the screen refresh rate. FIFO Relaxed allows tearing as it recovers from a slow down. Mailbox can have lower latency than FIFO and does not tear but may drop frames. @@ -850,1376 +861,1361 @@ Immediate (no synchronization) presents whatever is available and can exhibit te - + Sync Memory Operations - + Ensures data consistency between compute and memory operations. This option fixes issues in games, but may degrade performance. Unreal Engine 4 games often see the most significant changes thereof. - + Enable asynchronous presentation (Vulkan only) - + Slightly improves performance by moving presentation to a separate CPU thread. - + Force maximum clocks (Vulkan only) - + Runs work in the background while waiting for graphics commands to keep the GPU from lowering its clock speed. - + Anisotropic Filtering: Ανισοτροπικό Φιλτράρισμα: - + Controls the quality of texture rendering at oblique angles. Safe to set at 16x on most GPUs. - + GPU Mode: - + Controls the GPU emulation mode. Most games render fine with Fast or Balanced modes, but Accurate is still required for some. Particles tend to only render correctly with Accurate mode. - + DMA Accuracy: - + Controls the DMA precision accuracy. Safe precision fixes issues in some games but may degrade performance. - + Enable asynchronous shader compilation - + May reduce shader stutter. - + Fast GPU Time - + Overclocks the emulated GPU to increase dynamic resolution and render distance. Use 256 for maximal performance and 512 for maximal graphics fidelity. - + GPU Unswizzle - + Accelerates BCn 3D texture decoding using GPU compute. Disable if experiencing crashes or graphical glitches. - + GPU Unswizzle Max Texture Size - + Sets the maximum size (MiB) for GPU-based texture unswizzling. While the GPU is faster for medium and large textures, the CPU may be more efficient for very small ones. Adjust this to find the balance between GPU acceleration and CPU overhead. - + GPU Unswizzle Stream Size - + Sets the maximum amount of texture data (in MiB) processed per frame. Higher values can reduce stutter during texture loading but may impact frame consistency. - + GPU Unswizzle Chunk Size - + Determines the number of depth slices processed in a single dispatch. Increasing this can improve throughput on high-end GPUs but may cause TDR or driver timeouts on weaker hardware. - + Use Vulkan pipeline cache - + Enables GPU vendor-specific pipeline cache. This option can improve shader loading time significantly in cases where the Vulkan driver does not store pipeline cache files internally. - + Enable Compute Pipelines (Intel Vulkan Only) - + Required by some games. This setting only exists for Intel proprietary drivers and may crash if enabled. Compute pipelines are always enabled on all other drivers. - + Enable Reactive Flushing - + Uses reactive flushing instead of predictive flushing, allowing more accurate memory syncing. - + Sync to framerate of video playback - + Run the game at normal speed during video playback, even when the framerate is unlocked. - + Barrier feedback loops - + Improves rendering of transparency effects in specific games. - + Enable buffer history - + Enables access to previous buffer states. This option may improve rendering quality and performance consistency in some games. - + Fix bloom effects - + Removes bloom in Burnout. - + Enable Legacy Rescale Pass - + May fix rescale issues in some games by relying on behavior from the previous implementation. Legacy behavior workaround that fixes line artifacts on AMD and Intel GPUs, and grey texture flicker on Nvidia GPUs in Luigis Mansion 3. - + Extended Dynamic State - + Controls the number of features that can be used in Extended Dynamic State. Higher states allow for more features and can increase performance, but may cause additional graphical issues. - + Vertex Input Dynamic State - + Enables vertex input dynamic state feature for better quality and performance. - + Sample Shading - + Allows the fragment shader to execute per sample in a multi-sampled fragment instead of once per fragment. Improves graphics quality at the cost of performance. Higher values improve quality but degrade performance. - + RNG Seed RNG Seed - + Controls the seed of the random number generator. Mainly used for speedrunning. - + Device Name - + The name of the console. - + Custom RTC Date: - + This option allows to change the clock of the console. Can be used to manipulate time in games. - + The number of seconds from the current unix time - + Language: - + This option can be overridden when region setting is auto-select - + Region: Περιφέρεια: - + The region of the console. - + Time Zone: Ζώνη Ώρας: - + The time zone of the console. - + Sound Output Mode: - + Console Mode: - + Selects if the console is in Docked or Handheld mode. Games will change their resolution, details and supported controllers and depending on this setting. Setting to Handheld can help improve performance for low end systems. - - Unit Serial - - - - - Battery Serial - - - - - Debug knobs - - - - + Prompt for user profile on boot - + Useful if multiple people use the same PC. - + Pause when not in focus - + Pauses emulation when focusing on other windows. - + Confirm before stopping emulation - + Overrides prompts asking to confirm stopping the emulation. Enabling it bypasses such prompts and directly exits the emulation. - + Hide mouse on inactivity Απόκρυψη δρομέα ποντικιού στην αδράνεια - + Hides the mouse after 2.5s of inactivity. - + Disable controller applet - + Forcibly disables the use of the controller applet in emulated programs. When a program attempts to open the controller applet, it is immediately closed. - + Check for updates - + Whether or not to check for updates upon startup. - + Enable Gamemode - + Force X11 as Graphics Backend - + Custom frontend - + Real applet - + Never - + On Load - + Always - + CPU CPU - + GPU - + CPU Asynchronous - + Uncompressed (Best quality) - + BC1 (Low quality) - + BC3 (Medium quality) - - + + Auto Αυτόματη - + 30 FPS - + 60 FPS - + 90 FPS - + 120 FPS - + Conservative - + Aggressive - + Vulkan Vulkan - + OpenGL GLSL - + OpenGL GLASM (Assembly Shaders, NVIDIA Only) - + OpenGL SPIR-V (Experimental, AMD/Mesa Only) - + Null - + Fast - + Balanced - - + + Accurate Ακριβής - - + + Default Προεπιλεγμένο - + Unsafe (fast) - + Safe (stable) - + Unsafe Επισφαλής - + Paranoid (disables most optimizations) - + Debugging - + Dynarmic - + NCE - + Borderless Windowed Παραθυροποιημένο Χωρίς Όρια - + Exclusive Fullscreen Αποκλειστική Πλήρης Οθόνη - + No Video Output Χωρίς Έξοδο Βίντεο - + CPU Video Decoding Αποκωδικοποίηση Βίντεο CPU - + GPU Video Decoding (Default) Αποκωδικοποίηση Βίντεο GPU (Προεπιλογή) - + 0.25X (180p/270p) [EXPERIMENTAL] - + 0.5X (360p/540p) [EXPERIMENTAL] - + 0.75X (540p/810p) [EXPERIMENTAL] 0.75X (540p/810p) [ΠΕΙΡΑΜΑΤΙΚΟ] - + 1X (720p/1080p) 1X (720p/1080p) - + 1.25X (900p/1350p) [EXPERIMENTAL] - + 1.5X (1080p/1620p) [EXPERIMENTAL] - + 2X (1440p/2160p) 2X (1440p/2160p) - + 3X (2160p/3240p) 3X (2160p/3240p) - + 4X (2880p/4320p) 4X (2880p/4320p) - + 5X (3600p/5400p) 5X (3600p/5400p) - + 6X (4320p/6480p) 6X (4320p/6480p) - + 7X (5040p/7560p) - + 8X (5760p/8640p) - + Nearest Neighbor Πλησιέστερος Γείτονας - + Bilinear Διγραμμικό - + Bicubic Δικυβικό - + Gaussian Gaussian - + Lanczos - + ScaleForce ScaleForce - + AMD FidelityFX Super Resolution - + Area - + MMPX - + Zero-Tangent - + B-Spline - + Mitchell - + Spline-1 - - + + None Κανένα - + FXAA FXAA - + SMAA SMAA - + Default (16:9) Προεπιλογή (16:9) - + Force 4:3 Επιβολή 4:3 - + Force 21:9 Επιβολή 21:9 - + Force 16:10 Επιβολή 16:10 - + Stretch to Window Επέκταση στο Παράθυρο - + Automatic Αυτόματα - + 2x 2x - + 4x 4x - + 8x 8x - + 16x 16x - + 32x - + 64x - + Japanese (日本語) Ιαπωνικά (日本語) - + American English - + French (français) Γαλλικά (Français) - + German (Deutsch) Γερμανικά (Deutsch) - + Italian (italiano) Ιταλικά (Italiano) - + Spanish (español) Ισπανικά (Español) - + Chinese Κινέζικα - + Korean (한국어) Κορεάτικα (한국어) - + Dutch (Nederlands) Ολλανδικά (Nederlands) - + Portuguese (português) Πορτογαλικά (Português) - + Russian (Русский) Ρώσικα (Русский) - + Taiwanese Ταϊβανέζικα - + British English Βρετανικά Αγγλικά - + Canadian French Καναδικά Γαλλικά - + Latin American Spanish Λατινοαμερικάνικα Ισπανικά - + Simplified Chinese Απλοποιημένα Κινέζικα - + Traditional Chinese (正體中文) Παραδοσιακά Κινέζικα (正體中文) - + Brazilian Portuguese (português do Brasil) Πορτογαλικά Βραζιλίας (Português do Brasil) - + Polish (polska) - + Thai (แบบไทย) - - + + Japan Ιαπωνία - + USA ΗΠΑ - + Europe Ευρώπη - + Australia Αυστραλία - + China Κίνα - + Korea Κορέα - + Taiwan Ταϊβάν - + Auto (%1) Auto select time zone - + Default (%1) Default time zone - + CET CET - + CST6CDT CST6CDT - + Cuba Κούβα - + EET EET - + Egypt Αίγυπτος - + Eire - + EST EST - + EST5EDT EST5EDT - + GB - + GB-Eire - + GMT GMT - + GMT+0 GMT+0 - + GMT-0 GMT-0 - + GMT0 GMT0 - + Greenwich Γκρήνουιτς - + Hongkong Χονγκ Κονγκ - + HST HST - + Iceland Ισλανδία - + Iran Ιράν - + Israel Ισραήλ - + Jamaica Ιαμαϊκή - + Kwajalein - + Libya Λιβύη - + MET MET - + MST MST - + MST7MDT MST7MDT - + Navajo Ναβάχο - + NZ - + NZ-CHAT - + Poland Πολωνία - + Portugal Πορτογαλία - + PRC - + PST8PDT PST8PDT - + ROC ROC - + ROK ROK - + Singapore Σιγκαπούρη - + Turkey Τουρκία - + UCT UCT - + Universal Παγκόσμια - + UTC UTC - + W-SU W-SU - + WET WET - + Zulu - + Mono Μονοφωνικό - + Stereo Στέρεοφωνικό - + Surround - + 4GB DRAM (Default) - + 6GB DRAM (Unsafe) - + 8GB DRAM - + 10GB DRAM (Unsafe) - + 12GB DRAM (Unsafe) - + Docked Docked - + Handheld Handheld - - + + Off - + Boost (1700MHz) - + Fast (2000MHz) - + Always ask (Default) - + Only if game specifies not to stop - + Never ask + + + + Medium (256) + + - Medium (256) - - - - - High (512) - + Very Small (16 MB) - + Small (32 MB) - + Normal (128 MB) - + Large (256 MB) - + Very Large (512 MB) - + Very Low (4 MB) - + Low (8 MB) - + Normal (16 MB) - + Medium (32 MB) - + High (64 MB) - + Very Low (32) - + Low (64) - + Normal (128) - + Disabled - + ExtendedDynamicState 1 - + ExtendedDynamicState 2 - + ExtendedDynamicState 3 - + Tree View - + Grid View @@ -5714,7 +5710,7 @@ Drag points to change position, or double-click table cells to edit values. - + Deleting ANY data is IRREVERSABLE! @@ -5725,12 +5721,12 @@ Drag points to change position, or double-click table cells to edit values. - UserNAND + User NAND - SysNAND + System NAND @@ -5777,7 +5773,7 @@ Drag points to change position, or double-click table cells to edit values. - + Calculating... diff --git a/dist/languages/es.ts b/dist/languages/es.ts index 2c02ef29f8..a15674b7ea 100644 --- a/dist/languages/es.ts +++ b/dist/languages/es.ts @@ -239,7 +239,7 @@ Esto vetará su nombre de usuario del foro y su dirección IP. <html><head/><body><p><span style=" font-size:10pt;">Should you choose to submit a test case to the </span><a href="https://eden-emulator.github.io/game/"><span style=" font-size:10pt; text-decoration: underline; color:#0000ff;">eden Compatibility List</span></a><span style=" font-size:10pt;">, The following information will be collected and displayed on the site:</span></p><ul style="margin-top: 0px; margin-bottom: 0px; margin-left: 0px; margin-right: 0px; -qt-list-indent: 1;"><li style=" margin-top:12px; margin-bottom:12px; margin-left:0px; margin-right:0px; -qt-block-indent:0; text-indent:0px;">Hardware Information (CPU / GPU / Operating System)</li><li style=" margin-top:12px; margin-bottom:12px; margin-left:0px; margin-right:0px; -qt-block-indent:0; text-indent:0px;">Which version of eden you are running</li><li style=" margin-top:12px; margin-bottom:12px; margin-left:0px; margin-right:0px; -qt-block-indent:0; text-indent:0px;">The connected eden account</li></ul></body></html> - <html><head/><body><p><span style=" font-size:10pt;">Si elijes entregar un caso de prueba a la </span><a href="https://eden-emulator.github.io/game/"><span style=" font-size:10pt; text-decoration: underline; color:#0000ff;">lista de compatibilidad de Eden</span></a><span style=" font-size:10pt;">, Se recopilará y mostrará la siguiente información en el sito:</span></p><ul style="margin-top: 0px; margin-bottom: 0px; margin-left: 0px; margin-right: 0px; -qt-list-indent: 1;"><li style=" margin-top:12px; margin-bottom:12px; margin-left:0px; margin-right:0px; -qt-block-indent:0; text-indent:0px;">Información del hardware (CPU / GPU / Sistema operativo)</li><li style=" margin-top:12px; margin-bottom:12px; margin-left:0px; margin-right:0px; -qt-block-indent:0; text-indent:0px;">Qué version de Eden estás usando</li><li style=" margin-top:12px; margin-bottom:12px; margin-left:0px; margin-right:0px; -qt-block-indent:0; text-indent:0px;">La cuenta de eden que está conectada </li></ul></body></html> + <html><head/><body><p><span style=" font-size:10pt;">Si elijes entregar un caso de prueba a la </span><a href="https://eden-emulator.github.io/game/"><span style=" font-size:10pt; text-decoration: underline; color:#0000ff;">lista de compatibilidad de Eden</span></a><span style=" font-size:10pt;">, Se recopilará y mostrará la siguiente información en el sito:</span></p><ul style="margin-top: 0px; margin-bottom: 0px; margin-left: 0px; margin-right: 0px; -qt-list-indent: 1;"><li style=" margin-top:12px; margin-bottom:12px; margin-left:0px; margin-right:0px; -qt-block-indent:0; text-indent:0px;">Información del hardware (Procesador / Tarjeta gráfica / Sistema operativo)</li><li style=" margin-top:12px; margin-bottom:12px; margin-left:0px; margin-right:0px; -qt-block-indent:0; text-indent:0px;">Qué version de Eden estás usando</li><li style=" margin-top:12px; margin-bottom:12px; margin-left:0px; margin-right:0px; -qt-block-indent:0; text-indent:0px;">La cuenta de eden que está conectada </li></ul></body></html> @@ -492,13 +492,13 @@ Esto vetará su nombre de usuario del foro y su dirección IP. Multicore CPU Emulation - Emulación de CPU multinúcleo + Emulación del procesador multinúcleo This option increases CPU emulation thread use from 1 to the maximum of 4. This is mainly a debug option and shouldn't be disabled. - Esta opción aumenta el uso de hilos de emulación de la CPU de 1 a un máximo de 4. + Esta opción aumenta el uso de hilos de emulación del procesador de 1 a un máximo de 4. Principalmente es una opción de depuración y no debería desactivarse. @@ -556,7 +556,7 @@ Desactivarlo hará que el juego se renderice lo más rápido posible según tu o Synchronizes CPU core speed with the game's maximum rendering speed to boost FPS without affecting game speed (animations, physics, etc.). Can help reduce stuttering at lower framerates. - Sincroniza la velocidad del núcleo de la CPU con la velocidad máxima de renderizado del juego para aumentar los FPS sin afectar la velocidad del juego (animaciones, físicas, etc.). + Sincroniza la velocidad del núcleo del procesador con la velocidad máxima de renderizado del juego para aumentar los fotogramas por segundo sin afectar la velocidad del juego (animaciones, físicas, etc.). Puede ayudar a reducir los tirones o parpadeos en tasas de fotogramas bajas. @@ -567,7 +567,7 @@ Puede ayudar a reducir los tirones o parpadeos en tasas de fotogramas bajas. Change the accuracy of the emulated CPU (for debugging only). - Cambia la precisión de la CPU emulada (solo para depuración) + Cambia la precisión del procesador emulado (solo para depuración) @@ -578,7 +578,7 @@ Puede ayudar a reducir los tirones o parpadeos en tasas de fotogramas bajas. CPU Overclock - Overclock de CPU + Overclock del procesador @@ -799,11 +799,23 @@ Esta función es experimental. + Use asynchronous GPU emulation + Usar emulación asíncrona de la GPU + + + + Uses an extra CPU thread for rendering. +This option should always remain enabled. + Usa un hilo adicional del procesador para el renderizado. +Esta opción siempre debe permanecer activada. + + + NVDEC emulation: Emulación NVDEC: - + Specifies how videos should be decoded. It can either use the CPU or the GPU for decoding, or perform no decoding at all (black screen on videos). In most cases, GPU decoding provides the best performance. @@ -812,12 +824,12 @@ Puede usar la CPU, GPU o no descodificar (mostrará una pantalla en negro durant En la mayoría de casos, descodificar mediante la GPU es la mejor opción. - + ASTC Decoding Method: Modo descodificación ASTC: - + This option controls how ASTC textures should be decoded. CPU: Use the CPU for decoding. GPU: Use the GPU's compute shaders to decode ASTC textures (recommended). @@ -829,12 +841,12 @@ GPU: utiliza los sombreadores computables de la tarjeta gráfica para descodific CPU asíncrono: usa el procesador para descodificar las texturas ASTC bajo demanda. Elimina los tirones causados por la descodificación ASTC, pero puede generar errores visuales. - + ASTC Recompression Method: Modo recompresión ASTC: - + Most GPUs lack support for ASTC textures and must decompress to anintermediate format: RGBA8. BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, saving VRAM but degrading image quality. @@ -842,44 +854,44 @@ BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, BC1/BC3: El formato intermedio será recomprimido a BC1 o BC3, lo que ahorra VRAM, pero degrada la calidad de la imagen. - + Frame Pacing Mode (Vulkan only) Modo de ritmo de fotogramas (solo Vulkan) - + Controls how the emulator manages frame pacing to reduce stuttering and make the frame rate smoother and more consistent. Controla cómo el emulador gestiona el ritmo de los fotogramas para reducir los tirones y hacer que la velocidad de los fotogramas sea más suave y consistente. - + VRAM Usage Mode: Modo de uso de la VRAM: - + Selects whether the emulator should prefer to conserve memory or make maximum usage of available video memory for performance. Aggressive mode may impact performance of other applications such as recording software. Selecciona si el emulador prefiere ahorrar memoria o maximizar el uso de memoria de video disponible para mejorar el rendimiento. El modo agresivo puede afectar al rendimiento de otras aplicaciones, como a los programas de grabación. - + Skip CPU Inner Invalidation Saltar invalidación interna de la CPU - + Skips certain cache invalidations during memory updates, reducing CPU usage and improving latency. This may cause soft-crashes. Omite ciertas invalidaciones de caché durante las actualizaciones de memoria, reduciendo el uso de la CPU y mejorando la latencia. Esto puede causar bloqueos leves. - + VSync Mode: Modo VSync: - + FIFO (VSync) does not drop frames or exhibit tearing but is limited by the screen refresh rate. FIFO Relaxed allows tearing as it recovers from a slow down. Mailbox can have lower latency than FIFO and does not tear but may drop frames. @@ -890,12 +902,12 @@ Mailbox ofrece menor latencia que FIFO y evita el tearing, aunque puede perder a Immediate (sin sincronización) muestra los fotogramas tan pronto están disponibles, pero puede generar desgarros de imagen. - + Sync Memory Operations Sincronizar operaciones de memoria - + Ensures data consistency between compute and memory operations. This option fixes issues in games, but may degrade performance. Unreal Engine 4 games often see the most significant changes thereof. @@ -904,44 +916,44 @@ Esta opción arregla errores en los juegos, pero puede afectar negativamente al Los juegos con Unreal Engine 4 son con frecuencia los que muestran cambios significantes en esto. - + Enable asynchronous presentation (Vulkan only) Activar presentación asíncrona (solo Vulkan) - + Slightly improves performance by moving presentation to a separate CPU thread. Mejora el rendimiento ligeramente al usar un hilo de CPU adicional para la presentación. - + Force maximum clocks (Vulkan only) Forzar relojes al máximo (solo Vulkan) - + Runs work in the background while waiting for graphics commands to keep the GPU from lowering its clock speed. Ejecuta los procesos en segundo plano mientras se espera a las instrucciones gráficas para evitar que la GPU reduzca su velocidad de reloj. - + Anisotropic Filtering: Filtrado anisotrópico: - + Controls the quality of texture rendering at oblique angles. Safe to set at 16x on most GPUs. Controla la calidad del renderizado de texturas en ángulos oblicuos. Es seguro configurarlo en 16x en la mayoría de las GPU. - + GPU Mode: Modo de la GPU: - + Controls the GPU emulation mode. Most games render fine with Fast or Balanced modes, but Accurate is still required for some. Particles tend to only render correctly with Accurate mode. @@ -950,56 +962,56 @@ La mayoridad de juegos renderizarán bien con el modo rápido o balanceado, pero Las partículas tienden a representarse correctamente solo con el modo preciso. - + DMA Accuracy: Precisión de DMA: - + Controls the DMA precision accuracy. Safe precision fixes issues in some games but may degrade performance. Controla la precisión del DMA. La opción de precisión segura corrige errores en algunos juegos, pero puede reducir el rendimiento - + Enable asynchronous shader compilation Activa la compilación de shaders asincrónicos - + May reduce shader stutter. Puede reducir los tirones causados por la carga de sombreadores. - + Fast GPU Time Tiempo rápido de la GPU - + Overclocks the emulated GPU to increase dynamic resolution and render distance. Use 256 for maximal performance and 512 for maximal graphics fidelity. Overcloquea la GPU emulada para aumentar la resolución dinámica y la distancia de renderizado. Use 256 para el máximo rendimiento y 512 para la máxima fidelidad gráfica. - + GPU Unswizzle Desentrelazado de la GPU - + Accelerates BCn 3D texture decoding using GPU compute. Disable if experiencing crashes or graphical glitches. Acelera la decodificación de texturas 3D BCn mediante computación de la GPU. Desactívela si experimenta problemas o fallos gráficos. - + GPU Unswizzle Max Texture Size Tamaño máximo de textura de desentrelazado de la GPU - + Sets the maximum size (MiB) for GPU-based texture unswizzling. While the GPU is faster for medium and large textures, the CPU may be more efficient for very small ones. Adjust this to find the balance between GPU acceleration and CPU overhead. @@ -1008,46 +1020,46 @@ Aunque la GPU es más rápida para texturas medianas y grandes, la CPU puede ser Ajuste este valor para encontrar el equilibrio entre la aceleración de la GPU y la sobrecarga de la CPU. - + GPU Unswizzle Stream Size Tamaño del flujo de desentrelazado de la GPU - + Sets the maximum amount of texture data (in MiB) processed per frame. Higher values can reduce stutter during texture loading but may impact frame consistency. Establece la cantidad máxima de datos de textura (en MiB) procesados ​​por cada fotograma. Valores más altos pueden reducir la distorsión durante la carga de texturas, pero pueden afectar a la consistencia de los fotogramas. - + GPU Unswizzle Chunk Size Tamaño del trozo de desentrelazado de la GPU - + Determines the number of depth slices processed in a single dispatch. Increasing this can improve throughput on high-end GPUs but may cause TDR or driver timeouts on weaker hardware. Determina la cantidad de cortes de profundidad procesados ​​en un solo envío. Aumentar este valor puede mejorar el rendimiento en una GPU de gama alta, pero puede causar tirones y problemas en los tiempos de respuesta en hardware más modesto. - + Use Vulkan pipeline cache Usar caché de canalización de Vulkan - + Enables GPU vendor-specific pipeline cache. This option can improve shader loading time significantly in cases where the Vulkan driver does not store pipeline cache files internally. Activa la caché de canalización específica del fabricante. Esta opción puede mejorar los tiempos de cargas de sombreadores en el caso de que el controlador de Vulkan no lo almacene internamente. - + Enable Compute Pipelines (Intel Vulkan Only) Activar la canalizaciones de cómputo (solo Intel Vulkan) - + Required by some games. This setting only exists for Intel proprietary drivers and may crash if enabled. Compute pipelines are always enabled on all other drivers. @@ -1056,184 +1068,184 @@ Este ajuste solo existe para los controladores propietarios de Intel y puede cau En los demás controladores, la canalización de cómputo siempre está activada. - + Enable Reactive Flushing Activar limpieza reactiva - + Uses reactive flushing instead of predictive flushing, allowing more accurate memory syncing. Usa limpieza de memoria reactiva en vez de predictiva, permitiendo una sincronización de memoria más precisa. - + Sync to framerate of video playback Sincronizar a fotogramas de reproducción de vídeo - + Run the game at normal speed during video playback, even when the framerate is unlocked. Ejecuta el juego a velocidad normal durante la reproducción de vídeos, incluso cuando no hay límite de fotogramas. - + Barrier feedback loops Bucles de feedback de barrera - + Improves rendering of transparency effects in specific games. Mejora la renderización de los efectos de transparencia en ciertos juegos. - + Enable buffer history Activar el historial del búfer - + Enables access to previous buffer states. This option may improve rendering quality and performance consistency in some games. Habilita el acceso a estados de búfer anteriores. Esta opción puede mejorar la calidad de renderizado y la consistencia en el rendimiento de algunos juegos. - + Fix bloom effects Arreglar efectos de resplandor - + Removes bloom in Burnout. Elimina el resplandor en Burnout. - + Enable Legacy Rescale Pass Activar el pase de reescalado heredado - + May fix rescale issues in some games by relying on behavior from the previous implementation. Legacy behavior workaround that fixes line artifacts on AMD and Intel GPUs, and grey texture flicker on Nvidia GPUs in Luigis Mansion 3. Puede arreglar los problemas de reescalado en algunos juegos confiando en el comportamiento de la implementación anterior. Solución alternativa de comportamiento heredado que corrige los artefactos de línea de la GPU AMD y el parpadeo de texturas gris de la GPU Nvidia en Luigis Mansion 3. - + Extended Dynamic State Estado dinámico extendido - + Controls the number of features that can be used in Extended Dynamic State. Higher states allow for more features and can increase performance, but may cause additional graphical issues. Controla el número de funciones que pueden ser usadas en el Estado Dinámico Extendido. Números más altos permiten úsar más funciones y pueden aumentar el rendimiento, pero tambén pueden causar errores gráficos. - + Vertex Input Dynamic State Estado dinámico de entrada de vértices - + Enables vertex input dynamic state feature for better quality and performance. Activa la función de estado dinámico de entrada de vértices para una mejor calidad y rendimiento. - + Sample Shading Sombreado de muestra - + Allows the fragment shader to execute per sample in a multi-sampled fragment instead of once per fragment. Improves graphics quality at the cost of performance. Higher values improve quality but degrade performance. Permite que el sombreador de fragmentos se ejecute por muestra en un fragmento multimuestreado, en lugar de una sola vez por fragmento. Mejora la calidad de los gráficos a costa de rendimiento. Los valores más altos mejoran la calidad, pero reducen el rendimiento. - + RNG Seed Semilla de GNA - + Controls the seed of the random number generator. Mainly used for speedrunning. Controla la semilla del generador de números aleatorios. Usado principalmente para speedrunning. - + Device Name Nombre del dispositivo - + The name of the console. El nombre de la consola - + Custom RTC Date: Fecha Personalizada RTC: - + This option allows to change the clock of the console. Can be used to manipulate time in games. Esta opción permite cambiar el reloj de la consola. Puede ser usado para manipular el tiempo en juegos. - + The number of seconds from the current unix time Número de segundos de la hora actual de Unix - + Language: Idioma: - + This option can be overridden when region setting is auto-select Esta opción puede ser reemplazada cuando la configuración de región está en selección automática. - + Region: Región: - + The region of the console. La Región de la Consola. - + Time Zone: Zona horaria: - + The time zone of the console. La zona horaria de la consola. - + Sound Output Mode: Método de salida de sonido: - + Console Mode: Modo consola: - + Selects if the console is in Docked or Handheld mode. Games will change their resolution, details and supported controllers and depending on this setting. Setting to Handheld can help improve performance for low end systems. @@ -1242,1045 +1254,1030 @@ Los juegos cambiarán su resolución, detalles y compatibilidad con los mandos s Configurar el modo portátil puede mejorar el rendimiento en sistemas de gama baja. - - Unit Serial - Nº de serie de la unidad - - - - Battery Serial - Nº de serie de la batería - - - - Debug knobs - Perillas de depuración - - - + Prompt for user profile on boot Solicitud para perfil de usuario al arrancar - + Useful if multiple people use the same PC. Útil si múltiples personas usan la misma PC - + Pause when not in focus Pausar cuando la ventana no esté activa - + Pauses emulation when focusing on other windows. Pausa la emulación cuando esta activa otra ventana diferente. - + Confirm before stopping emulation Confirmar detención - + Overrides prompts asking to confirm stopping the emulation. Enabling it bypasses such prompts and directly exits the emulation. Anula las solicitudes de confirmación para detener la emulación. Al habilitar esta opción, se omiten dichas solicitudes y se sale directamente de la emulación. - + Hide mouse on inactivity Ocultar el cursor por inactividad. - + Hides the mouse after 2.5s of inactivity. Oculta el mouse después de 2.5s de inactividad. - + Disable controller applet Desactivar applet de mandos - + Forcibly disables the use of the controller applet in emulated programs. When a program attempts to open the controller applet, it is immediately closed. Desactiva forzosamente el uso del applet del controlador en programas emulados. Cuando un programa intenta abrir el applet del controlador, se cierra inmediatamente. - + Check for updates Buscar actualizaciones - + Whether or not to check for updates upon startup. Si se deben buscar actualizaciones al iniciar o no. - + Enable Gamemode Activar Modo Juego - + Force X11 as Graphics Backend Forzar X11 como motor gráfico - + Custom frontend Interfaz personalizada - + Real applet Applet real - + Never Nunca - + On Load Al cargar - + Always Siempre - + CPU - CPU + Procesador - + GPU GPU - + CPU Asynchronous - CPU Asíncrona + Procesador asíncrono - + Uncompressed (Best quality) Sin compresión (Mejor calidad) - + BC1 (Low quality) BC1 (Calidad baja) - + BC3 (Medium quality) BC3 (Calidad media) - - + + Auto Auto - + 30 FPS 30 FPS - + 60 FPS 60 FPS - + 90 FPS 90 FPS - + 120 FPS 120 FPS - + Conservative Conservativo - + Aggressive Agresivo - + Vulkan Vulkan - + OpenGL GLSL OpenGL GLSL - + OpenGL GLASM (Assembly Shaders, NVIDIA Only) OpenGL GLASM (Ensamblado de sombreadores, solo NVIDIA) - + OpenGL SPIR-V (Experimental, AMD/Mesa Only) OpenGL SPIR-V (Experimental, solo AMD/Mesa) - + Null Ninguno - + Fast Rápido - + Balanced Balanceado - - + + Accurate Preciso - - + + Default Predeterminado - + Unsafe (fast) Inseguro (rápido) - + Safe (stable) Seguro (estable) - + Unsafe Impreciso - + Paranoid (disables most optimizations) Paranoico (Deshabilita la mayoría de optimizaciones) - + Debugging Depuración - + Dynarmic DynARMic - + NCE NCE - + Borderless Windowed Ventana sin bordes - + Exclusive Fullscreen Pantalla completa - + No Video Output Sin salida de vídeo - + CPU Video Decoding - Decodificación de vídeo en la CPU + Decodificación de vídeo en el procesador - + GPU Video Decoding (Default) Decodificación de vídeo en GPU (Por defecto) - + 0.25X (180p/270p) [EXPERIMENTAL] 0.25X (180p/270p) [EXPERIMENTAL] - + 0.5X (360p/540p) [EXPERIMENTAL] x0,5 (360p/540p) [EXPERIMENTAL] - + 0.75X (540p/810p) [EXPERIMENTAL] x0,75 (540p/810p) [EXPERIMENTAL] - + 1X (720p/1080p) x1 (720p/1080p) - + 1.25X (900p/1350p) [EXPERIMENTAL] 1.25X (900p/1350p) [EXPERIMENTAL] - + 1.5X (1080p/1620p) [EXPERIMENTAL] x1,5 (1080p/1620p) [EXPERIMENTAL] - + 2X (1440p/2160p) x2 (1440p/2160p) - + 3X (2160p/3240p) x3 (2160p/3240p) - + 4X (2880p/4320p) x4 (2880p/4320p) - + 5X (3600p/5400p) x5 (3600p/5400p) - + 6X (4320p/6480p) x6 (4320p/6480p) - + 7X (5040p/7560p) x7 (5040p/7560p) - + 8X (5760p/8640p) x8 (5760p/8640p) - + Nearest Neighbor Vecino más próximo - + Bilinear Bilineal - + Bicubic Bicúbico - + Gaussian Gaussiano - + Lanczos Lanczos - + ScaleForce ScaleForce - + AMD FidelityFX Super Resolution Super Resolución AMD FidelityFX - + Area Área - + MMPX MMPX - + Zero-Tangent Tangente cero - + B-Spline Ranura B - + Mitchell Mitchell - + Spline-1 Spline-1 - - + + None Ninguno - + FXAA FXAA - + SMAA SMAA - + Default (16:9) Predeterminado (16:9) - + Force 4:3 Forzar 4:3 - + Force 21:9 Forzar 21:9 - + Force 16:10 Forzar 16:10 - + Stretch to Window Estirar a la ventana - + Automatic Automático - + 2x x2 - + 4x x4 - + 8x x8 - + 16x x16 - + 32x 32x - + 64x 64x - + Japanese (日本語) Japonés (日本語) - + American English Inglés estadounidense - + French (français) Francés (français) - + German (Deutsch) Alemán (deutsch) - + Italian (italiano) Italiano (italiano) - + Spanish (español) Español - + Chinese Chino - + Korean (한국어) Coreano (한국어) - + Dutch (Nederlands) Holandés (nederlands) - + Portuguese (português) Portugués (português) - + Russian (Русский) Ruso (Русский) - + Taiwanese Taiwanés - + British English Inglés británico - + Canadian French Francés canadiense - + Latin American Spanish Español latinoamericano - + Simplified Chinese Chino simplificado - + Traditional Chinese (正體中文) Chino tradicional (正體中文) - + Brazilian Portuguese (português do Brasil) Portugués brasileño (português do Brasil) - + Polish (polska) Polaco (polska) - + Thai (แบบไทย) Tailandés (แบบไทย) - - + + Japan Japón - + USA EEUU - + Europe Europa - + Australia Australia - + China China - + Korea Corea - + Taiwan Taiwán - + Auto (%1) Auto select time zone Auto (%1) - + Default (%1) Default time zone Predeterminada (%1) - + CET CET - + CST6CDT CST6CDT - + Cuba Cuba - + EET EET - + Egypt Egipto - + Eire Eire - + EST EST - + EST5EDT EST5EDT - + GB GB - + GB-Eire GB-Eire - + GMT GMT - + GMT+0 GMT+0 - + GMT-0 GMT-0 - + GMT0 GMT0 - + Greenwich Greenwich - + Hongkong Hongkong - + HST HST - + Iceland Islandia - + Iran Irán - + Israel Israel - + Jamaica Jamaica - + Kwajalein Kwajalein - + Libya Libia - + MET MET - + MST MST - + MST7MDT MST7MDT - + Navajo Navajo - + NZ NZ - + NZ-CHAT NZ-CHAT - + Poland Polonia - + Portugal Portugal - + PRC PRC - + PST8PDT PST8PDT - + ROC ROC - + ROK ROK - + Singapore Singapur - + Turkey Turquía - + UCT UCT - + Universal Universal - + UTC UTC - + W-SU W-SU - + WET WET - + Zulu Zulú - + Mono Mono - + Stereo Estéreo - + Surround Envolvente - + 4GB DRAM (Default) 4GB DRAM (Por defecto) - + 6GB DRAM (Unsafe) 6GB DRAM (Inseguro) - + 8GB DRAM 8GB DRAM - + 10GB DRAM (Unsafe) 10GB DRAM (Inseguro) - + 12GB DRAM (Unsafe) 12GB DRAM (Inseguro) - + Docked Sobremesa - + Handheld Portátil - - + + Off Apagado - + Boost (1700MHz) Boost (1700MHz) - + Fast (2000MHz) Rápido (2000MHz) - + Always ask (Default) Preguntar siempre (Por defecto) - + Only if game specifies not to stop Solo si el juego pide no ser cerrado - + Never ask Nunca preguntar - - + + Medium (256) Medio (256) - - + + High (512) Alto (512) - + Very Small (16 MB) Muy pequeño (16 MB) - + Small (32 MB) Pequeño (32 MB) - + Normal (128 MB) Normal (128 MB) - + Large (256 MB) Grande (256 MB) - + Very Large (512 MB) Muy grande (512 MB) - + Very Low (4 MB) Muy bajo (4 MB) - + Low (8 MB) Bajo (8 MB) - + Normal (16 MB) Normal (16 MB) - + Medium (32 MB) Medio (32 MB) - + High (64 MB) Alto (64 MB) - + Very Low (32) Muy bajo (32) - + Low (64) Bajo (64) - + Normal (128) Normal (128) - + Disabled Desactivado - + ExtendedDynamicState 1 ModoDynamicoExtendido 1 - + ExtendedDynamicState 2 ModoDynamicoExtendido 2 - + ExtendedDynamicState 3 ModoDynamicoExtendido 3 - + Tree View Vista en árbol - + Grid View Vista en cuadrícula @@ -2370,7 +2367,7 @@ Cuando un programa intenta abrir el applet del controlador, se cierra inmediatam CPU - CPU + Procesador @@ -2385,12 +2382,12 @@ Cuando un programa intenta abrir el applet del controlador, se cierra inmediatam CPU Backend - Motor CPU + Motor del procesador Unsafe CPU Optimization Settings - Ajustes del Modo Impreciso de optimización de la CPU + Ajustes de optimización del procesador inseguro @@ -2408,12 +2405,12 @@ Cuando un programa intenta abrir el applet del controlador, se cierra inmediatam CPU - CPU + Procesador Toggle CPU Optimizations - Cambiar las optimizaciones de la CPU + Cambiar las optimizaciones del procesador @@ -2609,7 +2606,7 @@ Cuando un programa intenta abrir el applet del controlador, se cierra inmediatam CPU settings are available only when game is not running. - Los ajustes de la CPU solo están disponibles cuando no se esté ejecutando ningún juego. + Los ajustes del procesador solo están disponibles cuando no se esté ejecutando ningún juego. @@ -2924,7 +2921,7 @@ Cuando un programa intenta abrir el applet del controlador, se cierra inmediatam CPU - CPU + Procesador @@ -2954,7 +2951,7 @@ Cuando un programa intenta abrir el applet del controlador, se cierra inmediatam CPU - CPU + Procesador @@ -4815,7 +4812,7 @@ Los valores actuales son %1% y %2% respectivamente. CPU - CPU + Procesador @@ -5805,7 +5802,7 @@ Arrastre los puntos para cambiar de posición, o haga doble clic en las celdas d Gestor de datos - + Deleting ANY data is IRREVERSABLE! ¡Eliminar CUALQUIER dato es IRREVERSIBLE! @@ -5816,13 +5813,13 @@ Arrastre los puntos para cambiar de posición, o haga doble clic en las celdas d - UserNAND - NAND de usuario + User NAND + - SysNAND - NAND de sistema + System NAND + @@ -5868,7 +5865,7 @@ Arrastre los puntos para cambiar de posición, o haga doble clic en las celdas d Importar todos los datos en este directorio. Esto puede tomar un tiempo, ¡y borrará TODOS LOS DATOS EXISTENTES! - + Calculating... Calculando... diff --git a/dist/languages/fi.ts b/dist/languages/fi.ts index b4cf1fb9d9..4c1db2eef4 100644 --- a/dist/languages/fi.ts +++ b/dist/languages/fi.ts @@ -767,23 +767,34 @@ This feature is experimental. - NVDEC emulation: + Use asynchronous GPU emulation + Uses an extra CPU thread for rendering. +This option should always remain enabled. + + + + + NVDEC emulation: + + + + Specifies how videos should be decoded. It can either use the CPU or the GPU for decoding, or perform no decoding at all (black screen on videos). In most cases, GPU decoding provides the best performance. - + ASTC Decoding Method: - + This option controls how ASTC textures should be decoded. CPU: Use the CPU for decoding. GPU: Use the GPU's compute shaders to decode ASTC textures (recommended). @@ -792,55 +803,55 @@ stuttering but may present artifacts. - + ASTC Recompression Method: - + Most GPUs lack support for ASTC textures and must decompress to anintermediate format: RGBA8. BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, saving VRAM but degrading image quality. - + Frame Pacing Mode (Vulkan only) - + Controls how the emulator manages frame pacing to reduce stuttering and make the frame rate smoother and more consistent. - + VRAM Usage Mode: - + Selects whether the emulator should prefer to conserve memory or make maximum usage of available video memory for performance. Aggressive mode may impact performance of other applications such as recording software. - + Skip CPU Inner Invalidation - + Skips certain cache invalidations during memory updates, reducing CPU usage and improving latency. This may cause soft-crashes. - + VSync Mode: - + FIFO (VSync) does not drop frames or exhibit tearing but is limited by the screen refresh rate. FIFO Relaxed allows tearing as it recovers from a slow down. Mailbox can have lower latency than FIFO and does not tear but may drop frames. @@ -848,1376 +859,1361 @@ Immediate (no synchronization) presents whatever is available and can exhibit te - + Sync Memory Operations - + Ensures data consistency between compute and memory operations. This option fixes issues in games, but may degrade performance. Unreal Engine 4 games often see the most significant changes thereof. - + Enable asynchronous presentation (Vulkan only) - + Slightly improves performance by moving presentation to a separate CPU thread. - + Force maximum clocks (Vulkan only) - + Runs work in the background while waiting for graphics commands to keep the GPU from lowering its clock speed. - + Anisotropic Filtering: - + Controls the quality of texture rendering at oblique angles. Safe to set at 16x on most GPUs. - + GPU Mode: - + Controls the GPU emulation mode. Most games render fine with Fast or Balanced modes, but Accurate is still required for some. Particles tend to only render correctly with Accurate mode. - + DMA Accuracy: - + Controls the DMA precision accuracy. Safe precision fixes issues in some games but may degrade performance. - + Enable asynchronous shader compilation - + May reduce shader stutter. - + Fast GPU Time - + Overclocks the emulated GPU to increase dynamic resolution and render distance. Use 256 for maximal performance and 512 for maximal graphics fidelity. - + GPU Unswizzle - + Accelerates BCn 3D texture decoding using GPU compute. Disable if experiencing crashes or graphical glitches. - + GPU Unswizzle Max Texture Size - + Sets the maximum size (MiB) for GPU-based texture unswizzling. While the GPU is faster for medium and large textures, the CPU may be more efficient for very small ones. Adjust this to find the balance between GPU acceleration and CPU overhead. - + GPU Unswizzle Stream Size - + Sets the maximum amount of texture data (in MiB) processed per frame. Higher values can reduce stutter during texture loading but may impact frame consistency. - + GPU Unswizzle Chunk Size - + Determines the number of depth slices processed in a single dispatch. Increasing this can improve throughput on high-end GPUs but may cause TDR or driver timeouts on weaker hardware. - + Use Vulkan pipeline cache - + Enables GPU vendor-specific pipeline cache. This option can improve shader loading time significantly in cases where the Vulkan driver does not store pipeline cache files internally. - + Enable Compute Pipelines (Intel Vulkan Only) - + Required by some games. This setting only exists for Intel proprietary drivers and may crash if enabled. Compute pipelines are always enabled on all other drivers. - + Enable Reactive Flushing - + Uses reactive flushing instead of predictive flushing, allowing more accurate memory syncing. - + Sync to framerate of video playback - + Run the game at normal speed during video playback, even when the framerate is unlocked. - + Barrier feedback loops - + Improves rendering of transparency effects in specific games. - + Enable buffer history - + Enables access to previous buffer states. This option may improve rendering quality and performance consistency in some games. - + Fix bloom effects - + Removes bloom in Burnout. - + Enable Legacy Rescale Pass - + May fix rescale issues in some games by relying on behavior from the previous implementation. Legacy behavior workaround that fixes line artifacts on AMD and Intel GPUs, and grey texture flicker on Nvidia GPUs in Luigis Mansion 3. - + Extended Dynamic State - + Controls the number of features that can be used in Extended Dynamic State. Higher states allow for more features and can increase performance, but may cause additional graphical issues. - + Vertex Input Dynamic State - + Enables vertex input dynamic state feature for better quality and performance. - + Sample Shading - + Allows the fragment shader to execute per sample in a multi-sampled fragment instead of once per fragment. Improves graphics quality at the cost of performance. Higher values improve quality but degrade performance. - + RNG Seed - + Controls the seed of the random number generator. Mainly used for speedrunning. - + Device Name - + The name of the console. - + Custom RTC Date: - + This option allows to change the clock of the console. Can be used to manipulate time in games. - + The number of seconds from the current unix time - + Language: - + This option can be overridden when region setting is auto-select - + Region: - + The region of the console. - + Time Zone: - + The time zone of the console. - + Sound Output Mode: - + Console Mode: - + Selects if the console is in Docked or Handheld mode. Games will change their resolution, details and supported controllers and depending on this setting. Setting to Handheld can help improve performance for low end systems. - - Unit Serial - - - - - Battery Serial - - - - - Debug knobs - - - - + Prompt for user profile on boot - + Useful if multiple people use the same PC. - + Pause when not in focus - + Pauses emulation when focusing on other windows. - + Confirm before stopping emulation - + Overrides prompts asking to confirm stopping the emulation. Enabling it bypasses such prompts and directly exits the emulation. - + Hide mouse on inactivity - + Hides the mouse after 2.5s of inactivity. - + Disable controller applet - + Forcibly disables the use of the controller applet in emulated programs. When a program attempts to open the controller applet, it is immediately closed. - + Check for updates - + Whether or not to check for updates upon startup. - + Enable Gamemode - + Force X11 as Graphics Backend - + Custom frontend - + Real applet - + Never - + On Load - + Always - + CPU - + GPU - + CPU Asynchronous - + Uncompressed (Best quality) - + BC1 (Low quality) - + BC3 (Medium quality) - - + + Auto - + 30 FPS - + 60 FPS - + 90 FPS - + 120 FPS - + Conservative - + Aggressive - + Vulkan - + OpenGL GLSL - + OpenGL GLASM (Assembly Shaders, NVIDIA Only) - + OpenGL SPIR-V (Experimental, AMD/Mesa Only) - + Null - + Fast - + Balanced - - + + Accurate - - + + Default - + Unsafe (fast) - + Safe (stable) - + Unsafe - + Paranoid (disables most optimizations) - + Debugging - + Dynarmic - + NCE - + Borderless Windowed - + Exclusive Fullscreen - + No Video Output - + CPU Video Decoding - + GPU Video Decoding (Default) - + 0.25X (180p/270p) [EXPERIMENTAL] - + 0.5X (360p/540p) [EXPERIMENTAL] - + 0.75X (540p/810p) [EXPERIMENTAL] - + 1X (720p/1080p) - + 1.25X (900p/1350p) [EXPERIMENTAL] - + 1.5X (1080p/1620p) [EXPERIMENTAL] - + 2X (1440p/2160p) - + 3X (2160p/3240p) - + 4X (2880p/4320p) - + 5X (3600p/5400p) - + 6X (4320p/6480p) - + 7X (5040p/7560p) - + 8X (5760p/8640p) - + Nearest Neighbor - + Bilinear - + Bicubic - + Gaussian - + Lanczos - + ScaleForce - + AMD FidelityFX Super Resolution - + Area - + MMPX - + Zero-Tangent - + B-Spline - + Mitchell - + Spline-1 - - + + None - + FXAA - + SMAA - + Default (16:9) - + Force 4:3 - + Force 21:9 - + Force 16:10 - + Stretch to Window - + Automatic - + 2x - + 4x - + 8x - + 16x - + 32x - + 64x - + Japanese (日本語) - + American English - + French (français) - + German (Deutsch) - + Italian (italiano) - + Spanish (español) - + Chinese - + Korean (한국어) - + Dutch (Nederlands) - + Portuguese (português) - + Russian (Русский) - + Taiwanese - + British English - + Canadian French - + Latin American Spanish - + Simplified Chinese - + Traditional Chinese (正體中文) - + Brazilian Portuguese (português do Brasil) - + Polish (polska) - + Thai (แบบไทย) - - + + Japan - + USA - + Europe - + Australia - + China - + Korea - + Taiwan - + Auto (%1) Auto select time zone - + Default (%1) Default time zone - + CET - + CST6CDT - + Cuba - + EET - + Egypt - + Eire - + EST - + EST5EDT - + GB - + GB-Eire - + GMT - + GMT+0 - + GMT-0 - + GMT0 - + Greenwich - + Hongkong - + HST - + Iceland - + Iran - + Israel - + Jamaica - + Kwajalein - + Libya - + MET - + MST - + MST7MDT - + Navajo - + NZ - + NZ-CHAT - + Poland - + Portugal - + PRC - + PST8PDT - + ROC - + ROK - + Singapore - + Turkey - + UCT - + Universal - + UTC - + W-SU - + WET - + Zulu - + Mono - + Stereo - + Surround - + 4GB DRAM (Default) - + 6GB DRAM (Unsafe) - + 8GB DRAM - + 10GB DRAM (Unsafe) - + 12GB DRAM (Unsafe) - + Docked - + Handheld - - + + Off - + Boost (1700MHz) - + Fast (2000MHz) - + Always ask (Default) - + Only if game specifies not to stop - + Never ask + + + + Medium (256) + + - Medium (256) - - - - - High (512) - + Very Small (16 MB) - + Small (32 MB) - + Normal (128 MB) - + Large (256 MB) - + Very Large (512 MB) - + Very Low (4 MB) - + Low (8 MB) - + Normal (16 MB) - + Medium (32 MB) - + High (64 MB) - + Very Low (32) - + Low (64) - + Normal (128) - + Disabled - + ExtendedDynamicState 1 - + ExtendedDynamicState 2 - + ExtendedDynamicState 3 - + Tree View - + Grid View @@ -5690,7 +5686,7 @@ Drag points to change position, or double-click table cells to edit values. - + Deleting ANY data is IRREVERSABLE! @@ -5701,12 +5697,12 @@ Drag points to change position, or double-click table cells to edit values. - UserNAND + User NAND - SysNAND + System NAND @@ -5753,7 +5749,7 @@ Drag points to change position, or double-click table cells to edit values. - + Calculating... diff --git a/dist/languages/fr.ts b/dist/languages/fr.ts index d9bf1ff2b6..df2b201c09 100644 --- a/dist/languages/fr.ts +++ b/dist/languages/fr.ts @@ -799,11 +799,22 @@ Cette fonctionnalité est expérimentale. + Use asynchronous GPU emulation + + + + + Uses an extra CPU thread for rendering. +This option should always remain enabled. + + + + NVDEC emulation: Émulation NVDEC : - + Specifies how videos should be decoded. It can either use the CPU or the GPU for decoding, or perform no decoding at all (black screen on videos). In most cases, GPU decoding provides the best performance. @@ -812,12 +823,12 @@ Elles peuvent être décodées soit par le CPU, soit par le GPU, ou pas du tout Dans la plupart des cas, le décodage GPU offre les meilleures performances. - + ASTC Decoding Method: Méthode de décodage ASTC : - + This option controls how ASTC textures should be decoded. CPU: Use the CPU for decoding. GPU: Use the GPU's compute shaders to decode ASTC textures (recommended). @@ -829,12 +840,12 @@ GPU : Utiliser les shaders de calcul du GPU pour décoder les textures ASTC (rec CPU asynchrone : Utiliser le CPU pour décoder les textures ASTC à la demande. Élimine les saccades liées au décodage ASTC, mais peut provoquer des artefacts. - + ASTC Recompression Method: Méthode de recompression ASTC : - + Most GPUs lack support for ASTC textures and must decompress to anintermediate format: RGBA8. BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, saving VRAM but degrading image quality. @@ -842,44 +853,44 @@ BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, BC1/BC3 : Le format intermédiaire sera recompressé en BC1 ou BC3, ce qui économise de la VRAM mais dégrade la qualité de l’image. - + Frame Pacing Mode (Vulkan only) - + Controls how the emulator manages frame pacing to reduce stuttering and make the frame rate smoother and more consistent. - + VRAM Usage Mode: Mode d'utilisation de la VRAM : - + Selects whether the emulator should prefer to conserve memory or make maximum usage of available video memory for performance. Aggressive mode may impact performance of other applications such as recording software. Permet de choisir si l’émulateur doit privilégier la conservation de la mémoire ou utiliser au maximum la mémoire vidéo disponible pour les performances. Le mode agressif peut affecter les performances d’autres applications, comme les logiciels d’enregistrement. - + Skip CPU Inner Invalidation Ignorer l'invalidation interne du CPU - + Skips certain cache invalidations during memory updates, reducing CPU usage and improving latency. This may cause soft-crashes. Ignore certaines invalidations de cache lors des mises à jour de la mémoire, réduisant l’utilisation du CPU et améliorant la latence. Cela peut provoquer des plantages légers. - + VSync Mode: Mode VSync : - + FIFO (VSync) does not drop frames or exhibit tearing but is limited by the screen refresh rate. FIFO Relaxed allows tearing as it recovers from a slow down. Mailbox can have lower latency than FIFO and does not tear but may drop frames. @@ -890,12 +901,12 @@ Mailbox peut offrir une latence inférieure à FIFO et n’entraîne pas de déc Immediate (pas de synchronisation) affiche ce qui est disponible et peut provoquer du déchirement. - + Sync Memory Operations Synchroniser les opérations mémoire - + Ensures data consistency between compute and memory operations. This option fixes issues in games, but may degrade performance. Unreal Engine 4 games often see the most significant changes thereof. @@ -904,144 +915,144 @@ Cette option corrige des problèmes dans les jeux, mais peut dégrader les perfo Les jeux Unreal Engine 4 sont souvent ceux qui bénéficient le plus de ce réglage. - + Enable asynchronous presentation (Vulkan only) Activer la présentation asynchrone (Vulkan uniquement) - + Slightly improves performance by moving presentation to a separate CPU thread. Améliore légèrement les performances en déplaçant la présentation vers un thread CPU séparé. - + Force maximum clocks (Vulkan only) Forcer la fréquence d'horloge maximale (Vulkan uniquement) - + Runs work in the background while waiting for graphics commands to keep the GPU from lowering its clock speed. Les exécutions fonctionnent en arrière-plan en attendant les commandes graphiques pour empêcher le GPU de réduire sa vitesse de fréquence d'horloge. - + Anisotropic Filtering: Filtrage anisotropique : - + Controls the quality of texture rendering at oblique angles. Safe to set at 16x on most GPUs. Contrôle la qualité du rendu des textures sous des angles obliques. Il est sûr de le régler à 16x sur la plupart des GPU. - + GPU Mode: Mode GPU : - + Controls the GPU emulation mode. Most games render fine with Fast or Balanced modes, but Accurate is still required for some. Particles tend to only render correctly with Accurate mode. - + DMA Accuracy: Précision du DMA : - + Controls the DMA precision accuracy. Safe precision fixes issues in some games but may degrade performance. Contrôle la précision des transferts DMA. Une précision plus élevée corrige certains problèmes dans certains jeux, mais peut réduire les performances. - + Enable asynchronous shader compilation Activer la compilation asynchrone des shaders - + May reduce shader stutter. Peut réduire les saccades dues aux shaders. - + Fast GPU Time Temps GPU rapide - + Overclocks the emulated GPU to increase dynamic resolution and render distance. Use 256 for maximal performance and 512 for maximal graphics fidelity. - + GPU Unswizzle - + Accelerates BCn 3D texture decoding using GPU compute. Disable if experiencing crashes or graphical glitches. - + GPU Unswizzle Max Texture Size - + Sets the maximum size (MiB) for GPU-based texture unswizzling. While the GPU is faster for medium and large textures, the CPU may be more efficient for very small ones. Adjust this to find the balance between GPU acceleration and CPU overhead. - + GPU Unswizzle Stream Size - + Sets the maximum amount of texture data (in MiB) processed per frame. Higher values can reduce stutter during texture loading but may impact frame consistency. - + GPU Unswizzle Chunk Size - + Determines the number of depth slices processed in a single dispatch. Increasing this can improve throughput on high-end GPUs but may cause TDR or driver timeouts on weaker hardware. - + Use Vulkan pipeline cache Utiliser le cache de pipeline Vulkan - + Enables GPU vendor-specific pipeline cache. This option can improve shader loading time significantly in cases where the Vulkan driver does not store pipeline cache files internally. Active le cache de pipeline spécifique au fournisseur de GPU. Cette option peut améliorer considérablement le temps de chargement des shaders dans les cas où le pilote Vulkan ne stocke pas les fichiers de cache de pipeline en interne. - + Enable Compute Pipelines (Intel Vulkan Only) Activer les pipelines de calcul (Vulkan sur Intel uniquement) - + Required by some games. This setting only exists for Intel proprietary drivers and may crash if enabled. Compute pipelines are always enabled on all other drivers. @@ -1050,95 +1061,95 @@ Ce réglage n’existe que pour les pilotes propriétaires Intel et peut provoqu Les pipelines de calcul sont toujours activés sur tous les autres pilotes. - + Enable Reactive Flushing Activer le Vidage Réactif - + Uses reactive flushing instead of predictive flushing, allowing more accurate memory syncing. Utilise une purge réactive au lieu d'une purge prédictive, permettant une synchronisation de la mémoire plus précise. - + Sync to framerate of video playback Synchro la fréquence d'image de la relecture du vidéo - + Run the game at normal speed during video playback, even when the framerate is unlocked. Éxécuter le jeu à une vitesse normale pendant la relecture du vidéo, même-ci la fréquence d'image est dévérouillée. - + Barrier feedback loops Boucles de rétroaction de barrière - + Improves rendering of transparency effects in specific games. Améliore le rendu des effets de transparence dans des jeux spécifiques. - + Enable buffer history - + Enables access to previous buffer states. This option may improve rendering quality and performance consistency in some games. - + Fix bloom effects - + Removes bloom in Burnout. - + Enable Legacy Rescale Pass - + May fix rescale issues in some games by relying on behavior from the previous implementation. Legacy behavior workaround that fixes line artifacts on AMD and Intel GPUs, and grey texture flicker on Nvidia GPUs in Luigis Mansion 3. - + Extended Dynamic State État dynamique étendu - + Controls the number of features that can be used in Extended Dynamic State. Higher states allow for more features and can increase performance, but may cause additional graphical issues. - + Vertex Input Dynamic State - + Enables vertex input dynamic state feature for better quality and performance. - + Sample Shading Échantillonnage de shading - + Allows the fragment shader to execute per sample in a multi-sampled fragment instead of once per fragment. Improves graphics quality at the cost of performance. Higher values improve quality but degrade performance. Permet au shader de fragments de s’exécuter pour chaque échantillon dans un fragment multi-échantillonné, au lieu d’une seule fois par fragment. @@ -1146,86 +1157,86 @@ Améliore la qualité graphique au prix de performances réduites. Des valeurs plus élevées améliorent la qualité mais dégradent les performances. - + RNG Seed Seed RNG - + Controls the seed of the random number generator. Mainly used for speedrunning. Contrôle la graine du générateur de nombres aléatoires. Principalement utilisé pour le speedrun. - + Device Name Nom de l'appareil - + The name of the console. Nom de la console. - + Custom RTC Date: Date RTC personnalisée : - + This option allows to change the clock of the console. Can be used to manipulate time in games. Cette option permet de modifier l’horloge de la console. Peut être utilisée pour manipuler le temps dans les jeux. - + The number of seconds from the current unix time Nombre de secondes écoulées depuis le 1er janvier 1970. - + Language: Langue : - + This option can be overridden when region setting is auto-select Cette option peut être remplacée lorsque la région est sur auto. - + Region: Région : - + The region of the console. Région de la console. - + Time Zone: Fuseau horaire : - + The time zone of the console. Fuseau horaire de la console. - + Sound Output Mode: Mode de sortie sonore : - + Console Mode: Mode console : - + Selects if the console is in Docked or Handheld mode. Games will change their resolution, details and supported controllers and depending on this setting. Setting to Handheld can help improve performance for low end systems. @@ -1234,1046 +1245,1031 @@ Les jeux adaptent leur résolution, leurs paramètres graphiques et les manettes Passer en mode Portable peut améliorer les performances sur les systèmes peu puissants. - - Unit Serial - - - - - Battery Serial - - - - - Debug knobs - - - - + Prompt for user profile on boot Choisir l’utilisateur au démarrage. - + Useful if multiple people use the same PC. Utile si plusieurs personnes utilisent le même PC. - + Pause when not in focus Pause lorsque la fenêtre n’est pas active. - + Pauses emulation when focusing on other windows. Met l’émulation en pause dès que l’utilisateur change de fenêtre. - + Confirm before stopping emulation Confirmer avant d'arrêter l'émulation - + Overrides prompts asking to confirm stopping the emulation. Enabling it bypasses such prompts and directly exits the emulation. Ignore les demandes de confirmation pour arrêter l’émulation. L’activer permet de contourner ces confirmations et de quitter directement l’émulation. - + Hide mouse on inactivity Cacher la souris en cas d'inactivité - + Hides the mouse after 2.5s of inactivity. Cache le curseur après 2,5 secondes d’inactivité. - + Disable controller applet Désactiver l'applet du contrôleur - + Forcibly disables the use of the controller applet in emulated programs. When a program attempts to open the controller applet, it is immediately closed. Désactive de force le menu de configuration des manettes dans les programmes émulés. Lorsqu’un programme tente d’ouvrir ce menu, il est immédiatement fermé. - + Check for updates Rechercher des mises à jours - + Whether or not to check for updates upon startup. Vérifier ou non les mises à jour au démarrage. - + Enable Gamemode Activer le mode jeu - + Force X11 as Graphics Backend Forcer X11 comme moteur graphique - + Custom frontend Interface personnalisée - + Real applet Applet réel - + Never Jamais - + On Load Au chargement - + Always Toujours - + CPU CPU - + GPU GPU - + CPU Asynchronous CPU Asynchrone - + Uncompressed (Best quality) Non compressé (Meilleure qualité) - + BC1 (Low quality) BC1 (Basse qualité) - + BC3 (Medium quality) BC3 (Qualité moyenne) - - + + Auto Auto - + 30 FPS - + 60 FPS - + 90 FPS - + 120 FPS - + Conservative Conservateur - + Aggressive Agressif - + Vulkan Vulkan - + OpenGL GLSL OpenGL GLSL - + OpenGL GLASM (Assembly Shaders, NVIDIA Only) - + OpenGL SPIR-V (Experimental, AMD/Mesa Only) - + Null Nul - + Fast Rapide - + Balanced Moyen - - + + Accurate Précis - - + + Default Par défaut - + Unsafe (fast) Insecure (rapide) - + Safe (stable) Sûr (stable) - + Unsafe Risqué - + Paranoid (disables most optimizations) Paranoïaque (désactive la plupart des optimisations) - + Debugging Débogage - + Dynarmic Dynamique - + NCE NCE - + Borderless Windowed Fenêtré sans bordure - + Exclusive Fullscreen Plein écran exclusif - + No Video Output Pas de sortie vidéo - + CPU Video Decoding Décodage Vidéo sur le CPU - + GPU Video Decoding (Default) Décodage Vidéo sur le GPU (par défaut) - + 0.25X (180p/270p) [EXPERIMENTAL] 0.25X (180p/270p) [EXPÉRIMENTAL] - + 0.5X (360p/540p) [EXPERIMENTAL] 0.5X (360p/540p) [EXPERIMENTAL] - + 0.75X (540p/810p) [EXPERIMENTAL] 0.75X (540p/810p) [EXPÉRIMENTAL] - + 1X (720p/1080p) 1X (720p/1080p) - + 1.25X (900p/1350p) [EXPERIMENTAL] 1,25X (900p/1350p) [EXPÉRIMENTAL] - + 1.5X (1080p/1620p) [EXPERIMENTAL] 1.5X (1080p/1620p) [EXPÉRIMENTAL] - + 2X (1440p/2160p) 2X (1440p/2160p) - + 3X (2160p/3240p) 3X (2160p/3240p) - + 4X (2880p/4320p) 4X (2880p/4320p) - + 5X (3600p/5400p) 5X (3600p/5400p) - + 6X (4320p/6480p) 6X (4320p/6480p) - + 7X (5040p/7560p) 7X (5040p/7560p) - + 8X (5760p/8640p) 8X (5760p/8640p) - + Nearest Neighbor Plus proche voisin - + Bilinear Bilinéaire - + Bicubic Bicubique - + Gaussian Gaussien - + Lanczos Lanczos - + ScaleForce ScaleForce - + AMD FidelityFX Super Resolution AMD FidelityFX Super Resolution - + Area Area (Par zone) - + MMPX MMPX - + Zero-Tangent Zero-Tangent - + B-Spline B-Spline - + Mitchell Mitchell - + Spline-1 Spline-1 - - + + None Aucun - + FXAA FXAA - + SMAA SMAA - + Default (16:9) Par défaut (16:9) - + Force 4:3 Forcer le 4:3 - + Force 21:9 Forcer le 21:9 - + Force 16:10 Forcer le 16:10 - + Stretch to Window Étirer à la fenêtre - + Automatic Automatique - + 2x 2x - + 4x 4x - + 8x 8x - + 16x 16x - + 32x 32x - + 64x 64x - + Japanese (日本語) Japonais (日本語) - + American English Anglais Américain - + French (français) Français (français) - + German (Deutsch) Allemand (Deutsch) - + Italian (italiano) Italien (italiano) - + Spanish (español) Espagnol (español) - + Chinese Chinois - + Korean (한국어) Coréen (한국어) - + Dutch (Nederlands) Néerlandais (Nederlands) - + Portuguese (português) Portugais (português) - + Russian (Русский) Russe (Русский) - + Taiwanese Taïwanais - + British English Anglais Britannique - + Canadian French Français Canadien - + Latin American Spanish Espagnol d'Amérique Latine - + Simplified Chinese Chinois Simplifié - + Traditional Chinese (正體中文) Chinois Traditionnel (正體中文) - + Brazilian Portuguese (português do Brasil) Portugais Brésilien (português do Brasil) - + Polish (polska) - + Thai (แบบไทย) - - + + Japan Japon - + USA É.-U.A. - + Europe Europe - + Australia Australie - + China Chine - + Korea Corée - + Taiwan Taïwan - + Auto (%1) Auto select time zone Auto (%1) - + Default (%1) Default time zone Par défaut (%1) - + CET CET - + CST6CDT CST6CDT - + Cuba Cuba - + EET EET - + Egypt Égypte - + Eire Eire - + EST EST - + EST5EDT EST5EDT - + GB GB - + GB-Eire GB-Eire - + GMT GMT - + GMT+0 GMT+0 - + GMT-0 GMT-0 - + GMT0 GMT0 - + Greenwich Greenwich - + Hongkong Hong Kong - + HST HST - + Iceland Islande - + Iran Iran - + Israel Israël - + Jamaica Jamaïque - + Kwajalein Kwajalein - + Libya Libye - + MET MET - + MST MST - + MST7MDT MST7MDT - + Navajo Navajo - + NZ NZ - + NZ-CHAT NZ-CHAT - + Poland Pologne - + Portugal Portugal - + PRC PRC - + PST8PDT PST8PDT - + ROC ROC - + ROK ROK - + Singapore Singapour - + Turkey Turquie - + UCT UCT - + Universal Universel - + UTC UTC - + W-SU W-SU - + WET WET - + Zulu Zulu - + Mono Mono - + Stereo Stéréo - + Surround Surround - + 4GB DRAM (Default) 4 GB DRAM (Par défaut) - + 6GB DRAM (Unsafe) 6 GB DRAM (Risqué) - + 8GB DRAM 8GO DRAM - + 10GB DRAM (Unsafe) 10GO DRAM (Insecure) - + 12GB DRAM (Unsafe) 12GO DRAM (Insecure) - + Docked Mode TV - + Handheld Mode Portable - - + + Off Désactivé - + Boost (1700MHz) Boost (1700MHz) - + Fast (2000MHz) Rapide (2000MHz) - + Always ask (Default) Toujours demander (par défaut) - + Only if game specifies not to stop Uniquement si le jeu précise de ne pas s'arrêter - + Never ask Jamais demander - - + + Medium (256) Moyen (256) - - + + High (512) Élevé (512) - + Very Small (16 MB) Très petit (16Mo) - + Small (32 MB) Petit (32Mo) - + Normal (128 MB) Normal (128Mo) - + Large (256 MB) Large (256Mo) - + Very Large (512 MB) Très large (512Mo) - + Very Low (4 MB) Très faible (4 Mo) - + Low (8 MB) Faible (8 Mo) - + Normal (16 MB) Normal (16 Mo) - + Medium (32 MB) Moyen (32 Mo) - + High (64 MB) Élevé (64 Mo) - + Very Low (32) Très faible (32) - + Low (64) Faible (64) - + Normal (128) Normal (128) - + Disabled Désactivé - + ExtendedDynamicState 1 État dynamique étendu 1 - + ExtendedDynamicState 2 État dynamique étendu 2 - + ExtendedDynamicState 3 État dynamique étendu 3 - + Tree View Vue en liste - + Grid View Vue en grille @@ -5782,7 +5778,7 @@ Faites glisser les points pour modifier la position ou double-cliquez sur les ce Gestionnaire de données - + Deleting ANY data is IRREVERSABLE! La suppression de TOUTES les données est IRRÉVERSIBLE ! @@ -5793,13 +5789,13 @@ Faites glisser les points pour modifier la position ou double-cliquez sur les ce - UserNAND - NAND utilisateur + User NAND + - SysNAND - SysNAND + System NAND + @@ -5845,7 +5841,7 @@ Faites glisser les points pour modifier la position ou double-cliquez sur les ce Importer les données dans ce répertoire. Cela peut prendre un certain temps et supprimera TOUTES LES DONNÉES EXISTANTES ! - + Calculating... Calcul en cours… diff --git a/dist/languages/hu.ts b/dist/languages/hu.ts index 59028255cc..42ced640de 100644 --- a/dist/languages/hu.ts +++ b/dist/languages/hu.ts @@ -773,11 +773,22 @@ This feature is experimental. + Use asynchronous GPU emulation + + + + + Uses an extra CPU thread for rendering. +This option should always remain enabled. + + + + NVDEC emulation: NVDEC emuláció: - + Specifies how videos should be decoded. It can either use the CPU or the GPU for decoding, or perform no decoding at all (black screen on videos). In most cases, GPU decoding provides the best performance. @@ -786,12 +797,12 @@ A dekódoláshoz használhatja a CPU-t vagy a GPU-t, vagy egyáltalán nem vége A legtöbb esetben a GPU dekódolás nyújtja a legjobb teljesítményt. - + ASTC Decoding Method: ASTC dekódoló módszer: - + This option controls how ASTC textures should be decoded. CPU: Use the CPU for decoding. GPU: Use the GPU's compute shaders to decode ASTC textures (recommended). @@ -800,55 +811,55 @@ stuttering but may present artifacts. - + ASTC Recompression Method: ASTC újraszűrési módszer: - + Most GPUs lack support for ASTC textures and must decompress to anintermediate format: RGBA8. BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, saving VRAM but degrading image quality. - + Frame Pacing Mode (Vulkan only) - + Controls how the emulator manages frame pacing to reduce stuttering and make the frame rate smoother and more consistent. - + VRAM Usage Mode: VRAM használati mód: - + Selects whether the emulator should prefer to conserve memory or make maximum usage of available video memory for performance. Aggressive mode may impact performance of other applications such as recording software. - + Skip CPU Inner Invalidation - + Skips certain cache invalidations during memory updates, reducing CPU usage and improving latency. This may cause soft-crashes. - + VSync Mode: VSync mód: - + FIFO (VSync) does not drop frames or exhibit tearing but is limited by the screen refresh rate. FIFO Relaxed allows tearing as it recovers from a slow down. Mailbox can have lower latency than FIFO and does not tear but may drop frames. @@ -856,1376 +867,1361 @@ Immediate (no synchronization) presents whatever is available and can exhibit te - + Sync Memory Operations - + Ensures data consistency between compute and memory operations. This option fixes issues in games, but may degrade performance. Unreal Engine 4 games often see the most significant changes thereof. - + Enable asynchronous presentation (Vulkan only) Aszinkron prezentálás engedélyezése (csak Vulkan) - + Slightly improves performance by moving presentation to a separate CPU thread. Kicsit javítja a teljesítményt azáltal, hogy a megjelenítést külön CPU szálra helyezi át. - + Force maximum clocks (Vulkan only) Maximális órajelek kényszerítése (csak Vulkan) - + Runs work in the background while waiting for graphics commands to keep the GPU from lowering its clock speed. A háttérben fut, miközben várja a grafikai parancsokat, hogy a GPU ne csökkentse az órajelét. - + Anisotropic Filtering: Anizotropikus szűrés: - + Controls the quality of texture rendering at oblique angles. Safe to set at 16x on most GPUs. - + GPU Mode: - + Controls the GPU emulation mode. Most games render fine with Fast or Balanced modes, but Accurate is still required for some. Particles tend to only render correctly with Accurate mode. - + DMA Accuracy: - + Controls the DMA precision accuracy. Safe precision fixes issues in some games but may degrade performance. - + Enable asynchronous shader compilation - + May reduce shader stutter. - + Fast GPU Time - + Overclocks the emulated GPU to increase dynamic resolution and render distance. Use 256 for maximal performance and 512 for maximal graphics fidelity. - + GPU Unswizzle - + Accelerates BCn 3D texture decoding using GPU compute. Disable if experiencing crashes or graphical glitches. - + GPU Unswizzle Max Texture Size - + Sets the maximum size (MiB) for GPU-based texture unswizzling. While the GPU is faster for medium and large textures, the CPU may be more efficient for very small ones. Adjust this to find the balance between GPU acceleration and CPU overhead. - + GPU Unswizzle Stream Size - + Sets the maximum amount of texture data (in MiB) processed per frame. Higher values can reduce stutter during texture loading but may impact frame consistency. - + GPU Unswizzle Chunk Size - + Determines the number of depth slices processed in a single dispatch. Increasing this can improve throughput on high-end GPUs but may cause TDR or driver timeouts on weaker hardware. - + Use Vulkan pipeline cache Vulkan pipeline gyorsítótár használata. - + Enables GPU vendor-specific pipeline cache. This option can improve shader loading time significantly in cases where the Vulkan driver does not store pipeline cache files internally. - + Enable Compute Pipelines (Intel Vulkan Only) - + Required by some games. This setting only exists for Intel proprietary drivers and may crash if enabled. Compute pipelines are always enabled on all other drivers. - + Enable Reactive Flushing Reaktív ürítés használata - + Uses reactive flushing instead of predictive flushing, allowing more accurate memory syncing. Reaktív ürítést használ a prediktív ürítés helyett, ami pontosabb memóriaszinkronizálást tesz lehetővé. - + Sync to framerate of video playback Szinkronizálás a videolejátszás képkockasebességéhez - + Run the game at normal speed during video playback, even when the framerate is unlocked. A játék futtatása normál sebességgel videolejátszás közben, még akkor is, ha a képkockasebesség fel van oldva. - + Barrier feedback loops - + Improves rendering of transparency effects in specific games. Javítja az átlátszósági effektek megjelenítését bizonyos játékokban. - + Enable buffer history - + Enables access to previous buffer states. This option may improve rendering quality and performance consistency in some games. - + Fix bloom effects - + Removes bloom in Burnout. - + Enable Legacy Rescale Pass - + May fix rescale issues in some games by relying on behavior from the previous implementation. Legacy behavior workaround that fixes line artifacts on AMD and Intel GPUs, and grey texture flicker on Nvidia GPUs in Luigis Mansion 3. - + Extended Dynamic State - + Controls the number of features that can be used in Extended Dynamic State. Higher states allow for more features and can increase performance, but may cause additional graphical issues. - + Vertex Input Dynamic State - + Enables vertex input dynamic state feature for better quality and performance. - + Sample Shading - + Allows the fragment shader to execute per sample in a multi-sampled fragment instead of once per fragment. Improves graphics quality at the cost of performance. Higher values improve quality but degrade performance. - + RNG Seed - + Controls the seed of the random number generator. Mainly used for speedrunning. - + Device Name Eszköznév - + The name of the console. - + Custom RTC Date: Egyéni RTC dátum: - + This option allows to change the clock of the console. Can be used to manipulate time in games. - + The number of seconds from the current unix time - + Language: Nyelv: - + This option can be overridden when region setting is auto-select - + Region: Régió: - + The region of the console. - + Time Zone: Időzóna: - + The time zone of the console. - + Sound Output Mode: Hangkimeneti mód: - + Console Mode: Konzol mód: - + Selects if the console is in Docked or Handheld mode. Games will change their resolution, details and supported controllers and depending on this setting. Setting to Handheld can help improve performance for low end systems. - - Unit Serial - - - - - Battery Serial - - - - - Debug knobs - - - - + Prompt for user profile on boot - + Useful if multiple people use the same PC. - + Pause when not in focus - + Pauses emulation when focusing on other windows. - + Confirm before stopping emulation Emuláció leállításának megerősítése - + Overrides prompts asking to confirm stopping the emulation. Enabling it bypasses such prompts and directly exits the emulation. - + Hide mouse on inactivity Egér elrejtése inaktivitáskor - + Hides the mouse after 2.5s of inactivity. - + Disable controller applet Vezérlő applet letiltása - + Forcibly disables the use of the controller applet in emulated programs. When a program attempts to open the controller applet, it is immediately closed. - + Check for updates - + Whether or not to check for updates upon startup. - + Enable Gamemode Játékmód engedélyezése - + Force X11 as Graphics Backend - + Custom frontend Egyéni frontend - + Real applet Valódi applet - + Never - + On Load - + Always - + CPU CPU - + GPU GPU - + CPU Asynchronous CPU aszinkron - + Uncompressed (Best quality) Tömörítetlen (legjobb minőség) - + BC1 (Low quality) BC1 (alacsony minőség) - + BC3 (Medium quality) BC3 (közepes minőség) - - + + Auto Automatikus - + 30 FPS - + 60 FPS - + 90 FPS - + 120 FPS - + Conservative Takarékos - + Aggressive Aggresszív - + Vulkan Vulkan - + OpenGL GLSL - + OpenGL GLASM (Assembly Shaders, NVIDIA Only) - + OpenGL SPIR-V (Experimental, AMD/Mesa Only) - + Null Null - + Fast - + Balanced - - + + Accurate Pontos - - + + Default Alapértelmezett - + Unsafe (fast) - + Safe (stable) - + Unsafe Nem biztonságos - + Paranoid (disables most optimizations) Paranoid (a legtöbb optimalizálást letiltja) - + Debugging - + Dynarmic Dinamikus - + NCE NCE - + Borderless Windowed Szegély nélküli ablak - + Exclusive Fullscreen Exkluzív teljes képernyő - + No Video Output Nincs videokimenet - + CPU Video Decoding CPU videódekódolás - + GPU Video Decoding (Default) GPU videódekódolás (alapértelmezett) - + 0.25X (180p/270p) [EXPERIMENTAL] - + 0.5X (360p/540p) [EXPERIMENTAL] 0.5X (360p/540p) [KÍSÉRLETI] - + 0.75X (540p/810p) [EXPERIMENTAL] 0.75X (540p/810p) [KÍSÉRLETI] - + 1X (720p/1080p) 1X (720p/1080p) - + 1.25X (900p/1350p) [EXPERIMENTAL] - + 1.5X (1080p/1620p) [EXPERIMENTAL] 1.5X (1080p/1620p) [KÍSÉRLETI] - + 2X (1440p/2160p) 2X (1440p/2160p) - + 3X (2160p/3240p) 3X (2160p/3240p) - + 4X (2880p/4320p) 4X (2880p/4320p) - + 5X (3600p/5400p) 5X (3600p/5400p) - + 6X (4320p/6480p) 6X (4320p/6480p) - + 7X (5040p/7560p) 7X (5040p/7560p) - + 8X (5760p/8640p) 8X (5760p/8640p) - + Nearest Neighbor Legközelebbi szomszéd - + Bilinear Bilineáris - + Bicubic Bikubikus - + Gaussian Gauss-féle - + Lanczos - + ScaleForce ScaleForce - + AMD FidelityFX Super Resolution - + Area - + MMPX - + Zero-Tangent - + B-Spline - + Mitchell - + Spline-1 - - + + None Nincs - + FXAA FXAA - + SMAA SMAA - + Default (16:9) Alapértelmezett (16:9) - + Force 4:3 4:3 kényszerítése - + Force 21:9 21:9 kényszerítése - + Force 16:10 16:10 kényszerítése - + Stretch to Window Ablakhoz nyújtás - + Automatic Automatikus - + 2x 2x - + 4x 4x - + 8x 8x - + 16x 16x - + 32x - + 64x - + Japanese (日本語) Japán (日本語) - + American English Amerikai angol - + French (français) Francia (français) - + German (Deutsch) Német (Deutsch) - + Italian (italiano) Olasz (italiano) - + Spanish (español) Spanyol (español) - + Chinese Kínai - + Korean (한국어) Koreai (한국어) - + Dutch (Nederlands) Holland (Nederlands) - + Portuguese (português) Portugál (português) - + Russian (Русский) Orosz (Русский) - + Taiwanese Tajvani - + British English Brit Angol - + Canadian French Kanadai francia - + Latin American Spanish Latin-amerikai spanyol - + Simplified Chinese Egyszerűsített kínai - + Traditional Chinese (正體中文) Hagyományos kínai (正體中文) - + Brazilian Portuguese (português do Brasil) Brazíliai portugál (português do Brasil) - + Polish (polska) - + Thai (แบบไทย) - - + + Japan Japán - + USA USA - + Europe Európa - + Australia Ausztrália - + China Kína - + Korea Korea - + Taiwan Tajvan - + Auto (%1) Auto select time zone Automatikus (%1) - + Default (%1) Default time zone Alapértelmezett (%1) - + CET CET - + CST6CDT CST6CDT - + Cuba Kuba - + EET EET - + Egypt Egyiptom - + Eire Eire - + EST EST - + EST5EDT EST5EDT - + GB GB - + GB-Eire GB-Eire - + GMT GMT - + GMT+0 GMT+0 - + GMT-0 GMT-0 - + GMT0 GMT0 - + Greenwich Greenwich - + Hongkong Hongkong - + HST HST - + Iceland Izland - + Iran Irán - + Israel Izrael - + Jamaica Jamaika - + Kwajalein Kwajalein - + Libya Líbia - + MET MET - + MST MST - + MST7MDT MST7MDT - + Navajo Navahó - + NZ NZ - + NZ-CHAT NZ-CHAT - + Poland Lengyelország - + Portugal Portugália - + PRC PRC - + PST8PDT PST8PDT - + ROC ROC - + ROK ROK - + Singapore Szingapúr - + Turkey Törökország - + UCT UCT - + Universal Univerzális - + UTC UTC - + W-SU W-SU - + WET WET - + Zulu Zulu - + Mono Mono - + Stereo Sztereó - + Surround Térhangzás - + 4GB DRAM (Default) 4GB DRAM (Alapértelmezett) - + 6GB DRAM (Unsafe) 6GB DRAM (Nem biztonságos) - + 8GB DRAM - + 10GB DRAM (Unsafe) - + 12GB DRAM (Unsafe) - + Docked Dokkolt - + Handheld Kézi - - + + Off - + Boost (1700MHz) - + Fast (2000MHz) - + Always ask (Default) Mindig kérdezz rá (alapértelmezett) - + Only if game specifies not to stop Csak akkor, ha a játék kifejezetten kéri a folytatást. - + Never ask Soha ne kérdezz rá - - + + Medium (256) - - + + High (512) - + Very Small (16 MB) - + Small (32 MB) - + Normal (128 MB) - + Large (256 MB) - + Very Large (512 MB) - + Very Low (4 MB) - + Low (8 MB) - + Normal (16 MB) - + Medium (32 MB) - + High (64 MB) - + Very Low (32) - + Low (64) - + Normal (128) - + Disabled - + ExtendedDynamicState 1 - + ExtendedDynamicState 2 - + ExtendedDynamicState 3 - + Tree View - + Grid View @@ -5707,7 +5703,7 @@ Húzd a pontokat a pozíció megváltoztatásához, vagy kattints duplán a táb - + Deleting ANY data is IRREVERSABLE! @@ -5718,12 +5714,12 @@ Húzd a pontokat a pozíció megváltoztatásához, vagy kattints duplán a táb - UserNAND + User NAND - SysNAND + System NAND @@ -5770,7 +5766,7 @@ Húzd a pontokat a pozíció megváltoztatásához, vagy kattints duplán a táb - + Calculating... diff --git a/dist/languages/id.ts b/dist/languages/id.ts index 363d10f2e3..6a28fe45e2 100644 --- a/dist/languages/id.ts +++ b/dist/languages/id.ts @@ -43,7 +43,7 @@ li.checked::marker { content: "\2612"; } <html><head/><body><p><span style=" font-size:7pt;">&quot;Nintendo Switch&quot; is a trademark of Nintendo. Eden is not affiliated with Nintendo in any way.</span></p></body></html> - + <html><head/><body><p><span style=" font-size:7pt;">&quot;Nintendo Switch&quot; merupakan merek dagang milik Nintendo. eden tidak berafiliasi dengan Nintendo dalam maksud apapun.</span></p></body></html> @@ -498,7 +498,8 @@ Ini akan melarang nama pengguna forum mereka dan alamat IP mereka. This option increases CPU emulation thread use from 1 to the maximum of 4. This is mainly a debug option and shouldn't be disabled. - + Opsi ini meningkatkan penggunaan utas emulasi CPU dari 1 menjadi maksimum Switch yaitu 4. +Ini terutama merupakan opsi debug dan sebaiknya tidak dinonaktifkan. @@ -787,11 +788,22 @@ Fitur ini eksperimental. + Use asynchronous GPU emulation + + + + + Uses an extra CPU thread for rendering. +This option should always remain enabled. + + + + NVDEC emulation: Emulasi NVDEC: - + Specifies how videos should be decoded. It can either use the CPU or the GPU for decoding, or perform no decoding at all (black screen on videos). In most cases, GPU decoding provides the best performance. @@ -800,12 +812,12 @@ Ini dapat menggunakan CPU atau GPU untuk dekode, atau tidak melakukan dekode sam Dalam kebanyakan kasus, dekode GPU memberikan kinerja terbaik. - + ASTC Decoding Method: ASTC Metode Dekoding: - + This option controls how ASTC textures should be decoded. CPU: Use the CPU for decoding. GPU: Use the GPU's compute shaders to decode ASTC textures (recommended). @@ -814,55 +826,55 @@ stuttering but may present artifacts. - + ASTC Recompression Method: ASTC Metode Pemampatan Ulang: - + Most GPUs lack support for ASTC textures and must decompress to anintermediate format: RGBA8. BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, saving VRAM but degrading image quality. - + Frame Pacing Mode (Vulkan only) - + Controls how the emulator manages frame pacing to reduce stuttering and make the frame rate smoother and more consistent. - + VRAM Usage Mode: Mode Penggunaan VRAM: - + Selects whether the emulator should prefer to conserve memory or make maximum usage of available video memory for performance. Aggressive mode may impact performance of other applications such as recording software. - + Skip CPU Inner Invalidation Abaikan Invalidasi Internal CPU - + Skips certain cache invalidations during memory updates, reducing CPU usage and improving latency. This may cause soft-crashes. - + VSync Mode: Mode Sinkronisasi Vertikal - + FIFO (VSync) does not drop frames or exhibit tearing but is limited by the screen refresh rate. FIFO Relaxed allows tearing as it recovers from a slow down. Mailbox can have lower latency than FIFO and does not tear but may drop frames. @@ -870,1377 +882,1362 @@ Immediate (no synchronization) presents whatever is available and can exhibit te - + Sync Memory Operations Sinkronisasi Operasi Memori - + Ensures data consistency between compute and memory operations. This option fixes issues in games, but may degrade performance. Unreal Engine 4 games often see the most significant changes thereof. - + Enable asynchronous presentation (Vulkan only) Aktifkan presentasi asinkron (hanya Vulkan) - + Slightly improves performance by moving presentation to a separate CPU thread. Meningkatkan kinerja sedikit dengan memindahkan presentasi ke thread CPU terpisah. - + Force maximum clocks (Vulkan only) Paksa jam maximum (Vulkan only) - + Runs work in the background while waiting for graphics commands to keep the GPU from lowering its clock speed. Berjalan bekerja di latar belakang sambil menunggu perintah grafis untuk mencegah GPU agar tidak menurunkan kecepatan jamnya. - + Anisotropic Filtering: Anisotropic Filtering: - + Controls the quality of texture rendering at oblique angles. Safe to set at 16x on most GPUs. - + GPU Mode: - + Mode GPU: - + Controls the GPU emulation mode. Most games render fine with Fast or Balanced modes, but Accurate is still required for some. Particles tend to only render correctly with Accurate mode. - + DMA Accuracy: - + Akurasi DMA - + Controls the DMA precision accuracy. Safe precision fixes issues in some games but may degrade performance. - + Enable asynchronous shader compilation - + Gunakan kompilasi shader asinkron - + May reduce shader stutter. - + Fast GPU Time - + Percepatan Waktu CPU - + Overclocks the emulated GPU to increase dynamic resolution and render distance. Use 256 for maximal performance and 512 for maximal graphics fidelity. - + GPU Unswizzle - + Accelerates BCn 3D texture decoding using GPU compute. Disable if experiencing crashes or graphical glitches. - + GPU Unswizzle Max Texture Size - + Sets the maximum size (MiB) for GPU-based texture unswizzling. While the GPU is faster for medium and large textures, the CPU may be more efficient for very small ones. Adjust this to find the balance between GPU acceleration and CPU overhead. - + GPU Unswizzle Stream Size - + Sets the maximum amount of texture data (in MiB) processed per frame. Higher values can reduce stutter during texture loading but may impact frame consistency. - + GPU Unswizzle Chunk Size - + Determines the number of depth slices processed in a single dispatch. Increasing this can improve throughput on high-end GPUs but may cause TDR or driver timeouts on weaker hardware. - + Use Vulkan pipeline cache Gunakan pipeline cache Vulkan - + Enables GPU vendor-specific pipeline cache. This option can improve shader loading time significantly in cases where the Vulkan driver does not store pipeline cache files internally. Memungkinkan cache pipeline spesifik vendor GPU. Opsi ini dapat meningkatkan waktu pemuatan shader secara signifikan dalam kasus di mana driver Vulkan tidak menyimpan file cache pipeline secara internal. - + Enable Compute Pipelines (Intel Vulkan Only) Aktifkan Pipa Komputasi (Hanya Intel Vulkan) - + Required by some games. This setting only exists for Intel proprietary drivers and may crash if enabled. Compute pipelines are always enabled on all other drivers. - + Enable Reactive Flushing Aktifkan Reactive Flushing - + Uses reactive flushing instead of predictive flushing, allowing more accurate memory syncing. Menggunakan pemadatan reaktif alih-alih pemadatan prediktif, memungkinkan sinkronisasi memori yang lebih akurat. - + Sync to framerate of video playback Sinkronkan dengan kecepatan pemutaran video - + Run the game at normal speed during video playback, even when the framerate is unlocked. Jalankan permainan dengan kecepatan normal selama pemutaran video, bahkan ketika framerate tidak terkunci. - + Barrier feedback loops Loop umpan balik penghalang - + Improves rendering of transparency effects in specific games. Meningkatkan rendering efek transparansi dalam game tertentu. - + Enable buffer history - + Enables access to previous buffer states. This option may improve rendering quality and performance consistency in some games. - + Fix bloom effects - + Perbaiki efek bloom - + Removes bloom in Burnout. - + Enable Legacy Rescale Pass - + May fix rescale issues in some games by relying on behavior from the previous implementation. Legacy behavior workaround that fixes line artifacts on AMD and Intel GPUs, and grey texture flicker on Nvidia GPUs in Luigis Mansion 3. - + Extended Dynamic State - + Controls the number of features that can be used in Extended Dynamic State. Higher states allow for more features and can increase performance, but may cause additional graphical issues. - + Vertex Input Dynamic State - + Enables vertex input dynamic state feature for better quality and performance. - + Sample Shading - + Pencahayaan Sampel - + Allows the fragment shader to execute per sample in a multi-sampled fragment instead of once per fragment. Improves graphics quality at the cost of performance. Higher values improve quality but degrade performance. - + RNG Seed Benih RNG - + Controls the seed of the random number generator. Mainly used for speedrunning. - + Device Name Nama Perangkat - + The name of the console. - + Custom RTC Date: Tanggal RTC Kustom: - + This option allows to change the clock of the console. Can be used to manipulate time in games. - + The number of seconds from the current unix time - + Language: Bahasa - + This option can be overridden when region setting is auto-select - + Region: Wilayah: - + The region of the console. - + Time Zone: Zona Waktu: - + The time zone of the console. - + Sound Output Mode: Mode keluaran suara. - + Console Mode: Mode Konsol - + Selects if the console is in Docked or Handheld mode. Games will change their resolution, details and supported controllers and depending on this setting. Setting to Handheld can help improve performance for low end systems. - - Unit Serial - - - - - Battery Serial - - - - - Debug knobs - - - - + Prompt for user profile on boot - + Useful if multiple people use the same PC. - + Pause when not in focus - + Pauses emulation when focusing on other windows. - + Confirm before stopping emulation Konfirmasi sebelum menghentikan emulasi - + Overrides prompts asking to confirm stopping the emulation. Enabling it bypasses such prompts and directly exits the emulation. - + Hide mouse on inactivity Sembunyikan mouse saat tidak aktif - + Hides the mouse after 2.5s of inactivity. - + Disable controller applet Nonaktifkan aplikasi pengontrol - + Forcibly disables the use of the controller applet in emulated programs. When a program attempts to open the controller applet, it is immediately closed. - + Check for updates Cek Pembaruan - + Whether or not to check for updates upon startup. - + Enable Gamemode Aktifkan Mode Permainan - + Force X11 as Graphics Backend - + Custom frontend Tampilan depan kustom - + Real applet Aplikasi nyata - + Never Tidak Pernah - + On Load - + Always Selalu - + CPU CPU - + GPU GPU - + CPU Asynchronous CPU sinkron - + Uncompressed (Best quality) Tidak terkompresi (Kualitas Terbaik) - + BC1 (Low quality) BC1 (Kualitas rendah) - + BC3 (Medium quality) BC3 (Kualitas sedang) - - + + Auto Otomatis - + 30 FPS - + 60 FPS - + 90 FPS - + 120 FPS - + Conservative Konservatif - + Aggressive Agresif - + Vulkan Vulkan - + OpenGL GLSL - + OpenGL GLASM (Assembly Shaders, NVIDIA Only) - + OpenGL SPIR-V (Experimental, AMD/Mesa Only) - + Null Null - + Fast - + Cepat + + + + Balanced + Seimbang - Balanced - - - - - + Accurate Akurat - - + + Default Bawaan - + Unsafe (fast) - + Safe (stable) - + Unsafe Berbahaya - + Paranoid (disables most optimizations) Paranoid (menonaktifkan sebagian besar optimasi) - + Debugging - + Dynarmic Dynarmic - + NCE NCE - + Borderless Windowed Layar Tanpa Batas - + Exclusive Fullscreen Layar Penuh Eksklusif - + No Video Output Tidak ada Keluaran Suara - + CPU Video Decoding Penguraian Video menggunakan CPU - + GPU Video Decoding (Default) Penguraian Video menggunakan GPU (Bawaan) - + 0.25X (180p/270p) [EXPERIMENTAL] - + 0.5X (360p/540p) [EXPERIMENTAL] 0.5X (360p/540p) [EKSPERIMENTAL] - + 0.75X (540p/810p) [EXPERIMENTAL] 0.75X (540p/810p) [EKSPERIMENTAL] - + 1X (720p/1080p) 1X (720p/1080p) - + 1.25X (900p/1350p) [EXPERIMENTAL] - + 1.5X (1080p/1620p) [EXPERIMENTAL] 1.5X (1080p/1620p) [EKSPERIMENTAL] - + 2X (1440p/2160p) 2X (1440p/2160p) - + 3X (2160p/3240p) 3X (2160p/3240p) - + 4X (2880p/4320p) 4X (2880p/4320p) - + 5X (3600p/5400p) 5X (3600p/5400p) - + 6X (4320p/6480p) 6X (4320p/6480p) - + 7X (5040p/7560p) 7X (5040p/7560p) - + 8X (5760p/8640p) 8X (5760p/8640p) - + Nearest Neighbor Nearest Neighbor - + Bilinear Biliner - + Bicubic Bikubik - + Gaussian Gaussian - + Lanczos - + ScaleForce ScaleForce - + AMD FidelityFX Super Resolution - + Area - + MMPX - + Zero-Tangent - + B-Spline - + Mitchell - + Spline-1 - - + + None Tak ada - + FXAA FXAA - + SMAA SMAA - + Default (16:9) Bawaan (16:9) - + Force 4:3 Paksa 4:3 - + Force 21:9 Paksa 21:9 - + Force 16:10 Paksa 16:10 - + Stretch to Window Regangkan ke Layar - + Automatic Otomatis - + 2x 2x - + 4x 4x - + 8x 8x - + 16x 16x - + 32x - + 64x - + Japanese (日本語) Jepang (日本語) - + American English Bahasa Inggris Amerika - + French (français) Prancis (français) - + German (Deutsch) Jerman (Deutsch) - + Italian (italiano) Italia (italiano) - + Spanish (español) Spanyol (español) - + Chinese Cina - + Korean (한국어) Korea (한국어) - + Dutch (Nederlands) Belanda (Nederlands) - + Portuguese (português) Portugis (português) - + Russian (Русский) Rusia (Русский) - + Taiwanese Taiwan - + British English Inggris Britania - + Canadian French Prancis Kanada - + Latin American Spanish Spanyol Amerika Latin - + Simplified Chinese Cina Sederhana - + Traditional Chinese (正體中文) Cina Tradisional (正體中文) - + Brazilian Portuguese (português do Brasil) Portugis Brazil (português do Brasil) - + Polish (polska) - + Thai (แบบไทย) - - + + Japan Jepang - + USA USA - + Europe Eropa - + Australia Australia - + China Tiongkok - + Korea Korea - + Taiwan Taiwan - + Auto (%1) Auto select time zone Auto (%1) - + Default (%1) Default time zone Bawaan (%1) - + CET CET - + CST6CDT CST6CDT - + Cuba Kuba - + EET EET - + Egypt Mesir - + Eire Éire - + EST EST - + EST5EDT EST5EDT - + GB GB - + GB-Eire GB-Éire - + GMT GMT - + GMT+0 GMT+0 - + GMT-0 GMT-0 - + GMT0 GMT0 - + Greenwich Greenwich - + Hongkong Hongkong - + HST HST - + Iceland Islandia - + Iran Iran - + Israel Israel - + Jamaica Jamaika - + Kwajalein Kwajalein - + Libya Libya - + MET MET - + MST MST - + MST7MDT MST7MDT - + Navajo Navajo - + NZ NZ - + NZ-CHAT NZ-CHAT - + Poland Polandia - + Portugal Portugal - + PRC PRC - + PST8PDT PST8PDT - + ROC ROC - + ROK ROK - + Singapore Singapura - + Turkey Turki - + UCT UCT - + Universal Universal - + UTC UTC - + W-SU W-SU - + WET WET - + Zulu Zulu - + Mono Mono - + Stereo Stereo - + Surround Surround - + 4GB DRAM (Default) 4GB DRAM (Bawaan) - + 6GB DRAM (Unsafe) 6GB DRAM (Tidak Aman) - + 8GB DRAM - + 10GB DRAM (Unsafe) - + 10GB DRAM (Tidak Aman) - + 12GB DRAM (Unsafe) - + 12GB DRAM (Tidak Aman) - + Docked Terpasang - + Handheld Jinjing - - + + Off - + Boost (1700MHz) - + Fast (2000MHz) - + Always ask (Default) Selalu tanyakan (Bawaan) - + Only if game specifies not to stop Hanya jika permainan menentukan untuk tidak berhenti - + Never ask Jangan pernah bertanya - - + + Medium (256) - + Sedang (256) - - + + High (512) - + Tinggi (512) + + + + Very Small (16 MB) + Sangat Kecil (16 MB) - Very Small (16 MB) - + Small (32 MB) + Kecil (32 MB) - Small (32 MB) - - - - Normal (128 MB) - + Large (256 MB) - + Very Large (512 MB) - + Very Low (4 MB) - + Low (8 MB) - + Normal (16 MB) - + Medium (32 MB) - + High (64 MB) - + Very Low (32) - + Low (64) - + Normal (128) - + Disabled - + ExtendedDynamicState 1 - + ExtendedDynamicState 2 - + ExtendedDynamicState 3 - + Tree View - + Grid View @@ -3025,7 +3022,7 @@ Memungkinkan berbagai macam optimasi IR. Save Data - + Simpanan Data @@ -3101,7 +3098,7 @@ Memungkinkan berbagai macam optimasi IR. Select Save Data Directory... - + Pilih Direktori Simpanan Data... @@ -3121,7 +3118,7 @@ Memungkinkan berbagai macam optimasi IR. Save Data Directory - + Direktori Simpanan Data @@ -3136,7 +3133,7 @@ Memungkinkan berbagai macam optimasi IR. Reset to NAND - + Setel ulang ke NAND @@ -3160,23 +3157,23 @@ To: %2 Migrate Save Data - + Migrasi Simpanan Data Migrating save data... - + Memigrasi simpanan data... Cancel - + Batalkan Migration Failed - + Migrasi Gagal @@ -3192,7 +3189,7 @@ To: %2 Migration Complete - + Migrasi selesai @@ -5745,7 +5742,7 @@ Drag points to change position, or double-click table cells to edit values. - + Deleting ANY data is IRREVERSABLE! @@ -5756,12 +5753,12 @@ Drag points to change position, or double-click table cells to edit values. - UserNAND + User NAND - SysNAND + System NAND @@ -5808,7 +5805,7 @@ Drag points to change position, or double-click table cells to edit values. - + Calculating... @@ -5838,7 +5835,7 @@ Drag points to change position, or double-click table cells to edit values. Version - + Versi @@ -5889,7 +5886,7 @@ Drag points to change position, or double-click table cells to edit values. Connecting - + Menghubungkan @@ -5962,7 +5959,7 @@ Drag points to change position, or double-click table cells to edit values. Incorrect password. - + Password salah @@ -6004,7 +6001,7 @@ Please go to Configure -> System -> Network and make a selection. Error - + Galat @@ -6142,17 +6139,17 @@ Please go to Configure -> System -> Network and make a selection. Manage Play Time - + Kelola waktu bermain Edit Play Time Data - + Edit data waktu bermain Remove Play Time Data - + Hapus data waktu bermain @@ -6168,7 +6165,7 @@ Please go to Configure -> System -> Network and make a selection. Verify Integrity - + Verifikasi Integritas @@ -6258,7 +6255,7 @@ Please go to Configure -> System -> Network and make a selection. Play time - + Waktu bermain @@ -6534,7 +6531,7 @@ Debug Message: Fullscreen - + Layar penuh @@ -6554,7 +6551,7 @@ Debug Message: Create Room - + Buat Ruangan @@ -6564,12 +6561,12 @@ Debug Message: Leave Room - + Keluar dari Ruangan Show Current Room - + Tampilkan ruangan saat ini @@ -9786,7 +9783,7 @@ Would you like to manually select a portable folder to use? Mod Name - + Nama Mod @@ -9796,7 +9793,7 @@ Would you like to manually select a portable folder to use? RomFS - + RomFS @@ -9806,12 +9803,12 @@ Would you like to manually select a portable folder to use? Cheat - + Cheat Mod Type - + Tipe Mod @@ -9855,7 +9852,7 @@ Most mods are RomFS mods, but patches (.pchtxt) are typically ExeFS mods. Contains game save data. DO NOT REMOVE UNLESS YOU KNOW WHAT YOU'RE DOING! - + Berisikan simpanan data game. JANGAN DIHAPUS KECUALI KAMU TAHU YANG KAMU LAKUKAN! @@ -9865,7 +9862,7 @@ Most mods are RomFS mods, but patches (.pchtxt) are typically ExeFS mods. Contains updates and DLC for games. - + Berisi pembaruan dan DLC untuk game ini @@ -10019,7 +10016,7 @@ This is recommended if you want to share data between emulators. Players: - + Pemain: @@ -10029,7 +10026,7 @@ This is recommended if you want to share data between emulators. P4 - + P4 @@ -10093,17 +10090,17 @@ This is recommended if you want to share data between emulators. Use Current Config - + Pakai konfigurasi saat ini P2 - + P2 P1 - + P1 @@ -10115,27 +10112,27 @@ This is recommended if you want to share data between emulators. P3 - + P3 P7 - + P7 P8 - + P8 P5 - + P5 P6 - + P6 @@ -10171,7 +10168,7 @@ This is recommended if you want to share data between emulators. Create - + Buat @@ -10226,7 +10223,7 @@ This is recommended if you want to share data between emulators. Not enough controllers - + Kontroler tidak cukup. @@ -10382,7 +10379,7 @@ Please try again or contact the developer of the software. Software Keyboard - + Papan Ketik Perangkat Lunak @@ -10437,7 +10434,7 @@ By selecting "From Eden", previous save data stored in Ryujinx will be Cancel - + Batalkan @@ -10468,17 +10465,17 @@ By selecting "From Eden", previous save data stored in Ryujinx will be Hours: - + Jam: Minutes: - + Menit: Seconds: - + Detik: diff --git a/dist/languages/it.ts b/dist/languages/it.ts index ea3780e3fa..146f7f2605 100644 --- a/dist/languages/it.ts +++ b/dist/languages/it.ts @@ -799,11 +799,22 @@ Questa funzione è sperimentale. + Use asynchronous GPU emulation + + + + + Uses an extra CPU thread for rendering. +This option should always remain enabled. + + + + NVDEC emulation: Emulazione NVDEC: - + Specifies how videos should be decoded. It can either use the CPU or the GPU for decoding, or perform no decoding at all (black screen on videos). In most cases, GPU decoding provides the best performance. @@ -812,12 +823,12 @@ In most cases, GPU decoding provides the best performance. Nella maggior parte dei casi, la decodifica tramite GPU fornisce prestazioni migliori. - + ASTC Decoding Method: Metodo di decodifica ASTC: - + This option controls how ASTC textures should be decoded. CPU: Use the CPU for decoding. GPU: Use the GPU's compute shaders to decode ASTC textures (recommended). @@ -829,12 +840,12 @@ GPU: Usa i compute shader della GPU per decodificare le texture ASTC (consigliat CPU (Asincrono): Usa la CPU per decodificare le texture ASTC se richiesto. Elimina lo stuttering causato dalla decodifica ma potrebbe generare artefatti visivi. - + ASTC Recompression Method: Metodo di ricompressione ASTC: - + Most GPUs lack support for ASTC textures and must decompress to anintermediate format: RGBA8. BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, saving VRAM but degrading image quality. @@ -842,44 +853,44 @@ BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, BC1/BC3: Il formato intermedio sarà ricompresso nel formato BC1 o BC3, risparmiando VRAM ma peggiorando la qualità visiva. - + Frame Pacing Mode (Vulkan only) - + Controls how the emulator manages frame pacing to reduce stuttering and make the frame rate smoother and more consistent. - + VRAM Usage Mode: Modalità di utilizzo della VRAM: - + Selects whether the emulator should prefer to conserve memory or make maximum usage of available video memory for performance. Aggressive mode may impact performance of other applications such as recording software. Determina se l'emulatore dovrebbe risparmiare memoria o utilizzarne il più possibile per massimizzare le prestazioni. La modalità aggressiva potrebbe impattare sulle prestazioni di altre applicazioni, come i programmi di registrazione. - + Skip CPU Inner Invalidation Salta invalidamento interno CPU - + Skips certain cache invalidations during memory updates, reducing CPU usage and improving latency. This may cause soft-crashes. Salta alcuni invalidamenti della cache durante gli aggiornamenti della memoria, riducendo l'uso della CPU e migliorando la latenza. Questo potrebbe causare soft-crash. - + VSync Mode: Modalità VSync: - + FIFO (VSync) does not drop frames or exhibit tearing but is limited by the screen refresh rate. FIFO Relaxed allows tearing as it recovers from a slow down. Mailbox can have lower latency than FIFO and does not tear but may drop frames. @@ -890,12 +901,12 @@ Mailbox può avere una latenza minore di FIFO e non ha tearing ma potrebbe perde Immediate (no sincronizzazione) mostra tutto il disponibile, quindi anche tearing. - + Sync Memory Operations Sincronizza operazioni di memoria - + Ensures data consistency between compute and memory operations. This option fixes issues in games, but may degrade performance. Unreal Engine 4 games often see the most significant changes thereof. @@ -904,44 +915,44 @@ Questa opzione dovrebbe risolvere problemi in alcuni giochi, ma potrebbe ridurre I giochi con Unreal Engine 4 sembrano essere i più colpiti. - + Enable asynchronous presentation (Vulkan only) Abilita la presentazione asincrona (solo Vulkan) - + Slightly improves performance by moving presentation to a separate CPU thread. Migliora di poco le prestazioni spostando la presentazione su un thread della CPU separato. - + Force maximum clocks (Vulkan only) Forza clock massimi (solo Vulkan) - + Runs work in the background while waiting for graphics commands to keep the GPU from lowering its clock speed. Esegue del lavoro in background durante l'attesa dei comandi grafici per evitare che la GPU diminuisca la sua velocità di clock. - + Anisotropic Filtering: Filtro anisotropico: - + Controls the quality of texture rendering at oblique angles. Safe to set at 16x on most GPUs. Controlla la qualità del rendering delle texture negli angoli obliqui. Si può utilizzare in modo sicuro al 16x su quasi tutte le GPU. - + GPU Mode: Modalità GPU: - + Controls the GPU emulation mode. Most games render fine with Fast or Balanced modes, but Accurate is still required for some. Particles tend to only render correctly with Accurate mode. @@ -950,101 +961,101 @@ La maggior parte dei giochi viene renderizzata senza problemi con le modalità & I particellari tendono a essere renderizzati correttamente solo in modalità "Accurata". - + DMA Accuracy: Precisione DMA: - + Controls the DMA precision accuracy. Safe precision fixes issues in some games but may degrade performance. Controlla la precisione del DMA. La precisione "Sicura" risolve dei problemi in alcuni giochi, ma può ridurre le prestazioni. - + Enable asynchronous shader compilation Abilita la compilazione asincrona degli shader - + May reduce shader stutter. Può ridurre i fenomeni di stuttering (scatti) causati dagli shader. - + Fast GPU Time Tempo GPU veloce - + Overclocks the emulated GPU to increase dynamic resolution and render distance. Use 256 for maximal performance and 512 for maximal graphics fidelity. Aumenta il clock della GPU emulata per aumentare la risoluzione dinamica e la distanza di rendering. Usa 256 per massimizzare le prestazioni e 512 per massimizzare la qualità visiva. - + GPU Unswizzle - + Accelerates BCn 3D texture decoding using GPU compute. Disable if experiencing crashes or graphical glitches. - + GPU Unswizzle Max Texture Size - + Sets the maximum size (MiB) for GPU-based texture unswizzling. While the GPU is faster for medium and large textures, the CPU may be more efficient for very small ones. Adjust this to find the balance between GPU acceleration and CPU overhead. - + GPU Unswizzle Stream Size - + Sets the maximum amount of texture data (in MiB) processed per frame. Higher values can reduce stutter during texture loading but may impact frame consistency. - + GPU Unswizzle Chunk Size - + Determines the number of depth slices processed in a single dispatch. Increasing this can improve throughput on high-end GPUs but may cause TDR or driver timeouts on weaker hardware. - + Use Vulkan pipeline cache Usa la cache delle pipeline di Vulkan - + Enables GPU vendor-specific pipeline cache. This option can improve shader loading time significantly in cases where the Vulkan driver does not store pipeline cache files internally. Abilita la cache delle pipeline specifica del produttore della GPU. Quest'opzione può ridurre di molto i tempi di caricamento degli shader nei casi in cui il driver Vulkan non memorizza la cache delle pipeline internamente. - + Enable Compute Pipelines (Intel Vulkan Only) Abilita le compute pipeline (solo per Vulkan su Intel) - + Required by some games. This setting only exists for Intel proprietary drivers and may crash if enabled. Compute pipelines are always enabled on all other drivers. @@ -1053,182 +1064,182 @@ Quest'impostazione esiste solo per i driver proprietari Intel e potrebbe fa Le compute pipelines sono sempre attivate su tutti gli altri drivers. - + Enable Reactive Flushing Abilita il flushing reattivo - + Uses reactive flushing instead of predictive flushing, allowing more accurate memory syncing. Utilizza il flushing reattivo invece di quello predittivo, al fine di ottenere una sincronizzazione della memoria più accurata. - + Sync to framerate of video playback Sincronizza il framerate a quello del video - + Run the game at normal speed during video playback, even when the framerate is unlocked. Esegue il gioco a velocità normale durante le cutscene, anche quando il framerate è sbloccato. - + Barrier feedback loops Barrier feedback loops - + Improves rendering of transparency effects in specific games. Migliora il rendering degli effetti di trasparenza in alcuni giochi. - + Enable buffer history - + Enables access to previous buffer states. This option may improve rendering quality and performance consistency in some games. - + Fix bloom effects - + Removes bloom in Burnout. - + Enable Legacy Rescale Pass - + May fix rescale issues in some games by relying on behavior from the previous implementation. Legacy behavior workaround that fixes line artifacts on AMD and Intel GPUs, and grey texture flicker on Nvidia GPUs in Luigis Mansion 3. - + Extended Dynamic State Stato dinamico esteso - + Controls the number of features that can be used in Extended Dynamic State. Higher states allow for more features and can increase performance, but may cause additional graphical issues. Controlla il numero di funzionalità che possono essere usate con lo stato dinamico esteso. Gli stati più alti consentono più funzionalità e possono migliorare le prestazioni, ma possono causare ulteriori problemi grafici. - + Vertex Input Dynamic State - + Enables vertex input dynamic state feature for better quality and performance. - + Sample Shading Sample shading - + Allows the fragment shader to execute per sample in a multi-sampled fragment instead of once per fragment. Improves graphics quality at the cost of performance. Higher values improve quality but degrade performance. Permette al fragment shader di eseguire per campione in un frammento multi-campione invece che una volta per frammento. Migliora la qualità grafica a scapito delle prestazioni. Alti valori migliorano la qualità ma peggiorano le prestazioni. - + RNG Seed Seed RNG - + Controls the seed of the random number generator. Mainly used for speedrunning. Controlla il seme del generatore di numeri casuali. Principalmente utilizzato per le speedrun. - + Device Name Nome del dispositivo - + The name of the console. Il nome della console. - + Custom RTC Date: Data RTC personalizzata: - + This option allows to change the clock of the console. Can be used to manipulate time in games. Quest'opzione permette di modificare l'orologio della console. Può essere usato per manipolare il tempo nei giochi. - + The number of seconds from the current unix time Il numero di secondi dal tempo Unix attuale - + Language: Lingua: - + This option can be overridden when region setting is auto-select Può essere rimpiazzato se il fuso orario della Regione è impostato su Auto - + Region: Regione: - + The region of the console. La regione della console. - + Time Zone: Fuso orario: - + The time zone of the console. Il fuso orario della console. - + Sound Output Mode: Modalità di output del suono: - + Console Mode: Modalità console: - + Selects if the console is in Docked or Handheld mode. Games will change their resolution, details and supported controllers and depending on this setting. Setting to Handheld can help improve performance for low end systems. @@ -1237,1046 +1248,1031 @@ I giochi ne terranno conto e modificheranno la risoluzione, i dettagli e i contr Impostare l'opzione su "Portatile" può aiutare a migliorare le prestazioni sui sistemi meno potenti. - - Unit Serial - Codice seriale dell'unità - - - - Battery Serial - Codice seriale della batteria - - - - Debug knobs - - - - + Prompt for user profile on boot Scegli il profilo utente all'avvio - + Useful if multiple people use the same PC. Utile se più persone utilizzano lo stesso PC. - + Pause when not in focus Metti in pausa quando la finestra non è in primo piano - + Pauses emulation when focusing on other windows. Mette in pausa l'emulazione quando altre finestre sono in primo piano. - + Confirm before stopping emulation Chiedi conferma prima di arrestare l'emulazione - + Overrides prompts asking to confirm stopping the emulation. Enabling it bypasses such prompts and directly exits the emulation. Sovrascrive le richieste di conferma per fermare l'emulazione. Abilitarla bypassa queste richieste e l'emulazione cesserà immediatamente. - + Hide mouse on inactivity Nascondi il puntatore del mouse se inattivo - + Hides the mouse after 2.5s of inactivity. Nasconde il mouse dopo 2,5 secondi di inattività. - + Disable controller applet Disabilita l'applet controller - + Forcibly disables the use of the controller applet in emulated programs. When a program attempts to open the controller applet, it is immediately closed. Disabilita forzatamente l'uso dell'applet del controller nei programmi emulati. Quando un programma proverà ad aprire l'applet del controller, quest'ultimo verrà immediatamente chiuso. - + Check for updates Controlla la presenza di aggiornamenti - + Whether or not to check for updates upon startup. Determina se controllare o meno la presenza di aggiornamenti all'avvio. - + Enable Gamemode Abilita Gamemode - + Force X11 as Graphics Backend Forza l'uso del back-end grafico X11 - + Custom frontend Frontend personalizzato - + Real applet Applet reale - + Never Mai - + On Load Al caricamento - + Always Sempre - + CPU CPU - + GPU GPU - + CPU Asynchronous CPU (Asincrono) - + Uncompressed (Best quality) Nessuna compressione (qualità migliore) - + BC1 (Low quality) BC1 (qualità bassa) - + BC3 (Medium quality) BC3 (qualità media) - - + + Auto Automatico - + 30 FPS 30 FPS - + 60 FPS 60 FPS - + 90 FPS 90 FPS - + 120 FPS 120 FPS - + Conservative Conservativa - + Aggressive Aggressiva - + Vulkan Vulkan - + OpenGL GLSL OpenGL GLSL - + OpenGL GLASM (Assembly Shaders, NVIDIA Only) OpenGL GLASM (shader assembly, solo NVIDIA) - + OpenGL SPIR-V (Experimental, AMD/Mesa Only) OpenGL SPIR-V (sperimentale, solo AMD/MESA) - + Null Nullo - + Fast Veloce - + Balanced Bilanciata - - + + Accurate Accurata - - + + Default Predefinito - + Unsafe (fast) Non sicuro (veloce) - + Safe (stable) Sicuro (stabile) - + Unsafe Non sicura - + Paranoid (disables most optimizations) Paranoica (disabilita la maggior parte delle ottimizzazioni) - + Debugging Debug - + Dynarmic Dynarmic - + NCE NCE - + Borderless Windowed Finestra senza bordi - + Exclusive Fullscreen Schermo intero esclusivo - + No Video Output Nessun output video - + CPU Video Decoding Decodifica video CPU - + GPU Video Decoding (Default) Decodifica video GPU (predefinita) - + 0.25X (180p/270p) [EXPERIMENTAL] 0.25X (180p/270p) [SPERIMENTALE] - + 0.5X (360p/540p) [EXPERIMENTAL] 0.5X (360p/540p) [SPERIMENTALE] - + 0.75X (540p/810p) [EXPERIMENTAL] 0.75X (540p/810p) [SPERIMENTALE] - + 1X (720p/1080p) 1X (720p/1080p) - + 1.25X (900p/1350p) [EXPERIMENTAL] 1.25X (900p/1350p) [SPERIMENTALE] - + 1.5X (1080p/1620p) [EXPERIMENTAL] 1.5X (1080p/1620p) [SPERIMENTALE] - + 2X (1440p/2160p) 2X (1440p/2160p) - + 3X (2160p/3240p) 3X (2160p/3240p) - + 4X (2880p/4320p) 4X (2880p/4320p) - + 5X (3600p/5400p) 5X (3600p/5400p) - + 6X (4320p/6480p) 6X (4320p/6480p) - + 7X (5040p/7560p) 7X (5040p/7560p) - + 8X (5760p/8640p) 8X (5760p/8640p) - + Nearest Neighbor Nearest neighbor - + Bilinear Bilineare - + Bicubic Bicubico - + Gaussian Gaussiano - + Lanczos Lanczos - + ScaleForce ScaleForce - + AMD FidelityFX Super Resolution AMD FidelityFX Super Resolution - + Area Area - + MMPX MMPX - + Zero-Tangent Zero-Tangent - + B-Spline B-Spline - + Mitchell Mitchell - + Spline-1 Spline-1 - - + + None Nessuna - + FXAA FXAA - + SMAA SMAA - + Default (16:9) Predefinito (16:9) - + Force 4:3 Forza 4:3 - + Force 21:9 Forza 21:9 - + Force 16:10 Forza 16:10 - + Stretch to Window Allunga a finestra - + Automatic Automatico - + 2x 2x - + 4x 4x - + 8x 8x - + 16x 16x - + 32x 32x - + 64x 64x - + Japanese (日本語) Giapponese (日本語) - + American English Inglese americano - + French (français) Francese (français) - + German (Deutsch) Tedesco (Deutsch) - + Italian (italiano) Italiano - + Spanish (español) Spagnolo (español) - + Chinese Cinese - + Korean (한국어) Coreano (한국어) - + Dutch (Nederlands) Olandese (Nederlands) - + Portuguese (português) Portoghese (português) - + Russian (Русский) Russo (Русский) - + Taiwanese Taiwanese - + British English Inglese britannico - + Canadian French Francese canadese - + Latin American Spanish Spagnolo latino-americano - + Simplified Chinese Cinese semplificato - + Traditional Chinese (正體中文) Cinese tradizionale (正體中文) - + Brazilian Portuguese (português do Brasil) Portoghese brasiliano (português do Brasil) - + Polish (polska) Polacco (polska) - + Thai (แบบไทย) Thailandese (แบบไทย) - - + + Japan Giappone - + USA USA - + Europe Europa - + Australia Australia - + China Cina - + Korea Corea - + Taiwan Taiwan - + Auto (%1) Auto select time zone Automatico (%1) - + Default (%1) Default time zone Predefinito (%1) - + CET CET - + CST6CDT CST6CDT - + Cuba Cuba - + EET EET - + Egypt Egitto - + Eire Eire - + EST EST - + EST5EDT EST5EDT - + GB GB - + GB-Eire GB-Eire - + GMT GMT - + GMT+0 GMT+0 - + GMT-0 GMT-0 - + GMT0 GMT0 - + Greenwich Greenwich - + Hongkong Hongkong - + HST HST - + Iceland Islanda - + Iran Iran - + Israel Israele - + Jamaica Giamaica - + Kwajalein Kwajalein - + Libya Libia - + MET MET - + MST MST - + MST7MDT MST7MDT - + Navajo Navajo - + NZ NZ - + NZ-CHAT NZ-CHAT - + Poland Polonia - + Portugal Portogallo - + PRC PRC - + PST8PDT PST8PDT - + ROC ROC - + ROK ROK - + Singapore Singapore - + Turkey Turchia - + UCT UCT - + Universal Universale - + UTC UTC - + W-SU W-SU - + WET WET - + Zulu Zulu - + Mono Mono - + Stereo Stereo - + Surround Surround - + 4GB DRAM (Default) 4GB DRAM (Predefinito) - + 6GB DRAM (Unsafe) 6GB DRAM (Non sicuro) - + 8GB DRAM 8GB DRAM - + 10GB DRAM (Unsafe) 10GB DRAM (Non sicuro) - + 12GB DRAM (Unsafe) 12GB DRAM (Non sicuro) - + Docked Dock - + Handheld Portatile - - + + Off Disattivato - + Boost (1700MHz) Boost (1700MHz) - + Fast (2000MHz) Veloce (2000MHz) - + Always ask (Default) Chiedi sempre (Predefinito) - + Only if game specifies not to stop Solo se il gioco richiede di non essere arrestato - + Never ask Non chiedere mai - - + + Medium (256) Medio (256) - - + + High (512) Alto (512) - + Very Small (16 MB) Molto piccola (16 MB) - + Small (32 MB) Piccola (32 MB) - + Normal (128 MB) Normale (128 MB) - + Large (256 MB) Grande (256 MB) - + Very Large (512 MB) Molto grande (512 MB) - + Very Low (4 MB) Molto bassa (4 MB) - + Low (8 MB) Bassa (8 MB) - + Normal (16 MB) Normale (16 MB) - + Medium (32 MB) Media (32 MB) - + High (64 MB) Alta (64 MB) - + Very Low (32) Molto basso (32) - + Low (64) Basso (64) - + Normal (128) Normale (128) - + Disabled Disabilitato - + ExtendedDynamicState 1 Stato dinamico esteso 1 - + ExtendedDynamicState 2 Stato dinamico esteso 2 - + ExtendedDynamicState 3 Stato dinamico esteso 3 - + Tree View Vista ad albero - + Grid View Vista a griglia @@ -5804,7 +5800,7 @@ Trascina i punti per cambiare posizione, oppure clicca due volte la cella in tab Gestione dati - + Deleting ANY data is IRREVERSABLE! La cancellazione di qualsiasi dato è IRREVERSIBILE! @@ -5815,13 +5811,13 @@ Trascina i punti per cambiare posizione, oppure clicca due volte la cella in tab - UserNAND - UserNAND + User NAND + - SysNAND - SysNAND + System NAND + @@ -5867,7 +5863,7 @@ Trascina i punti per cambiare posizione, oppure clicca due volte la cella in tab Importa dati in questa cartella. Potrebbe impiegare un po' di tempo, e TUTTI I DATI ESISTENTI verranno cancellati! - + Calculating... Calcolo in corso... diff --git a/dist/languages/ja_JP.ts b/dist/languages/ja_JP.ts index b1a1a78573..a6128bb885 100644 --- a/dist/languages/ja_JP.ts +++ b/dist/languages/ja_JP.ts @@ -769,23 +769,34 @@ This feature is experimental. + Use asynchronous GPU emulation + + + + + Uses an extra CPU thread for rendering. +This option should always remain enabled. + + + + NVDEC emulation: NVDEC エミュレーション: - + Specifies how videos should be decoded. It can either use the CPU or the GPU for decoding, or perform no decoding at all (black screen on videos). In most cases, GPU decoding provides the best performance. - + ASTC Decoding Method: ASTC デコード方式: - + This option controls how ASTC textures should be decoded. CPU: Use the CPU for decoding. GPU: Use the GPU's compute shaders to decode ASTC textures (recommended). @@ -794,55 +805,55 @@ stuttering but may present artifacts. - + ASTC Recompression Method: ASTC 再圧縮方式: - + Most GPUs lack support for ASTC textures and must decompress to anintermediate format: RGBA8. BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, saving VRAM but degrading image quality. - + Frame Pacing Mode (Vulkan only) - + Controls how the emulator manages frame pacing to reduce stuttering and make the frame rate smoother and more consistent. - + VRAM Usage Mode: - + Selects whether the emulator should prefer to conserve memory or make maximum usage of available video memory for performance. Aggressive mode may impact performance of other applications such as recording software. - + Skip CPU Inner Invalidation - + Skips certain cache invalidations during memory updates, reducing CPU usage and improving latency. This may cause soft-crashes. - + VSync Mode: 垂直同期: - + FIFO (VSync) does not drop frames or exhibit tearing but is limited by the screen refresh rate. FIFO Relaxed allows tearing as it recovers from a slow down. Mailbox can have lower latency than FIFO and does not tear but may drop frames. @@ -853,1376 +864,1361 @@ Mailbox は FIFO よりも遅延が小さくティアリングがありません Immediate (no synchronization) は表示可能なものをすべて表示し, ティアリング発生の可能性があります. - + Sync Memory Operations メモリ操作の同期 - + Ensures data consistency between compute and memory operations. This option fixes issues in games, but may degrade performance. Unreal Engine 4 games often see the most significant changes thereof. - + Enable asynchronous presentation (Vulkan only) 非同期プレゼンテーション (Vulkan のみ) - + Slightly improves performance by moving presentation to a separate CPU thread. - + Force maximum clocks (Vulkan only) 最大クロック強制 (Vulkan のみ) - + Runs work in the background while waiting for graphics commands to keep the GPU from lowering its clock speed. GPUのクロックスピードを下げないように、グラフィックコマンドを待っている間、バックグラウンドで作業を実行させます。 - + Anisotropic Filtering: 異方性フィルタリング： - + Controls the quality of texture rendering at oblique angles. Safe to set at 16x on most GPUs. - + GPU Mode: GPUモード: - + Controls the GPU emulation mode. Most games render fine with Fast or Balanced modes, but Accurate is still required for some. Particles tend to only render correctly with Accurate mode. - + DMA Accuracy: DMA精度: - + Controls the DMA precision accuracy. Safe precision fixes issues in some games but may degrade performance. - + Enable asynchronous shader compilation - + May reduce shader stutter. - + Fast GPU Time - + Overclocks the emulated GPU to increase dynamic resolution and render distance. Use 256 for maximal performance and 512 for maximal graphics fidelity. - + GPU Unswizzle - + Accelerates BCn 3D texture decoding using GPU compute. Disable if experiencing crashes or graphical glitches. - + GPU Unswizzle Max Texture Size - + Sets the maximum size (MiB) for GPU-based texture unswizzling. While the GPU is faster for medium and large textures, the CPU may be more efficient for very small ones. Adjust this to find the balance between GPU acceleration and CPU overhead. - + GPU Unswizzle Stream Size - + Sets the maximum amount of texture data (in MiB) processed per frame. Higher values can reduce stutter during texture loading but may impact frame consistency. - + GPU Unswizzle Chunk Size - + Determines the number of depth slices processed in a single dispatch. Increasing this can improve throughput on high-end GPUs but may cause TDR or driver timeouts on weaker hardware. - + Use Vulkan pipeline cache Vulkan パイプラインキャッシュを使用 - + Enables GPU vendor-specific pipeline cache. This option can improve shader loading time significantly in cases where the Vulkan driver does not store pipeline cache files internally. - + Enable Compute Pipelines (Intel Vulkan Only) コンピュート・パイプラインの有効化（インテル Vulkan のみ） - + Required by some games. This setting only exists for Intel proprietary drivers and may crash if enabled. Compute pipelines are always enabled on all other drivers. - + Enable Reactive Flushing - + Uses reactive flushing instead of predictive flushing, allowing more accurate memory syncing. - + Sync to framerate of video playback ビデオ再生のフレームレートに同期する - + Run the game at normal speed during video playback, even when the framerate is unlocked. - + Barrier feedback loops - + Improves rendering of transparency effects in specific games. 特定のゲームにおける透明エフェクトのレンダリングを改善します。 - + Enable buffer history - + Enables access to previous buffer states. This option may improve rendering quality and performance consistency in some games. - + Fix bloom effects - + Removes bloom in Burnout. - + Enable Legacy Rescale Pass - + May fix rescale issues in some games by relying on behavior from the previous implementation. Legacy behavior workaround that fixes line artifacts on AMD and Intel GPUs, and grey texture flicker on Nvidia GPUs in Luigis Mansion 3. - + Extended Dynamic State - + Controls the number of features that can be used in Extended Dynamic State. Higher states allow for more features and can increase performance, but may cause additional graphical issues. - + Vertex Input Dynamic State - + Enables vertex input dynamic state feature for better quality and performance. - + Sample Shading - + Allows the fragment shader to execute per sample in a multi-sampled fragment instead of once per fragment. Improves graphics quality at the cost of performance. Higher values improve quality but degrade performance. - + RNG Seed 乱数シード値の変更 - + Controls the seed of the random number generator. Mainly used for speedrunning. - + Device Name デバイス名 - + The name of the console. - + Custom RTC Date: - + This option allows to change the clock of the console. Can be used to manipulate time in games. - + The number of seconds from the current unix time - + Language: 言語: - + This option can be overridden when region setting is auto-select - + Region: 地域: - + The region of the console. - + Time Zone: タイムゾーン： - + The time zone of the console. - + Sound Output Mode: 音声出力モード: - + Console Mode: コンソールモード: - + Selects if the console is in Docked or Handheld mode. Games will change their resolution, details and supported controllers and depending on this setting. Setting to Handheld can help improve performance for low end systems. - - Unit Serial - - - - - Battery Serial - - - - - Debug knobs - - - - + Prompt for user profile on boot - + Useful if multiple people use the same PC. - + Pause when not in focus - + Pauses emulation when focusing on other windows. - + Confirm before stopping emulation エミュレーションを停止する前に確認する - + Overrides prompts asking to confirm stopping the emulation. Enabling it bypasses such prompts and directly exits the emulation. - + Hide mouse on inactivity 非アクティブ時にマウスカーソルを隠す - + Hides the mouse after 2.5s of inactivity. - + Disable controller applet コントローラーアプレットの無効化 - + Forcibly disables the use of the controller applet in emulated programs. When a program attempts to open the controller applet, it is immediately closed. - + Check for updates - + Whether or not to check for updates upon startup. - + Enable Gamemode - + Force X11 as Graphics Backend - + Custom frontend - + Real applet - + Never - + On Load - + Always - + CPU CPU - + GPU GPU - + CPU Asynchronous CPU 非同期 - + Uncompressed (Best quality) 圧縮しない (最高品質) - + BC1 (Low quality) BC1 (低品質) - + BC3 (Medium quality) BC3 (中品質) - - + + Auto 自動 - + 30 FPS - + 60 FPS - + 90 FPS - + 120 FPS - + Conservative - + Aggressive - + Vulkan Vulkan - + OpenGL GLSL OpenGL GLSL - + OpenGL GLASM (Assembly Shaders, NVIDIA Only) OpenGL GLASM (アセンブリシェーダー、NVIDIA のみ) - + OpenGL SPIR-V (Experimental, AMD/Mesa Only) OpenGL SPIR-V（実験的、AMD/Mesaのみ） - + Null - + Fast - + Balanced - - + + Accurate 正確 - - + + Default デフォルト - + Unsafe (fast) - + Safe (stable) - + Unsafe 不安定 - + Paranoid (disables most optimizations) パラノイド (ほとんどの最適化を無効化) - + Debugging - + Dynarmic Dynarmic - + NCE NCE - + Borderless Windowed ボーダーレスウィンドウ - + Exclusive Fullscreen 排他的フルスクリーン - + No Video Output ビデオ出力しない - + CPU Video Decoding ビデオをCPUでデコード - + GPU Video Decoding (Default) ビデオをGPUでデコード (デフォルト) - + 0.25X (180p/270p) [EXPERIMENTAL] 0.25X (180p/270p) [EXPERIMENTAL] - + 0.5X (360p/540p) [EXPERIMENTAL] 0.5X (360p/540p) [実験的] - + 0.75X (540p/810p) [EXPERIMENTAL] 0.75X (540p/810p) [実験的] - + 1X (720p/1080p) 1X (720p/1080p) - + 1.25X (900p/1350p) [EXPERIMENTAL] 1.25X (900p/1350p) [EXPERIMENTAL] - + 1.5X (1080p/1620p) [EXPERIMENTAL] 1.5X (1080p/1620p) [実験的] - + 2X (1440p/2160p) 2X (1440p/2160p) - + 3X (2160p/3240p) 3X (2160p/3240p) - + 4X (2880p/4320p) 4X (2880p/4320p) - + 5X (3600p/5400p) 5X (3600p/5400p) - + 6X (4320p/6480p) 6X (4320p/6480p) - + 7X (5040p/7560p) 7X (5040p/7560p) - + 8X (5760p/8640p) 8X (5760p/8640p) - + Nearest Neighbor Nearest Neighbor - + Bilinear Bilinear - + Bicubic Bicubic - + Gaussian Gaussian - + Lanczos Lanczos - + ScaleForce ScaleForce - + AMD FidelityFX Super Resolution AMD FidelityFX Super Resolution - + Area - + MMPX MMPX - + Zero-Tangent - + B-Spline - + Mitchell - + Spline-1 - - + + None なし - + FXAA FXAA - + SMAA SMAA - + Default (16:9) デフォルト (16:9) - + Force 4:3 強制 4:3 - + Force 21:9 強制 21:9 - + Force 16:10 強制 16:10 - + Stretch to Window ウィンドウに合わせる - + Automatic 自動 - + 2x 2x - + 4x 4x - + 8x 8x - + 16x 16x - + 32x 32x - + 64x 64x - + Japanese (日本語) 日本語 - + American English アメリカ英語 - + French (français) フランス語 (français) - + German (Deutsch) ドイツ語 (Deutsch) - + Italian (italiano) イタリア語 (italiano) - + Spanish (español) スペイン語 (español) - + Chinese 中国語 - + Korean (한국어) 韓国語 (한국어) - + Dutch (Nederlands) オランダ語 (Nederlands) - + Portuguese (português) ポルトガル語 (português) - + Russian (Русский) ロシア語 (Русский) - + Taiwanese 台湾語 - + British English イギリス英語 - + Canadian French カナダフランス語 - + Latin American Spanish ラテンアメリカスペイン語 - + Simplified Chinese 簡体字中国語 - + Traditional Chinese (正體中文) 繁体字中国語 (正體中文) - + Brazilian Portuguese (português do Brasil) ブラジルポルトガル語 (português do Brasil) - + Polish (polska) - + Thai (แบบไทย) - - + + Japan 日本 - + USA アメリカ - + Europe ヨーロッパ - + Australia オーストラリア - + China 中国 - + Korea 韓国 - + Taiwan 台湾 - + Auto (%1) Auto select time zone 自動 (%1) - + Default (%1) Default time zone 既定 (%1) - + CET 中央ヨーロッパ時間 - + CST6CDT CST6CDT - + Cuba キューバ - + EET 東ヨーロッパ標準時 - + Egypt エジプト - + Eire アイルランド - + EST アメリカ東部標準時 - + EST5EDT EST5EDT - + GB GB - + GB-Eire イギリス-アイルランド - + GMT GMT - + GMT+0 GMT+0 - + GMT-0 GMT-0 - + GMT0 GMT0 - + Greenwich グリニッジ - + Hongkong 香港 - + HST ハワイ標準時 - + Iceland アイスランド - + Iran イラン - + Israel イスラエル - + Jamaica ジャマイカ - + Kwajalein クェゼリン - + Libya リビア - + MET 中東時間 - + MST MST - + MST7MDT MST7MDT - + Navajo ナバホ - + NZ NZ - + NZ-CHAT NZ-CHAT - + Poland ポーランド - + Portugal ポルトガル - + PRC PRC - + PST8PDT PST8PDT - + ROC ROC - + ROK ROK - + Singapore シンガポール - + Turkey トルコ - + UCT UCT - + Universal ユニバーサル - + UTC UTC - + W-SU W-SU - + WET WET - + Zulu ズールー - + Mono モノラル - + Stereo ステレオ - + Surround サラウンド - + 4GB DRAM (Default) 4GB DRAM (デフォルト) - + 6GB DRAM (Unsafe) 6GB DRAM (不安定) - + 8GB DRAM 8GB DRAM - + 10GB DRAM (Unsafe) - + 12GB DRAM (Unsafe) - + Docked Docked - + Handheld 携帯モード - - + + Off - + Boost (1700MHz) Boost (1700MHz) - + Fast (2000MHz) Fast (2000MHz) - + Always ask (Default) 常に確認する (デフォルト) - + Only if game specifies not to stop ゲームが停止しないように指定しているときのみ - + Never ask 確認しない - - + + Medium (256) - - + + High (512) - + Very Small (16 MB) - + Small (32 MB) - + Normal (128 MB) - + Large (256 MB) - + Very Large (512 MB) - + Very Low (4 MB) - + Low (8 MB) - + Normal (16 MB) - + Medium (32 MB) - + High (64 MB) - + Very Low (32) - + Low (64) - + Normal (128) - + Disabled 無効 - + ExtendedDynamicState 1 - + ExtendedDynamicState 2 - + ExtendedDynamicState 3 - + Tree View - + Grid View @@ -5730,7 +5726,7 @@ Drag points to change position, or double-click table cells to edit values. - + Deleting ANY data is IRREVERSABLE! @@ -5741,12 +5737,12 @@ Drag points to change position, or double-click table cells to edit values. - UserNAND + User NAND - SysNAND + System NAND @@ -5793,7 +5789,7 @@ Drag points to change position, or double-click table cells to edit values. - + Calculating... diff --git a/dist/languages/ko_KR.ts b/dist/languages/ko_KR.ts index 7ad3b36ae3..6737f5cae5 100644 --- a/dist/languages/ko_KR.ts +++ b/dist/languages/ko_KR.ts @@ -769,23 +769,34 @@ This feature is experimental. + Use asynchronous GPU emulation + + + + + Uses an extra CPU thread for rendering. +This option should always remain enabled. + + + + NVDEC emulation: NVDEC 에뮬레이션: - + Specifies how videos should be decoded. It can either use the CPU or the GPU for decoding, or perform no decoding at all (black screen on videos). In most cases, GPU decoding provides the best performance. - + ASTC Decoding Method: - + This option controls how ASTC textures should be decoded. CPU: Use the CPU for decoding. GPU: Use the GPU's compute shaders to decode ASTC textures (recommended). @@ -794,55 +805,55 @@ stuttering but may present artifacts. - + ASTC Recompression Method: - + Most GPUs lack support for ASTC textures and must decompress to anintermediate format: RGBA8. BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, saving VRAM but degrading image quality. - + Frame Pacing Mode (Vulkan only) - + Controls how the emulator manages frame pacing to reduce stuttering and make the frame rate smoother and more consistent. - + VRAM Usage Mode: - + Selects whether the emulator should prefer to conserve memory or make maximum usage of available video memory for performance. Aggressive mode may impact performance of other applications such as recording software. - + Skip CPU Inner Invalidation - + Skips certain cache invalidations during memory updates, reducing CPU usage and improving latency. This may cause soft-crashes. - + VSync Mode: VSync 모드: - + FIFO (VSync) does not drop frames or exhibit tearing but is limited by the screen refresh rate. FIFO Relaxed allows tearing as it recovers from a slow down. Mailbox can have lower latency than FIFO and does not tear but may drop frames. @@ -850,1376 +861,1361 @@ Immediate (no synchronization) presents whatever is available and can exhibit te - + Sync Memory Operations - + Ensures data consistency between compute and memory operations. This option fixes issues in games, but may degrade performance. Unreal Engine 4 games often see the most significant changes thereof. - + Enable asynchronous presentation (Vulkan only) 비동기 프레젠테이션 활성화(Vulkan만 해당) - + Slightly improves performance by moving presentation to a separate CPU thread. - + Force maximum clocks (Vulkan only) 강제 최대 클록 (Vulkan 전용) - + Runs work in the background while waiting for graphics commands to keep the GPU from lowering its clock speed. 실행은 GPU가 클럭 속도를 낮추지 않도록 그래픽 명령을 기다리는 동안 백그라운드에서 작동합니다. - + Anisotropic Filtering: 비등방성 필터링: - + Controls the quality of texture rendering at oblique angles. Safe to set at 16x on most GPUs. - + GPU Mode: - + Controls the GPU emulation mode. Most games render fine with Fast or Balanced modes, but Accurate is still required for some. Particles tend to only render correctly with Accurate mode. - + DMA Accuracy: - + Controls the DMA precision accuracy. Safe precision fixes issues in some games but may degrade performance. - + Enable asynchronous shader compilation - + May reduce shader stutter. - + Fast GPU Time - + Overclocks the emulated GPU to increase dynamic resolution and render distance. Use 256 for maximal performance and 512 for maximal graphics fidelity. - + GPU Unswizzle - + Accelerates BCn 3D texture decoding using GPU compute. Disable if experiencing crashes or graphical glitches. - + GPU Unswizzle Max Texture Size - + Sets the maximum size (MiB) for GPU-based texture unswizzling. While the GPU is faster for medium and large textures, the CPU may be more efficient for very small ones. Adjust this to find the balance between GPU acceleration and CPU overhead. - + GPU Unswizzle Stream Size - + Sets the maximum amount of texture data (in MiB) processed per frame. Higher values can reduce stutter during texture loading but may impact frame consistency. - + GPU Unswizzle Chunk Size - + Determines the number of depth slices processed in a single dispatch. Increasing this can improve throughput on high-end GPUs but may cause TDR or driver timeouts on weaker hardware. - + Use Vulkan pipeline cache Vulkan 파이프라인 캐시 사용 - + Enables GPU vendor-specific pipeline cache. This option can improve shader loading time significantly in cases where the Vulkan driver does not store pipeline cache files internally. - + Enable Compute Pipelines (Intel Vulkan Only) - + Required by some games. This setting only exists for Intel proprietary drivers and may crash if enabled. Compute pipelines are always enabled on all other drivers. - + Enable Reactive Flushing 반응형 플러싱 활성화 - + Uses reactive flushing instead of predictive flushing, allowing more accurate memory syncing. - + Sync to framerate of video playback 동영상 재생 프레임 속도에 동기화 - + Run the game at normal speed during video playback, even when the framerate is unlocked. 프레임 속도가 잠금 해제된 상태에서도 동영상 재생 중에 일반 속도로 게임을 실행합니다. - + Barrier feedback loops 차단 피드백 루프 - + Improves rendering of transparency effects in specific games. 특정 게임에서 투명도 효과의 렌더링을 개선합니다. - + Enable buffer history - + Enables access to previous buffer states. This option may improve rendering quality and performance consistency in some games. - + Fix bloom effects - + Removes bloom in Burnout. - + Enable Legacy Rescale Pass - + May fix rescale issues in some games by relying on behavior from the previous implementation. Legacy behavior workaround that fixes line artifacts on AMD and Intel GPUs, and grey texture flicker on Nvidia GPUs in Luigis Mansion 3. - + Extended Dynamic State - + Controls the number of features that can be used in Extended Dynamic State. Higher states allow for more features and can increase performance, but may cause additional graphical issues. - + Vertex Input Dynamic State - + Enables vertex input dynamic state feature for better quality and performance. - + Sample Shading - + Allows the fragment shader to execute per sample in a multi-sampled fragment instead of once per fragment. Improves graphics quality at the cost of performance. Higher values improve quality but degrade performance. - + RNG Seed RNG 시드 - + Controls the seed of the random number generator. Mainly used for speedrunning. - + Device Name 장치 이름 - + The name of the console. - + Custom RTC Date: - + This option allows to change the clock of the console. Can be used to manipulate time in games. - + The number of seconds from the current unix time - + Language: - + This option can be overridden when region setting is auto-select - + Region: 국가: - + The region of the console. - + Time Zone: 시계: - + The time zone of the console. - + Sound Output Mode: 소리 출력 모드: - + Console Mode: - + Selects if the console is in Docked or Handheld mode. Games will change their resolution, details and supported controllers and depending on this setting. Setting to Handheld can help improve performance for low end systems. - - Unit Serial - - - - - Battery Serial - - - - - Debug knobs - - - - + Prompt for user profile on boot - + Useful if multiple people use the same PC. - + Pause when not in focus - + Pauses emulation when focusing on other windows. - + Confirm before stopping emulation - + Overrides prompts asking to confirm stopping the emulation. Enabling it bypasses such prompts and directly exits the emulation. - + Hide mouse on inactivity 비활성 상태일 때 마우스 숨기기 - + Hides the mouse after 2.5s of inactivity. - + Disable controller applet 컨트롤러 애플릿 비활성화 - + Forcibly disables the use of the controller applet in emulated programs. When a program attempts to open the controller applet, it is immediately closed. - + Check for updates - + Whether or not to check for updates upon startup. - + Enable Gamemode - + Force X11 as Graphics Backend - + Custom frontend - + Real applet - + Never - + On Load - + Always - + CPU CPU - + GPU GPU - + CPU Asynchronous - + Uncompressed (Best quality) 비압축(최고 품질) - + BC1 (Low quality) BC1(저품질) - + BC3 (Medium quality) BC3(중간 품질) - - + + Auto 자동 - + 30 FPS - + 60 FPS - + 90 FPS - + 120 FPS - + Conservative - + Aggressive - + Vulkan Vulcan - + OpenGL GLSL - + OpenGL GLASM (Assembly Shaders, NVIDIA Only) - + OpenGL SPIR-V (Experimental, AMD/Mesa Only) - + Null Null - + Fast - + Balanced - - + + Accurate 정확함 - - + + Default 기본값 - + Unsafe (fast) - + Safe (stable) - + Unsafe 최적화 (안전하지 않음) - + Paranoid (disables most optimizations) 편집증(대부분의 최적화 비활성화) - + Debugging - + Dynarmic - + NCE - + Borderless Windowed 경계 없는 창 모드 - + Exclusive Fullscreen 독점 전체화면 모드 - + No Video Output 비디오 출력 없음 - + CPU Video Decoding CPU 비디오 디코딩 - + GPU Video Decoding (Default) GPU 비디오 디코딩(기본값) - + 0.25X (180p/270p) [EXPERIMENTAL] - + 0.5X (360p/540p) [EXPERIMENTAL] - + 0.75X (540p/810p) [EXPERIMENTAL] 0.75X (540p/810p) [실험적] - + 1X (720p/1080p) 1X (720p/1080p) - + 1.25X (900p/1350p) [EXPERIMENTAL] - + 1.5X (1080p/1620p) [EXPERIMENTAL] 1.5X (1080p/1620p) [실험적] - + 2X (1440p/2160p) 2X (1440p/2160p) - + 3X (2160p/3240p) 3X (2160p/3240p) - + 4X (2880p/4320p) 4X (2880p/4320p) - + 5X (3600p/5400p) 5X (3600p/5400p) - + 6X (4320p/6480p) 6X (4320p/6480p) - + 7X (5040p/7560p) 7X (5040p/7560p) - + 8X (5760p/8640p) 8X (5760p/8640p) - + Nearest Neighbor 최근접 보간 - + Bilinear Bilinear - + Bicubic Bicubic - + Gaussian 가우시안 - + Lanczos - + ScaleForce ScaleForce - + AMD FidelityFX Super Resolution - + Area - + MMPX - + Zero-Tangent - + B-Spline - + Mitchell - + Spline-1 - - + + None 없음 - + FXAA FXAA - + SMAA SMAA - + Default (16:9) 기본 (16:9) - + Force 4:3 강제 4:3 - + Force 21:9 강제 21:9 - + Force 16:10 강제 16:10 - + Stretch to Window 창에 맞게 늘림 - + Automatic 자동 - + 2x 2x - + 4x 4x - + 8x 8x - + 16x 16x - + 32x - + 64x - + Japanese (日本語) 일본어 (日本語) - + American English 미국 영어 - + French (français) 프랑스어(français) - + German (Deutsch) 독일어(Deutsch) - + Italian (italiano) 이탈리아어(italiano) - + Spanish (español) 스페인어(español) - + Chinese 중국어 - + Korean (한국어) 한국어 (Korean) - + Dutch (Nederlands) 네덜란드어 (Nederlands) - + Portuguese (português) 포르투갈어(português) - + Russian (Русский) 러시아어 (Русский) - + Taiwanese 대만어 - + British English 영어 (British English) - + Canadian French 캐나다 프랑스어 - + Latin American Spanish 라틴 아메리카 스페인어 - + Simplified Chinese 간체 - + Traditional Chinese (正體中文) 중국어 번체 (正體中文) - + Brazilian Portuguese (português do Brasil) 브라질 포르투갈어(português do Brasil) - + Polish (polska) - + Thai (แบบไทย) - - + + Japan 일본 - + USA 미국 - + Europe 유럽 - + Australia 호주 - + China 중국 - + Korea 대한민국 - + Taiwan 대만 - + Auto (%1) Auto select time zone 자동 (%1) - + Default (%1) Default time zone 기본 (%1) - + CET 중앙유럽 표준시(CET) - + CST6CDT CST6CDT - + Cuba 쿠바 - + EET 동유럽 표준시(EET) - + Egypt 이집트 - + Eire Eire - + EST EST - + EST5EDT EST5EDT - + GB 영국 하계 표준시(GB) - + GB-Eire GB-Eire - + GMT 그리니치 표준시(GMT) - + GMT+0 GMT+0 - + GMT-0 GMT-0 - + GMT0 GMT0 - + Greenwich 그리니치 - + Hongkong 홍콩 - + HST 하와이-알류샨 표준시(HST) - + Iceland 아이슬란드 - + Iran 이란 - + Israel 이스라엘 - + Jamaica 자메이카 - + Kwajalein 크와잘린 - + Libya 리비아 - + MET 중앙유럽 표준시(MET) - + MST 산악 표준시(MST) - + MST7MDT MST7MDT - + Navajo 나바호 - + NZ 뉴질랜드 표준시(NZ) - + NZ-CHAT 채텀 표준시(NZ-CHAT) - + Poland 폴란드 - + Portugal 포르투갈 - + PRC PRC - + PST8PDT PST8PDT - + ROC ROC - + ROK 북한 표준시(ROK) - + Singapore 싱가포르 - + Turkey 터키 - + UCT UCT - + Universal Universal - + UTC 협정 세계시(UTC) - + W-SU 유럽/모스크바(W-SU) - + WET 서유럽 - + Zulu 줄루 - + Mono 모노 - + Stereo 스테레오 - + Surround 서라운드 - + 4GB DRAM (Default) - + 6GB DRAM (Unsafe) - + 8GB DRAM - + 10GB DRAM (Unsafe) - + 12GB DRAM (Unsafe) - + Docked 거치 모드 - + Handheld 휴대 모드 - - + + Off - + Boost (1700MHz) - + Fast (2000MHz) - + Always ask (Default) - + Only if game specifies not to stop - + Never ask + + + + Medium (256) + + - Medium (256) - - - - - High (512) - + Very Small (16 MB) - + Small (32 MB) - + Normal (128 MB) - + Large (256 MB) - + Very Large (512 MB) - + Very Low (4 MB) - + Low (8 MB) - + Normal (16 MB) - + Medium (32 MB) - + High (64 MB) - + Very Low (32) - + Low (64) - + Normal (128) - + Disabled - + ExtendedDynamicState 1 - + ExtendedDynamicState 2 - + ExtendedDynamicState 3 - + Tree View - + Grid View @@ -5728,7 +5724,7 @@ Drag points to change position, or double-click table cells to edit values. - + Deleting ANY data is IRREVERSABLE! @@ -5739,12 +5735,12 @@ Drag points to change position, or double-click table cells to edit values. - UserNAND + User NAND - SysNAND + System NAND @@ -5791,7 +5787,7 @@ Drag points to change position, or double-click table cells to edit values. - + Calculating... diff --git a/dist/languages/nb.ts b/dist/languages/nb.ts index 7a830aca93..7f22606b5f 100644 --- a/dist/languages/nb.ts +++ b/dist/languages/nb.ts @@ -769,23 +769,34 @@ This feature is experimental. + Use asynchronous GPU emulation + + + + + Uses an extra CPU thread for rendering. +This option should always remain enabled. + + + + NVDEC emulation: NVDEC-emulering: - + Specifies how videos should be decoded. It can either use the CPU or the GPU for decoding, or perform no decoding at all (black screen on videos). In most cases, GPU decoding provides the best performance. - + ASTC Decoding Method: - + This option controls how ASTC textures should be decoded. CPU: Use the CPU for decoding. GPU: Use the GPU's compute shaders to decode ASTC textures (recommended). @@ -794,55 +805,55 @@ stuttering but may present artifacts. - + ASTC Recompression Method: - + Most GPUs lack support for ASTC textures and must decompress to anintermediate format: RGBA8. BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, saving VRAM but degrading image quality. - + Frame Pacing Mode (Vulkan only) - + Controls how the emulator manages frame pacing to reduce stuttering and make the frame rate smoother and more consistent. - + VRAM Usage Mode: - + Selects whether the emulator should prefer to conserve memory or make maximum usage of available video memory for performance. Aggressive mode may impact performance of other applications such as recording software. - + Skip CPU Inner Invalidation - + Skips certain cache invalidations during memory updates, reducing CPU usage and improving latency. This may cause soft-crashes. - + VSync Mode: VSync-modus: - + FIFO (VSync) does not drop frames or exhibit tearing but is limited by the screen refresh rate. FIFO Relaxed allows tearing as it recovers from a slow down. Mailbox can have lower latency than FIFO and does not tear but may drop frames. @@ -850,1376 +861,1361 @@ Immediate (no synchronization) presents whatever is available and can exhibit te - + Sync Memory Operations - + Ensures data consistency between compute and memory operations. This option fixes issues in games, but may degrade performance. Unreal Engine 4 games often see the most significant changes thereof. - + Enable asynchronous presentation (Vulkan only) Aktiver asynkron presentasjon (kun Vulkan) - + Slightly improves performance by moving presentation to a separate CPU thread. - + Force maximum clocks (Vulkan only) Tving maksikal klokkehastighet (kun Vulkan) - + Runs work in the background while waiting for graphics commands to keep the GPU from lowering its clock speed. Kjører arbeid i bakgrunnen mens den venter på grafikkommandoer for å forhindre at GPU-en senker klokkehastigheten. - + Anisotropic Filtering: Anisotropisk filtrering: - + Controls the quality of texture rendering at oblique angles. Safe to set at 16x on most GPUs. - + GPU Mode: GPU-modus: - + Controls the GPU emulation mode. Most games render fine with Fast or Balanced modes, but Accurate is still required for some. Particles tend to only render correctly with Accurate mode. - + DMA Accuracy: DMA-nøyaktighet: - + Controls the DMA precision accuracy. Safe precision fixes issues in some games but may degrade performance. - + Enable asynchronous shader compilation - + May reduce shader stutter. - + Fast GPU Time - + Overclocks the emulated GPU to increase dynamic resolution and render distance. Use 256 for maximal performance and 512 for maximal graphics fidelity. - + GPU Unswizzle - + Accelerates BCn 3D texture decoding using GPU compute. Disable if experiencing crashes or graphical glitches. - + GPU Unswizzle Max Texture Size - + Sets the maximum size (MiB) for GPU-based texture unswizzling. While the GPU is faster for medium and large textures, the CPU may be more efficient for very small ones. Adjust this to find the balance between GPU acceleration and CPU overhead. - + GPU Unswizzle Stream Size - + Sets the maximum amount of texture data (in MiB) processed per frame. Higher values can reduce stutter during texture loading but may impact frame consistency. - + GPU Unswizzle Chunk Size - + Determines the number of depth slices processed in a single dispatch. Increasing this can improve throughput on high-end GPUs but may cause TDR or driver timeouts on weaker hardware. - + Use Vulkan pipeline cache Bruk Vulkan-rørledningsbuffer - + Enables GPU vendor-specific pipeline cache. This option can improve shader loading time significantly in cases where the Vulkan driver does not store pipeline cache files internally. - + Enable Compute Pipelines (Intel Vulkan Only) - + Required by some games. This setting only exists for Intel proprietary drivers and may crash if enabled. Compute pipelines are always enabled on all other drivers. - + Enable Reactive Flushing Aktiver Reaktiv Tømming - + Uses reactive flushing instead of predictive flushing, allowing more accurate memory syncing. - + Sync to framerate of video playback Synkroniser med bildefrekvensen for videoavspilling - + Run the game at normal speed during video playback, even when the framerate is unlocked. Kjør spillet i normal hastighet under videoavspilling, selv når bildefrekvensen er låst opp. - + Barrier feedback loops Tilbakekoblingssløyfer for barrierer - + Improves rendering of transparency effects in specific games. Forbedrer gjengivelsen av transparenseffekter i spesifikke spill. - + Enable buffer history - + Enables access to previous buffer states. This option may improve rendering quality and performance consistency in some games. - + Fix bloom effects - + Removes bloom in Burnout. - + Enable Legacy Rescale Pass - + May fix rescale issues in some games by relying on behavior from the previous implementation. Legacy behavior workaround that fixes line artifacts on AMD and Intel GPUs, and grey texture flicker on Nvidia GPUs in Luigis Mansion 3. - + Extended Dynamic State - + Controls the number of features that can be used in Extended Dynamic State. Higher states allow for more features and can increase performance, but may cause additional graphical issues. - + Vertex Input Dynamic State - + Enables vertex input dynamic state feature for better quality and performance. - + Sample Shading - + Allows the fragment shader to execute per sample in a multi-sampled fragment instead of once per fragment. Improves graphics quality at the cost of performance. Higher values improve quality but degrade performance. - + RNG Seed RNG-frø - + Controls the seed of the random number generator. Mainly used for speedrunning. - + Device Name Enhetsnavn - + The name of the console. Konsollens navn. - + Custom RTC Date: Selvvalgt RTC-dato: - + This option allows to change the clock of the console. Can be used to manipulate time in games. - + The number of seconds from the current unix time - + Language: Språk: - + This option can be overridden when region setting is auto-select - + Region: Region: - + The region of the console. Konsollens region. - + Time Zone: Tidssone: - + The time zone of the console. Konsollens tidssone. - + Sound Output Mode: Lydutdatamodus: - + Console Mode: Konsollmodus: - + Selects if the console is in Docked or Handheld mode. Games will change their resolution, details and supported controllers and depending on this setting. Setting to Handheld can help improve performance for low end systems. - - Unit Serial - - - - - Battery Serial - - - - - Debug knobs - - - - + Prompt for user profile on boot - + Useful if multiple people use the same PC. - + Pause when not in focus - + Pauses emulation when focusing on other windows. - + Confirm before stopping emulation Bekreft før stopping av emulering - + Overrides prompts asking to confirm stopping the emulation. Enabling it bypasses such prompts and directly exits the emulation. - + Hide mouse on inactivity Gjem mus under inaktivitet - + Hides the mouse after 2.5s of inactivity. - + Disable controller applet Deaktiver kontroller-appleten - + Forcibly disables the use of the controller applet in emulated programs. When a program attempts to open the controller applet, it is immediately closed. - + Check for updates Se etter oppdateringer - + Whether or not to check for updates upon startup. - + Enable Gamemode - + Force X11 as Graphics Backend - + Custom frontend - + Real applet - + Never Aldri - + On Load - + Always Alltid - + CPU CPU - + GPU Skjermkort - + CPU Asynchronous - + Uncompressed (Best quality) Ukomprimert (Best kvalitet) - + BC1 (Low quality) BC1 (Lav kvalitet) - + BC3 (Medium quality) BC3 (Middels kvalitet) - - + + Auto Auto - + 30 FPS 30 FPS - + 60 FPS 60 FPS - + 90 FPS 90 FPS - + 120 FPS 120 FPS - + Conservative - + Aggressive Aggressiv - + Vulkan Vulkan - + OpenGL GLSL OpenGL GLSL - + OpenGL GLASM (Assembly Shaders, NVIDIA Only) - + OpenGL SPIR-V (Experimental, AMD/Mesa Only) OpenGL SPIR-V (eksperimentelt, kun AMD/Mesa) - + Null Null - + Fast Rask - + Balanced Balansert - - + + Accurate Nøyaktig - - + + Default Standard - + Unsafe (fast) Utrygg (raskt) - + Safe (stable) Trygg (stabil) - + Unsafe Utrygt - + Paranoid (disables most optimizations) Paranoid (deaktiverer de fleste optimaliseringer) - + Debugging - + Dynarmic - + NCE NCE - + Borderless Windowed Rammeløst vindu - + Exclusive Fullscreen Eksklusiv fullskjerm - + No Video Output Ingen videoutdata - + CPU Video Decoding CPU-videodekoding - + GPU Video Decoding (Default) GPU-videodekoding (Standard) - + 0.25X (180p/270p) [EXPERIMENTAL] 0,25× (180p/270p) [EKSPERIMENTELL] - + 0.5X (360p/540p) [EXPERIMENTAL] 0,5× (360p/540p) [EKSPERIMENTELL] - + 0.75X (540p/810p) [EXPERIMENTAL] 0,75× (540p/810p) [EKSPERIMENTELL] - + 1X (720p/1080p) 1× (720p/1080p) - + 1.25X (900p/1350p) [EXPERIMENTAL] 1,25× (900p/1350p) [EKSPERIMENTELL] - + 1.5X (1080p/1620p) [EXPERIMENTAL] 1,5× (1080p/1620p) [EKSPERIMENTELL] - + 2X (1440p/2160p) 2× (1440p/2160p) - + 3X (2160p/3240p) 3× (2160p/3240p) - + 4X (2880p/4320p) 4× (2880p/4320p) - + 5X (3600p/5400p) 5× (3600p/5400p) - + 6X (4320p/6480p) 6× (4320p/6480p) - + 7X (5040p/7560p) 7× (5040p/7560p) - + 8X (5760p/8640p) 8× (5760p/8640p) - + Nearest Neighbor Nærmeste nabo - + Bilinear Bilineær - + Bicubic Bikubisk - + Gaussian Gaussisk - + Lanczos Lanczos - + ScaleForce ScaleForce - + AMD FidelityFX Super Resolution AMD FidelityFX Super Resolution - + Area Område - + MMPX MMPX - + Zero-Tangent - + B-Spline B-Spline - + Mitchell Mitchell - + Spline-1 Spline-1 - - + + None Ingen - + FXAA FXAA - + SMAA SMAA - + Default (16:9) Standard (16:9) - + Force 4:3 Tving 4:3 - + Force 21:9 Tving 21:9 - + Force 16:10 Tving 16:10 - + Stretch to Window Strekk til vinduet - + Automatic Automatisk - + 2x 2x - + 4x 4x - + 8x 8x - + 16x 16x - + 32x 32x - + 64x 64x - + Japanese (日本語) Japansk (日本語) - + American English Amerikansk engelsk - + French (français) Fransk (français) - + German (Deutsch) Tysk (Deutsch) - + Italian (italiano) Italiensk (italiano) - + Spanish (español) Spansk (español) - + Chinese Kinesisk - + Korean (한국어) Koreansk (한국어) - + Dutch (Nederlands) Nederlandsk (Nederlands) - + Portuguese (português) Portugisisk (português) - + Russian (Русский) Russisk (Русский) - + Taiwanese Taiwansk - + British English Britisk engelsk - + Canadian French Kanadisk fransk - + Latin American Spanish Latinamerikansk spansk - + Simplified Chinese Forenklet kinesisk - + Traditional Chinese (正體中文) Tradisjonell kinesisk (正體中文) - + Brazilian Portuguese (português do Brasil) Brasiliansk portugisisk (português do Brasil) - + Polish (polska) Polsk (polska) - + Thai (แบบไทย) Thai (แบบไทย) - - + + Japan Japan - + USA USA - + Europe Europa - + Australia Australia - + China Folkerepublikken Kina - + Korea Korea - + Taiwan Taiwan (Republikken Kina) - + Auto (%1) Auto select time zone Auto (%1) - + Default (%1) Default time zone Standard (%1) - + CET Sentraleuropeisk tid - + CST6CDT CST6CDT - + Cuba Cuba - + EET Østeuropeisk tid - + Egypt Egypt - + Eire Republikken Irland - + EST EST - + EST5EDT EST5EDT - + GB Storbritannia - + GB-Eire GB-Eire - + GMT GMT - + GMT+0 GMT+0 - + GMT-0 GMT-0 - + GMT0 GMT0 - + Greenwich Greenwich - + Hongkong Hongkong - + HST HST - + Iceland Island - + Iran Iran - + Israel Israel - + Jamaica Jamaica - + Kwajalein Kwajalein - + Libya Libya - + MET MET - + MST MST - + MST7MDT MST7MDT - + Navajo Navajo - + NZ NZ - + NZ-CHAT NZ-CHAT - + Poland Polen - + Portugal Portugal - + PRC Folkerepublikken Kina - + PST8PDT PST8PDT - + ROC Taiwan (Republikken Kina) - + ROK Sør-Korea - + Singapore Singapore - + Turkey Tyrkia - + UCT UCT - + Universal Universalt - + UTC UTC - + W-SU W-SU - + WET WET - + Zulu Zulu - + Mono Mono - + Stereo Stereo - + Surround Surround - + 4GB DRAM (Default) 4 GB DRAM (Standard) - + 6GB DRAM (Unsafe) 6 GB DRAM (Utrygt) - + 8GB DRAM 8 GB DRAM - + 10GB DRAM (Unsafe) 10 GB DRAM (Utrygt) - + 12GB DRAM (Unsafe) 12 GB DRAM (Utrygt) - + Docked I dokking - + Handheld Håndholdt - - + + Off Av - + Boost (1700MHz) Boost (1700 MHz) - + Fast (2000MHz) Rask (2000 MHz) - + Always ask (Default) Spør alltid (Standard) - + Only if game specifies not to stop - + Never ask Aldri spør - - + + Medium (256) Middels (256) - - + + High (512) Høy (512) - + Very Small (16 MB) Veldig liten (16 MB) - + Small (32 MB) Liten (32 MB) - + Normal (128 MB) Normal (128 MB) - + Large (256 MB) Stor (256 MB) - + Very Large (512 MB) Veldig stor (512 MB) - + Very Low (4 MB) Veldig lav (4 MB) - + Low (8 MB) Lav (8 MB) - + Normal (16 MB) Normal (16 MB) - + Medium (32 MB) Middels (32 MB) - + High (64 MB) Høy (64 MB) - + Very Low (32) Svært lav (32) - + Low (64) Lav (64) - + Normal (128) Normal (128) - + Disabled Skrudd av - + ExtendedDynamicState 1 - + ExtendedDynamicState 2 - + ExtendedDynamicState 3 - + Tree View - + Grid View @@ -5727,7 +5723,7 @@ Dra punkter for å endre posisjon, eller dobbelttrykk på tabellfelter for å re Databehandler - + Deleting ANY data is IRREVERSABLE! @@ -5738,13 +5734,13 @@ Dra punkter for å endre posisjon, eller dobbelttrykk på tabellfelter for å re - UserNAND + User NAND - SysNAND - SysNAND + System NAND + @@ -5790,7 +5786,7 @@ Dra punkter for å endre posisjon, eller dobbelttrykk på tabellfelter for å re - + Calculating... diff --git a/dist/languages/nl.ts b/dist/languages/nl.ts index 5de902c0b3..ca69114e62 100644 --- a/dist/languages/nl.ts +++ b/dist/languages/nl.ts @@ -778,23 +778,34 @@ This feature is experimental. + Use asynchronous GPU emulation + + + + + Uses an extra CPU thread for rendering. +This option should always remain enabled. + + + + NVDEC emulation: NVDEC-emulatie: - + Specifies how videos should be decoded. It can either use the CPU or the GPU for decoding, or perform no decoding at all (black screen on videos). In most cases, GPU decoding provides the best performance. - + ASTC Decoding Method: ASTC Decodeer Methode: - + This option controls how ASTC textures should be decoded. CPU: Use the CPU for decoding. GPU: Use the GPU's compute shaders to decode ASTC textures (recommended). @@ -803,55 +814,55 @@ stuttering but may present artifacts. - + ASTC Recompression Method: - + Most GPUs lack support for ASTC textures and must decompress to anintermediate format: RGBA8. BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, saving VRAM but degrading image quality. - + Frame Pacing Mode (Vulkan only) - + Controls how the emulator manages frame pacing to reduce stuttering and make the frame rate smoother and more consistent. - + VRAM Usage Mode: - + Selects whether the emulator should prefer to conserve memory or make maximum usage of available video memory for performance. Aggressive mode may impact performance of other applications such as recording software. - + Skip CPU Inner Invalidation - + Skips certain cache invalidations during memory updates, reducing CPU usage and improving latency. This may cause soft-crashes. - + VSync Mode: VSync-modus: - + FIFO (VSync) does not drop frames or exhibit tearing but is limited by the screen refresh rate. FIFO Relaxed allows tearing as it recovers from a slow down. Mailbox can have lower latency than FIFO and does not tear but may drop frames. @@ -859,1376 +870,1361 @@ Immediate (no synchronization) presents whatever is available and can exhibit te - + Sync Memory Operations - + Ensures data consistency between compute and memory operations. This option fixes issues in games, but may degrade performance. Unreal Engine 4 games often see the most significant changes thereof. - + Enable asynchronous presentation (Vulkan only) Schakel asynchrone presentatie in (alleen Vulkan) - + Slightly improves performance by moving presentation to a separate CPU thread. - + Force maximum clocks (Vulkan only) Forceer maximale klokken (alleen Vulkan) - + Runs work in the background while waiting for graphics commands to keep the GPU from lowering its clock speed. Werkt op de achtergrond terwijl er wordt gewacht op grafische opdrachten om te voorkomen dat de GPU zijn kloksnelheid verlaagt. - + Anisotropic Filtering: Anisotrope Filtering: - + Controls the quality of texture rendering at oblique angles. Safe to set at 16x on most GPUs. - + GPU Mode: - + Controls the GPU emulation mode. Most games render fine with Fast or Balanced modes, but Accurate is still required for some. Particles tend to only render correctly with Accurate mode. - + DMA Accuracy: - + Controls the DMA precision accuracy. Safe precision fixes issues in some games but may degrade performance. - + Enable asynchronous shader compilation - + May reduce shader stutter. - + Fast GPU Time - + Overclocks the emulated GPU to increase dynamic resolution and render distance. Use 256 for maximal performance and 512 for maximal graphics fidelity. - + GPU Unswizzle - + Accelerates BCn 3D texture decoding using GPU compute. Disable if experiencing crashes or graphical glitches. - + GPU Unswizzle Max Texture Size - + Sets the maximum size (MiB) for GPU-based texture unswizzling. While the GPU is faster for medium and large textures, the CPU may be more efficient for very small ones. Adjust this to find the balance between GPU acceleration and CPU overhead. - + GPU Unswizzle Stream Size - + Sets the maximum amount of texture data (in MiB) processed per frame. Higher values can reduce stutter during texture loading but may impact frame consistency. - + GPU Unswizzle Chunk Size - + Determines the number of depth slices processed in a single dispatch. Increasing this can improve throughput on high-end GPUs but may cause TDR or driver timeouts on weaker hardware. - + Use Vulkan pipeline cache Gebruik Vulkan-pijplijn-cache - + Enables GPU vendor-specific pipeline cache. This option can improve shader loading time significantly in cases where the Vulkan driver does not store pipeline cache files internally. - + Enable Compute Pipelines (Intel Vulkan Only) - + Required by some games. This setting only exists for Intel proprietary drivers and may crash if enabled. Compute pipelines are always enabled on all other drivers. - + Enable Reactive Flushing Schakel Reactive Flushing In - + Uses reactive flushing instead of predictive flushing, allowing more accurate memory syncing. - + Sync to framerate of video playback - + Run the game at normal speed during video playback, even when the framerate is unlocked. - + Barrier feedback loops - + Improves rendering of transparency effects in specific games. - + Enable buffer history - + Enables access to previous buffer states. This option may improve rendering quality and performance consistency in some games. - + Fix bloom effects - + Removes bloom in Burnout. - + Enable Legacy Rescale Pass - + May fix rescale issues in some games by relying on behavior from the previous implementation. Legacy behavior workaround that fixes line artifacts on AMD and Intel GPUs, and grey texture flicker on Nvidia GPUs in Luigis Mansion 3. - + Extended Dynamic State - + Controls the number of features that can be used in Extended Dynamic State. Higher states allow for more features and can increase performance, but may cause additional graphical issues. - + Vertex Input Dynamic State - + Enables vertex input dynamic state feature for better quality and performance. - + Sample Shading - + Allows the fragment shader to execute per sample in a multi-sampled fragment instead of once per fragment. Improves graphics quality at the cost of performance. Higher values improve quality but degrade performance. - + RNG Seed RNG Seed - + Controls the seed of the random number generator. Mainly used for speedrunning. - + Device Name Apparaatnaam - + The name of the console. - + Custom RTC Date: Aangepaste RTC Datum: - + This option allows to change the clock of the console. Can be used to manipulate time in games. - + The number of seconds from the current unix time - + Language: Taal: - + This option can be overridden when region setting is auto-select - + Region: Regio: - + The region of the console. - + Time Zone: Tijdzone: - + The time zone of the console. - + Sound Output Mode: Geluidsuitvoermodus: - + Console Mode: Console Modus: - + Selects if the console is in Docked or Handheld mode. Games will change their resolution, details and supported controllers and depending on this setting. Setting to Handheld can help improve performance for low end systems. - - Unit Serial - - - - - Battery Serial - - - - - Debug knobs - - - - + Prompt for user profile on boot - + Useful if multiple people use the same PC. - + Pause when not in focus - + Pauses emulation when focusing on other windows. - + Confirm before stopping emulation Bevestig voordat u de emulatie stopt - + Overrides prompts asking to confirm stopping the emulation. Enabling it bypasses such prompts and directly exits the emulation. - + Hide mouse on inactivity Verberg muis wanneer inactief - + Hides the mouse after 2.5s of inactivity. - + Disable controller applet Controller-applet uitschakelen - + Forcibly disables the use of the controller applet in emulated programs. When a program attempts to open the controller applet, it is immediately closed. - + Check for updates - + Whether or not to check for updates upon startup. - + Enable Gamemode - + Force X11 as Graphics Backend - + Custom frontend - + Real applet - + Never - + On Load - + Always - + CPU CPU - + GPU - + CPU Asynchronous - + Uncompressed (Best quality) - + BC1 (Low quality) BC1 (Lage Kwaliteit) - + BC3 (Medium quality) BC3 (Gemiddelde kwaliteit) - - + + Auto Auto - + 30 FPS - + 60 FPS - + 90 FPS - + 120 FPS - + Conservative - + Aggressive - + Vulkan Vulkan - + OpenGL GLSL - + OpenGL GLASM (Assembly Shaders, NVIDIA Only) - + OpenGL SPIR-V (Experimental, AMD/Mesa Only) - + Null Null - + Fast - + Balanced - - + + Accurate Accuraat - - + + Default Standaard - + Unsafe (fast) - + Safe (stable) - + Unsafe Onveilig - + Paranoid (disables most optimizations) Paranoid (schakelt de meeste optimalisaties uit) - + Debugging - + Dynarmic - + NCE - + Borderless Windowed Randloos Venster - + Exclusive Fullscreen Exclusief Volledig Scherm - + No Video Output Geen Video-uitvoer - + CPU Video Decoding CPU Videodecodering - + GPU Video Decoding (Default) GPU Videodecodering (Standaard) - + 0.25X (180p/270p) [EXPERIMENTAL] - + 0.5X (360p/540p) [EXPERIMENTAL] - + 0.75X (540p/810p) [EXPERIMENTAL] 0.75X (540p/810p) [EXPERIMENTEEL] - + 1X (720p/1080p) 1X (720p/1080p) - + 1.25X (900p/1350p) [EXPERIMENTAL] - + 1.5X (1080p/1620p) [EXPERIMENTAL] 1.5X (1080p/1620p) [EXPERIMENTEEL] - + 2X (1440p/2160p) 2X (1440p/2160p) - + 3X (2160p/3240p) 3X (2160p/3240p) - + 4X (2880p/4320p) 4X (2880p/4320p) - + 5X (3600p/5400p) 5X (3600p/5400p) - + 6X (4320p/6480p) 6X (4320p/6480p) - + 7X (5040p/7560p) 7X (5040p/7560p) - + 8X (5760p/8640p) 8X (5760p/8640p) - + Nearest Neighbor Nearest Neighbor - + Bilinear Bilinear - + Bicubic Bicubic - + Gaussian Gaussian - + Lanczos - + ScaleForce ScaleForce - + AMD FidelityFX Super Resolution - + Area - + MMPX - + Zero-Tangent - + B-Spline - + Mitchell - + Spline-1 - - + + None Geen - + FXAA FXAA - + SMAA SMAA - + Default (16:9) Standaart (16:9) - + Force 4:3 Forceer 4:3 - + Force 21:9 Forceer 21:9 - + Force 16:10 Forceer 16:10 - + Stretch to Window Uitrekken naar Venster - + Automatic Automatisch - + 2x 2x - + 4x 4x - + 8x 8x - + 16x 16x - + 32x - + 64x - + Japanese (日本語) Japans (日本語) - + American English Amerikaans-Engels - + French (français) Frans (Français) - + German (Deutsch) Duits (Deutsch) - + Italian (italiano) Italiaans (italiano) - + Spanish (español) Spaans (Español) - + Chinese Chinees - + Korean (한국어) Koreaans (한국어) - + Dutch (Nederlands) Nederlands (Nederlands) - + Portuguese (português) Portugees (português) - + Russian (Русский) Russisch (Русский) - + Taiwanese Taiwanese - + British English Brits-Engels - + Canadian French Canadees-Frans - + Latin American Spanish Latijns-Amerikaans Spaans - + Simplified Chinese Vereenvoudigd Chinees - + Traditional Chinese (正體中文) Traditioneel Chinees (正體中文) - + Brazilian Portuguese (português do Brasil) Braziliaans-Portugees (português do Brasil) - + Polish (polska) - + Thai (แบบไทย) - - + + Japan Japan - + USA USA - + Europe Europa - + Australia Australië - + China China - + Korea Korea - + Taiwan Taiwan - + Auto (%1) Auto select time zone Auto (%1) - + Default (%1) Default time zone Standaard (%1) - + CET CET - + CST6CDT CST6CDT - + Cuba Cuba - + EET EET - + Egypt Egypte - + Eire Eire - + EST EST - + EST5EDT EST5EDT - + GB GB - + GB-Eire GB-Eire - + GMT GMT - + GMT+0 GMT+0 - + GMT-0 GMT-0 - + GMT0 GMT0 - + Greenwich Greenwich - + Hongkong Hongkong - + HST HST - + Iceland Ijsland - + Iran Iran - + Israel Israel - + Jamaica Jamaica - + Kwajalein Kwajalein - + Libya Libië - + MET MET - + MST MST - + MST7MDT MST7MDT - + Navajo Navajo - + NZ NZ - + NZ-CHAT NZ-CHAT - + Poland Polen - + Portugal Portugal - + PRC PRC - + PST8PDT PST8PDT - + ROC ROC - + ROK ROK - + Singapore Singapore - + Turkey Turkije - + UCT UCT - + Universal Universeel - + UTC UTC - + W-SU W-SU - + WET WET - + Zulu Zulu - + Mono Mono - + Stereo Stereo - + Surround Surround - + 4GB DRAM (Default) - + 6GB DRAM (Unsafe) - + 8GB DRAM - + 10GB DRAM (Unsafe) - + 12GB DRAM (Unsafe) - + Docked Docked - + Handheld Handheld - - + + Off - + Boost (1700MHz) - + Fast (2000MHz) - + Always ask (Default) - + Only if game specifies not to stop - + Never ask + + + + Medium (256) + + - Medium (256) - - - - - High (512) - + Very Small (16 MB) - + Small (32 MB) - + Normal (128 MB) - + Large (256 MB) - + Very Large (512 MB) - + Very Low (4 MB) - + Low (8 MB) - + Normal (16 MB) - + Medium (32 MB) - + High (64 MB) - + Very Low (32) - + Low (64) - + Normal (128) - + Disabled - + ExtendedDynamicState 1 - + ExtendedDynamicState 2 - + ExtendedDynamicState 3 - + Tree View - + Grid View @@ -5725,7 +5721,7 @@ Versleep punten om de positie te veranderen, of dubbelklik op tabelcellen om waa - + Deleting ANY data is IRREVERSABLE! @@ -5736,12 +5732,12 @@ Versleep punten om de positie te veranderen, of dubbelklik op tabelcellen om waa - UserNAND + User NAND - SysNAND + System NAND @@ -5788,7 +5784,7 @@ Versleep punten om de positie te veranderen, of dubbelklik op tabelcellen om waa - + Calculating... diff --git a/dist/languages/pl.ts b/dist/languages/pl.ts index 1159b079ba..e3e720b23f 100644 --- a/dist/languages/pl.ts +++ b/dist/languages/pl.ts @@ -799,11 +799,22 @@ Funkcja eksperymentalna. + Use asynchronous GPU emulation + + + + + Uses an extra CPU thread for rendering. +This option should always remain enabled. + + + + NVDEC emulation: Emulacja NVDEC: - + Specifies how videos should be decoded. It can either use the CPU or the GPU for decoding, or perform no decoding at all (black screen on videos). In most cases, GPU decoding provides the best performance. @@ -812,12 +823,12 @@ Dekodowanie może być wykonywane przez CPU albo GPU, albo może być całkowici W większości przypadków najlepszą wydajność zapewnia dekodowanie na GPU. - + ASTC Decoding Method: Metoda dekodowania ASTC: - + This option controls how ASTC textures should be decoded. CPU: Use the CPU for decoding. GPU: Use the GPU's compute shaders to decode ASTC textures (recommended). @@ -829,12 +840,12 @@ GPU: użyj shaderów obliczeniowych GPU do dekodowania tekstur ASTC (zalecane). CPU asynchronicznie: użyj CPU do dekodowania na żądanie. Eliminuje zacięcia podczas dekodowania ASTC, ale może powodować artefakty. - + ASTC Recompression Method: Metoda rekompresji ASTC: - + Most GPUs lack support for ASTC textures and must decompress to anintermediate format: RGBA8. BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, saving VRAM but degrading image quality. @@ -842,44 +853,44 @@ BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, BC1/BC3: format pośredni zostanie ponownie skompresowany do BC1 lub BC3 — oszczędza VRAM kosztem jakości obrazu. - + Frame Pacing Mode (Vulkan only) - + Controls how the emulator manages frame pacing to reduce stuttering and make the frame rate smoother and more consistent. - + VRAM Usage Mode: Tryb wykorzystania VRAM: - + Selects whether the emulator should prefer to conserve memory or make maximum usage of available video memory for performance. Aggressive mode may impact performance of other applications such as recording software. Określa, czy emulator ma oszczędzać pamięć, czy maksymalnie wykorzystywać dostępną pamięć wideo dla wydajności. Tryb agresywny może pogorszyć działanie innych aplikacji, np. oprogramowania do nagrywania. - + Skip CPU Inner Invalidation Pomiń wewnętrzne unieważnienie procesora CPU - + Skips certain cache invalidations during memory updates, reducing CPU usage and improving latency. This may cause soft-crashes. Pomija niektóre unieważnienia pamięci podręcznej po stronie CPU podczas aktualizacji pamięci, zmniejszając użycie CPU i poprawiając jego wydajność. Może powodować błędy lub awarie w niektórych grach. - + VSync Mode: Tryb synchronizacji pionowej: - + FIFO (VSync) does not drop frames or exhibit tearing but is limited by the screen refresh rate. FIFO Relaxed allows tearing as it recovers from a slow down. Mailbox can have lower latency than FIFO and does not tear but may drop frames. @@ -890,12 +901,12 @@ Mailbox może mieć niższe opóźnienia niż FIFO i nie powoduje tearingu, ale Immediate (bez synchronizacji) wyświetla wszystko, co jest dostępne, i może powodować tearing. - + Sync Memory Operations Synchronizuj operacje pamięci - + Ensures data consistency between compute and memory operations. This option fixes issues in games, but may degrade performance. Unreal Engine 4 games often see the most significant changes thereof. @@ -903,44 +914,44 @@ Unreal Engine 4 games often see the most significant changes thereof. Gry z Unreal Engine 4 mogą być najbardziej dotknięte. - + Enable asynchronous presentation (Vulkan only) Włącz asynchroniczną prezentację (tylko Vulkan) - + Slightly improves performance by moving presentation to a separate CPU thread. Nieznacznie poprawia wydajność, przenosząc prezentację na oddzielny wątek CPU. - + Force maximum clocks (Vulkan only) Wymuś maksymalne zegary (Tylko Vulkan) - + Runs work in the background while waiting for graphics commands to keep the GPU from lowering its clock speed. Uruchamia pracę w tle podczas oczekiwania na komendy graficzne aby GPU nie obniżało taktowania. - + Anisotropic Filtering: Filtrowanie anizotropowe: - + Controls the quality of texture rendering at oblique angles. Safe to set at 16x on most GPUs. Steruje jakością renderowania tekstur pod ostrymi kątami. Na większości GPU bezpieczną wartością jest 16x. - + GPU Mode: Tryb GPU: - + Controls the GPU emulation mode. Most games render fine with Fast or Balanced modes, but Accurate is still required for some. Particles tend to only render correctly with Accurate mode. @@ -949,101 +960,101 @@ Większość gier renderuje się poprawnie w trybach Szybki lub Zrównoważony, Efekty cząsteczkowe zwykle renderują się poprawnie tylko w trybie Dokładnym. - + DMA Accuracy: Dokładność DMA: - + Controls the DMA precision accuracy. Safe precision fixes issues in some games but may degrade performance. Steruje precyzją DMA. Tryb „bezpieczna precyzja” usuwa problemy w niektórych grach, ale może pogorszyć wydajność. - + Enable asynchronous shader compilation Włącz asynchroniczną kompilację shaderów - + May reduce shader stutter. Może zmniejszyć zacięcia spowodowane kompilacją shaderów. - + Fast GPU Time Szybki czas GPU - + Overclocks the emulated GPU to increase dynamic resolution and render distance. Use 256 for maximal performance and 512 for maximal graphics fidelity. Podkręca emulowane GPU, aby zwiększyć dynamiczną rozdzielczość i zasięg renderowania. Ustaw 256 dla maksymalnej wydajności, a 512 dla maksymalnej jakości grafiki. - + GPU Unswizzle - + Accelerates BCn 3D texture decoding using GPU compute. Disable if experiencing crashes or graphical glitches. - + GPU Unswizzle Max Texture Size - + Sets the maximum size (MiB) for GPU-based texture unswizzling. While the GPU is faster for medium and large textures, the CPU may be more efficient for very small ones. Adjust this to find the balance between GPU acceleration and CPU overhead. - + GPU Unswizzle Stream Size - + Sets the maximum amount of texture data (in MiB) processed per frame. Higher values can reduce stutter during texture loading but may impact frame consistency. - + GPU Unswizzle Chunk Size - + Determines the number of depth slices processed in a single dispatch. Increasing this can improve throughput on high-end GPUs but may cause TDR or driver timeouts on weaker hardware. - + Use Vulkan pipeline cache Użyj pamięci podręcznej strumienia dla Vulkana - + Enables GPU vendor-specific pipeline cache. This option can improve shader loading time significantly in cases where the Vulkan driver does not store pipeline cache files internally. Włącza specyficzną dla producenta GPU pamięć podręczną potoków. Ta opcja może znacząco skrócić czas ładowania shaderów w przypadkach, gdy sterownik Vulkan nie przechowuje wewnętrznie plików pamięci podręcznej potoków. - + Enable Compute Pipelines (Intel Vulkan Only) Włącz potoki obliczeniowe (tylko Intel Vulkan) - + Required by some games. This setting only exists for Intel proprietary drivers and may crash if enabled. Compute pipelines are always enabled on all other drivers. @@ -1052,182 +1063,182 @@ To ustawienie istnieje wyłącznie dla sterowników Intela i może spowodować b Na wszystkich pozostałych sterownikach potoki obliczeniowe są zawsze włączone. - + Enable Reactive Flushing Włącz reaktywne opróżnianie buforów - + Uses reactive flushing instead of predictive flushing, allowing more accurate memory syncing. Używa opróżniania reaktywnego zamiast predykcyjnego, co umożliwia dokładniejsze synchronizowanie pamięci. - + Sync to framerate of video playback Synchronizuj do liczby klatek odtwarzanego wideo - + Run the game at normal speed during video playback, even when the framerate is unlocked. Uruchamiaj grę z normalną prędkością podczas odtwarzania wideo, nawet przy odblokowanej liczbie klatek na sekundę. - + Barrier feedback loops Pętle sprzężenia zwrotnego barier - + Improves rendering of transparency effects in specific games. Poprawia renderowanie efektów przezroczystości w niektórych grach. - + Enable buffer history - + Enables access to previous buffer states. This option may improve rendering quality and performance consistency in some games. - + Fix bloom effects - + Removes bloom in Burnout. - + Enable Legacy Rescale Pass - + May fix rescale issues in some games by relying on behavior from the previous implementation. Legacy behavior workaround that fixes line artifacts on AMD and Intel GPUs, and grey texture flicker on Nvidia GPUs in Luigis Mansion 3. - + Extended Dynamic State Rozszerzony stan dynamiczny - + Controls the number of features that can be used in Extended Dynamic State. Higher states allow for more features and can increase performance, but may cause additional graphical issues. Kontroluje liczbę funkcji, które mogą być używane w Extended Dynamic State. Wyższe poziomy pozwalają na użycie większej liczby funkcji i mogą zwiększyć wydajność, ale mogą powodować dodatkowe problemy z grafiką. - + Vertex Input Dynamic State Dynamiczny stan wejścia wierzchołków - + Enables vertex input dynamic state feature for better quality and performance. Włącza funkcję dynamicznego stanu wejścia wierzchołków, poprawiając jakość i wydajność. - + Sample Shading Cieniowanie próbkowe - + Allows the fragment shader to execute per sample in a multi-sampled fragment instead of once per fragment. Improves graphics quality at the cost of performance. Higher values improve quality but degrade performance. Pozwala wykonywać shader fragmentów dla każdej próbki we fragmencie wielokrotnie próbkowanym zamiast raz dla każdego fragmentu. Poprawia jakość grafiki kosztem wydajności. Wyższe wartości poprawiają jakość, ale obniżają wydajność. - + RNG Seed Ziarno RNG - + Controls the seed of the random number generator. Mainly used for speedrunning. Ustala ziarno generatora liczb losowych. Głównie używane do speedrunów. - + Device Name Nazwa urządzenia - + The name of the console. The name of the console. - + Custom RTC Date: Własna data RTC - + This option allows to change the clock of the console. Can be used to manipulate time in games. Ta opcja pozwala zmienić zegar konsoli. Może służyć do manipulowania czasem w grach. - + The number of seconds from the current unix time Liczba sekund od bieżącego czasu Unix - + Language: Język: - + This option can be overridden when region setting is auto-select Ta opcja może zostać nadpisana, gdy ustawienie regionu to automatyczny wybór. - + Region: Region: - + The region of the console. Region konsoli. - + Time Zone: Strefa czasowa: - + The time zone of the console. Strefa czasowa konsoli. - + Sound Output Mode: Tryb wyjścia dźwięku: - + Console Mode: Tryb konsoli - + Selects if the console is in Docked or Handheld mode. Games will change their resolution, details and supported controllers and depending on this setting. Setting to Handheld can help improve performance for low end systems. @@ -1236,1046 +1247,1031 @@ W zależności od tego ustawienia gry zmienią swoją rozdzielczość, szczegó Ustawienie na Handheld może poprawić wydajność na słabszych komputerach. - - Unit Serial - - - - - Battery Serial - - - - - Debug knobs - - - - + Prompt for user profile on boot Pytaj o profil użytkownika przy uruchomieniu. - + Useful if multiple people use the same PC. Przydatne, gdy z tego samego PC korzysta wiele osób. - + Pause when not in focus Wstrzymuj, gdy okno nie jest aktywne - + Pauses emulation when focusing on other windows. Wstrzymuje emulację po przełączeniu na inne okna. - + Confirm before stopping emulation Potwierdzaj przed zatrzymaniem emulacji - + Overrides prompts asking to confirm stopping the emulation. Enabling it bypasses such prompts and directly exits the emulation. Nadpisuje monity z prośbą o potwierdzenie zatrzymania emulacji. Włączenie powoduje pominięcie takich monitów i bezpośrednie wyjście z emulacji. - + Hide mouse on inactivity Ukryj mysz przy braku aktywności - + Hides the mouse after 2.5s of inactivity. Ukrywa kursor po 2,5 s bezczynności. - + Disable controller applet Wyłącz aplet kontrolera - + Forcibly disables the use of the controller applet in emulated programs. When a program attempts to open the controller applet, it is immediately closed. Wymusza wyłączenie użycia apletu kontrolera w oprogramowaniu uruchamianym w emulacji. Jeśli emulowane oprogramowanie próbuje otworzyć aplet kontrolera, jest on natychmiast zamykany. - + Check for updates Sprawdź aktualizacje - + Whether or not to check for updates upon startup. Czy sprawdzać aktualizacje przy uruchomieniu. - + Enable Gamemode Włącz Tryb gry - + Force X11 as Graphics Backend Wymuś X11 jako backend grafiki - + Custom frontend Niestandardowy frontend - + Real applet Prawdziwy aplet - + Never Nigdy - + On Load Przy wczytywaniu - + Always Zawsze - + CPU CPU - + GPU GPU - + CPU Asynchronous Asynchroniczne CPU - + Uncompressed (Best quality) Brak (najlepsza jakość) - + BC1 (Low quality) BC1 (niska jakość) - + BC3 (Medium quality) BC3 (średnia jakość) - - + + Auto Automatyczny - + 30 FPS - + 60 FPS - + 90 FPS - + 120 FPS - + Conservative Konserwatywny - + Aggressive Agresywny - + Vulkan Vulkan - + OpenGL GLSL - + OpenGL GLASM (Assembly Shaders, NVIDIA Only) - + OpenGL SPIR-V (Experimental, AMD/Mesa Only) - + Null Null - + Fast Szybkie - + Balanced Zrównoważony - - + + Accurate Dokładny - - + + Default Domyślny - + Unsafe (fast) Niezalecane (szybkie) - + Safe (stable) Bezpieczne (stabilne) - + Unsafe Niebezpieczny - + Paranoid (disables most optimizations) Paranoiczne (wyłącza większość optymalizacji) - + Debugging Debugowanie - + Dynarmic Dynamiczny - + NCE NCE - + Borderless Windowed W oknie (Bezramkowy) - + Exclusive Fullscreen Exclusive Fullscreen - + No Video Output Brak wyjścia wideo - + CPU Video Decoding Dekodowanie Wideo przez CPU - + GPU Video Decoding (Default) Dekodowanie Wideo przez GPU (Domyślne) - + 0.25X (180p/270p) [EXPERIMENTAL] 0,25x (180p/270p) [EKSPERYMENTALNE] - + 0.5X (360p/540p) [EXPERIMENTAL] 0,5x (360p/540p) [EKSPERYMENTALNE] - + 0.75X (540p/810p) [EXPERIMENTAL] 0.75X (540p/810p) [EKSPERYMENTALNE] - + 1X (720p/1080p) 1X (720p/1080p) - + 1.25X (900p/1350p) [EXPERIMENTAL] 1.25X (900p/1350p) [EKSPERYMENTALNE] - + 1.5X (1080p/1620p) [EXPERIMENTAL] 1.5X (1080p/1620p) [Ekperymentalnie] - + 2X (1440p/2160p) 2X (1440p/2160p) - + 3X (2160p/3240p) 3X (2160p/3240p) - + 4X (2880p/4320p) 4X (2880p/4320p) - + 5X (3600p/5400p) 5X (3600p/5400p) - + 6X (4320p/6480p) 6X (4320p/6480p) - + 7X (5040p/7560p) 7X (5040p/7560p) - + 8X (5760p/8640p) 8X (5760p/8640p) - + Nearest Neighbor Najbliższy sąsiadujący - + Bilinear Bilinearny - + Bicubic Bikubiczny - + Gaussian Kulisty - + Lanczos Lanczos - + ScaleForce ScaleForce - + AMD FidelityFX Super Resolution AMD FidelityFX Super Resolution - + Area Obszar - + MMPX MMPX - + Zero-Tangent Zero-Tangent - + B-Spline B-Spline - + Mitchell Mitchell - + Spline-1 Spline-1 - - + + None Żadna (wyłączony) - + FXAA FXAA - + SMAA SMAA - + Default (16:9) Domyślne (16:9) - + Force 4:3 Wymuś 4:3 - + Force 21:9 Wymuś 21:9 - + Force 16:10 Wymuś 16:10 - + Stretch to Window Rozciągnij do Okna - + Automatic Automatyczne - + 2x 2x - + 4x 4x - + 8x 8x - + 16x 16x - + 32x 32x - + 64x 64x - + Japanese (日本語) Japoński (日本語) - + American English Angielski Amerykański - + French (français) Francuski (français) - + German (Deutsch) Niemiecki (Niemcy) - + Italian (italiano) Włoski (italiano) - + Spanish (español) Hiszpański (español) - + Chinese Chiński - + Korean (한국어) Koreański (한국어) - + Dutch (Nederlands) Duński (Holandia) - + Portuguese (português) Portugalski (português) - + Russian (Русский) Rosyjski (Русский) - + Taiwanese Tajwański - + British English Angielski Brytyjski - + Canadian French Fancuski (Kanada) - + Latin American Spanish Hiszpański (Latin American) - + Simplified Chinese Chiński (Uproszczony) - + Traditional Chinese (正體中文) Chiński tradycyjny (正體中文) - + Brazilian Portuguese (português do Brasil) Portugalski (português do Brasil) - + Polish (polska) - + Thai (แบบไทย) - - + + Japan Japonia - + USA USA - + Europe Europa - + Australia Australia - + China Chiny - + Korea Korea - + Taiwan Tajwan - + Auto (%1) Auto select time zone Auto (%1) - + Default (%1) Default time zone Domyślne (%1) - + CET CET - + CST6CDT CST6CDT - + Cuba Cuba - + EET EET - + Egypt Egipt - + Eire Irlandia - + EST EST - + EST5EDT EST5EDT - + GB GB - + GB-Eire GB-Eire - + GMT GMT - + GMT+0 GMT+0 - + GMT-0 GMT-0 - + GMT0 GMT0 - + Greenwich Greenwich - + Hongkong Hongkong - + HST HST - + Iceland Islandia - + Iran Iran - + Israel Izrael - + Jamaica Jamajka - + Kwajalein Kwajalein - + Libya Libia - + MET MET - + MST MST - + MST7MDT MST7MDT - + Navajo Navajo - + NZ NZ - + NZ-CHAT NZ-CHAT - + Poland Polska - + Portugal Portugalia - + PRC PRC - + PST8PDT PST8PDT - + ROC ROC - + ROK ROK - + Singapore Singapur - + Turkey Turcja - + UCT UCT - + Universal Uniwersalny - + UTC UTC - + W-SU W-SU - + WET WET - + Zulu Zulu - + Mono Mono - + Stereo Stereo - + Surround Surround - + 4GB DRAM (Default) 4GB DRAM (Domyślne) - + 6GB DRAM (Unsafe) 6GB DRAM (NIebezpieczne) - + 8GB DRAM 8GB DRAM - + 10GB DRAM (Unsafe) 10GB DRAM (NIebezpieczne) - + 12GB DRAM (Unsafe) 12GB DRAM (NIebezpieczne) - + Docked Zadokowany - + Handheld Przenośnie - - + + Off Wyłączone - + Boost (1700MHz) Boost (1700MHz) - + Fast (2000MHz) Szybki (2000MHz) - + Always ask (Default) Zawsze pytaj (Domyślne) - + Only if game specifies not to stop Tylko jeśli gra określa, aby nie zatrzymywać - + Never ask Nie pytaj więcej - - + + Medium (256) Średnie (256) - - + + High (512) Wysokie (512) - + Very Small (16 MB) - + Small (32 MB) - + Normal (128 MB) - + Large (256 MB) - + Very Large (512 MB) - + Very Low (4 MB) - + Low (8 MB) - + Normal (16 MB) - + Medium (32 MB) - + High (64 MB) - + Very Low (32) - + Low (64) - + Normal (128) - + Disabled Wyłączone - + ExtendedDynamicState 1 ExtendedDynamicState 1 - + ExtendedDynamicState 2 ExtendedDynamicState 2 - + ExtendedDynamicState 3 ExtendedDynamicState 3 - + Tree View - + Grid View @@ -5794,7 +5790,7 @@ Przeciągnij punkty, aby zmienić pozycję, lub kliknij dwukrotnie komórki tabe Menedżer danych - + Deleting ANY data is IRREVERSABLE! Usunięcie JAKICHKOLWIEK danych jest NIEODWRACALNE! @@ -5805,13 +5801,13 @@ Przeciągnij punkty, aby zmienić pozycję, lub kliknij dwukrotnie komórki tabe - UserNAND - UserNAND + User NAND + - SysNAND - SysNAND + System NAND + @@ -5857,7 +5853,7 @@ Przeciągnij punkty, aby zmienić pozycję, lub kliknij dwukrotnie komórki tabe Zaimportuj dane dla tego katalogu. To może chwilę potrwać i USUNIE WSZYSTKIE ISTNIEJĄCE DANE! - + Calculating... Obliczanie... diff --git a/dist/languages/pt_BR.ts b/dist/languages/pt_BR.ts index 67153ce3a0..831f28c0be 100644 --- a/dist/languages/pt_BR.ts +++ b/dist/languages/pt_BR.ts @@ -797,11 +797,22 @@ This feature is experimental. + Use asynchronous GPU emulation + + + + + Uses an extra CPU thread for rendering. +This option should always remain enabled. + + + + NVDEC emulation: Emulação NVDEC: - + Specifies how videos should be decoded. It can either use the CPU or the GPU for decoding, or perform no decoding at all (black screen on videos). In most cases, GPU decoding provides the best performance. @@ -810,12 +821,12 @@ Tanto a CPU quanto a GPU podem ser utilizadas para decodificação, ou não deco Na maioria dos casos, a decodificação pela GPU fornece um melhor desempenho. - + ASTC Decoding Method: Método de Decodificação ASTC: - + This option controls how ASTC textures should be decoded. CPU: Use the CPU for decoding. GPU: Use the GPU's compute shaders to decode ASTC textures (recommended). @@ -828,56 +839,56 @@ CPU Assíncrona: Usa a CPU para decodificar texturas ASTC sob demanda. Elimina t mas pode apresentar artefatos visuais. - + ASTC Recompression Method: Método de Recompressão ASTC: - + Most GPUs lack support for ASTC textures and must decompress to anintermediate format: RGBA8. BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, saving VRAM but degrading image quality. A maioria das GPUs não suporta texturas ASTC e precisa descompactá-las para um formato intermediário: RGBA8.BC1/BC3: O formato intermediário será recomprimido para BC1 ou BC3, economizando VRAM mas degradando a qualidade da imagem. - + Frame Pacing Mode (Vulkan only) Modo de Ritmo de Quadros (apenas Vulkan) - + Controls how the emulator manages frame pacing to reduce stuttering and make the frame rate smoother and more consistent. Controle como o emulador gerencia o ritmo de quadros para reduzir travamentos (engasgos) e deixar a taxa de quadros mais suave e consistente. - + VRAM Usage Mode: Modo de Uso da VRAM: - + Selects whether the emulator should prefer to conserve memory or make maximum usage of available video memory for performance. Aggressive mode may impact performance of other applications such as recording software. Define se o emulador deve priorizar a economia de memória ou fazer o uso máximo da memória de vídeo disponível para melhorar o desempenho. O modo agressivo pode impactar a performance de outros aplicativos, como softwares de gravação. - + Skip CPU Inner Invalidation Ignorar invalidação interna da CPU - + Skips certain cache invalidations during memory updates, reducing CPU usage and improving latency. This may cause soft-crashes. Ignora certas invalidações de cache durante atualizações de memória, reduzindo o uso da CPU e melhorando a latência. Isso pode causar travamentos leves. - + VSync Mode: Modo de Sincronização vertical: - + FIFO (VSync) does not drop frames or exhibit tearing but is limited by the screen refresh rate. FIFO Relaxed allows tearing as it recovers from a slow down. Mailbox can have lower latency than FIFO and does not tear but may drop frames. @@ -888,12 +899,12 @@ Mailbox pode ter menor latência que FIFO e não apresenta cortes, mas pode perd Immediate (sem sincronização) exibe o que estiver disponível e pode apresentar cortes. - + Sync Memory Operations Sincronizar operações de memória - + Ensures data consistency between compute and memory operations. This option fixes issues in games, but may degrade performance. Unreal Engine 4 games often see the most significant changes thereof. @@ -902,44 +913,44 @@ Esta opção corrige problemas em diversos jogos, mas pode reduzir o desempenho. Jogos baseados na Unreal Engine 4 costumam apresentar as mudanças mais significativas. - + Enable asynchronous presentation (Vulkan only) Ativar apresentação assíncrona (Somente Vulkan) - + Slightly improves performance by moving presentation to a separate CPU thread. Melhora ligeiramente o desempenho ao mover a apresentação para uma thread de CPU separada. - + Force maximum clocks (Vulkan only) Forçar clock máximo (somente Vulkan) - + Runs work in the background while waiting for graphics commands to keep the GPU from lowering its clock speed. Executa trabalho em segundo plano aguardando pelos comandos gráficos para evitar a GPU de reduzir seu clock. - + Anisotropic Filtering: Filtro Anisotrópico: - + Controls the quality of texture rendering at oblique angles. Safe to set at 16x on most GPUs. Controla a qualidade da renderização de texturas em ângulos oblíquos. Seguro definir em 16x na maioria das GPUs. - + GPU Mode: Modo da GPU: - + Controls the GPU emulation mode. Most games render fine with Fast or Balanced modes, but Accurate is still required for some. Particles tend to only render correctly with Accurate mode. @@ -948,56 +959,56 @@ A maioria dos jogos roda bem nos modos Rápido ou Balanceado, mas o modo Preciso Partículas geralmente só renderizam corretamente no modo Preciso. - + DMA Accuracy: Precisão do DMA: - + Controls the DMA precision accuracy. Safe precision fixes issues in some games but may degrade performance. Controla a precisão do DMA. A precisão Segura corrige problemas em alguns jogos, mas pode reduzir o desempenho. - + Enable asynchronous shader compilation Ativar compilação assíncrona de shaders - + May reduce shader stutter. Pode reduzir travamentos de shaders. - + Fast GPU Time Tempo Rápido da GPU - + Overclocks the emulated GPU to increase dynamic resolution and render distance. Use 256 for maximal performance and 512 for maximal graphics fidelity. Faz overclock da GPU emulada para aumentar a resolução dinâmica e a distância de renderização. Use 256 para desempenho máximo e 512 para fidelidade gráfica máxima. - + GPU Unswizzle GPU Unswizzle - + Accelerates BCn 3D texture decoding using GPU compute. Disable if experiencing crashes or graphical glitches. Acelera a decodificação de texturas 3D BCn usando processamento da GPU. Desative se ocorrerem travamentos ou falhas gráficas. - + GPU Unswizzle Max Texture Size Tamanho Máximo de Textura para GPU Unswizzle - + Sets the maximum size (MiB) for GPU-based texture unswizzling. While the GPU is faster for medium and large textures, the CPU may be more efficient for very small ones. Adjust this to find the balance between GPU acceleration and CPU overhead. @@ -1006,48 +1017,48 @@ A GPU é mais rápida para texturas médias e grandes, mas a CPU pode ser mais e Ajuste para encontrar o equilíbrio entre aceleração da GPU e sobrecarga da CPU. - + GPU Unswizzle Stream Size Tamanho do Fluxo de GPU Unswizzle - + Sets the maximum amount of texture data (in MiB) processed per frame. Higher values can reduce stutter during texture loading but may impact frame consistency. Define a quantidade máxima de dados de textura (em MiB) processados por quadro. Valores mais altos podem reduzir travamentos durante o carregamento de texturas, mas podem afetar a consistência dos quadros. - + GPU Unswizzle Chunk Size Tamanho do Bloco de GPU Unswizzle - + Determines the number of depth slices processed in a single dispatch. Increasing this can improve throughput on high-end GPUs but may cause TDR or driver timeouts on weaker hardware. Determina o número de fatias de profundidade processadas em uma única execução. Aumentar esse valor pode melhorar o desempenho em GPUs avançadas, mas pode causar TDR ou tempo limite do driver em hardwares mais fracos. - + Use Vulkan pipeline cache Utilizar cache de pipeline do Vulkan - + Enables GPU vendor-specific pipeline cache. This option can improve shader loading time significantly in cases where the Vulkan driver does not store pipeline cache files internally. Habilita o cache de pipeline da fabricante da GPU. Esta opção pode melhorar o tempo de carregamento de shaders significantemente em casos onde o driver Vulkan não armazena o cache de pipeline internamente. - + Enable Compute Pipelines (Intel Vulkan Only) Habilitar Pipeline de Computação (Somente Intel Vulkan) - + Required by some games. This setting only exists for Intel proprietary drivers and may crash if enabled. Compute pipelines are always enabled on all other drivers. @@ -1056,184 +1067,184 @@ Esta configuração existe apenas para drivers proprietários da Intel e pode ca Pipelines de computação estão sempre habilitados em outros drivers. - + Enable Reactive Flushing Habilitar Flushing Reativo - + Uses reactive flushing instead of predictive flushing, allowing more accurate memory syncing. Usa flushing reativo ao invés de flushing preditivo, permitindo mais precisão na sincronização da memória. - + Sync to framerate of video playback Sincronizar com o framerate da reprodução de vídeo - + Run the game at normal speed during video playback, even when the framerate is unlocked. Executa o jogo na velocidade normal durante a reprodução de vídeo, mesmo se o framerate estiver desbloqueado. - + Barrier feedback loops Ciclos de feedback de barreira - + Improves rendering of transparency effects in specific games. Melhora a renderização de efeitos de transparência em jogos específicos. - + Enable buffer history Ativar histórico de buffer - + Enables access to previous buffer states. This option may improve rendering quality and performance consistency in some games. Permite acesso a estados anteriores do buffer. Esta opção pode melhorar a qualidade de renderização e a consistência de desempenho em alguns jogos. - + Fix bloom effects Corrigir efeitos de bloom - + Removes bloom in Burnout. Remove o bloom no Burnout. - + Enable Legacy Rescale Pass Ativar Passagem de Redimensionamento Legada - + May fix rescale issues in some games by relying on behavior from the previous implementation. Legacy behavior workaround that fixes line artifacts on AMD and Intel GPUs, and grey texture flicker on Nvidia GPUs in Luigis Mansion 3. Pode corrigir problemas de redimensionamento em alguns jogos, baseando-se no comportamento da implementação anterior. Solução legada que corrige artefatos de linha em GPUs AMD e Intel, e cintilação de texturas cinzas em GPUs Nvidia no Luigi's Mansion 3. - + Extended Dynamic State Estado Dinâmico Estendido - + Controls the number of features that can be used in Extended Dynamic State. Higher states allow for more features and can increase performance, but may cause additional graphical issues. Controla o número de recursos que podem ser usados no Estado Dinâmico Estendido. Estados mais altos permitem mais recursos e podem aumentar o desempenho, mas também podem causar problemas gráficos adicionais. - + Vertex Input Dynamic State Estado Dinâmico de Entrada de Vértices - + Enables vertex input dynamic state feature for better quality and performance. Ativa o recurso de estado dinâmico de entrada de vértices para melhor qualidade e desempenho. - + Sample Shading Sombreamento por Amostragem - + Allows the fragment shader to execute per sample in a multi-sampled fragment instead of once per fragment. Improves graphics quality at the cost of performance. Higher values improve quality but degrade performance. Permite que o shader de fragmento seja processado por cada amostra em fragmentos multiamostrados, em vez de uma única vez por fragmento. Melhora a qualidade gráfica ao custo de desempenho. Valores mais altos aumentam a qualidade, mas reduzem a performance. - + RNG Seed Semente de RNG - + Controls the seed of the random number generator. Mainly used for speedrunning. Controla a semente do gerador de números aleatórios. Usado principalmente em speedruns. - + Device Name Nome do Dispositivo - + The name of the console. O nome do console. - + Custom RTC Date: Data personalizada do RTC: - + This option allows to change the clock of the console. Can be used to manipulate time in games. Esta opção permite alterar o relógio do console. Pode ser usada para manipular o tempo nos jogos. - + The number of seconds from the current unix time Número de segundos a partir do tempo Unix atual - + Language: Idioma: - + This option can be overridden when region setting is auto-select Esta opção pode ser substituída quando a configuração de região estiver em seleção automática - + Region: Região: - + The region of the console. A região do console. - + Time Zone: Fuso Horário: - + The time zone of the console. O fuso horário do console. - + Sound Output Mode: Modo de saída de som - + Console Mode: Modo Console: - + Selects if the console is in Docked or Handheld mode. Games will change their resolution, details and supported controllers and depending on this setting. Setting to Handheld can help improve performance for low end systems. @@ -1242,1046 +1253,1031 @@ Os jogos ajustarão resolução, detalhes e controladores suportados conforme es Definir como Portátil pode ajudar a melhorar o desempenho em sistemas mais fracos. - - Unit Serial - Número de Série da Unidade - - - - Battery Serial - Número de Série da Bateria - - - - Debug knobs - Opções de depuração - - - + Prompt for user profile on boot Solicitar perfil de usuário na inicialização - + Useful if multiple people use the same PC. Útil se várias pessoas usam o mesmo PC. - + Pause when not in focus Pausar quando não estiver em foco - + Pauses emulation when focusing on other windows. Pausa a emulação ao focar em outras janelas. - + Confirm before stopping emulation Confirmar antes de parar a emulação - + Overrides prompts asking to confirm stopping the emulation. Enabling it bypasses such prompts and directly exits the emulation. Substitui as confirmações ao parar a emulação. Ao ativar, ignora esses avisos e encerra diretamente a emulação. - + Hide mouse on inactivity Esconder rato quando inactivo. - + Hides the mouse after 2.5s of inactivity. Oculta o mouse após 2,5s de inatividade. - + Disable controller applet Desabilitar applet de controle - + Forcibly disables the use of the controller applet in emulated programs. When a program attempts to open the controller applet, it is immediately closed. Desativa forçadamente o uso do applet de controle em programas emulados. Quando um programa tenta abrir o applet, ele é imediatamente fechado. - + Check for updates Verificar atualizações - + Whether or not to check for updates upon startup. Define se deve verificar atualizações na inicialização. - + Enable Gamemode Habilitar Gamemode - + Force X11 as Graphics Backend Forçar X11 como backend gráfico - + Custom frontend Frontend customizado - + Real applet Applet real - + Never Nunca - + On Load Ao carregar - + Always Sempre - + CPU CPU - + GPU GPU - + CPU Asynchronous CPU Assíncrona - + Uncompressed (Best quality) Descompactado (Melhor Qualidade) - + BC1 (Low quality) BC1 (Baixa qualidade) - + BC3 (Medium quality) BC3 (Média qualidade) - - + + Auto Automático - + 30 FPS 30 FPS - + 60 FPS 60 FPS - + 90 FPS 90 FPS - + 120 FPS 120 FPS - + Conservative Conservador - + Aggressive Agressivo - + Vulkan Vulcano - + OpenGL GLSL OpenGL GLSL - + OpenGL GLASM (Assembly Shaders, NVIDIA Only) OpenGL GLASM (Shaders em Assembly, apenas NVIDIA) - + OpenGL SPIR-V (Experimental, AMD/Mesa Only) OpenGL SPIR-V (Experimental, apenas AMD/Mesa) - + Null Nenhum - + Fast Rápido - + Balanced Balanceado - - + + Accurate Preciso - - + + Default Padrão - + Unsafe (fast) Inseguro (rápido) - + Safe (stable) Seguro (estável) - + Unsafe Inseguro - + Paranoid (disables most optimizations) Paranoia (desativa a maioria das otimizações) - + Debugging Depuração - + Dynarmic Dynarmic - + NCE NCE - + Borderless Windowed Janela sem bordas - + Exclusive Fullscreen Tela cheia exclusiva - + No Video Output Sem saída de vídeo - + CPU Video Decoding Decodificação de vídeo pela CPU - + GPU Video Decoding (Default) Decodificação de vídeo pela GPU (Padrão) - + 0.25X (180p/270p) [EXPERIMENTAL] 0.25X (180p/270p) [EXPERIMENTAL] - + 0.5X (360p/540p) [EXPERIMENTAL] 0.5X (360p/540p) [EXPERIMENTAL] - + 0.75X (540p/810p) [EXPERIMENTAL] 0.75X (540p/810p) [EXPERIMENTAL] - + 1X (720p/1080p) 1X (720p/1080p) - + 1.25X (900p/1350p) [EXPERIMENTAL] 1.25X (900p/1350p) [EXPERIMENTAL] - + 1.5X (1080p/1620p) [EXPERIMENTAL] 1.5X (1080p/1620p) [EXPERIMENTAL] - + 2X (1440p/2160p) 2X (1440p/2160p) - + 3X (2160p/3240p) 3X (2160p/3240p) - + 4X (2880p/4320p) 4X (2880p/4320p) - + 5X (3600p/5400p) 5X (3600p/5400p) - + 6X (4320p/6480p) 6X (4320p/6480p) - + 7X (5040p/7560p) 7X (5040p/7560p) - + 8X (5760p/8640p) 8X (5760p/8640p) - + Nearest Neighbor Vizinho mais próximo - + Bilinear Bilinear - + Bicubic Bicúbico - + Gaussian Gaussiano - + Lanczos Lanczos - + ScaleForce ScaleForce - + AMD FidelityFX Super Resolution AMD FidelityFX Super Resolution - + Area Área - + MMPX MMPX - + Zero-Tangent Zero-Tangent - + B-Spline B-Spline - + Mitchell Mitchell - + Spline-1 Spline-1 - - + + None Nenhum - + FXAA FXAA - + SMAA SMAA - + Default (16:9) Padrão (16:9) - + Force 4:3 Forçar 4:3 - + Force 21:9 Forçar 21:9 - + Force 16:10 Forçar 16:10 - + Stretch to Window Esticar à Janela - + Automatic Automático - + 2x 2x - + 4x 4x - + 8x 8x - + 16x 16x - + 32x 32x - + 64x 64x - + Japanese (日本語) Japonês (日本語) - + American English Inglês Americano - + French (français) Francês (français) - + German (Deutsch) Alemão (Deutsch) - + Italian (italiano) Italiano (italiano) - + Spanish (español) Espanhol (español) - + Chinese Chinês - + Korean (한국어) Coreano (한국어) - + Dutch (Nederlands) Holandês (Nederlands) - + Portuguese (português) Português (português) - + Russian (Русский) Russo (Русский) - + Taiwanese Taiwanês - + British English Inglês Britânico - + Canadian French Francês Canadense - + Latin American Spanish Espanhol Latino-Americano - + Simplified Chinese Chinês Simplificado - + Traditional Chinese (正體中文) Chinês Tradicional (正 體 中文) - + Brazilian Portuguese (português do Brasil) Português do Brasil (Brazilian Portuguese) - + Polish (polska) Polonês (polska) - + Thai (แบบไทย) Tailandês (แบบไทย) - - + + Japan Japão - + USA EUA - + Europe Europa - + Australia Austrália - + China China - + Korea Coreia - + Taiwan Taiwan - + Auto (%1) Auto select time zone Auto (%1) - + Default (%1) Default time zone Padrão (%1) - + CET CET - + CST6CDT CST6CDT - + Cuba Cuba - + EET EET - + Egypt Egito - + Eire Irlanda - + EST EST - + EST5EDT EST5EDT - + GB GB - + GB-Eire GB-Irlanda - + GMT GMT - + GMT+0 GMT+0 - + GMT-0 GMT-0 - + GMT0 GMT0 - + Greenwich Greenwich - + Hongkong Hongkong - + HST HST - + Iceland Islândia - + Iran Irã - + Israel Israel - + Jamaica Jamaica - + Kwajalein Kwajalein - + Libya Líbia - + MET MET - + MST MST - + MST7MDT MST7MDT - + Navajo Navajo - + NZ NZ - + NZ-CHAT NZ-CHAT - + Poland Polônia - + Portugal Portugal - + PRC PRC - + PST8PDT PST8PDT - + ROC ROC - + ROK ROK - + Singapore Singapura - + Turkey Turquia - + UCT UCT - + Universal Universal - + UTC UTC - + W-SU W-SU - + WET WET - + Zulu Zulu - + Mono Mono - + Stereo Estéreo - + Surround Surround - + 4GB DRAM (Default) 4GB DRAM (Padrão) - + 6GB DRAM (Unsafe) 6GB DRAM (Não seguro) - + 8GB DRAM 8GB DRAM - + 10GB DRAM (Unsafe) 10GB DRAM (Inseguro) - + 12GB DRAM (Unsafe) 12GB DRAM (Inseguro) - + Docked Ancorado - + Handheld Portátil - - + + Off Desligado - + Boost (1700MHz) Impulso (1700MHz) - + Fast (2000MHz) Rápido (2000MHz) - + Always ask (Default) Sempre perguntar (Padrão) - + Only if game specifies not to stop Somente se o jogo especificar para não parar - + Never ask Nunca perguntar - - + + Medium (256) Médio (256) - - + + High (512) Alto (512) - + Very Small (16 MB) Muito Pequeno (16 MB) - + Small (32 MB) Pequeno (32 MB) - + Normal (128 MB) Normal (128 MB) - + Large (256 MB) Grande (256 MB) - + Very Large (512 MB) Muito Grande (512 MB) - + Very Low (4 MB) Muito Baixo (4 MB) - + Low (8 MB) Baixo (8 MB) - + Normal (16 MB) Normal (16 MB) - + Medium (32 MB) Médio (32 MB) - + High (64 MB) Alto (64 MB) - + Very Low (32) Muito Baixo (32) - + Low (64) Baixo (64) - + Normal (128) Normal (128) - + Disabled Desativado - + ExtendedDynamicState 1 Estado Dinâmico Estendido 1 - + ExtendedDynamicState 2 Estado Dinâmico Estendido 2 - + ExtendedDynamicState 3 Estado Dinâmico Estendido 3 - + Tree View Visualização em Árvore - + Grid View Visualização em Grade @@ -5783,7 +5779,7 @@ Arrasta os pontos para mudar a posição, ou dá duplo-clique nas células da ta - + Deleting ANY data is IRREVERSABLE! @@ -5794,13 +5790,13 @@ Arrasta os pontos para mudar a posição, ou dá duplo-clique nas células da ta - UserNAND - UserNAND + User NAND + - SysNAND - SysNAND + System NAND + @@ -5846,7 +5842,7 @@ Arrasta os pontos para mudar a posição, ou dá duplo-clique nas células da ta - + Calculating... diff --git a/dist/languages/pt_PT.ts b/dist/languages/pt_PT.ts index 32b9fd2efd..0b7a48bbec 100644 --- a/dist/languages/pt_PT.ts +++ b/dist/languages/pt_PT.ts @@ -774,11 +774,22 @@ This feature is experimental. + Use asynchronous GPU emulation + + + + + Uses an extra CPU thread for rendering. +This option should always remain enabled. + + + + NVDEC emulation: Emulação NVDEC: - + Specifies how videos should be decoded. It can either use the CPU or the GPU for decoding, or perform no decoding at all (black screen on videos). In most cases, GPU decoding provides the best performance. @@ -787,12 +798,12 @@ Tanto a CPU quanto a GPU podem ser utilizadas para decodificação, ou não deco Na maioria dos casos, a decodificação pela GPU fornece uma melhor performance. - + ASTC Decoding Method: Método de Decodificação ASTC: - + This option controls how ASTC textures should be decoded. CPU: Use the CPU for decoding. GPU: Use the GPU's compute shaders to decode ASTC textures (recommended). @@ -801,55 +812,55 @@ stuttering but may present artifacts. - + ASTC Recompression Method: Método de Recompressão ASTC: - + Most GPUs lack support for ASTC textures and must decompress to anintermediate format: RGBA8. BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, saving VRAM but degrading image quality. - + Frame Pacing Mode (Vulkan only) - + Controls how the emulator manages frame pacing to reduce stuttering and make the frame rate smoother and more consistent. - + VRAM Usage Mode: Modo de Uso da VRAM: - + Selects whether the emulator should prefer to conserve memory or make maximum usage of available video memory for performance. Aggressive mode may impact performance of other applications such as recording software. - + Skip CPU Inner Invalidation - + Skips certain cache invalidations during memory updates, reducing CPU usage and improving latency. This may cause soft-crashes. - + VSync Mode: Modo de Sincronização vertical: - + FIFO (VSync) does not drop frames or exhibit tearing but is limited by the screen refresh rate. FIFO Relaxed allows tearing as it recovers from a slow down. Mailbox can have lower latency than FIFO and does not tear but may drop frames. @@ -857,1377 +868,1362 @@ Immediate (no synchronization) presents whatever is available and can exhibit te - + Sync Memory Operations - + Ensures data consistency between compute and memory operations. This option fixes issues in games, but may degrade performance. Unreal Engine 4 games often see the most significant changes thereof. - + Enable asynchronous presentation (Vulkan only) Ativar apresentação assíncrona (Somente Vulkan) - + Slightly improves performance by moving presentation to a separate CPU thread. Melhora ligeiramente o desempenho ao mover a apresentação para uma thread de CPU separada. - + Force maximum clocks (Vulkan only) Forçar clock máximo (somente Vulkan) - + Runs work in the background while waiting for graphics commands to keep the GPU from lowering its clock speed. Executa trabalho em segundo plano aguardando pelos comandos gráficos para evitar a GPU de reduzir seu clock. - + Anisotropic Filtering: Filtro Anisotrópico: - + Controls the quality of texture rendering at oblique angles. Safe to set at 16x on most GPUs. - + GPU Mode: - + Controls the GPU emulation mode. Most games render fine with Fast or Balanced modes, but Accurate is still required for some. Particles tend to only render correctly with Accurate mode. - + DMA Accuracy: - + Controls the DMA precision accuracy. Safe precision fixes issues in some games but may degrade performance. - + Enable asynchronous shader compilation - + May reduce shader stutter. - + Fast GPU Time - + Overclocks the emulated GPU to increase dynamic resolution and render distance. Use 256 for maximal performance and 512 for maximal graphics fidelity. - + GPU Unswizzle - + Accelerates BCn 3D texture decoding using GPU compute. Disable if experiencing crashes or graphical glitches. - + GPU Unswizzle Max Texture Size - + Sets the maximum size (MiB) for GPU-based texture unswizzling. While the GPU is faster for medium and large textures, the CPU may be more efficient for very small ones. Adjust this to find the balance between GPU acceleration and CPU overhead. - + GPU Unswizzle Stream Size - + Sets the maximum amount of texture data (in MiB) processed per frame. Higher values can reduce stutter during texture loading but may impact frame consistency. - + GPU Unswizzle Chunk Size - + Determines the number of depth slices processed in a single dispatch. Increasing this can improve throughput on high-end GPUs but may cause TDR or driver timeouts on weaker hardware. - + Use Vulkan pipeline cache Utilizar cache de pipeline do Vulkan - + Enables GPU vendor-specific pipeline cache. This option can improve shader loading time significantly in cases where the Vulkan driver does not store pipeline cache files internally. Habilita o cache de pipeline da fabricante da GPU. Esta opção pode melhorar o tempo de carregamento de shaders significantemente em casos onde o driver Vulkan não armazena o cache de pipeline internamente. - + Enable Compute Pipelines (Intel Vulkan Only) Habilitar Pipeline de Computação (Somente Intel Vulkan) - + Required by some games. This setting only exists for Intel proprietary drivers and may crash if enabled. Compute pipelines are always enabled on all other drivers. - + Enable Reactive Flushing Habilitar Flushing Reativo - + Uses reactive flushing instead of predictive flushing, allowing more accurate memory syncing. Usa flushing reativo ao invés de flushing preditivo, permitindo mais precisão na sincronização da memória. - + Sync to framerate of video playback Sincronizar com o framerate da reprodução de vídeo - + Run the game at normal speed during video playback, even when the framerate is unlocked. Executa o jogo na velocidade normal durante a reprodução de vídeo, mesmo se o framerate estiver desbloqueado. - + Barrier feedback loops Ciclos de feedback de barreira - + Improves rendering of transparency effects in specific games. Melhora a renderização de efeitos de transparência em jogos específicos. - + Enable buffer history - + Enables access to previous buffer states. This option may improve rendering quality and performance consistency in some games. - + Fix bloom effects - + Removes bloom in Burnout. - + Enable Legacy Rescale Pass - + May fix rescale issues in some games by relying on behavior from the previous implementation. Legacy behavior workaround that fixes line artifacts on AMD and Intel GPUs, and grey texture flicker on Nvidia GPUs in Luigis Mansion 3. - + Extended Dynamic State - + Controls the number of features that can be used in Extended Dynamic State. Higher states allow for more features and can increase performance, but may cause additional graphical issues. - + Vertex Input Dynamic State - + Enables vertex input dynamic state feature for better quality and performance. - + Sample Shading - + Allows the fragment shader to execute per sample in a multi-sampled fragment instead of once per fragment. Improves graphics quality at the cost of performance. Higher values improve quality but degrade performance. - + RNG Seed Semente de RNG - + Controls the seed of the random number generator. Mainly used for speedrunning. - + Device Name Nome do Dispositivo - + The name of the console. - + Custom RTC Date: Data personalizada do RTC: - + This option allows to change the clock of the console. Can be used to manipulate time in games. - + The number of seconds from the current unix time - + Language: Idioma: - + This option can be overridden when region setting is auto-select - + Region: Região: - + The region of the console. - + Time Zone: Fuso Horário: - + The time zone of the console. - + Sound Output Mode: Modo de saída de som - + Console Mode: Modo Console: - + Selects if the console is in Docked or Handheld mode. Games will change their resolution, details and supported controllers and depending on this setting. Setting to Handheld can help improve performance for low end systems. - - Unit Serial - - - - - Battery Serial - - - - - Debug knobs - - - - + Prompt for user profile on boot - + Useful if multiple people use the same PC. - + Pause when not in focus - + Pauses emulation when focusing on other windows. - + Confirm before stopping emulation Confirmar antes de parar a emulação - + Overrides prompts asking to confirm stopping the emulation. Enabling it bypasses such prompts and directly exits the emulation. - + Hide mouse on inactivity Esconder rato quando inactivo. - + Hides the mouse after 2.5s of inactivity. - + Disable controller applet Desabilitar miniaplicativo de controle - + Forcibly disables the use of the controller applet in emulated programs. When a program attempts to open the controller applet, it is immediately closed. - + Check for updates - + Whether or not to check for updates upon startup. - + Enable Gamemode Habilitar Gamemode - + Force X11 as Graphics Backend - + Custom frontend Frontend customizado - + Real applet Miniaplicativo real - + Never - + On Load - + Always - + CPU CPU - + GPU GPU - + CPU Asynchronous CPU Assíncrona - + Uncompressed (Best quality) Descompactado (Melhor Q - + BC1 (Low quality) BC1 (Baixa qualidade) - + BC3 (Medium quality) BC3 (Média qualidade) - - + + Auto Automático - + 30 FPS - + 60 FPS - + 90 FPS - + 120 FPS - + Conservative Conservador - + Aggressive Agressivo - + Vulkan Vulcano - + OpenGL GLSL - + OpenGL GLASM (Assembly Shaders, NVIDIA Only) - + OpenGL SPIR-V (Experimental, AMD/Mesa Only) - + Null Nenhum (desativado) - + Fast - + Balanced - - + + Accurate Preciso - - + + Default Padrão - + Unsafe (fast) - + Safe (stable) - + Unsafe Inseguro - + Paranoid (disables most optimizations) Paranoia (desativa a maioria das otimizações) - + Debugging - + Dynarmic Dynarmic - + NCE NCE - + Borderless Windowed Janela sem bordas - + Exclusive Fullscreen Tela cheia exclusiva - + No Video Output Sem saída de vídeo - + CPU Video Decoding Decodificação de vídeo pela CPU - + GPU Video Decoding (Default) Decodificação de vídeo pela GPU (Padrão) - + 0.25X (180p/270p) [EXPERIMENTAL] - + 0.5X (360p/540p) [EXPERIMENTAL] 0.5X (360p/540p) [EXPERIMENTAL] - + 0.75X (540p/810p) [EXPERIMENTAL] 0.75X (540p/810p) [EXPERIMENTAL] - + 1X (720p/1080p) 1X (720p/1080p) - + 1.25X (900p/1350p) [EXPERIMENTAL] - + 1.5X (1080p/1620p) [EXPERIMENTAL] 1.5X (1080p/1620p) [EXPERIMENTAL] - + 2X (1440p/2160p) 2X (1440p/2160p) - + 3X (2160p/3240p) 3X (2160p/3240p) - + 4X (2880p/4320p) 4X (2880p/4320p) - + 5X (3600p/5400p) 5X (3600p/5400p) - + 6X (4320p/6480p) 6X (4320p/6480p) - + 7X (5040p/7560p) 7X (5040p/7560p) - + 8X (5760p/8640p) 8X (5760p/8640p) - + Nearest Neighbor Vizinho mais próximo - + Bilinear Bilinear - + Bicubic Bicúbico - + Gaussian Gaussiano - + Lanczos - + ScaleForce ScaleForce - + AMD FidelityFX Super Resolution - + Area - + MMPX - + Zero-Tangent - + B-Spline - + Mitchell - + Spline-1 - - + + None Nenhum - + FXAA FXAA - + SMAA SMAA - + Default (16:9) Padrão (16:9) - + Force 4:3 Forçar 4:3 - + Force 21:9 Forçar 21:9 - + Force 16:10 Forçar 16:10 - + Stretch to Window Esticar à Janela - + Automatic Automático - + 2x 2x - + 4x 4x - + 8x 8x - + 16x 16x - + 32x - + 64x - + Japanese (日本語) Japonês (日本語) - + American English Inglês Americano - + French (français) Francês (français) - + German (Deutsch) Alemão (Deutsch) - + Italian (italiano) Italiano (italiano) - + Spanish (español) Espanhol (español) - + Chinese Chinês - + Korean (한국어) Coreano (한국어) - + Dutch (Nederlands) Holandês (Nederlands) - + Portuguese (português) Português (português) - + Russian (Русский) Russo (Русский) - + Taiwanese Taiwanês - + British English Inglês Britânico - + Canadian French Francês Canadense - + Latin American Spanish Espanhol Latino-Americano - + Simplified Chinese Chinês Simplificado - + Traditional Chinese (正體中文) Chinês Tradicional (正 體 中文) - + Brazilian Portuguese (português do Brasil) Português do Brasil (Brazilian Portuguese) - + Polish (polska) - + Thai (แบบไทย) - - + + Japan Japão - + USA EUA - + Europe Europa - + Australia Austrália - + China China - + Korea Coreia - + Taiwan Taiwan - + Auto (%1) Auto select time zone Auto (%1) - + Default (%1) Default time zone Padrão (%1) - + CET CET - + CST6CDT CST6CDT - + Cuba Cuba - + EET EET - + Egypt Egipto - + Eire Irlanda - + EST EST - + EST5EDT EST5EDT - + GB GB - + GB-Eire GB-Irlanda - + GMT GMT - + GMT+0 GMT+0 - + GMT-0 GMT-0 - + GMT0 GMT0 - + Greenwich Greenwich - + Hongkong Hongkong - + HST HST - + Iceland Islândia - + Iran Irão - + Israel Israel - + Jamaica Jamaica - + Kwajalein Kwajalein - + Libya Líbia - + MET MET - + MST MST - + MST7MDT MST7MDT - + Navajo Navajo - + NZ NZ - + NZ-CHAT NZ-CHAT - + Poland Polónia - + Portugal Portugal - + PRC PRC - + PST8PDT PST8PDT - + ROC ROC - + ROK ROK - + Singapore Singapura - + Turkey Turquia - + UCT UCT - + Universal Universal - + UTC UTC - + W-SU W-SU - + WET WET - + Zulu Zulu - + Mono Mono - + Stereo Estéreo - + Surround Surround - + 4GB DRAM (Default) 4GB DRAM (Padrão) - + 6GB DRAM (Unsafe) 6GB DRAM (Não seguro) - + 8GB DRAM - + 10GB DRAM (Unsafe) - + 12GB DRAM (Unsafe) - + Docked Ancorado - + Handheld Portátil - - + + Off - + Boost (1700MHz) - + Fast (2000MHz) - + Always ask (Default) Sempre perguntar (Padrão) - + Only if game specifies not to stop Somente se o jogo especificar para não parar - + Never ask Nunca perguntar - - + + Medium (256) - - + + High (512) - + Very Small (16 MB) - + Small (32 MB) - + Normal (128 MB) - + Large (256 MB) - + Very Large (512 MB) - + Very Low (4 MB) - + Low (8 MB) - + Normal (16 MB) - + Medium (32 MB) - + High (64 MB) - + Very Low (32) - + Low (64) - + Normal (128) - + Disabled - + ExtendedDynamicState 1 - + ExtendedDynamicState 2 - + ExtendedDynamicState 3 - + Tree View - + Grid View @@ -5728,7 +5724,7 @@ Arrasta os pontos para mudar a posição, ou dá duplo-clique nas células da ta - + Deleting ANY data is IRREVERSABLE! @@ -5739,12 +5735,12 @@ Arrasta os pontos para mudar a posição, ou dá duplo-clique nas células da ta - UserNAND + User NAND - SysNAND + System NAND @@ -5791,7 +5787,7 @@ Arrasta os pontos para mudar a posição, ou dá duplo-clique nas células da ta - + Calculating... diff --git a/dist/languages/ru_RU.ts b/dist/languages/ru_RU.ts index 922cda0e7e..f0c3a9bd85 100644 --- a/dist/languages/ru_RU.ts +++ b/dist/languages/ru_RU.ts @@ -797,11 +797,22 @@ This feature is experimental. + Use asynchronous GPU emulation + + + + + Uses an extra CPU thread for rendering. +This option should always remain enabled. + + + + NVDEC emulation: Эмуляция NVDEC: - + Specifies how videos should be decoded. It can either use the CPU or the GPU for decoding, or perform no decoding at all (black screen on videos). In most cases, GPU decoding provides the best performance. @@ -810,12 +821,12 @@ In most cases, GPU decoding provides the best performance. В большинстве случаев декодирование с использованием ГП обеспечивает лучшую производительность. - + ASTC Decoding Method: Метод декодирования ASTC: - + This option controls how ASTC textures should be decoded. CPU: Use the CPU for decoding. GPU: Use the GPU's compute shaders to decode ASTC textures (recommended). @@ -827,12 +838,12 @@ GPU: Использовать вычислительные шейдеры ГП CPU Асинхронно: Использовать ЦП для декодирования текстур ASTC по мере их поступления. Полностью устраняет заикание при декодировании ASTC, но может вызывать артефакты. - + ASTC Recompression Method: Метод пересжатия ASTC: - + Most GPUs lack support for ASTC textures and must decompress to anintermediate format: RGBA8. BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, saving VRAM but degrading image quality. @@ -841,44 +852,44 @@ BC1/BC3: Промежуточный формат будет повторно с что сэкономит ОЗУ, но ухудшит качество изображения. - + Frame Pacing Mode (Vulkan only) Режим синхронизации кадров (только Vulkan) - + Controls how the emulator manages frame pacing to reduce stuttering and make the frame rate smoother and more consistent. Управляет синхронизацией кадров в эмуляторе для уменьшения рывков и обеспечения более плавной и стабильной частоты кадров. - + VRAM Usage Mode: Режим Использования VRAM - + Selects whether the emulator should prefer to conserve memory or make maximum usage of available video memory for performance. Aggressive mode may impact performance of other applications such as recording software. Выбирает, должен ли эмулятор отдавать предпочтение экономии памяти или максимально использовать доступную видеопамять для повышения производительности. Агрессивный режим может серьезно повлиять на производительность других приложений, например: приложение для записи. - + Skip CPU Inner Invalidation Пропустить внутреннюю инвалидацию ЦП - + Skips certain cache invalidations during memory updates, reducing CPU usage and improving latency. This may cause soft-crashes. Позволяет избежать некоторых ошибок в кэше при обновлении памяти, снижая нагрузку на ЦПУ и увеличивая время ожидания. Это может привести к программным сбоям. - + VSync Mode: Режим верт. синхронизации: - + FIFO (VSync) does not drop frames or exhibit tearing but is limited by the screen refresh rate. FIFO Relaxed allows tearing as it recovers from a slow down. Mailbox can have lower latency than FIFO and does not tear but may drop frames. @@ -889,12 +900,12 @@ Mailbox: может иметь меньшую задержку, чем FIFO, и Моментальная (без синхронизации) показывает когда доступно и может иметь разрывы. - + Sync Memory Operations Синхронизация операций с памятью - + Ensures data consistency between compute and memory operations. This option fixes issues in games, but may degrade performance. Unreal Engine 4 games often see the most significant changes thereof. @@ -903,44 +914,44 @@ Unreal Engine 4 games often see the most significant changes thereof. В играх на Unreal Engine 4 часто происходят наиболее существенные изменения. - + Enable asynchronous presentation (Vulkan only) Включите асинхронное отображение (только для Vulkan) - + Slightly improves performance by moving presentation to a separate CPU thread. Немного улучшает производительность, перемещая презентацию на отдельный поток ЦП. - + Force maximum clocks (Vulkan only) Принудительно заставить максимальную тактовую частоту (только для Vulkan) - + Runs work in the background while waiting for graphics commands to keep the GPU from lowering its clock speed. Выполняет работу в фоновом режиме в ожидании графических команд, не позволяя ГП снижать тактовую частоту. - + Anisotropic Filtering: Анизотропная фильтрация: - + Controls the quality of texture rendering at oblique angles. Safe to set at 16x on most GPUs. Контролирует качество отображения текстур под наклонными углами. Безопасно выбрать до 16x на многих ГПУ. - + GPU Mode: Режим ГП: - + Controls the GPU emulation mode. Most games render fine with Fast or Balanced modes, but Accurate is still required for some. Particles tend to only render correctly with Accurate mode. @@ -949,56 +960,56 @@ Particles tend to only render correctly with Accurate mode. Частицы обычно корректно отображаются только в режиме «Точный». - + DMA Accuracy: Точность DMA: - + Controls the DMA precision accuracy. Safe precision fixes issues in some games but may degrade performance. Управляет точностью DMA. Безопасная точность может исправить проблемы в некоторых играх, но также может повлиять на производительность. - + Enable asynchronous shader compilation Включить асинхронную компиляцию шейдеров - + May reduce shader stutter. Может уменьшить заикание шейдера. - + Fast GPU Time Быстрое время ГП - + Overclocks the emulated GPU to increase dynamic resolution and render distance. Use 256 for maximal performance and 512 for maximal graphics fidelity. Разгоняет эмулируемый графический процессор для увеличения динамического разрешения и дальности прорисовки. Используйте 256 для максимальной производительности и 512 для максимального качества графики. - + GPU Unswizzle Распаковка GPU - + Accelerates BCn 3D texture decoding using GPU compute. Disable if experiencing crashes or graphical glitches. Ускоряет 3d Декодирование текстуры BCn используя вычисления GPU Выключите, если испытывайте вылеты или проблемы с графикой. - + GPU Unswizzle Max Texture Size Макс. размер текстуры Unswizzle - + Sets the maximum size (MiB) for GPU-based texture unswizzling. While the GPU is faster for medium and large textures, the CPU may be more efficient for very small ones. Adjust this to find the balance between GPU acceleration and CPU overhead. @@ -1007,48 +1018,48 @@ Adjust this to find the balance between GPU acceleration and CPU overhead. - + GPU Unswizzle Stream Size Размер потока распаковки GPU - + Sets the maximum amount of texture data (in MiB) processed per frame. Higher values can reduce stutter during texture loading but may impact frame consistency. Устанавливает максимальный объем текстур (в мегабайтах), обрабатываемых за кадр. Более высокие значения могут уменьшить статтеры при прогрузке текстур, но могут негативно повлиять на плавность кадров. - + GPU Unswizzle Chunk Size Размер ансвиззлинг-блока ГП - + Determines the number of depth slices processed in a single dispatch. Increasing this can improve throughput on high-end GPUs but may cause TDR or driver timeouts on weaker hardware. Определяет количество слоев глубины, обрабатываемых за один вызов. Увеличение этого параметра может повысить пропускную способность флагманских ГП, но может привести к вылету/зависанию видеодрайвера на менее производительных системах. - + Use Vulkan pipeline cache Использовать конвейерный кэш Vulkan - + Enables GPU vendor-specific pipeline cache. This option can improve shader loading time significantly in cases where the Vulkan driver does not store pipeline cache files internally. Включает кэш конвейера, специфичный для производителя ГП. Эта опция может значительно улучшить время загрузки шейдеров в тех случаях, когда драйвер Vulkan не хранит внутренние файлы кэша конвейера. - + Enable Compute Pipelines (Intel Vulkan Only) Включить вычислительные конвейеры (только для Intel Vulkan) - + Required by some games. This setting only exists for Intel proprietary drivers and may crash if enabled. Compute pipelines are always enabled on all other drivers. @@ -1057,183 +1068,183 @@ Compute pipelines are always enabled on all other drivers. Конвейеры вычислений всегда включены во всех других драйверах. - + Enable Reactive Flushing Включить реактивную очистку - + Uses reactive flushing instead of predictive flushing, allowing more accurate memory syncing. Вместо прогнозирующей очистки используется реактивная очистка, что обеспечивает более точную синхронизацию памяти. - + Sync to framerate of video playback Привязать к фреймрейту видео. - + Run the game at normal speed during video playback, even when the framerate is unlocked. Обычная скорость игры во время видео, даже если фреймрейт разблокирован. - + Barrier feedback loops Обратная связь с барьерами. - + Improves rendering of transparency effects in specific games. Улучшает эффекты прозрачности в некоторых играх. - + Enable buffer history История буфера<br style=""> - + Enables access to previous buffer states. This option may improve rendering quality and performance consistency in some games. Позволяет получить доступ к предыдущим состояниям буфера. Эта опция может улучшить качество рендеринга и стабильность производительности в некоторых играх. - + Fix bloom effects Исправить Bloom-эффекты - + Removes bloom in Burnout. Удаляет bloom-эффект в Burnout. - + Enable Legacy Rescale Pass Включить устаревший пропуск перемасштабирования - + May fix rescale issues in some games by relying on behavior from the previous implementation. Legacy behavior workaround that fixes line artifacts on AMD and Intel GPUs, and grey texture flicker on Nvidia GPUs in Luigis Mansion 3. - + Extended Dynamic State Расширенное динамическое состояние - + Controls the number of features that can be used in Extended Dynamic State. Higher states allow for more features and can increase performance, but may cause additional graphical issues. Управляет количеством функций, которые можно использовать в расширенном динамическом состоянии. Более высокие значения позволяют использовать больше функций и могут повысить производительность, но могут привести к дополнительным проблемам с графикой. - + Vertex Input Dynamic State Динамическое состояние вершинного ввода - + Enables vertex input dynamic state feature for better quality and performance. Включает функцию динамического состояния вершинного ввода для повышения качества и производительности. - + Sample Shading Сэмпловый шейдинг - + Allows the fragment shader to execute per sample in a multi-sampled fragment instead of once per fragment. Improves graphics quality at the cost of performance. Higher values improve quality but degrade performance. Позволяет шейдеру фрагментов выполняться на каждый сэмпл в мульти-сэмпловом фрагменте вместо одного раза на фрагмент. Улучшает качество графики ценой производительности. Более высокие значения повышают качество, но снижают производительность. - + RNG Seed Сид RNG - + Controls the seed of the random number generator. Mainly used for speedrunning. Управляет начальным значением генератора случайных чисел. В основном используется для спидранов. - + Device Name Название устройства - + The name of the console. Имя консоли. - + Custom RTC Date: Пользовательская RTC-дата: - + This option allows to change the clock of the console. Can be used to manipulate time in games. Этот параметр позволяет изменить эмулируемые часы на консоли. Может использоваться для манипуляции временем в играх. - + The number of seconds from the current unix time Количество секунд от текущего времени unix - + Language: Язык: - + This option can be overridden when region setting is auto-select Это Может быть перезаписано если регион выбирается автоматически - + Region: Регион: - + The region of the console. Регион консоли. - + Time Zone: Часовой пояс: - + The time zone of the console. Часовой пояс консоли. - + Sound Output Mode: Режим вывода звука: - + Console Mode: Консольный режим: - + Selects if the console is in Docked or Handheld mode. Games will change their resolution, details and supported controllers and depending on this setting. Setting to Handheld can help improve performance for low end systems. @@ -1242,1046 +1253,1031 @@ Setting to Handheld can help improve performance for low end systems. Установка в режим портативной консоли может помочь улучшить производительность для слабых устройств. - - Unit Serial - - - - - Battery Serial - - - - - Debug knobs - - - - + Prompt for user profile on boot Спрашивать профиль пользователя при запуске - + Useful if multiple people use the same PC. Полезно, если несколько человек используют один и тот же компьютер. - + Pause when not in focus Делает паузу, когда не в фокусе - + Pauses emulation when focusing on other windows. Ставит на паузу эмуляцию, когда фокусируешься на другие окна. - + Confirm before stopping emulation Подтвердите перед остановкой эмуляции - + Overrides prompts asking to confirm stopping the emulation. Enabling it bypasses such prompts and directly exits the emulation. Эта настройка переопределяет запросы игры, запрашивающие подтверждение остановки игры. Включение этой настройки обходит такие запросы и непосредственно завершает эмуляцию. - + Hide mouse on inactivity Спрятать мышь при неактивности - + Hides the mouse after 2.5s of inactivity. Эта настройка скрывает указатель мыши после 2,5 секунды бездействия. - + Disable controller applet Отключить веб-апплет - + Forcibly disables the use of the controller applet in emulated programs. When a program attempts to open the controller applet, it is immediately closed. Принудительно отключает использование приложения контроллера в эмулированных программах. При попытке программы открыть приложение контроллера, оно немедленно закрывается. - + Check for updates Проверка обновлений - + Whether or not to check for updates upon startup. Следует ли проверять наличие обновлений при запуске. - + Enable Gamemode Включить режим игры - + Force X11 as Graphics Backend Использовать X11 в качестве графического бэкенда - + Custom frontend Свой фронтенд - + Real applet Реальное приложение - + Never Никогда - + On Load При загрузке - + Always Всегда - + CPU ЦП - + GPU графический процессор - + CPU Asynchronous Асинхронный ГП - + Uncompressed (Best quality) Без сжатия (наилучшее качество) - + BC1 (Low quality) BC1 (низкое качество) - + BC3 (Medium quality) BC3 (среднее качество) - - + + Auto Авто - + 30 FPS 30 FPS - + 60 FPS 60 FPS - + 90 FPS 90 FPS - + 120 FPS 120 FPS - + Conservative Консервативный - + Aggressive Агрессивный - + Vulkan Vulkan - + OpenGL GLSL OpenGL GLSL - + OpenGL GLASM (Assembly Shaders, NVIDIA Only) OpenGL GLASM (ассемблерные шейдеры, только для NVIDIA) - + OpenGL SPIR-V (Experimental, AMD/Mesa Only) OpenGL SPIR-V (Экспериментальный, только для AMD/Mesa) - + Null Null - + Fast Быстро - + Balanced Сбалансированный - - + + Accurate Точно - - + + Default По умолчанию - + Unsafe (fast) Небезопасно (быстро) - + Safe (stable) Безопасно (стабильно) - + Unsafe Небезопасно - + Paranoid (disables most optimizations) Параноик (отключает большинство оптимизаций) - + Debugging Отладка - + Dynarmic Dynarmic - + NCE NCE - + Borderless Windowed Окно без границ - + Exclusive Fullscreen Эксклюзивный полноэкранный - + No Video Output Отсутствие видеовыхода - + CPU Video Decoding Декодирование видео на ЦП - + GPU Video Decoding (Default) Декодирование видео на ГП (по умолчанию) - + 0.25X (180p/270p) [EXPERIMENTAL] 0.25X (180p/270p)[ЭКСПЕРИМЕНТАЛЬНО] - + 0.5X (360p/540p) [EXPERIMENTAL] 0.5X (360p/540p) [ЭКСПЕРИМЕНТАЛЬНО] - + 0.75X (540p/810p) [EXPERIMENTAL] 0.75X (540p/810p) [ЭКСПЕРИМЕНТАЛЬНО] - + 1X (720p/1080p) 1X (720p/1080p) - + 1.25X (900p/1350p) [EXPERIMENTAL] 1.25X (900p/1350p) [ЭКПЕРИМЕНТАЛЬНО] - + 1.5X (1080p/1620p) [EXPERIMENTAL] 1.5X (1080p/1620p) [ЭКСПЕРИМЕНТАЛЬНО] - + 2X (1440p/2160p) 2X (1440p/2160p) - + 3X (2160p/3240p) 3X (2160p/3240p) - + 4X (2880p/4320p) 4X (2880p/4320p) - + 5X (3600p/5400p) 5X (3600p/5400p) - + 6X (4320p/6480p) 6X (4320p/6480p) - + 7X (5040p/7560p) 7X (5040p/7560p) - + 8X (5760p/8640p) 8X (5760p/8640p) - + Nearest Neighbor Ближайший сосед - + Bilinear Билинейный - + Bicubic Бикубический - + Gaussian Гаусс - + Lanczos Lanczos - + ScaleForce ScaleForce - + AMD FidelityFX Super Resolution AMD FidelityFX™️ Super Resolution - + Area Зона - + MMPX MMPX - + Zero-Tangent Zero-Tangent - + B-Spline B-Spline - + Mitchell Mitchell - + Spline-1 Spline-1 - - + + None Никакой - + FXAA FXAA - + SMAA SMAA - + Default (16:9) Стандартное (16:9) - + Force 4:3 Заставить 4:3 - + Force 21:9 Заставить 21:9 - + Force 16:10 Заставить 16:10 - + Stretch to Window Растянуть до окна - + Automatic Автоматически - + 2x 2x - + 4x 4x - + 8x 8x - + 16x 16x - + 32x 32x - + 64x 64x - + Japanese (日本語) Японский (日本語) - + American English Американский английский - + French (français) Французский (français) - + German (Deutsch) Немецкий (Deutsch) - + Italian (italiano) Итальянский (italiano) - + Spanish (español) Испанский (español) - + Chinese Китайский - + Korean (한국어) Корейский (한국어) - + Dutch (Nederlands) Голландский (Nederlands) - + Portuguese (português) Португальский (português) - + Russian (Русский) Русский - + Taiwanese Тайваньский - + British English Британский английский - + Canadian French Канадский французский - + Latin American Spanish Латиноамериканский испанский - + Simplified Chinese Упрощённый китайский - + Traditional Chinese (正體中文) Традиционный китайский (正體中文) - + Brazilian Portuguese (português do Brasil) Бразильский португальский (português do Brasil) - + Polish (polska) Польский (polska) - + Thai (แบบไทย) Тайский (แบบไทย) - - + + Japan Япония - + USA США - + Europe Европа - + Australia Австралия - + China Китай - + Korea Корея - + Taiwan Тайвань - + Auto (%1) Auto select time zone Авто (%1) - + Default (%1) Default time zone По умолчанию (%1) - + CET CET - + CST6CDT CST6CDT - + Cuba Куба - + EET EET - + Egypt Египт - + Eire Эйре - + EST EST - + EST5EDT EST5EDT - + GB GB - + GB-Eire GB-Эйре - + GMT GMT - + GMT+0 GMT+0 - + GMT-0 GMT-0 - + GMT0 GMT0 - + Greenwich Гринвич - + Hongkong Гонконг - + HST HST - + Iceland Исландия - + Iran Иран - + Israel Израиль - + Jamaica Ямайка - + Kwajalein Кваджалейн - + Libya Ливия - + MET MET - + MST MST - + MST7MDT MST7MDT - + Navajo Навахо - + NZ NZ - + NZ-CHAT NZ-CHAT - + Poland Польша - + Portugal Португалия - + PRC PRC - + PST8PDT PST8PDT - + ROC ROC - + ROK ROK - + Singapore Сингапур - + Turkey Турция - + UCT UCT - + Universal Универсальный - + UTC UTC - + W-SU W-SU - + WET WET - + Zulu Зулусы - + Mono Моно - + Stereo Стерео - + Surround Объёмный звук - + 4GB DRAM (Default) 4 ГБ ОЗУ (по умолчанию) - + 6GB DRAM (Unsafe) 6GB ОЗУ (Небезопасно) - + 8GB DRAM 8ГБ ОЗУ - + 10GB DRAM (Unsafe) 10ГБ ОЗУ(Небезопасно) - + 12GB DRAM (Unsafe) 12ГБ ОЗУ(Небезопасно) - + Docked В док-станции - + Handheld Портативный - - + + Off Выкл. - + Boost (1700MHz) Разгон (1700MHz) - + Fast (2000MHz) Быстрая (2000MHz) - + Always ask (Default) Всегда спрашивать (По умолчанию) - + Only if game specifies not to stop Только если игра указывает не останавливаться - + Never ask Никогда не спрашивать - - + + Medium (256) Средний (256) - - + + High (512) Высокий (512) - + Very Small (16 MB) Очень малый (16 МБ) - + Small (32 MB) Малый (32 МБ) - + Normal (128 MB) Обычный (128 МБ) - + Large (256 MB) Большой (256 МБ) - + Very Large (512 MB) Очень большой (512 МБ) - + Very Low (4 MB) Очень низкий (4 МБ) - + Low (8 MB) Низкий (8 МБ) - + Normal (16 MB) Обычный (16 МБ) - + Medium (32 MB) Средний (32 МБ) - + High (64 MB) Высокий (64 МБ) - + Very Low (32) Очень низкий (32) - + Low (64) Низкий (64) - + Normal (128) Обычный (128) - + Disabled Выключено - + ExtendedDynamicState 1 Расширенное динамическое состояние 1 - + ExtendedDynamicState 2 Расширенное динамическое состояние 2 - + ExtendedDynamicState 3 Расширенное динамическое состояние 3 - + Tree View В виде списка - + Grid View В виде сетки @@ -5803,7 +5799,7 @@ Drag points to change position, or double-click table cells to edit values.Управление данными - + Deleting ANY data is IRREVERSABLE! Удаление ЛЮБЫХ данных НЕВОЗВРАТИМО! @@ -5814,13 +5810,13 @@ Drag points to change position, or double-click table cells to edit values. - UserNAND - UserNAND + User NAND + - SysNAND - SysNAND + System NAND + @@ -5866,7 +5862,7 @@ Drag points to change position, or double-click table cells to edit values.Импортирует данные для этого каталога. Это может занять некоторое время и приведет к удалению ВСЕХ СУЩЕСТВУЮЩИХ ДАННЫХ! - + Calculating... Подсчитываем... diff --git a/dist/languages/sv.ts b/dist/languages/sv.ts index 9d1e227b12..672523630c 100644 --- a/dist/languages/sv.ts +++ b/dist/languages/sv.ts @@ -800,11 +800,23 @@ Denna funktion är experimentell. + Use asynchronous GPU emulation + Använd asynkron GPU-emulering + + + + Uses an extra CPU thread for rendering. +This option should always remain enabled. + Använder en extra CPU-tråd för rendering. +Detta alternativ bör alltid vara aktiverat. + + + NVDEC emulation: NVDEC-emulering: - + Specifies how videos should be decoded. It can either use the CPU or the GPU for decoding, or perform no decoding at all (black screen on videos). In most cases, GPU decoding provides the best performance. @@ -813,12 +825,12 @@ Den kan antingen använda CPU eller GPU för avkodning, eller inte utföra någo I de flesta fall ger GPU-avkodning bäst prestanda. - + ASTC Decoding Method: ASTC-avkodningsmetod: - + This option controls how ASTC textures should be decoded. CPU: Use the CPU for decoding. GPU: Use the GPU's compute shaders to decode ASTC textures (recommended). @@ -831,12 +843,12 @@ CPU asynkront: Använd CPU:n för att avkoda ASTC-texturer vid behov. Eliminerar men kan ge artefakter. - + ASTC Recompression Method: ASTC-återkomprimeringsmetod: - + Most GPUs lack support for ASTC textures and must decompress to anintermediate format: RGBA8. BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, saving VRAM but degrading image quality. @@ -845,44 +857,44 @@ BC1/BC3: Det mellanliggande formatet kommer att komprimeras om till BC1- eller B vilket sparar VRAM men försämrar bildkvaliteten. - + Frame Pacing Mode (Vulkan only) Frame Pacing Mode (endast Vulkan) - + Controls how the emulator manages frame pacing to reduce stuttering and make the frame rate smoother and more consistent. Styr hur emulatorn hanterar bildhastigheten för att minska hackighet och göra bildfrekvensen jämnare och mer konsekvent. - + VRAM Usage Mode: VRAM-användningsläge: - + Selects whether the emulator should prefer to conserve memory or make maximum usage of available video memory for performance. Aggressive mode may impact performance of other applications such as recording software. Väljer om emulatorn ska prioritera att spara minne eller utnyttja tillgängligt videominne maximalt för prestanda. Aggressivt läge kan påverka prestandan hos andra program, till exempel inspelningsprogram. - + Skip CPU Inner Invalidation Hoppa över CPU:ns interna ogiltigförklaring - + Skips certain cache invalidations during memory updates, reducing CPU usage and improving latency. This may cause soft-crashes. Hoppar över vissa cache-ogiltigförklaringar under minnesuppdateringar, vilket minskar CPU-användningen och förbättrar latensen. Detta kan orsaka mjuka krascher. - + VSync Mode: VSync-läge: - + FIFO (VSync) does not drop frames or exhibit tearing but is limited by the screen refresh rate. FIFO Relaxed allows tearing as it recovers from a slow down. Mailbox can have lower latency than FIFO and does not tear but may drop frames. @@ -893,12 +905,12 @@ Mailbox kan ha lägre latens än FIFO och uppvisar inte tearing, men kan tappa b Immediate (ingen synkronisering) visar allt som är tillgängligt och kan uppvisa tearing. - + Sync Memory Operations Synkronisera minnesoperationer - + Ensures data consistency between compute and memory operations. This option fixes issues in games, but may degrade performance. Unreal Engine 4 games often see the most significant changes thereof. @@ -909,32 +921,32 @@ Det här alternativet åtgärdar problem i spel, men kan försämra prestandan. Unreal Engine 4-spel upplever ofta de mest betydande förändringarna av detta. - + Enable asynchronous presentation (Vulkan only) Aktivera asynkron presentation (endast Vulkan) - + Slightly improves performance by moving presentation to a separate CPU thread. Förbättrar prestandan något genom att flytta presentationen till en separat CPU-tråd. - + Force maximum clocks (Vulkan only) Tvinga fram maximal klockfrekvens (endast Vulkan) - + Runs work in the background while waiting for graphics commands to keep the GPU from lowering its clock speed. Körs i bakgrunden i väntan på grafikkommandon för att förhindra att GPU:n sänker sin klockhastighet. - + Anisotropic Filtering: Anisotropisk filtrering: - + Controls the quality of texture rendering at oblique angles. Safe to set at 16x on most GPUs. Kontrollerar kvaliteten på texturrendering vid sneda vinklar. @@ -942,12 +954,12 @@ Safe to set at 16x on most GPUs. Säker att ställa in på 16x på de flesta GPU:er. - + GPU Mode: GPU-läge: - + Controls the GPU emulation mode. Most games render fine with Fast or Balanced modes, but Accurate is still required for some. Particles tend to only render correctly with Accurate mode. @@ -956,56 +968,56 @@ De flesta spel renderas bra med lägena Snabb eller Balanserad, men för vissa k Partiklar tenderar att endast renderas korrekt med läget Noggrann. - + DMA Accuracy: DMA-noggrannhet: - + Controls the DMA precision accuracy. Safe precision fixes issues in some games but may degrade performance. Kontrollerar DMA-precisionens noggrannhet. Säker precision åtgärdar problem i vissa spel men kan försämra prestandan. - + Enable asynchronous shader compilation Aktivera asynkron shaderkompilering - + May reduce shader stutter. Kan minska shader-hackighet. - + Fast GPU Time Snabb GPU-tid - + Overclocks the emulated GPU to increase dynamic resolution and render distance. Use 256 for maximal performance and 512 for maximal graphics fidelity. Överklockar den emulerade GPU:n för att öka den dynamiska upplösningen och renderingsavståndet. Använd 256 för maximal prestanda och 512 för maximal grafisk trohet. - + GPU Unswizzle GPU Unswizzle - + Accelerates BCn 3D texture decoding using GPU compute. Disable if experiencing crashes or graphical glitches. Accelererar avkodning av BCn 3D-texturer med hjälp av GPU-beräkningar. Inaktivera om du upplever krascher eller grafiska fel. - + GPU Unswizzle Max Texture Size Maximal texturstorlek för GPU Unswizzle - + Sets the maximum size (MiB) for GPU-based texture unswizzling. While the GPU is faster for medium and large textures, the CPU may be more efficient for very small ones. Adjust this to find the balance between GPU acceleration and CPU overhead. @@ -1014,48 +1026,48 @@ GPU är snabbare för medelstora och stora texturer, men CPU kan vara effektivar Justera detta för att hitta balansen mellan GPU-acceleration och CPU-överbelastning. - + GPU Unswizzle Stream Size Strömstorlek för GPU Unswizzle - + Sets the maximum amount of texture data (in MiB) processed per frame. Higher values can reduce stutter during texture loading but may impact frame consistency. Ställer in den maximala mängden texturdata (i MiB) som bearbetas per bildruta. Högre värden kan minska hackighet under texturinläsning men kan påverka bildrutans konsistens. - + GPU Unswizzle Chunk Size Chunk-storlek för GPU Unswizzle - + Determines the number of depth slices processed in a single dispatch. Increasing this can improve throughput on high-end GPUs but may cause TDR or driver timeouts on weaker hardware. Bestämmer antalet djupskivor som bearbetas i en enda sändning. Att öka detta kan förbättra genomströmningen på avancerade GPU:er, men kan orsaka TDR eller drivrutinstidsgränser på svagare hårdvara. - + Use Vulkan pipeline cache Använda Vulkan pipeline-cache - + Enables GPU vendor-specific pipeline cache. This option can improve shader loading time significantly in cases where the Vulkan driver does not store pipeline cache files internally. Aktiverar GPU-leverantörsspecifik pipeline-cache. Det här alternativet kan förbättra laddningstiden för shaders avsevärt i fall där Vulkan-drivrutinen inte lagrar pipeline-cache-filer internt. - + Enable Compute Pipelines (Intel Vulkan Only) Aktivera compute pipelines (endast Intel Vulkan) - + Required by some games. This setting only exists for Intel proprietary drivers and may crash if enabled. Compute pipelines are always enabled on all other drivers. @@ -1064,184 +1076,184 @@ Denna inställning finns endast för Intels egna drivrutiner och kan orsaka kras Beräkningspipelines är alltid aktiverade på alla andra drivrutiner. - + Enable Reactive Flushing Aktivera Reactive Flushing - + Uses reactive flushing instead of predictive flushing, allowing more accurate memory syncing. Använder reaktiv rensning i stället för prediktiv rensning, vilket ger mer exakt minnessynkning. - + Sync to framerate of video playback Synkronisera med bildfrekvensen för videouppspelning - + Run the game at normal speed during video playback, even when the framerate is unlocked. Kör spelet i normal hastighet under videouppspelning, även när bildfrekvensen är upplåst. - + Barrier feedback loops Återkopplingsloopar för barriärer - + Improves rendering of transparency effects in specific games. Förbättrar renderingen av transparenseffekter i vissa spel. - + Enable buffer history Aktivera bufferthistorik - + Enables access to previous buffer states. This option may improve rendering quality and performance consistency in some games. Aktiverar åtkomst till tidigare bufferttillstånd. Det här alternativet kan förbättra renderingskvaliteten och prestandakonsistensen i vissa spel. - + Fix bloom effects Korrigera bloom-effekter - + Removes bloom in Burnout. Tar bort bloom i Burnout. - + Enable Legacy Rescale Pass Aktivera äldre omskalningspass - + May fix rescale issues in some games by relying on behavior from the previous implementation. Legacy behavior workaround that fixes line artifacts on AMD and Intel GPUs, and grey texture flicker on Nvidia GPUs in Luigis Mansion 3. Kan åtgärda skalningsproblem i vissa spel genom att förlita sig på beteendet från den tidigare implementeringen. Äldre beteende som åtgärdar linjeartefakter på AMD- och Intel-GPU:er och grå texturflimmer på Nvidia-GPU:er i Luigis Mansion 3. - + Extended Dynamic State Utökad dynamisk status - + Controls the number of features that can be used in Extended Dynamic State. Higher states allow for more features and can increase performance, but may cause additional graphical issues. Kontrollerar antalet funktioner som kan användas i utökat dynamiskt tillstånd. Högre tillstånd möjliggör fler funktioner och kan öka prestandan, men kan orsaka ytterligare grafiska problem. - + Vertex Input Dynamic State Dynamiskt tillstånd för vertexinmatning - + Enables vertex input dynamic state feature for better quality and performance. Aktiverar funktionen för dynamiskt tillstånd för vertexinmatning för bättre kvalitet och prestanda. - + Sample Shading Provskuggning - + Allows the fragment shader to execute per sample in a multi-sampled fragment instead of once per fragment. Improves graphics quality at the cost of performance. Higher values improve quality but degrade performance. Tillåter fragment-shadern att exekveras per prov i ett multisamplade fragment istället för en gång per fragment. Förbättrar grafikens kvalitet på bekostnad av prestanda. Högre värden förbättrar kvaliteten men försämrar prestandan. - + RNG Seed RNG-frö - + Controls the seed of the random number generator. Mainly used for speedrunning. Att kontrollera fröet till slumptalsgeneratorn. Används främst för speedrunning. - + Device Name Enhetsnamn - + The name of the console. Konsolens namn. - + Custom RTC Date: Anpassat RTC-datum: - + This option allows to change the clock of the console. Can be used to manipulate time in games. Med det här alternativet kan du ändra klockan på konsolen. Kan användas för att manipulera tiden i spel. - + The number of seconds from the current unix time Antalet sekunder från aktuell Unix-tid - + Language: Språk: - + This option can be overridden when region setting is auto-select Det här alternativet kan åsidosättas när regioninställningen är automatiskt vald. - + Region: Region: - + The region of the console. Konsolens region. - + Time Zone: Tidszon: - + The time zone of the console. Konsolens tidszon. - + Sound Output Mode: Ljudutmatningsläge: - + Console Mode: Konsolläge: - + Selects if the console is in Docked or Handheld mode. Games will change their resolution, details and supported controllers and depending on this setting. Setting to Handheld can help improve performance for low end systems. @@ -1250,1046 +1262,1031 @@ Spel ändrar upplösning, detaljer och stödda kontroller beroende på denna ins Inställningen Handhållen kan förbättra prestandan för enklare system. - - Unit Serial - Enhetens serienr - - - - Battery Serial - Batteriets serienr - - - - Debug knobs - Felsökningsknappar - - - + Prompt for user profile on boot Fråga efter användarprofil vid uppstart - + Useful if multiple people use the same PC. Användbart om flera personer använder samma dator. - + Pause when not in focus Pausa när inte i fokus - + Pauses emulation when focusing on other windows. Pausar emulering när fokus är på andra fönster. - + Confirm before stopping emulation Bekräfta innan emuleringen stoppas - + Overrides prompts asking to confirm stopping the emulation. Enabling it bypasses such prompts and directly exits the emulation. Åsidosätter frågor om att bekräfta att emuleringen ska avslutas. Om du aktiverar den hoppar du över sådana uppmaningar och avslutar emuleringen direkt. - + Hide mouse on inactivity Dölj musen vid inaktivitet - + Hides the mouse after 2.5s of inactivity. Döljer musen efter 2,5 sekunders inaktivitet. - + Disable controller applet Inaktivera kontroller-appleten - + Forcibly disables the use of the controller applet in emulated programs. When a program attempts to open the controller applet, it is immediately closed. Inaktiverar med tvång användningen av kontrollerappletten i emulerade program. När ett program försöker öppna kontrollerappletten stängs den omedelbart. - + Check for updates Leta efter uppdateringar - + Whether or not to check for updates upon startup. Om uppdateringar ska sökas vid start eller inte. - + Enable Gamemode Aktivera Gamemode - + Force X11 as Graphics Backend Tvinga X11 som grafikbackend - + Custom frontend Anpassad frontend - + Real applet Verklig applet - + Never Aldrig - + On Load Vid inläsning - + Always Alltid - + CPU CPU - + GPU GPU - + CPU Asynchronous CPU asynkron - + Uncompressed (Best quality) Okomprimerad (bästa kvalitet) - + BC1 (Low quality) BC1 (låg kvalitet) - + BC3 (Medium quality) BC3 (medelhög kvalitet) - - + + Auto Auto - + 30 FPS 30 bilder/s - + 60 FPS 60 bilder/s - + 90 FPS 90 bilder/s - + 120 FPS 120 bilder/s - + Conservative Konservativ - + Aggressive Aggressiv - + Vulkan Vulkan - + OpenGL GLSL OpenGL GLSL - + OpenGL GLASM (Assembly Shaders, NVIDIA Only) OpenGL GLASM (Assembly Shaders, endast NVIDIA) - + OpenGL SPIR-V (Experimental, AMD/Mesa Only) OpenGL SPIR-V (Experimentell, endast AMD/Mesa) - + Null Null - + Fast Snabb - + Balanced Balanserad - - + + Accurate Exakt - - + + Default Standard - + Unsafe (fast) Osäker (snabb) - + Safe (stable) Säker (stabil) - + Unsafe Inte säker - + Paranoid (disables most optimizations) Paranoid (inaktiverar de flesta optimeringar) - + Debugging Felsökning - + Dynarmic Dynarmisk - + NCE NCE - + Borderless Windowed Ramlöst fönsterläge - + Exclusive Fullscreen Exklusiv helskärm - + No Video Output Ingen videoutgång - + CPU Video Decoding CPU-videoavkodning - + GPU Video Decoding (Default) GPU videoavkodning (standard) - + 0.25X (180p/270p) [EXPERIMENTAL] 0.25X (180p/270p) [EXPERIMENTELL] - + 0.5X (360p/540p) [EXPERIMENTAL] 0.5X (360p/540p) [EXPERIMENTELL] - + 0.75X (540p/810p) [EXPERIMENTAL] 0.75X (540p/810p) [EXPERIMENTELL] - + 1X (720p/1080p) 1X (720p/1080p) - + 1.25X (900p/1350p) [EXPERIMENTAL] 1.25X (900p/1350p) [EXPERIMENTELL] - + 1.5X (1080p/1620p) [EXPERIMENTAL] 1.5X (1080p/1620p) [EXPERIMENTELL] - + 2X (1440p/2160p) 2X (1440p/2160p) - + 3X (2160p/3240p) 3X (2160p/3240p) - + 4X (2880p/4320p) 4X (2880p/4320p) - + 5X (3600p/5400p) 5X (3600p/5400p) - + 6X (4320p/6480p) 6X (4320p/6480p) - + 7X (5040p/7560p) 7X (5040p/7560p) - + 8X (5760p/8640p) 8X (5760p/8640p) - + Nearest Neighbor Närmsta granne - + Bilinear Bilinjär - + Bicubic Bikubisk - + Gaussian Gaussisk - + Lanczos Lanczos - + ScaleForce ScaleForce - + AMD FidelityFX Super Resolution AMD FidelityFX Super Resolution - + Area Område - + MMPX MMPX - + Zero-Tangent Zero-Tangent - + B-Spline B-Spline - + Mitchell Mitchell - + Spline-1 Spline-1 - - + + None Ingen - + FXAA FXAA - + SMAA SMAA - + Default (16:9) Standard (16:9) - + Force 4:3 Tvinga 4:3 - + Force 21:9 Tvinga 21:9 - + Force 16:10 Tvinga 16:10 - + Stretch to Window Sträck ut till fönster - + Automatic Automatiskt - + 2x 2x - + 4x 4x - + 8x 8x - + 16x 16x - + 32x 32x - + 64x 64x - + Japanese (日本語) Japanska (日本語) - + American English Amerikansk engelska - + French (français) Franska (français) - + German (Deutsch) Tyska (Deutsch) - + Italian (italiano) Italienska (italiano) - + Spanish (español) Spanska (español) - + Chinese Kinesiska - + Korean (한국어) Koreanska (한국어) - + Dutch (Nederlands) Nederländska (Nederlands) - + Portuguese (português) Portugisiska (português) - + Russian (Русский) Ryska (Русский) - + Taiwanese Taiwanesiska - + British English Brittisk engelska - + Canadian French Kanadensisk franska - + Latin American Spanish Latinamerikansk spanska - + Simplified Chinese Förenklad kinesiska - + Traditional Chinese (正體中文) Traditionell kinesiska (正體中文) - + Brazilian Portuguese (português do Brasil) Brasiliansk portugisiska (português do Brasil) - + Polish (polska) Polska (polska) - + Thai (แบบไทย) Thai (แบบไทย) - - + + Japan Japan - + USA USA - + Europe Europa - + Australia Australien - + China Kina - + Korea Korea - + Taiwan Taiwan - + Auto (%1) Auto select time zone Auto (%1) - + Default (%1) Default time zone Standard (%1) - + CET CET - + CST6CDT CST6CDT - + Cuba Kuba - + EET EET - + Egypt Egypten - + Eire Irland - + EST EST - + EST5EDT EST5EDT - + GB GB - + GB-Eire GB-Irland - + GMT GMT - + GMT+0 GMT+0 - + GMT-0 GMT-0 - + GMT0 GMT0 - + Greenwich Greenwich - + Hongkong Hongkong - + HST HST - + Iceland Island - + Iran Iran - + Israel Israel - + Jamaica Jamaica - + Kwajalein Kwajalein - + Libya Libyen - + MET MET - + MST MST - + MST7MDT MST7MDT - + Navajo Navajo - + NZ NZ - + NZ-CHAT NZ-CHAT - + Poland Polen - + Portugal Portugal - + PRC PRC - + PST8PDT PST8PDT - + ROC ROC - + ROK ROK - + Singapore Singapore - + Turkey Turkiet - + UCT UCT - + Universal Universal - + UTC UTC - + W-SU W-SU - + WET VÅT - + Zulu Zulu - + Mono Mono - + Stereo Stereo - + Surround Surround - + 4GB DRAM (Default) 4 GB DRAM (standard) - + 6GB DRAM (Unsafe) 6 GB DRAM (osäker) - + 8GB DRAM 8 GB DRAM - + 10GB DRAM (Unsafe) 10 GB DRAM (osäker) - + 12GB DRAM (Unsafe) 12 GB DRAM (osäker) - + Docked Dockad - + Handheld Handhållen - - + + Off Av - + Boost (1700MHz) Boost (1700MHz) - + Fast (2000MHz) Snabb (2000 MHz) - + Always ask (Default) Fråga alltid (standard) - + Only if game specifies not to stop Endast om spelet anger att det inte ska stoppas - + Never ask Fråga aldrig - - + + Medium (256) Medium (256) - - + + High (512) Hög (512) - + Very Small (16 MB) Mycket liten (16 MB) - + Small (32 MB) Liten (32 MB) - + Normal (128 MB) Normal (128 MB) - + Large (256 MB) Stor (256 MB) - + Very Large (512 MB) Mycket stor (512 MB) - + Very Low (4 MB) Mycket låg (4 MB) - + Low (8 MB) Låg (8 MB) - + Normal (16 MB) Normal (16 MB) - + Medium (32 MB) Medium (32 MB) - + High (64 MB) Hög (64 MB) - + Very Low (32) Mycket låg (32) - + Low (64) Låg (64) - + Normal (128) Normal (128) - + Disabled Inaktiverad - + ExtendedDynamicState 1 ExtendedDynamicState 1 - + ExtendedDynamicState 2 ExtendedDynamicState 2 - + ExtendedDynamicState 3 ExtendedDynamicState 3 - + Tree View Trädvy - + Grid View Rutnätsvy @@ -5815,7 +5812,7 @@ Dra punkterna för att ändra position, eller dubbelklicka på tabellcellerna f Datahanterare - + Deleting ANY data is IRREVERSABLE! Borttagning av VALFRITT data går INTE ATT ÅNGRA! @@ -5826,13 +5823,13 @@ Dra punkterna för att ändra position, eller dubbelklicka på tabellcellerna f - UserNAND - UserNAND + User NAND + - SysNAND - SysNAND + System NAND + @@ -5878,7 +5875,7 @@ Dra punkterna för att ändra position, eller dubbelklicka på tabellcellerna f Importera data för denna katalog. Detta kan ta en stund och kommer att ta bort ALLT BEFINTLIGT DATA! - + Calculating... Beräknar... diff --git a/dist/languages/tr_TR.ts b/dist/languages/tr_TR.ts index e2a588aa18..02c4348c14 100644 --- a/dist/languages/tr_TR.ts +++ b/dist/languages/tr_TR.ts @@ -786,23 +786,34 @@ This feature is experimental. + Use asynchronous GPU emulation + + + + + Uses an extra CPU thread for rendering. +This option should always remain enabled. + + + + NVDEC emulation: NVDEC emülasyonu: - + Specifies how videos should be decoded. It can either use the CPU or the GPU for decoding, or perform no decoding at all (black screen on videos). In most cases, GPU decoding provides the best performance. Videoların nasıl çözüleceğini belirtir. Kod çözme için CPU veya GPU kullanabilir veya hiç kod çözme işlemi yapmayabilir (videolarda siyah ekran). Çoğu durumda GPU ile kod çözme en iyi performansı sağlar. - + ASTC Decoding Method: ASTC Kod Çözme Yöntemi - + This option controls how ASTC textures should be decoded. CPU: Use the CPU for decoding. GPU: Use the GPU's compute shaders to decode ASTC textures (recommended). @@ -811,55 +822,55 @@ stuttering but may present artifacts. Bu seçenek ASTC dokularının nasıl çözüleceğini kontrol eder. CPU: Kod çözme için işlemciyi kullanır. GPU: ASTC dokularını çözmek için GPU'nun hesaplama gölgelendiricilerini kullanır (önerilir). CPU Asenkron: ASTC dokularını talep üzerine çözmek için işlemciyi kullanır. ASTC kod çözme kaynaklı takılmaları giderir ancak görsel bozulmalara neden olabilir. - + ASTC Recompression Method: ASTC Yeniden Sıkıştırma Yöntemi - + Most GPUs lack support for ASTC textures and must decompress to anintermediate format: RGBA8. BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, saving VRAM but degrading image quality. Çoğu GPU, ASTC dokuları için doğrudan desteğe sahip değildir ve bir ara formata (RGBA8) açılmalıdır. BC1/BC3: Ara format BC1 veya BC3 formatında yeniden sıkıştırılarak VRAM tasarrufu sağlar ancak görüntü kalitesini düşürür. - + Frame Pacing Mode (Vulkan only) - + Controls how the emulator manages frame pacing to reduce stuttering and make the frame rate smoother and more consistent. - + VRAM Usage Mode: VRAM Kullanım Modu - + Selects whether the emulator should prefer to conserve memory or make maximum usage of available video memory for performance. Aggressive mode may impact performance of other applications such as recording software. Emülatörün belleği korumayı mı yoksa performans için mevcut video belleğini maksimum düzeyde kullanmayı mı tercih edeceğini seçer. Agresif mod, kayıt yazılımları gibi diğer uygulamaların performansını etkileyebilir. - + Skip CPU Inner Invalidation CPU Geçersiz Kılma'yı Atla - + Skips certain cache invalidations during memory updates, reducing CPU usage and improving latency. This may cause soft-crashes. Bellek güncellemeleri sırasında belirli önbellek geçersiz kılma işlemlerini atlayarak işlemci kullanımını azaltır ve gecikmeyi iyileştirir. Bu, hafif çökmelere neden olabilir. - + VSync Mode: VSync Modu: - + FIFO (VSync) does not drop frames or exhibit tearing but is limited by the screen refresh rate. FIFO Relaxed allows tearing as it recovers from a slow down. Mailbox can have lower latency than FIFO and does not tear but may drop frames. @@ -867,1377 +878,1362 @@ Immediate (no synchronization) presents whatever is available and can exhibit te FIFO (VSync) kare düşürmez veya yırtılma göstermez ancak ekran yenileme hızıyla sınırlıdır. FIFO Relaxed, yavaşlamadan toparlanırken yırtılmaya izin verir. Mailbox, FIFO'dan daha düşük gecikmeye sahip olabilir ve yırtılma yapmaz ancak kare düşürebilir. Immediate (senkronizasyon yok), mevcut olanı anında sunar ve yırtılmalara neden olabilir. - + Sync Memory Operations Bellek İşlemlerini Senkronize Et - + Ensures data consistency between compute and memory operations. This option fixes issues in games, but may degrade performance. Unreal Engine 4 games often see the most significant changes thereof. Hesaplama ve bellek işlemleri arasında veri tutarlılığı sağlar. Bu seçenek oyunlardaki sorunları giderir ancak performansı düşürebilir. Unreal Engine 4 oyunları genellikle bundan en önemli ölçüde etkilenenlerdir. - + Enable asynchronous presentation (Vulkan only) Asenkron sunumu etkinleştir (Yalnızca Vulkan) - + Slightly improves performance by moving presentation to a separate CPU thread. Sunum işlemini ayrı bir işlemci iş parçacığına taşıyarak performansı biraz artırır. - + Force maximum clocks (Vulkan only) En yüksek hızı zorla (Yalnızca Vulkan için) - + Runs work in the background while waiting for graphics commands to keep the GPU from lowering its clock speed. Grafik komutlarını beklerken GPU'nun hızının düşmesini engellemek için arka planda görev yürütür - + Anisotropic Filtering: Anisotropic Filtering: - + Controls the quality of texture rendering at oblique angles. Safe to set at 16x on most GPUs. Eğik açılardaki doku oluşturma kalitesini kontrol eder. Çoğu grafik kartında 16x olarak ayarlanması güvenlidir. - + GPU Mode: Grafik Kartı Modu - + Controls the GPU emulation mode. Most games render fine with Fast or Balanced modes, but Accurate is still required for some. Particles tend to only render correctly with Accurate mode. Grafik kartı emülasyon modunu kontrol eder. Çoğu oyun Hızlı veya Dengeli modlarda sorunsuz çalışır, ancak bazıları için hala Doğru modu gereklidir. Parçacıklar genellikle yalnızca Doğru modda düzgün görüntülenir. - + DMA Accuracy: DMA Doğruluğu: - + Controls the DMA precision accuracy. Safe precision fixes issues in some games but may degrade performance. DMA'in hassasiyet doğruluğunu yönetir. Güvenli hassasiyet, bazı oyunlardaki sorunları giderir, fakat performansı düşürebilir. - + Enable asynchronous shader compilation Asenkron gölgelendirici derlemeyi etkinleştir - + May reduce shader stutter. Gölgelendirici/shader takılmalarını azaltabilir. - + Fast GPU Time Hızlı Grafik Kartı Süresi - + Overclocks the emulated GPU to increase dynamic resolution and render distance. Use 256 for maximal performance and 512 for maximal graphics fidelity. Dinamik çözünürlüğü ve çizim mesafesini artırmak için emüle edilen grafik kartına hız aşırtma uygular. Maksimum performans için 256, maksimum grafik doğruluğu için 512 kullanın. - + GPU Unswizzle - + Accelerates BCn 3D texture decoding using GPU compute. Disable if experiencing crashes or graphical glitches. - + GPU Unswizzle Max Texture Size - + Sets the maximum size (MiB) for GPU-based texture unswizzling. While the GPU is faster for medium and large textures, the CPU may be more efficient for very small ones. Adjust this to find the balance between GPU acceleration and CPU overhead. - + GPU Unswizzle Stream Size - + Sets the maximum amount of texture data (in MiB) processed per frame. Higher values can reduce stutter during texture loading but may impact frame consistency. - + GPU Unswizzle Chunk Size - + Determines the number of depth slices processed in a single dispatch. Increasing this can improve throughput on high-end GPUs but may cause TDR or driver timeouts on weaker hardware. - + Use Vulkan pipeline cache Vulkan pipeline önbelleği kullan - + Enables GPU vendor-specific pipeline cache. This option can improve shader loading time significantly in cases where the Vulkan driver does not store pipeline cache files internally. Grafik kartı üreticisine özel işlem hattı önbelleğini etkinleştirir. Bu seçenek, Vulkan sürücüsünün işlem hattı önbellek dosyalarını dahili olarak saklamadığı durumlarda gölgelendirici yükleme süresini önemli ölçüde iyileştirebilir. - + Enable Compute Pipelines (Intel Vulkan Only) Hesaplama İşlem Hatlarını Etkinleştir (Yalnızca Intel Vulkan) - + Required by some games. This setting only exists for Intel proprietary drivers and may crash if enabled. Compute pipelines are always enabled on all other drivers. Bazı oyunlar için gereklidir. Bu ayar yalnızca Intel'in tescilli sürücüleri için mevcuttur ve etkinleştirilirse çökmeye neden olabilir. Hesaplama işlem hatları diğer tüm sürücülerde her zaman etkindir. - + Enable Reactive Flushing Reaktif Temizlemeyi Etkinleştir - + Uses reactive flushing instead of predictive flushing, allowing more accurate memory syncing. Tahminli temizleme yerine reaktif temizleme kullanarak daha doğru bellek senkronizasyonu sağlar. - + Sync to framerate of video playback Video oynatma kare hızına senkronize et - + Run the game at normal speed during video playback, even when the framerate is unlocked. Kare hızı kilidi açık olsa bile video oynatımı sırasında oyunu normal hızda çalıştırır. - + Barrier feedback loops Bariyer geri besleme döngüleri - + Improves rendering of transparency effects in specific games. Belirli oyunlarda şeffaflık efektlerinin oluşturulmasını iyileştirir. - + Enable buffer history - + Enables access to previous buffer states. This option may improve rendering quality and performance consistency in some games. - + Fix bloom effects - + Removes bloom in Burnout. - + Enable Legacy Rescale Pass - + May fix rescale issues in some games by relying on behavior from the previous implementation. Legacy behavior workaround that fixes line artifacts on AMD and Intel GPUs, and grey texture flicker on Nvidia GPUs in Luigis Mansion 3. - + Extended Dynamic State Genişletilmiş Dinamik Durum - + Controls the number of features that can be used in Extended Dynamic State. Higher states allow for more features and can increase performance, but may cause additional graphical issues. Genişletilmiş Dinamik Durumda kullanılabilecek özelliklerin sayısını kontrol eder. Daha yüksek durumlar daha fazla özelliğe izin verir ve performansı artırabilir, ancak ek grafik sorunlarına neden olabilir. - + Vertex Input Dynamic State Vertex Dinamik Durumu - + Enables vertex input dynamic state feature for better quality and performance. Daha iyi kalite ve performans için Vertex dinamik durum özelliğini etkinleştirir. - + Sample Shading Örnek Gölgelendirme - + Allows the fragment shader to execute per sample in a multi-sampled fragment instead of once per fragment. Improves graphics quality at the cost of performance. Higher values improve quality but degrade performance. Parça gölgelendiricinin, her parça için bir kez yerine çoklu örneklenmiş bir parçadaki her örnek için yürütülmesine olanak tanır. Performans pahasına grafik kalitesini artırır. Daha yüksek değerler kaliteyi artırır ancak performansı düşürür. - + RNG Seed RNG çekirdeği - + Controls the seed of the random number generator. Mainly used for speedrunning. Rastgele sayı üretecinin tohumunu kontrol eder. Esas olarak hızlı bitirme denemeleri için kullanılır. - + Device Name Cihaz İsmi - + The name of the console. Konsolun adı - + Custom RTC Date: Özel RTC Tarihi - + This option allows to change the clock of the console. Can be used to manipulate time in games. Bu seçenek konsolun saatini değiştirmeye olanak tanır. Oyunlarda zamanı manipüle etmek için kullanılabilir. - + The number of seconds from the current unix time Mevcut unix zamanından itibaren saniye sayısı - + Language: Dil: - + This option can be overridden when region setting is auto-select Bölge ayarı otomatik seçim olduğunda bu seçenek geçersiz kılınabilir. - + Region: Bölge: - + The region of the console. Konsolun bölgesi - + Time Zone: Saat Dilimi: - + The time zone of the console. Konsolun saat dilimi - + Sound Output Mode: Ses Çıkış Modu: - + Console Mode: Konsol Modu: - + Selects if the console is in Docked or Handheld mode. Games will change their resolution, details and supported controllers and depending on this setting. Setting to Handheld can help improve performance for low end systems. Konsolun Yerleşik veya El Modunda olup olmadığını seçer. Oyunlar bu ayara bağlı olarak çözünürlüklerini, detaylarını ve desteklenen kontrolcülerini değiştirecektir. El Moduna ayarlamak, düşük seviyeli sistemler için performansı artırmaya yardımcı olabilir. - - Unit Serial - - - - - Battery Serial - - - - - Debug knobs - - - - + Prompt for user profile on boot Açılışta kullanıcı profili için sor - + Useful if multiple people use the same PC. Aynı bilgisayarı birden fazla kişi kullanıyorsa yararlıdır. - + Pause when not in focus Odaklı değilken duraklat - + Pauses emulation when focusing on other windows. Diğer pencerelere odaklanıldığında emülasyonu duraklatır. - + Confirm before stopping emulation Emülasyonu durdurmadan önce onayla - + Overrides prompts asking to confirm stopping the emulation. Enabling it bypasses such prompts and directly exits the emulation. Emülasyonu durdurma onayı isteklerini/istemlerini geçersiz kılar. Etkinleştirildiğinde, bu tür istekleri/istemleri atlar ve emülasyonu doğrudan/dirket olarak kapatır. - + Hide mouse on inactivity Hareketsizlik durumunda imleci gizle - + Hides the mouse after 2.5s of inactivity. 2,5 saniye hareketsizlikten sonra fareyi gizler. - + Disable controller applet Kontrolcü aplikasyonunu devre dışı bırak - + Forcibly disables the use of the controller applet in emulated programs. When a program attempts to open the controller applet, it is immediately closed. Emüle edilen programlarda kontrolcü aplikasyonunun kullanımını zorla devre dışı bırakır. Bir program kontrolcü aplikasyonunu açmaya çalıştığında, aplikasyon anında kapatılır. - + Check for updates Güncellemeleri Kontrol Et - + Whether or not to check for updates upon startup. Başlangıçta güncellemelerin kontrol edilip edilmeyeceği. - + Enable Gamemode Oyun Modunu/Gamemode Etkinleştir - + Force X11 as Graphics Backend Grafik arka ucu olarak X11'i zorla - + Custom frontend Özel ön yüz - + Real applet Gerçek aplikasyon - + Never Asla - + On Load Yüklemede - + Always Her zaman - + CPU CPU - + GPU GPU - + CPU Asynchronous Asenkron CPU - + Uncompressed (Best quality) Sıkıştırılmamış (En iyi kalite) - + BC1 (Low quality) BC1 (Düşük kalite) - + BC3 (Medium quality) BC3 (Orta kalite) - - + + Auto Otomatik - + 30 FPS - + 60 FPS - + 90 FPS - + 120 FPS - + Conservative Muhafazakar - + Aggressive Agresif - + Vulkan Vulkan - + OpenGL GLSL - + OpenGL GLASM (Assembly Shaders, NVIDIA Only) - + OpenGL SPIR-V (Experimental, AMD/Mesa Only) - + Null Boş - + Fast Hızlı - + Balanced Dengeli - - + + Accurate Doğru - - + + Default Varsayılan - + Unsafe (fast) Güvenli Değil (hızlı) - + Safe (stable) Güvenli (Stabil) - + Unsafe Güvensiz - + Paranoid (disables most optimizations) Paranoya (çoğu optimizasyonu kapatır) - + Debugging Hata ayıklama - + Dynarmic Dinamik - + NCE NCE - + Borderless Windowed Kenarlıksız Tam Ekran - + Exclusive Fullscreen Ayrılmış Tam Ekran - + No Video Output Video Çıkışı Yok - + CPU Video Decoding CPU Video Decoding - + GPU Video Decoding (Default) GPU Video Decoding (Varsayılan) - + 0.25X (180p/270p) [EXPERIMENTAL] 0.25X (180p/270p) [DENEYSEL] - + 0.5X (360p/540p) [EXPERIMENTAL] 0.5X (360p/540p) [DENEYSEL] - + 0.75X (540p/810p) [EXPERIMENTAL] 0.75X (540p/810p) [DENEYSEL] - + 1X (720p/1080p) 1X (720p/1080p) - + 1.25X (900p/1350p) [EXPERIMENTAL] 1.25X (900p/1350p) [DENEYSEL] - + 1.5X (1080p/1620p) [EXPERIMENTAL] 1.5X (1080p/1620p) [DENEYSEL] - + 2X (1440p/2160p) 2X (1440p/2160p) - + 3X (2160p/3240p) 3X (2160p/3240p) - + 4X (2880p/4320p) 4X (2880p/4320p) - + 5X (3600p/5400p) 5X (3600p/5400p) - + 6X (4320p/6480p) 6X (4320p/6480p) - + 7X (5040p/7560p) 7X (5040p/7560p) - + 8X (5760p/8640p) 8X (5760p/8640p) - + Nearest Neighbor En Yakın Komşu Algoritması - + Bilinear Bilinear - + Bicubic Bicubic - + Gaussian Gausyen - + Lanczos Lanczos - + ScaleForce ScaleForce - + AMD FidelityFX Super Resolution AMD FidelityFX Süper Çözünürlük - + Area Area - + MMPX MMPX - + Zero-Tangent Zero-Tangent - + B-Spline B-Spline - + Mitchell Mitchell - + Spline-1 Spline-1 - - + + None Yok - + FXAA FXAA - + SMAA SMAA - + Default (16:9) Varsayılan (16:9) - + Force 4:3 4:3'e Zorla - + Force 21:9 21:9'a Zorla - + Force 16:10 16:10'a Zorla - + Stretch to Window Ekrana Sığdır - + Automatic Otomatik - + 2x 2x - + 4x 4x - + 8x 8x - + 16x 16x - + 32x 32x - + 64x 64x - + Japanese (日本語) Japonca (日本語) - + American English Amerikan İngilizcesi - + French (français) Fransızca (français) - + German (Deutsch) Almanca (Deutsch) - + Italian (italiano) İtalyanca (italiano) - + Spanish (español) İspanyolca (español) - + Chinese Çince - + Korean (한국어) Korece (한국어) - + Dutch (Nederlands) Flemenkçe (Nederlands) - + Portuguese (português) Portekizce (português) - + Russian (Русский) Rusça (Русский) - + Taiwanese Tayvanca - + British English İngiliz İngilizcesi - + Canadian French Kanada Fransızcası - + Latin American Spanish Latin Amerika İspanyolcası - + Simplified Chinese Basitleştirilmiş Çince - + Traditional Chinese (正體中文) Geleneksel Çince (正體中文) - + Brazilian Portuguese (português do Brasil) Brezilya Portekizcesi (português do Brasil) - + Polish (polska) - + Thai (แบบไทย) - - + + Japan Japonya - + USA ABD - + Europe Avrupa - + Australia Avustralya - + China Çin - + Korea Kore - + Taiwan Tayvan - + Auto (%1) Auto select time zone Otomatik (%1) - + Default (%1) Default time zone Varsayılan (%1) - + CET CET - + CST6CDT CST6CDT - + Cuba Küba - + EET EET - + Egypt Mısır - + Eire İrlanda - + EST EST - + EST5EDT EST5EDT - + GB GB - + GB-Eire GB-İrlanda - + GMT GMT - + GMT+0 GMT+0 - + GMT-0 MT-0 - + GMT0 GMT0 - + Greenwich Greenwich - + Hongkong Hong Kong - + HST HST - + Iceland İzlanda - + Iran İran - + Israel İsrail - + Jamaica Jamaika - + Kwajalein Kwajalein - + Libya Libya - + MET MET - + MST MST - + MST7MDT MST7MDT - + Navajo Navaho - + NZ Yeni Zelanda - + NZ-CHAT Chatham Adaları - + Poland Polonya - + Portugal Portekiz - + PRC PRC - + PST8PDT PST8PDT - + ROC ROC - + ROK ROK - + Singapore Singapur - + Turkey Türkiye - + UCT UCT - + Universal Evrensel - + UTC UTC - + W-SU W-SU - + WET WET - + Zulu Zulu - + Mono Mono - + Stereo Stereo - + Surround Surround - + 4GB DRAM (Default) 4GB DRAM (Varsayılan) - + 6GB DRAM (Unsafe) 6GB DRAM (Güvenli Değil) - + 8GB DRAM 8GB DRAM - + 10GB DRAM (Unsafe) 10GB DRAM (Güvenli Değil) - + 12GB DRAM (Unsafe) 12GB DRAM (Güvenli Değil) - + Docked Dock Modu Aktif - + Handheld Taşınabilir - - + + Off Kapalı - + Boost (1700MHz) Takviye (1700MHz) - + Fast (2000MHz) Hızlı (2000MHz) - + Always ask (Default) Her zaman sor (Varsayılan) - + Only if game specifies not to stop Sadece oyun durdurulmamasını belirtirse - + Never ask Asla sorma - - + + Medium (256) Orta (256) - - + + High (512) Yüksek (512) - + Very Small (16 MB) - + Small (32 MB) - + Normal (128 MB) - + Large (256 MB) - + Very Large (512 MB) - + Very Low (4 MB) - + Low (8 MB) - + Normal (16 MB) - + Medium (32 MB) - + High (64 MB) - + Very Low (32) - + Low (64) - + Normal (128) - + Disabled Devre Dışı - + ExtendedDynamicState 1 Genişletilmiş Dinamik Durum 1 - + ExtendedDynamicState 2 Genişletilmiş Dinamik Durum 2 - + ExtendedDynamicState 3 Genişletilmiş Dinamik Durum 3 - + Tree View - + Grid View @@ -5756,7 +5752,7 @@ Noktanın konumunu değiştirmek için sürükleyin ya da sayıların üstüne Veri Yöneticisi - + Deleting ANY data is IRREVERSABLE! HERHANGİ bir veriyi silmek GERİ DÖNDÜRÜLEMEZ! @@ -5767,13 +5763,13 @@ Noktanın konumunu değiştirmek için sürükleyin ya da sayıların üstüne - UserNAND - Kullanıcı NAND + User NAND + - SysNAND - SysNAND + System NAND + @@ -5819,7 +5815,7 @@ Noktanın konumunu değiştirmek için sürükleyin ya da sayıların üstüne Bu dizin için veri içe aktarın. Bu biraz zaman alabilir ve MEVCUT TÜM VERİLERİ silecek! - + Calculating... Hesaplanıyor... diff --git a/dist/languages/uk.ts b/dist/languages/uk.ts index a0d28d5cb2..9e9d18d90a 100644 --- a/dist/languages/uk.ts +++ b/dist/languages/uk.ts @@ -800,11 +800,23 @@ This feature is experimental. + Use asynchronous GPU emulation + Використовувати асинхронну емуляцію ГП + + + + Uses an extra CPU thread for rendering. +This option should always remain enabled. + Використовує додатковий потік ЦП для візуалізації. +Це налаштування повинно завжди залишатися увімкненим. + + + NVDEC emulation: Емуляція NVDEC: - + Specifies how videos should be decoded. It can either use the CPU or the GPU for decoding, or perform no decoding at all (black screen on videos). In most cases, GPU decoding provides the best performance. @@ -813,12 +825,12 @@ In most cases, GPU decoding provides the best performance. У більшості випадків декодування за допомогою ГП забезпечує найкращу продуктивність. - + ASTC Decoding Method: Метод декодування ASTC: - + This option controls how ASTC textures should be decoded. CPU: Use the CPU for decoding. GPU: Use the GPU's compute shaders to decode ASTC textures (recommended). @@ -830,12 +842,12 @@ stuttering but may present artifacts. Асинхронно ЦП: Використання ЦП для декодування ASTC-текстур по мірі їх викликів. Повністю усуває затримки декодування ASTC ціною проблем з візуалізацією, поки текстури декодуються. - + ASTC Recompression Method: Метод перестиснення ASTC: - + Most GPUs lack support for ASTC textures and must decompress to anintermediate format: RGBA8. BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, saving VRAM but degrading image quality. @@ -843,44 +855,44 @@ BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, BC1/BC3: Проміжний формат буде перепаковано у формат BC1 або BC3 для збереження відеопам’яті, але це негатривно вплине на якість зображення. - + Frame Pacing Mode (Vulkan only) Режим виведення кадрів (лише Vulkan) - + Controls how the emulator manages frame pacing to reduce stuttering and make the frame rate smoother and more consistent. Керує тим, як емулятор виконує виведення кадрів, щоб зменшити затримки й забезпечити плавнішу й стабільнішу частоту кадрів. - + VRAM Usage Mode: Режим використання відеопам’яті: - + Selects whether the emulator should prefer to conserve memory or make maximum usage of available video memory for performance. Aggressive mode may impact performance of other applications such as recording software. Це налаштування вибирає, чи повинен емулятор надавати перевагу заощадженню пам’яті, чи по максимуму використовувати доступну відеопам’ять задля продуктивності. Режим «Агресивно» може вплинути на продуктивність інших застосунків, як-от засоби запису. - + Skip CPU Inner Invalidation Пропускати внутрішнє анулювання ЦП - + Skips certain cache invalidations during memory updates, reducing CPU usage and improving latency. This may cause soft-crashes. Пропускає деякі анулювання кешу під час оновлень пам’яті, зменшуючи використання ЦП й виправляючи затримки. Це може спричинити збої. - + VSync Mode: Режим вертикальної синхронізації: - + FIFO (VSync) does not drop frames or exhibit tearing but is limited by the screen refresh rate. FIFO Relaxed allows tearing as it recovers from a slow down. Mailbox can have lower latency than FIFO and does not tear but may drop frames. @@ -891,12 +903,12 @@ Mailbox може мати меншу затримку, ніж FIFO, і не ма Immediate (без синхронізації) показує всі кадри й може створювати розриви. - + Sync Memory Operations Синхронізувати операції з пам’яттю - + Ensures data consistency between compute and memory operations. This option fixes issues in games, but may degrade performance. Unreal Engine 4 games often see the most significant changes thereof. @@ -905,44 +917,44 @@ Unreal Engine 4 games often see the most significant changes thereof. Ігри на Unreal Engine 4 часто зазнають найзначніших змін. - + Enable asynchronous presentation (Vulkan only) Увімкнути асинхронне подання (лише Vulkan) - + Slightly improves performance by moving presentation to a separate CPU thread. Трохи покращує продуктивність завдяки переміщенню подання на окремий потік ЦП. - + Force maximum clocks (Vulkan only) Примусово максимальна тактова частота (лише Vulkan) - + Runs work in the background while waiting for graphics commands to keep the GPU from lowering its clock speed. Виконує роботу у фоновому режимі в очікуванні графічних команд, не даючи змоги ГП знижувати тактову частоту. - + Anisotropic Filtering: Анізотропна фільтрація: - + Controls the quality of texture rendering at oblique angles. Safe to set at 16x on most GPUs. Керує якістю візуалізації текстур під непрямими кутами. Для більшості ГП можна вільно вибирати 16x. - + GPU Mode: Режим ГП: - + Controls the GPU emulation mode. Most games render fine with Fast or Balanced modes, but Accurate is still required for some. Particles tend to only render correctly with Accurate mode. @@ -951,56 +963,56 @@ Particles tend to only render correctly with Accurate mode. Частинки зазвичай правильно візуалізуються лише з режимом «Точно». - + DMA Accuracy: Точність DMA: - + Controls the DMA precision accuracy. Safe precision fixes issues in some games but may degrade performance. Керує точністю DMA. Вища точність виправляє проблеми з деякими іграми, але може погіршити продуктивність. - + Enable asynchronous shader compilation Увімкнути асинхронну компіляцію шейдерів - + May reduce shader stutter. Може зменшити шейдерні затримки. - + Fast GPU Time Швидкий час роботи ГП - + Overclocks the emulated GPU to increase dynamic resolution and render distance. Use 256 for maximal performance and 512 for maximal graphics fidelity. Розганяє емульований ГП для збільшення динамічної роздільності та відстані візуалізації. Використовуйте 256 для максимальної продуктивності та 512 для максимальної точності графіки. - + GPU Unswizzle Розпакування за допомогою ГП - + Accelerates BCn 3D texture decoding using GPU compute. Disable if experiencing crashes or graphical glitches. Прискорює декодування 3D-текстур BCn застосовуючи обчислення за допомогою ГП. Вимкніть у разі збоїв або проблем із графікою. - + GPU Unswizzle Max Texture Size Максимальний розмір текстур для розпакування за допомогою ГП - + Sets the maximum size (MiB) for GPU-based texture unswizzling. While the GPU is faster for medium and large textures, the CPU may be more efficient for very small ones. Adjust this to find the balance between GPU acceleration and CPU overhead. @@ -1009,48 +1021,48 @@ Adjust this to find the balance between GPU acceleration and CPU overhead. - + GPU Unswizzle Stream Size Розмір потоку розпакування за допомогою ГП - + Sets the maximum amount of texture data (in MiB) processed per frame. Higher values can reduce stutter during texture loading but may impact frame consistency. Встановлює максимальний обсяг даних текстур (у МіБ) для обробки на кадр. Вищі значення здатні зменшити затримки під час завантаження текстур, але можуть вплинути на стабільність кадрів. - + GPU Unswizzle Chunk Size Розмір блоків розпакування за допомогою ГП - + Determines the number of depth slices processed in a single dispatch. Increasing this can improve throughput on high-end GPUs but may cause TDR or driver timeouts on weaker hardware. Визначає кількість зрізів глибини, оброблених за одне відправлення. Збільшення здатне покращити пропускну здатність на потужних ГП, але може призвести до TDR або затримок драйвера зі слабшим устаткуванням. - + Use Vulkan pipeline cache Використовувати кеш конвеєра Vulkan - + Enables GPU vendor-specific pipeline cache. This option can improve shader loading time significantly in cases where the Vulkan driver does not store pipeline cache files internally. Вмикає особливий для різних виробників ГП кеш конвеєра. Це налаштування може значно зменшити час завантаження шейдерів у випадках, коли драйвер Vulkan не зберігає власний кеш конвеєра. - + Enable Compute Pipelines (Intel Vulkan Only) Увімкнути обчислювальні конвеєри (лише Intel Vulkan) - + Required by some games. This setting only exists for Intel proprietary drivers and may crash if enabled. Compute pipelines are always enabled on all other drivers. @@ -1059,184 +1071,184 @@ Compute pipelines are always enabled on all other drivers. Обчислювальні конвеєри завжди увімкнені у всіх інших драйверах. - + Enable Reactive Flushing Увімкнути реактивне очищення - + Uses reactive flushing instead of predictive flushing, allowing more accurate memory syncing. Використовує реактивне очищення замість прогнозованого, забезпечуючи точнішу синхронізацію пам’яті. - + Sync to framerate of video playback Синхронізувати частоту кадрів з відтворенням відео - + Run the game at normal speed during video playback, even when the framerate is unlocked. Відтворювати гру з нормальною швидкістю під час відтворення відео навіть при розблокованій частоті кадрів. - + Barrier feedback loops Бар’єрні цикли відгуку - + Improves rendering of transparency effects in specific games. Покращує візуалізацію ефектів прозорості в деяких іграх. - + Enable buffer history Увімкнути історію буфера - + Enables access to previous buffer states. This option may improve rendering quality and performance consistency in some games. Вмикає доступ до попередніх станів буфера. Цей параметр може покращити якість візуалізації та стабільну продуктивність у деяких іграх. - + Fix bloom effects Виправити ефекти світіння - + Removes bloom in Burnout. Прибирає світіння в Burnout. - + Enable Legacy Rescale Pass Увімкнути застаріле масштабування - + May fix rescale issues in some games by relying on behavior from the previous implementation. Legacy behavior workaround that fixes line artifacts on AMD and Intel GPUs, and grey texture flicker on Nvidia GPUs in Luigis Mansion 3. Може виправити проблеми з масштабуванням в іграх, покладаючись на поведінку з попередньої імплементації. Застаріле масштабування виправляє артефакти з лініями на ГП від AMD та Intel, а також сіре блимання текстур на ГП від Nvidia в Luigis Mansion 3. - + Extended Dynamic State Розширений динамічний стан - + Controls the number of features that can be used in Extended Dynamic State. Higher states allow for more features and can increase performance, but may cause additional graphical issues. Керує кількістю функцій, які можна використовувати в «Розширеному динамічному стані». Вищі значення допускають більше функцій і можуть збільшити продуктивність, але можуть спричинити додаткові проблеми з графікою. - + Vertex Input Dynamic State Динамічний стан введення вершин - + Enables vertex input dynamic state feature for better quality and performance. Вмикає можливість динамічного стану введення вершин для кращих якості й продуктивності. - + Sample Shading Шейдинг зразків - + Allows the fragment shader to execute per sample in a multi-sampled fragment instead of once per fragment. Improves graphics quality at the cost of performance. Higher values improve quality but degrade performance. Дозволяє виконувати фрагмент шейдера для кожного зразка в багатозразковому фрагменті замість одного разу для кожного фрагмента. Покращує якість графікі ціною втрати продуктивності. Вищі значення покращують якість, але погіршують продуктивність. - + RNG Seed Початкове значення RNG - + Controls the seed of the random number generator. Mainly used for speedrunning. Керує початковим значення генератора випадкових чисел. Зазвичай використовується в спідранах. - + Device Name Назва пристрою - + The name of the console. Назва консолі. - + Custom RTC Date: Користувацька дата RTC: - + This option allows to change the clock of the console. Can be used to manipulate time in games. Це налаштування дозволяє змінити час годинника консолі. Можна використовувати для маніпуляцій із часом в іграх. - + The number of seconds from the current unix time Кількість секунд від поточного unix-часу. - + Language: Мова: - + This option can be overridden when region setting is auto-select Це налаштування може перевизначитися, якщо налаштування регіону вибирається автоматично - + Region: Регіон: - + The region of the console. Регіон консолі. - + Time Zone: Часовий пояс: - + The time zone of the console. Часовий пояс консолі. - + Sound Output Mode: Режим виведення звуку: - + Console Mode: Режим консолі: - + Selects if the console is in Docked or Handheld mode. Games will change their resolution, details and supported controllers and depending on this setting. Setting to Handheld can help improve performance for low end systems. @@ -1245,1046 +1257,1031 @@ Setting to Handheld can help improve performance for low end systems. Налаштування «Портативний» може покращити продуктивність на слабких системах. - - Unit Serial - Серійний номер пристрою - - - - Battery Serial - Серійний номер акумулятора - - - - Debug knobs - Зневаджувальні регулятори - - - + Prompt for user profile on boot Запитувати профіль користувача під час запуску - + Useful if multiple people use the same PC. Корисно, якщо одним комп’ютером користуються кілька користувачів. - + Pause when not in focus Призупиняти, якщо не у фокусі - + Pauses emulation when focusing on other windows. Призупиняє емуляцію при фокусування на інших вікнах. - + Confirm before stopping emulation Підтверджувати зупинку емуляції - + Overrides prompts asking to confirm stopping the emulation. Enabling it bypasses such prompts and directly exits the emulation. Перевизначає запити на підтвердження зупинки емуляції. Увімкнення обходить такі запити й одразу зупиняє емуляцію. - + Hide mouse on inactivity Приховувати курсор миші при бездіяльності - + Hides the mouse after 2.5s of inactivity. Приховує курсор миші після 2,5 с її бездіяльності. - + Disable controller applet Вимкнути аплет контролера - + Forcibly disables the use of the controller applet in emulated programs. When a program attempts to open the controller applet, it is immediately closed. Примусово вимикає використання в емульованих програмах аплета контролера. Якщо програма спробує відкрити аплет контролера, він одразу закриється. - + Check for updates Перевіряти оновлення - + Whether or not to check for updates upon startup. Чи перевіряти оновлення при запуску. - + Enable Gamemode Увімкнути ігровий режим - + Force X11 as Graphics Backend Примусово використовувати X11 як графічний бекенд - + Custom frontend Користувацький фронтенд - + Real applet Справжній аплет - + Never Ніколи - + On Load При завантаженні - + Always Завжди - + CPU ЦП - + GPU ГП - + CPU Asynchronous Асинхронно ЦП - + Uncompressed (Best quality) Без стиснення (Найкраща якість) - + BC1 (Low quality) ВС1 (Низька якість) - + BC3 (Medium quality) ВС3 (Середня якість) - - + + Auto Автоматично - + 30 FPS 30 к/с - + 60 FPS 60 к/с - + 90 FPS 90 к/с - + 120 FPS 120 к/с - + Conservative Заощадження - + Aggressive Агресивно - + Vulkan Vulkan - + OpenGL GLSL OpenGL GLSL - + OpenGL GLASM (Assembly Shaders, NVIDIA Only) OpenGL GLASM (асемблерні шейдери, лише NVIDIA) - + OpenGL SPIR-V (Experimental, AMD/Mesa Only) OpenGL SPIR-V (експериментально, лише AMD/Mesa) - + Null Нічого - + Fast Швидко - + Balanced Збалансовано - - + + Accurate Точно - - + + Default Стандартно - + Unsafe (fast) Небезпечно (швидко) - + Safe (stable) Безпечно (стабільно) - + Unsafe Небезпечно - + Paranoid (disables most optimizations) Параноїк (вимикає більшість оптимізацій) - + Debugging Зневадження - + Dynarmic Динамічно - + NCE NCE - + Borderless Windowed Безрамкове вікно - + Exclusive Fullscreen Ексклюзивний повноекранний - + No Video Output Виведення відео відсутнє - + CPU Video Decoding Декодування відео на ЦП - + GPU Video Decoding (Default) Декодування відео на ГП (стандатно) - + 0.25X (180p/270p) [EXPERIMENTAL] 0.25X (180p/270p) [ЕКСПЕРИМЕНТАЛЬНО] - + 0.5X (360p/540p) [EXPERIMENTAL] 0.5X (360p/540p) [ЕКСПЕРИМЕНТАЛЬНО] - + 0.75X (540p/810p) [EXPERIMENTAL] 0.75X (540p/810p) [ЕКСПЕРИМЕНТАЛЬНО] - + 1X (720p/1080p) 1X (720p/1080p) - + 1.25X (900p/1350p) [EXPERIMENTAL] 1.25X (900p/1350p) [ЕКСПЕРИМЕНТАЛЬНО] - + 1.5X (1080p/1620p) [EXPERIMENTAL] 1.5X (1080p/1620p) [ЕКСПЕРИМЕНТАЛЬНО] - + 2X (1440p/2160p) 2X (1440p/2160p) - + 3X (2160p/3240p) 3X (2160p/3240p) - + 4X (2880p/4320p) 4X (2880p/4320p) - + 5X (3600p/5400p) 5X (3600p/5400p) - + 6X (4320p/6480p) 6X (4320p/6480p) - + 7X (5040p/7560p) 7X (5040p/7560p) - + 8X (5760p/8640p) 8X (5760p/8640p) - + Nearest Neighbor Найближчий сусід - + Bilinear Білінійний - + Bicubic Бікубічний - + Gaussian Ґаусса - + Lanczos Ланцоша - + ScaleForce ScaleForce - + AMD FidelityFX Super Resolution AMD FidelityFX Super Resolution - + Area Області - + MMPX MMPX - + Zero-Tangent Нульовий тангенс - + B-Spline B-Spline - + Mitchell Мітчелла - + Spline-1 Spline-1 - - + + None Немає - + FXAA FXAA - + SMAA SMAA - + Default (16:9) Стандартно (16:9) - + Force 4:3 Примусово 4:3 - + Force 21:9 Примусово 21:9 - + Force 16:10 Примусово 16:10 - + Stretch to Window Розтягнути до вікна - + Automatic Автоматично - + 2x 2x - + 4x 4x - + 8x 8x - + 16x 16x - + 32x 32x - + 64x 64x - + Japanese (日本語) Японська (日本語) - + American English Американська англійська - + French (français) Французька (français) - + German (Deutsch) Німецька (Deutsch) - + Italian (italiano) Італійська (italiano) - + Spanish (español) Іспанська (español) - + Chinese Китайська - + Korean (한국어) Корейська (한국어) - + Dutch (Nederlands) Нідерландська (Nederlands) - + Portuguese (português) Португальська (português) - + Russian (Русский) Російська (Русский) - + Taiwanese Тайванська - + British English Британська англійська - + Canadian French Канадська французька - + Latin American Spanish Латиноамериканська іспанська - + Simplified Chinese Спрощена китайська - + Traditional Chinese (正體中文) Традиційна китайська (正體中文) - + Brazilian Portuguese (português do Brasil) Бразильська португальська (português do Brasil) - + Polish (polska) Польська (polska) - + Thai (แบบไทย) Тайська (แบบไทย) - - + + Japan Японія - + USA США - + Europe Європа - + Australia Австралія - + China Китай - + Korea Корея - + Taiwan Тайвань - + Auto (%1) Auto select time zone Автоматично (%1) - + Default (%1) Default time zone Стандартно (%1) - + CET CET - + CST6CDT CST6CDT - + Cuba Куба - + EET EET - + Egypt Єгипет - + Eire Ейре - + EST EST - + EST5EDT EST5EDT - + GB GB - + GB-Eire GB-Eire - + GMT GMT - + GMT+0 GMT+0 - + GMT-0 GMT-0 - + GMT0 GMT0 - + Greenwich Гринвіч - + Hongkong Гонконг - + HST HST - + Iceland Ісландія - + Iran Іран - + Israel Ізраїль - + Jamaica Ямайка - + Kwajalein Кваджалейн - + Libya Лівія - + MET MET - + MST MST - + MST7MDT MST7MDT - + Navajo Навахо - + NZ NZ - + NZ-CHAT NZ-CHAT - + Poland Польща - + Portugal Португалія - + PRC PRC - + PST8PDT PST8PDT - + ROC ROC - + ROK ROK - + Singapore Сінгапур - + Turkey Туреччина - + UCT UCT - + Universal Універсальний - + UTC UTC - + W-SU W-SU - + WET WET - + Zulu Зулу - + Mono Моно - + Stereo Стерео - + Surround Об’ємний - + 4GB DRAM (Default) 4GB DRAM (стандартно) - + 6GB DRAM (Unsafe) 6GB DRAM (небезпечно) - + 8GB DRAM 8GB DRAM - + 10GB DRAM (Unsafe) 10GB DRAM (небезпечно) - + 12GB DRAM (Unsafe) 12GB DRAM (небезпечно) - + Docked У докстанції - + Handheld Портативний - - + + Off Вимкнено - + Boost (1700MHz) Підвищення (1700 МГц) - + Fast (2000MHz) Швидко (2000 МГц) - + Always ask (Default) Завжди запитувати (стандартно) - + Only if game specifies not to stop Лише якщо гра вказує не зупиняти - + Never ask Ніколи не запитувати - - + + Medium (256) Середньо (256) - - + + High (512) Високо (512) - + Very Small (16 MB) Дуже малий (16 МБ) - + Small (32 MB) Малий (32 МБ) - + Normal (128 MB) Нормальний (128 МБ) - + Large (256 MB) Великий (256 МБ) - + Very Large (512 MB) Дуже великий (512 МБ) - + Very Low (4 MB) Дуже низький (4 МБ) - + Low (8 MB) Низький (8 МБ) - + Normal (16 MB) Нормальний (16 МБ) - + Medium (32 MB) Середній (32 МБ) - + High (64 MB) Високий (64 МБ) - + Very Low (32) Дуже низький (32) - + Low (64) Низький (64) - + Normal (128) Нормальний (128) - + Disabled Вимкнено - + ExtendedDynamicState 1 Розширений динамічний стан 1 - + ExtendedDynamicState 2 Розширений динамічний стан 2 - + ExtendedDynamicState 3 Розширений динамічний стан 3 - + Tree View Дерево вибору - + Grid View Таблиця @@ -5810,7 +5807,7 @@ Drag points to change position, or double-click table cells to edit values.Керування даними - + Deleting ANY data is IRREVERSABLE! Видалення БУДЬ-ЯКИХ даних НЕЗВОРОТНЕ! @@ -5821,13 +5818,13 @@ Drag points to change position, or double-click table cells to edit values. - UserNAND - Користувацька NAND + User NAND + - SysNAND - Системна NAND + System NAND + @@ -5873,7 +5870,7 @@ Drag points to change position, or double-click table cells to edit values.Імпортувати дані до цієї теки. Це може тривати певний час і видалить УСІ НАЯВНІ ДАНІ! - + Calculating... Обчислення... diff --git a/dist/languages/vi.ts b/dist/languages/vi.ts index 22827f942a..eb328bd695 100644 --- a/dist/languages/vi.ts +++ b/dist/languages/vi.ts @@ -769,23 +769,34 @@ This feature is experimental. + Use asynchronous GPU emulation + + + + + Uses an extra CPU thread for rendering. +This option should always remain enabled. + + + + NVDEC emulation: Giả lập NVDEC: - + Specifies how videos should be decoded. It can either use the CPU or the GPU for decoding, or perform no decoding at all (black screen on videos). In most cases, GPU decoding provides the best performance. - + ASTC Decoding Method: - + This option controls how ASTC textures should be decoded. CPU: Use the CPU for decoding. GPU: Use the GPU's compute shaders to decode ASTC textures (recommended). @@ -794,55 +805,55 @@ stuttering but may present artifacts. - + ASTC Recompression Method: - + Most GPUs lack support for ASTC textures and must decompress to anintermediate format: RGBA8. BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, saving VRAM but degrading image quality. - + Frame Pacing Mode (Vulkan only) - + Controls how the emulator manages frame pacing to reduce stuttering and make the frame rate smoother and more consistent. - + VRAM Usage Mode: - + Selects whether the emulator should prefer to conserve memory or make maximum usage of available video memory for performance. Aggressive mode may impact performance of other applications such as recording software. - + Skip CPU Inner Invalidation - + Skips certain cache invalidations during memory updates, reducing CPU usage and improving latency. This may cause soft-crashes. - + VSync Mode: Chế độ Vsync: - + FIFO (VSync) does not drop frames or exhibit tearing but is limited by the screen refresh rate. FIFO Relaxed allows tearing as it recovers from a slow down. Mailbox can have lower latency than FIFO and does not tear but may drop frames. @@ -850,1376 +861,1361 @@ Immediate (no synchronization) presents whatever is available and can exhibit te - + Sync Memory Operations - + Ensures data consistency between compute and memory operations. This option fixes issues in games, but may degrade performance. Unreal Engine 4 games often see the most significant changes thereof. - + Enable asynchronous presentation (Vulkan only) Bật hiển thị bất đồng bộ (chỉ cho Vulkan) - + Slightly improves performance by moving presentation to a separate CPU thread. - + Force maximum clocks (Vulkan only) Buộc chạy ở xung nhịp tối đa (chỉ cho Vulkan) - + Runs work in the background while waiting for graphics commands to keep the GPU from lowering its clock speed. Chạy các công việc trong nền trong khi đang chờ lệnh đồ họa để giữ cho GPU không giảm xung nhịp. - + Anisotropic Filtering: Lọc bất đẳng hướng: - + Controls the quality of texture rendering at oblique angles. Safe to set at 16x on most GPUs. - + GPU Mode: - + Controls the GPU emulation mode. Most games render fine with Fast or Balanced modes, but Accurate is still required for some. Particles tend to only render correctly with Accurate mode. - + DMA Accuracy: - + Controls the DMA precision accuracy. Safe precision fixes issues in some games but may degrade performance. - + Enable asynchronous shader compilation - + May reduce shader stutter. - + Fast GPU Time - + Overclocks the emulated GPU to increase dynamic resolution and render distance. Use 256 for maximal performance and 512 for maximal graphics fidelity. - + GPU Unswizzle - + Accelerates BCn 3D texture decoding using GPU compute. Disable if experiencing crashes or graphical glitches. - + GPU Unswizzle Max Texture Size - + Sets the maximum size (MiB) for GPU-based texture unswizzling. While the GPU is faster for medium and large textures, the CPU may be more efficient for very small ones. Adjust this to find the balance between GPU acceleration and CPU overhead. - + GPU Unswizzle Stream Size - + Sets the maximum amount of texture data (in MiB) processed per frame. Higher values can reduce stutter during texture loading but may impact frame consistency. - + GPU Unswizzle Chunk Size - + Determines the number of depth slices processed in a single dispatch. Increasing this can improve throughput on high-end GPUs but may cause TDR or driver timeouts on weaker hardware. - + Use Vulkan pipeline cache Dùng bộ nhớ đệm pipeline Vulkan - + Enables GPU vendor-specific pipeline cache. This option can improve shader loading time significantly in cases where the Vulkan driver does not store pipeline cache files internally. - + Enable Compute Pipelines (Intel Vulkan Only) - + Required by some games. This setting only exists for Intel proprietary drivers and may crash if enabled. Compute pipelines are always enabled on all other drivers. - + Enable Reactive Flushing Bật xả tương ứng - + Uses reactive flushing instead of predictive flushing, allowing more accurate memory syncing. - + Sync to framerate of video playback Đồng bộ hóa với tốc độ khung hình khi phát video - + Run the game at normal speed during video playback, even when the framerate is unlocked. Chạy game với tốc độ bình thường trong quá trình phát video, ngay cả khi tốc độ khung hình được mở khóa. - + Barrier feedback loops Vòng lặp phản hồi rào cản - + Improves rendering of transparency effects in specific games. Cải thiện hiệu quả kết xuất của hiệu ứng trong suốt trong một số game. - + Enable buffer history - + Enables access to previous buffer states. This option may improve rendering quality and performance consistency in some games. - + Fix bloom effects - + Removes bloom in Burnout. - + Enable Legacy Rescale Pass - + May fix rescale issues in some games by relying on behavior from the previous implementation. Legacy behavior workaround that fixes line artifacts on AMD and Intel GPUs, and grey texture flicker on Nvidia GPUs in Luigis Mansion 3. - + Extended Dynamic State - + Controls the number of features that can be used in Extended Dynamic State. Higher states allow for more features and can increase performance, but may cause additional graphical issues. - + Vertex Input Dynamic State - + Enables vertex input dynamic state feature for better quality and performance. - + Sample Shading - + Allows the fragment shader to execute per sample in a multi-sampled fragment instead of once per fragment. Improves graphics quality at the cost of performance. Higher values improve quality but degrade performance. - + RNG Seed Hạt giống RNG - + Controls the seed of the random number generator. Mainly used for speedrunning. - + Device Name Tên thiết bị - + The name of the console. - + Custom RTC Date: - + This option allows to change the clock of the console. Can be used to manipulate time in games. - + The number of seconds from the current unix time - + Language: - + This option can be overridden when region setting is auto-select - + Region: Vùng: - + The region of the console. - + Time Zone: Múi giờ: - + The time zone of the console. - + Sound Output Mode: Chế độ đầu ra âm thanh: - + Console Mode: - + Selects if the console is in Docked or Handheld mode. Games will change their resolution, details and supported controllers and depending on this setting. Setting to Handheld can help improve performance for low end systems. - - Unit Serial - - - - - Battery Serial - - - - - Debug knobs - - - - + Prompt for user profile on boot - + Useful if multiple people use the same PC. - + Pause when not in focus - + Pauses emulation when focusing on other windows. - + Confirm before stopping emulation - + Overrides prompts asking to confirm stopping the emulation. Enabling it bypasses such prompts and directly exits the emulation. - + Hide mouse on inactivity Ẩn con trỏ chuột khi không dùng - + Hides the mouse after 2.5s of inactivity. - + Disable controller applet Vô hiệu hoá applet tay cầm - + Forcibly disables the use of the controller applet in emulated programs. When a program attempts to open the controller applet, it is immediately closed. - + Check for updates - + Whether or not to check for updates upon startup. - + Enable Gamemode - + Force X11 as Graphics Backend - + Custom frontend - + Real applet - + Never - + On Load - + Always - + CPU CPU - + GPU - + CPU Asynchronous - + Uncompressed (Best quality) Không nén (Chất lượng tốt nhất) - + BC1 (Low quality) BC1 (Chất lượng thấp) - + BC3 (Medium quality) BC3 (Chất lượng trung bình) - - + + Auto Tự động - + 30 FPS - + 60 FPS - + 90 FPS - + 120 FPS - + Conservative - + Aggressive - + Vulkan Vulkan - + OpenGL GLSL - + OpenGL GLASM (Assembly Shaders, NVIDIA Only) - + OpenGL SPIR-V (Experimental, AMD/Mesa Only) - + Null Null - + Fast - + Balanced - - + + Accurate Chính xác - - + + Default Mặc định - + Unsafe (fast) - + Safe (stable) - + Unsafe Không an toàn - + Paranoid (disables most optimizations) Paranoid (vô hiệu hoá hầu hết sự tối ưu) - + Debugging - + Dynarmic - + NCE - + Borderless Windowed Cửa sổ không viền - + Exclusive Fullscreen Toàn màn hình - + No Video Output Không có đầu ra video - + CPU Video Decoding Giải mã video bằng CPU - + GPU Video Decoding (Default) Giải mã video bằng GPU (Mặc định) - + 0.25X (180p/270p) [EXPERIMENTAL] - + 0.5X (360p/540p) [EXPERIMENTAL] - + 0.75X (540p/810p) [EXPERIMENTAL] 0.75X (540p/810p) [THỬ NGHIỆM] - + 1X (720p/1080p) 1X (720p/1080p) - + 1.25X (900p/1350p) [EXPERIMENTAL] - + 1.5X (1080p/1620p) [EXPERIMENTAL] 1.5X (1080p/1620p) [THỬ NGHIỆM] - + 2X (1440p/2160p) 2X (1440p/2160p) - + 3X (2160p/3240p) 3X (2160p/3240p) - + 4X (2880p/4320p) 4X (2880p/4320p) - + 5X (3600p/5400p) 5X (3600p/5400p) - + 6X (4320p/6480p) 6X (4320p/6480p) - + 7X (5040p/7560p) 7X (5040p/7560p) - + 8X (5760p/8640p) 8X (5760p/8640p) - + Nearest Neighbor Nearest Neighbor - + Bilinear Bilinear - + Bicubic Bicubic - + Gaussian Gaussian - + Lanczos - + ScaleForce ScaleForce - + AMD FidelityFX Super Resolution - + Area - + MMPX - + Zero-Tangent - + B-Spline - + Mitchell - + Spline-1 - - + + None Không có - + FXAA FXAA - + SMAA SMAA - + Default (16:9) Mặc định (16:9) - + Force 4:3 Dùng 4:3 - + Force 21:9 Dùng 21:9 - + Force 16:10 Dùng 16:10 - + Stretch to Window Mở rộng đến cửa sổ - + Automatic Tự động - + 2x 2x - + 4x 4x - + 8x 8x - + 16x 16x - + 32x - + 64x - + Japanese (日本語) Tiếng Nhật (日本語) - + American English Tiếng Anh Mỹ - + French (français) Tiếng Pháp (French) - + German (Deutsch) Tiếng Đức (Deutsch) - + Italian (italiano) Tiếng Ý (italiano) - + Spanish (español) Tiếng Tây Ban Nha (Español) - + Chinese Tiếng Trung - + Korean (한국어) Tiếng Hàn (한국어) - + Dutch (Nederlands) Tiếng Hà Lan (Nederlands) - + Portuguese (português) Tiếng Bồ Đào Nha (Portuguese) - + Russian (Русский) Tiếng Nga (Русский) - + Taiwanese Tiếng Đài Loan - + British English Tiếng Anh Anh - + Canadian French Tiếng Pháp Canada - + Latin American Spanish Tiếng Tây Ban Nha Mỹ Latinh - + Simplified Chinese Tiếng Trung giản thể - + Traditional Chinese (正體中文) Tiếng Trung phồn thể (正體中文) - + Brazilian Portuguese (português do Brasil) Tiếng Bồ Đào Nha Brasil (Português do Brasil) - + Polish (polska) - + Thai (แบบไทย) - - + + Japan Nhật Bản - + USA Hoa Kỳ - + Europe Châu Âu - + Australia Úc - + China Trung Quốc - + Korea Hàn Quốc - + Taiwan Đài Loan - + Auto (%1) Auto select time zone Tự động (%1) - + Default (%1) Default time zone Mặc định (%1) - + CET CET - + CST6CDT CST6CDT - + Cuba Cuba - + EET EET - + Egypt Ai Cập - + Eire Eire - + EST EST - + EST5EDT EST5EDT - + GB GB - + GB-Eire GB-Eire - + GMT GMT - + GMT+0 GMT+0 - + GMT-0 GMT-0 - + GMT0 GMT0 - + Greenwich Greenwich - + Hongkong Hồng Kông - + HST HST - + Iceland Iceland - + Iran Iran - + Israel Israel - + Jamaica Jamaica - + Kwajalein Kwajalein - + Libya Libya - + MET MET - + MST MST - + MST7MDT MST7MDT - + Navajo Navajo - + NZ NZ - + NZ-CHAT NZ-CHAT - + Poland Ba Lan - + Portugal Bồ Đào Nha - + PRC PRC - + PST8PDT PST8PDT - + ROC ROC - + ROK ROK - + Singapore Singapore - + Turkey Thổ Nhĩ Kỳ - + UCT UCT - + Universal Quốc tế - + UTC UTC - + W-SU W-SU - + WET WET - + Zulu Zulu - + Mono Mono - + Stereo Stereo - + Surround Surround - + 4GB DRAM (Default) - + 6GB DRAM (Unsafe) - + 8GB DRAM - + 10GB DRAM (Unsafe) - + 12GB DRAM (Unsafe) - + Docked Docked - + Handheld Handheld - - + + Off - + Boost (1700MHz) - + Fast (2000MHz) - + Always ask (Default) - + Only if game specifies not to stop - + Never ask + + + + Medium (256) + + - Medium (256) - - - - - High (512) - + Very Small (16 MB) - + Small (32 MB) - + Normal (128 MB) - + Large (256 MB) - + Very Large (512 MB) - + Very Low (4 MB) - + Low (8 MB) - + Normal (16 MB) - + Medium (32 MB) - + High (64 MB) - + Very Low (32) - + Low (64) - + Normal (128) - + Disabled - + ExtendedDynamicState 1 - + ExtendedDynamicState 2 - + ExtendedDynamicState 3 - + Tree View - + Grid View @@ -5728,7 +5724,7 @@ Kéo điểm để thay đổi vị trí, hoặc nhấp đúp chuột vào ô tr - + Deleting ANY data is IRREVERSABLE! @@ -5739,12 +5735,12 @@ Kéo điểm để thay đổi vị trí, hoặc nhấp đúp chuột vào ô tr - UserNAND + User NAND - SysNAND + System NAND @@ -5791,7 +5787,7 @@ Kéo điểm để thay đổi vị trí, hoặc nhấp đúp chuột vào ô tr - + Calculating... diff --git a/dist/languages/vi_VN.ts b/dist/languages/vi_VN.ts index fe5c6e1131..9e98d41fd5 100644 --- a/dist/languages/vi_VN.ts +++ b/dist/languages/vi_VN.ts @@ -769,23 +769,34 @@ This feature is experimental. + Use asynchronous GPU emulation + + + + + Uses an extra CPU thread for rendering. +This option should always remain enabled. + + + + NVDEC emulation: Giả lập NVDEC - + Specifies how videos should be decoded. It can either use the CPU or the GPU for decoding, or perform no decoding at all (black screen on videos). In most cases, GPU decoding provides the best performance. - + ASTC Decoding Method: - + This option controls how ASTC textures should be decoded. CPU: Use the CPU for decoding. GPU: Use the GPU's compute shaders to decode ASTC textures (recommended). @@ -794,55 +805,55 @@ stuttering but may present artifacts. - + ASTC Recompression Method: - + Most GPUs lack support for ASTC textures and must decompress to anintermediate format: RGBA8. BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, saving VRAM but degrading image quality. - + Frame Pacing Mode (Vulkan only) - + Controls how the emulator manages frame pacing to reduce stuttering and make the frame rate smoother and more consistent. - + VRAM Usage Mode: - + Selects whether the emulator should prefer to conserve memory or make maximum usage of available video memory for performance. Aggressive mode may impact performance of other applications such as recording software. - + Skip CPU Inner Invalidation - + Skips certain cache invalidations during memory updates, reducing CPU usage and improving latency. This may cause soft-crashes. - + VSync Mode: Chế độ Vsync: - + FIFO (VSync) does not drop frames or exhibit tearing but is limited by the screen refresh rate. FIFO Relaxed allows tearing as it recovers from a slow down. Mailbox can have lower latency than FIFO and does not tear but may drop frames. @@ -850,1376 +861,1361 @@ Immediate (no synchronization) presents whatever is available and can exhibit te - + Sync Memory Operations - + Ensures data consistency between compute and memory operations. This option fixes issues in games, but may degrade performance. Unreal Engine 4 games often see the most significant changes thereof. - + Enable asynchronous presentation (Vulkan only) Bật hiển thị bất đồng bộ (chỉ dành cho Vulkan) - + Slightly improves performance by moving presentation to a separate CPU thread. - + Force maximum clocks (Vulkan only) Buộc chạy ở xung nhịp tối đa (chỉ Vulkan) - + Runs work in the background while waiting for graphics commands to keep the GPU from lowering its clock speed. Chạy các công việc trong nền trong khi đang chờ lệnh đồ họa để giữ cho GPU không giảm xung nhịp. - + Anisotropic Filtering: Bộ lọc góc nghiêng: - + Controls the quality of texture rendering at oblique angles. Safe to set at 16x on most GPUs. - + GPU Mode: - + Controls the GPU emulation mode. Most games render fine with Fast or Balanced modes, but Accurate is still required for some. Particles tend to only render correctly with Accurate mode. - + DMA Accuracy: - + Controls the DMA precision accuracy. Safe precision fixes issues in some games but may degrade performance. - + Enable asynchronous shader compilation - + May reduce shader stutter. - + Fast GPU Time - + Overclocks the emulated GPU to increase dynamic resolution and render distance. Use 256 for maximal performance and 512 for maximal graphics fidelity. - + GPU Unswizzle - + Accelerates BCn 3D texture decoding using GPU compute. Disable if experiencing crashes or graphical glitches. - + GPU Unswizzle Max Texture Size - + Sets the maximum size (MiB) for GPU-based texture unswizzling. While the GPU is faster for medium and large textures, the CPU may be more efficient for very small ones. Adjust this to find the balance between GPU acceleration and CPU overhead. - + GPU Unswizzle Stream Size - + Sets the maximum amount of texture data (in MiB) processed per frame. Higher values can reduce stutter during texture loading but may impact frame consistency. - + GPU Unswizzle Chunk Size - + Determines the number of depth slices processed in a single dispatch. Increasing this can improve throughput on high-end GPUs but may cause TDR or driver timeouts on weaker hardware. - + Use Vulkan pipeline cache Dùng Vulkan pipeline cache - + Enables GPU vendor-specific pipeline cache. This option can improve shader loading time significantly in cases where the Vulkan driver does not store pipeline cache files internally. - + Enable Compute Pipelines (Intel Vulkan Only) - + Required by some games. This setting only exists for Intel proprietary drivers and may crash if enabled. Compute pipelines are always enabled on all other drivers. - + Enable Reactive Flushing Bật xả tương ứng - + Uses reactive flushing instead of predictive flushing, allowing more accurate memory syncing. - + Sync to framerate of video playback Đồng bộ hóa với tốc độ khung hình khi phát video - + Run the game at normal speed during video playback, even when the framerate is unlocked. Chạy game với tốc độ bình thường trong quá trình phát video, ngay cả khi tốc độ khung hình được mở khóa. - + Barrier feedback loops Vòng lặp phản hồi rào cản - + Improves rendering of transparency effects in specific games. Cải thiện hiệu quả hiển thị của hiệu ứng trong suốt trong một số trò chơi. - + Enable buffer history - + Enables access to previous buffer states. This option may improve rendering quality and performance consistency in some games. - + Fix bloom effects - + Removes bloom in Burnout. - + Enable Legacy Rescale Pass - + May fix rescale issues in some games by relying on behavior from the previous implementation. Legacy behavior workaround that fixes line artifacts on AMD and Intel GPUs, and grey texture flicker on Nvidia GPUs in Luigis Mansion 3. - + Extended Dynamic State - + Controls the number of features that can be used in Extended Dynamic State. Higher states allow for more features and can increase performance, but may cause additional graphical issues. - + Vertex Input Dynamic State - + Enables vertex input dynamic state feature for better quality and performance. - + Sample Shading - + Allows the fragment shader to execute per sample in a multi-sampled fragment instead of once per fragment. Improves graphics quality at the cost of performance. Higher values improve quality but degrade performance. - + RNG Seed Hạt giống RNG - + Controls the seed of the random number generator. Mainly used for speedrunning. - + Device Name Tên thiết bị - + The name of the console. - + Custom RTC Date: - + This option allows to change the clock of the console. Can be used to manipulate time in games. - + The number of seconds from the current unix time - + Language: - + This option can be overridden when region setting is auto-select - + Region: Vùng: - + The region of the console. - + Time Zone: Múi giờ: - + The time zone of the console. - + Sound Output Mode: Chế độ đầu ra âm thanh - + Console Mode: - + Selects if the console is in Docked or Handheld mode. Games will change their resolution, details and supported controllers and depending on this setting. Setting to Handheld can help improve performance for low end systems. - - Unit Serial - - - - - Battery Serial - - - - - Debug knobs - - - - + Prompt for user profile on boot - + Useful if multiple people use the same PC. - + Pause when not in focus - + Pauses emulation when focusing on other windows. - + Confirm before stopping emulation - + Overrides prompts asking to confirm stopping the emulation. Enabling it bypasses such prompts and directly exits the emulation. - + Hide mouse on inactivity Ẩn con trỏ chuột khi không dùng - + Hides the mouse after 2.5s of inactivity. - + Disable controller applet Vô hiệu hoá applet tay cầm - + Forcibly disables the use of the controller applet in emulated programs. When a program attempts to open the controller applet, it is immediately closed. - + Check for updates - + Whether or not to check for updates upon startup. - + Enable Gamemode - + Force X11 as Graphics Backend - + Custom frontend - + Real applet - + Never - + On Load - + Always - + CPU CPU - + GPU - + CPU Asynchronous - + Uncompressed (Best quality) Không nén (Chất lượng tốt nhất) - + BC1 (Low quality) BC1 (Chất lượng thấp) - + BC3 (Medium quality) BC3 (Chất lượng trung bình) - - + + Auto Tự động - + 30 FPS - + 60 FPS - + 90 FPS - + 120 FPS - + Conservative - + Aggressive - + Vulkan Vulkan - + OpenGL GLSL - + OpenGL GLASM (Assembly Shaders, NVIDIA Only) - + OpenGL SPIR-V (Experimental, AMD/Mesa Only) - + Null Null - + Fast - + Balanced - - + + Accurate Tuyệt đối - - + + Default Mặc định - + Unsafe (fast) - + Safe (stable) - + Unsafe Tương đối - + Paranoid (disables most optimizations) Paranoid (vô hiệu hoá hầu hết sự tối ưu) - + Debugging - + Dynarmic - + NCE - + Borderless Windowed Cửa sổ không viền - + Exclusive Fullscreen Toàn màn hình - + No Video Output Không Video Đầu Ra - + CPU Video Decoding Giải mã video bằng CPU - + GPU Video Decoding (Default) Giải mã video bằng GPU (Mặc định) - + 0.25X (180p/270p) [EXPERIMENTAL] - + 0.5X (360p/540p) [EXPERIMENTAL] - + 0.75X (540p/810p) [EXPERIMENTAL] 0.75X (540p/810p) [THỬ NGHIỆM] - + 1X (720p/1080p) 1X (720p/1080p) - + 1.25X (900p/1350p) [EXPERIMENTAL] - + 1.5X (1080p/1620p) [EXPERIMENTAL] 1.5X (1080p/1620p) [THỬ NGHIỆM] - + 2X (1440p/2160p) 2X (1440p/2160p) - + 3X (2160p/3240p) 3X (2160p/3240p) - + 4X (2880p/4320p) 4X (2880p/4320p) - + 5X (3600p/5400p) 5X (3600p/5400p) - + 6X (4320p/6480p) 6X (4320p/6480p) - + 7X (5040p/7560p) 7X (5040p/7560p) - + 8X (5760p/8640p) 8X (5760p/8640p) - + Nearest Neighbor Nearest Neighbor - + Bilinear Bilinear - + Bicubic Bicubic - + Gaussian ScaleForce - + Lanczos - + ScaleForce ScaleForce - + AMD FidelityFX Super Resolution - + Area - + MMPX - + Zero-Tangent - + B-Spline - + Mitchell - + Spline-1 - - + + None Trống - + FXAA FXAA - + SMAA SMAA - + Default (16:9) Mặc định (16:9) - + Force 4:3 Dùng 4:3 - + Force 21:9 Dùng 21:9 - + Force 16:10 Dung 16:10 - + Stretch to Window Kéo dãn đến cửa sổ phần mềm - + Automatic Tự động - + 2x 2x - + 4x 4x - + 8x 8x - + 16x 16x - + 32x - + 64x - + Japanese (日本語) Tiếng Nhật (日本語) - + American English Tiếng Anh Mỹ - + French (français) Tiếng Pháp (French) - + German (Deutsch) Tiếng Đức (Deutsch) - + Italian (italiano) Tiếng Ý (italiano) - + Spanish (español) Tiếng Tây Ban Nha (Spanish) - + Chinese Tiếng Trung - + Korean (한국어) Tiếng Hàn (한국어) - + Dutch (Nederlands) Tiếng Hà Lan (Dutch) - + Portuguese (português) Tiếng Bồ Đào Nha (Portuguese) - + Russian (Русский) Tiếng Nga (Русский) - + Taiwanese Tiếng Đài Loan - + British English Tiếng Anh UK (British English) - + Canadian French Tiếng Pháp Canada - + Latin American Spanish Tiếng Mỹ La-tinh - + Simplified Chinese Tiếng Trung giản thể - + Traditional Chinese (正體中文) Tiếng Trung phồn thể (正體中文) - + Brazilian Portuguese (português do Brasil) Tiếng Bồ Đào Nha của người Brazil (Português do Brasil) - + Polish (polska) - + Thai (แบบไทย) - - + + Japan Nhật Bản - + USA Hoa Kỳ - + Europe Châu Âu - + Australia Châu Úc - + China Trung Quốc - + Korea Hàn Quốc - + Taiwan Đài Loan - + Auto (%1) Auto select time zone Tự động (%1) - + Default (%1) Default time zone Mặc định (%1) - + CET CET - + CST6CDT CST6CDT - + Cuba Cuba - + EET EET - + Egypt Ai Cập - + Eire Eire - + EST EST - + EST5EDT EST5EDT - + GB GB - + GB-Eire GB-Eire - + GMT GMT - + GMT+0 GMT+0 - + GMT-0 GMT-0 - + GMT0 GMT0 - + Greenwich Greenwich - + Hongkong Hồng Kông - + HST HST - + Iceland Iceland - + Iran Iran - + Israel Israel - + Jamaica Jamaica - + Kwajalein Kwajalein - + Libya Libya - + MET MET - + MST MST - + MST7MDT MST7MDT - + Navajo Navajo - + NZ NZ - + NZ-CHAT NZ-CHAT - + Poland Ba Lan - + Portugal Bồ Đào Nha - + PRC PRC - + PST8PDT PST8PDT - + ROC ROC - + ROK ROK - + Singapore Singapore - + Turkey Thổ Nhĩ Kỳ - + UCT UCT - + Universal Quốc tế - + UTC UTC - + W-SU W-SU - + WET WET - + Zulu Zulu - + Mono Mono - + Stereo Stereo - + Surround Surround - + 4GB DRAM (Default) - + 6GB DRAM (Unsafe) - + 8GB DRAM - + 10GB DRAM (Unsafe) - + 12GB DRAM (Unsafe) - + Docked Chế độ cắm TV - + Handheld Cầm tay - - + + Off - + Boost (1700MHz) - + Fast (2000MHz) - + Always ask (Default) - + Only if game specifies not to stop - + Never ask + + + + Medium (256) + + - Medium (256) - - - - - High (512) - + Very Small (16 MB) - + Small (32 MB) - + Normal (128 MB) - + Large (256 MB) - + Very Large (512 MB) - + Very Low (4 MB) - + Low (8 MB) - + Normal (16 MB) - + Medium (32 MB) - + High (64 MB) - + Very Low (32) - + Low (64) - + Normal (128) - + Disabled - + ExtendedDynamicState 1 - + ExtendedDynamicState 2 - + ExtendedDynamicState 3 - + Tree View - + Grid View @@ -5728,7 +5724,7 @@ Kéo điểm để thay đổi vị trí, hoặc nhấp đúp chuột vào ô tr - + Deleting ANY data is IRREVERSABLE! @@ -5739,12 +5735,12 @@ Kéo điểm để thay đổi vị trí, hoặc nhấp đúp chuột vào ô tr - UserNAND + User NAND - SysNAND + System NAND @@ -5791,7 +5787,7 @@ Kéo điểm để thay đổi vị trí, hoặc nhấp đúp chuột vào ô tr - + Calculating... diff --git a/dist/languages/zh_CN.ts b/dist/languages/zh_CN.ts index 44fccf9490..48a06c6e0a 100644 --- a/dist/languages/zh_CN.ts +++ b/dist/languages/zh_CN.ts @@ -801,11 +801,22 @@ This feature is experimental. + Use asynchronous GPU emulation + + + + + Uses an extra CPU thread for rendering. +This option should always remain enabled. + + + + NVDEC emulation: NVDEC 模拟方式： - + Specifies how videos should be decoded. It can either use the CPU or the GPU for decoding, or perform no decoding at all (black screen on videos). In most cases, GPU decoding provides the best performance. @@ -814,12 +825,12 @@ In most cases, GPU decoding provides the best performance. 大多数情况下，使用 GPU 解码将提供最好的性能。 - + ASTC Decoding Method: ASTC 纹理解码方式： - + This option controls how ASTC textures should be decoded. CPU: Use the CPU for decoding. GPU: Use the GPU's compute shaders to decode ASTC textures (recommended). @@ -832,12 +843,12 @@ CPU 异步模拟：使用 CPU 在 ASTC 纹理到达时对其进行解码。 消除 ASTC 解码带来的卡顿，但在解码时可能出现渲染问题。 - + ASTC Recompression Method: ASTC 纹理重压缩方式： - + Most GPUs lack support for ASTC textures and must decompress to anintermediate format: RGBA8. BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, saving VRAM but degrading image quality. @@ -846,44 +857,44 @@ BC1/BC3: 中间格式将被重新压缩为 BC1 或 BC3 格式,从而节省显存 但会降低图像质量。 - + Frame Pacing Mode (Vulkan only) 帧同步模式 (仅限 Vulkan) - + Controls how the emulator manages frame pacing to reduce stuttering and make the frame rate smoother and more consistent. 控制模拟器如何管理帧同步，以减少卡顿，使帧率表现更加平稳顺滑。 - + VRAM Usage Mode: VRAM 使用模式： - + Selects whether the emulator should prefer to conserve memory or make maximum usage of available video memory for performance. Aggressive mode may impact performance of other applications such as recording software. 选择模拟器是应优先节省内存还是最大限度地使用可用视频内存以提高性能。 激进模式可能会影响诸如录屏软件等其他应用程序的性能,。 - + Skip CPU Inner Invalidation 跳过 CPU 内部失效处理 - + Skips certain cache invalidations during memory updates, reducing CPU usage and improving latency. This may cause soft-crashes. 在内存更新期间跳过某些缓存失效,从而降低 CPU 使用率并改善延迟。这可能导致软件崩溃。 - + VSync Mode: 垂直同步模式： - + FIFO (VSync) does not drop frames or exhibit tearing but is limited by the screen refresh rate. FIFO Relaxed allows tearing as it recovers from a slow down. Mailbox can have lower latency than FIFO and does not tear but may drop frames. @@ -894,12 +905,12 @@ Mailbox 的延迟可能比 FIFO 低且不会导致撕裂,但可能会丢帧。 Immediate (不同步) 会呈现全部可用内容,并可能出现撕裂。 - + Sync Memory Operations 同步内存操作 - + Ensures data consistency between compute and memory operations. This option fixes issues in games, but may degrade performance. Unreal Engine 4 games often see the most significant changes thereof. @@ -908,98 +919,98 @@ Unreal Engine 4 games often see the most significant changes thereof. 虚幻 4 引擎的游戏通常会看到最显著的变化。 - + Enable asynchronous presentation (Vulkan only) 启用异步帧提交 (仅限 Vulkan) - + Slightly improves performance by moving presentation to a separate CPU thread. 将帧提交移动到单独的 CPU 线程，略微提高性能。 - + Force maximum clocks (Vulkan only) 强制最大时钟 (仅限 Vulkan) - + Runs work in the background while waiting for graphics commands to keep the GPU from lowering its clock speed. 在后台运行的同时等待图形命令，以防止 GPU 降低时钟速度。 - + Anisotropic Filtering: 各向异性过滤： - + Controls the quality of texture rendering at oblique angles. Safe to set at 16x on most GPUs. 控制在斜角下纹理渲染的质量。 大多数 GPU 上设置为 16 倍是安全的。 - + GPU Mode: GPU 模式： - + Controls the GPU emulation mode. Most games render fine with Fast or Balanced modes, but Accurate is still required for some. Particles tend to only render correctly with Accurate mode. 控制 GPU 模拟的精确度。大部分游戏在性能或平衡模式下可以正常渲染，但部分游戏需要设置为精确。粒子效果通常只有在精确模式下才能正确显示。 - + DMA Accuracy: DMA 精度： - + Controls the DMA precision accuracy. Safe precision fixes issues in some games but may degrade performance. 控制 DMA 精度。安全精度可修复某些游戏中的问题,但可能会降低性能。 - + Enable asynchronous shader compilation 开启异步着色器编译 - + May reduce shader stutter. 可能减少着色器卡顿。 - + Fast GPU Time GPU 超频频率 - + Overclocks the emulated GPU to increase dynamic resolution and render distance. Use 256 for maximal performance and 512 for maximal graphics fidelity. 将模拟的 GPU 超频，以提高动态分辨率和渲染距离。使用 256 可获得最大性能，使用 512 可获得最高的图形保真度。 - + GPU Unswizzle GPU 还原 - + Accelerates BCn 3D texture decoding using GPU compute. Disable if experiencing crashes or graphical glitches. 利用 GPU 计算来加速 BCn 格式 3D 纹理的解码。如果遇到崩溃或画面花屏，请禁用此项。 - + GPU Unswizzle Max Texture Size GPU 还原最大纹理尺寸 - + Sets the maximum size (MiB) for GPU-based texture unswizzling. While the GPU is faster for medium and large textures, the CPU may be more efficient for very small ones. Adjust this to find the balance between GPU acceleration and CPU overhead. @@ -1008,48 +1019,48 @@ Adjust this to find the balance between GPU acceleration and CPU overhead. - + GPU Unswizzle Stream Size GPU 还原流大小 - + Sets the maximum amount of texture data (in MiB) processed per frame. Higher values can reduce stutter during texture loading but may impact frame consistency. 设置每帧处理的纹理数据最大量（单位：MiB）。 较高的数值可以减少纹理加载时的卡顿，但可能会影响帧率的稳定性（即造成帧时间波动）。 - + GPU Unswizzle Chunk Size GPU 还原块大小 - + Determines the number of depth slices processed in a single dispatch. Increasing this can improve throughput on high-end GPUs but may cause TDR or driver timeouts on weaker hardware. 确定在单次调度（Dispatch）中处理的深度切片（Depth Slices）数量。 增加此数值可以提高高端 GPU 的吞吐量（处理效率），但在性能较弱的硬件上可能会引发 TDR（驱动程序重置）或驱动超时。 - + Use Vulkan pipeline cache 启用 Vulkan 管线缓存 - + Enables GPU vendor-specific pipeline cache. This option can improve shader loading time significantly in cases where the Vulkan driver does not store pipeline cache files internally. 启用 GPU 供应商专用的管线缓存。 在 Vulkan 驱动程序内部不存储管线缓存的情况下，此选项可显著提高着色器加载速度。 - + Enable Compute Pipelines (Intel Vulkan Only) 启用计算管线 (仅限 Intel 显卡 Vulkan 模式) - + Required by some games. This setting only exists for Intel proprietary drivers and may crash if enabled. Compute pipelines are always enabled on all other drivers. @@ -1058,183 +1069,183 @@ Compute pipelines are always enabled on all other drivers. 在所有其他驱动程序上始终启用计算管线。 - + Enable Reactive Flushing 启用反应性刷新 - + Uses reactive flushing instead of predictive flushing, allowing more accurate memory syncing. 使用反应性刷新取代预测性刷新，从而更精确地同步内存。 - + Sync to framerate of video playback 播放视频时帧率同步 - + Run the game at normal speed during video playback, even when the framerate is unlocked. 在视频播放期间以正常速度运行游戏，即使帧率未锁定。 - + Barrier feedback loops 屏障反馈环路 - + Improves rendering of transparency effects in specific games. 改进某些游戏中透明效果的渲染。 - + Enable buffer history 启用缓冲区历史 - + Enables access to previous buffer states. This option may improve rendering quality and performance consistency in some games. 允许访问之前的缓冲状态。 这个选项可能会提升某些游戏的渲染质量和性能一致性。 - + Fix bloom effects 修复泛光效果 - + Removes bloom in Burnout. 去除《火爆狂飙》中的泛光特效。 - + Enable Legacy Rescale Pass 启用旧版缩放 - + May fix rescale issues in some games by relying on behavior from the previous implementation. Legacy behavior workaround that fixes line artifacts on AMD and Intel GPUs, and grey texture flicker on Nvidia GPUs in Luigis Mansion 3. 通过依赖之前实现的行为，可能会修复部分游戏的缩放重叠问题。 修复 AMD 和 Intel 显卡上的线条伪影，以及《路易斯洋楼3》中 Nvidia 显卡的灰色纹理闪烁的遗留行为变通方法。 - + Extended Dynamic State 扩展动态状态 - + Controls the number of features that can be used in Extended Dynamic State. Higher states allow for more features and can increase performance, but may cause additional graphical issues. 控制在扩展动态状态中可使用的函数数量。更高的数值允许启用更多功能，并可能提升性能，但同时也可能导致额外的图形问题。 - + Vertex Input Dynamic State 顶点输入动态状态 - + Enables vertex input dynamic state feature for better quality and performance. 开启顶点输入动态状态功能来获得更好的质量和性能。 - + Sample Shading 采样着色 - + Allows the fragment shader to execute per sample in a multi-sampled fragment instead of once per fragment. Improves graphics quality at the cost of performance. Higher values improve quality but degrade performance. 允许片段着色器在多重采样的片段中每个样本执行一次而不是每个片段执行一次。可以提高图形质量，但会降低性能。 更高的值可以提高质量但会降低性能。 - + RNG Seed 随机数生成器种子 - + Controls the seed of the random number generator. Mainly used for speedrunning. 控制随机数生成器的种子。 主要用于竞速游戏。 - + Device Name 设备名称 - + The name of the console. 主机的数量。 - + Custom RTC Date: 自定义系统时间： - + This option allows to change the clock of the console. Can be used to manipulate time in games. 此选项允许更改控制台的时钟。 可用于操纵游戏中的时间。 - + The number of seconds from the current unix time 来自当前 unix 时间的秒数。 - + Language: 语言： - + This option can be overridden when region setting is auto-select 当区域设置为自动选择时可以使用此选项替代。 - + Region: 地区： - + The region of the console. 主机的区域。 - + Time Zone: 时区： - + The time zone of the console. 主机的时区。 - + Sound Output Mode: 声音输出模式： - + Console Mode: 控制台模式： - + Selects if the console is in Docked or Handheld mode. Games will change their resolution, details and supported controllers and depending on this setting. Setting to Handheld can help improve performance for low end systems. @@ -1243,1046 +1254,1031 @@ Setting to Handheld can help improve performance for low end systems. 将设置为掌机模式可以帮助低端系统提高性能。 - - Unit Serial - 单元序列号: - - - - Battery Serial - 电池序列号: - - - - Debug knobs - 调试开关 - - - + Prompt for user profile on boot 启动时提示选择用户账户 - + Useful if multiple people use the same PC. 在多人使用相同的 PC 时有效。 - + Pause when not in focus 在丢失焦点时暂停 - + Pauses emulation when focusing on other windows. 当焦点位于其它窗口时暂停模拟器。 - + Confirm before stopping emulation 停止模拟时需要确认 - + Overrides prompts asking to confirm stopping the emulation. Enabling it bypasses such prompts and directly exits the emulation. 替代提示以确认停止模拟。 启用它将绕过此类提示并直接退出模拟。 - + Hide mouse on inactivity 自动隐藏鼠标光标 - + Hides the mouse after 2.5s of inactivity. 在 2.5 秒无活动后隐藏鼠标。 - + Disable controller applet 禁用控制器小程序 - + Forcibly disables the use of the controller applet in emulated programs. When a program attempts to open the controller applet, it is immediately closed. 强制禁止在模拟程序中使用控制器小程序。 当程序尝试打开控制器小程序时,它会立即被关闭。 - + Check for updates 检查更新 - + Whether or not to check for updates upon startup. 在启动时是否检查更新。 - + Enable Gamemode 启用游戏模式 - + Force X11 as Graphics Backend 强制使用 X11 作为图形后端 - + Custom frontend 自定义前端 - + Real applet 真实的小程序 - + Never 永不 - + On Load 加载时 - + Always 总是 - + CPU CPU - + GPU GPU - + CPU Asynchronous CPU 异步模拟 - + Uncompressed (Best quality) 不压缩 (最高质量) - + BC1 (Low quality) BC1 (低质量) - + BC3 (Medium quality) BC3 (中等质量) - - + + Auto 自动 - + 30 FPS 30 FPS - + 60 FPS 60 FPS - + 90 FPS 90 FPS - + 120 FPS 120 FPS - + Conservative 保守模式 - + Aggressive 激进模式 - + Vulkan Vulkan - + OpenGL GLSL OpenGL GLSL - + OpenGL GLASM (Assembly Shaders, NVIDIA Only) OpenGL GLASM (汇编着色器，仅限 NVIDIA 显卡) - + OpenGL SPIR-V (Experimental, AMD/Mesa Only) OpenGL SPIR-V (实验性，仅限 AMD/Mesa) - + Null 无 - + Fast 高速 - + Balanced 平衡 - - + + Accurate 高精度 - - + + Default 系统默认 - + Unsafe (fast) 不安全（快速） - + Safe (stable) 安全（稳定） - + Unsafe 低精度 - + Paranoid (disables most optimizations) 偏执模式 (禁用绝大多数优化项) - + Debugging 调试 - + Dynarmic 动态编译 - + NCE 本机代码执行 - + Borderless Windowed 无边框窗口 - + Exclusive Fullscreen 独占全屏 - + No Video Output 无视频输出 - + CPU Video Decoding CPU 视频解码 - + GPU Video Decoding (Default) GPU 视频解码 (默认) - + 0.25X (180p/270p) [EXPERIMENTAL] 0.25X (180p/270p) [实验性] - + 0.5X (360p/540p) [EXPERIMENTAL] 0.5X (360p/540p) [实验性] - + 0.75X (540p/810p) [EXPERIMENTAL] 0.75X (540p/810p) [实验性] - + 1X (720p/1080p) 1X (720p/1080p) - + 1.25X (900p/1350p) [EXPERIMENTAL] 1.25X (900p/1350p) [实验性] - + 1.5X (1080p/1620p) [EXPERIMENTAL] 1.5X (1080p/1620p) [实验性] - + 2X (1440p/2160p) 2X (1440p/2160p) - + 3X (2160p/3240p) 3X (2160p/3240p) - + 4X (2880p/4320p) 4X (2880p/4320p) - + 5X (3600p/5400p) 5X (3600p/5400p) - + 6X (4320p/6480p) 6X (4320p/6480p) - + 7X (5040p/7560p) 7X (5040p/7560p) - + 8X (5760p/8640p) 8X (5760p/8640p) - + Nearest Neighbor 近邻取样 - + Bilinear 双线性过滤 - + Bicubic 双三线过滤 - + Gaussian 高斯模糊 - + Lanczos Lanczos - + ScaleForce 强制缩放 - + AMD FidelityFX Super Resolution AMD FidelityFX 超级分辨率 - + Area 区域 - + MMPX MMPX - + Zero-Tangent 零切线 - + B-Spline B-Spline - + Mitchell Mitchell - + Spline-1 Spline-1 - - + + None 无 - + FXAA 快速近似抗锯齿 - + SMAA 子像素形态学抗锯齿 - + Default (16:9) 默认 (16:9) - + Force 4:3 强制 4:3 - + Force 21:9 强制 21:9 - + Force 16:10 强制 16:10 - + Stretch to Window 拉伸窗口 - + Automatic 自动 - + 2x 2x - + 4x 4x - + 8x 8x - + 16x 16x - + 32x 32x - + 64x 64x - + Japanese (日本語) 日语 (日本語) - + American English 美式英语 - + French (français) 法语 (français) - + German (Deutsch) 德语 (Deutsch) - + Italian (italiano) 意大利语 (italiano) - + Spanish (español) 西班牙语 (español) - + Chinese 中文 - + Korean (한국어) 韩语 (한국어) - + Dutch (Nederlands) 荷兰语 (Nederlands) - + Portuguese (português) 葡萄牙语 (português) - + Russian (Русский) 俄语 (Русский) - + Taiwanese 台湾中文 - + British English 英式英语 - + Canadian French 加拿大法语 - + Latin American Spanish 拉美西班牙语 - + Simplified Chinese 简体中文 - + Traditional Chinese (正體中文) 繁体中文 (正體中文) - + Brazilian Portuguese (português do Brasil) 巴西-葡萄牙语 (português do Brasil) - + Polish (polska) 波兰语（波兰语） - + Thai (แบบไทย) 泰语 - - + + Japan 日本 - + USA 美国 - + Europe 欧洲 - + Australia 澳大利亚 - + China 中国 - + Korea 韩国 - + Taiwan 台湾地区 - + Auto (%1) Auto select time zone 自动 (%1) - + Default (%1) Default time zone 默认 (%1) - + CET 欧洲中部时间 - + CST6CDT 古巴标准时间&古巴夏令时 - + Cuba 古巴 - + EET 东欧时间 - + Egypt 埃及 - + Eire 爱尔兰 - + EST 东部标准时间 - + EST5EDT 东部标准时间&东部夏令时 - + GB 英国 - + GB-Eire 英国-爱尔兰时间 - + GMT GMT - + GMT+0 GMT+0 - + GMT-0 GMT-0 - + GMT0 GMT0 - + Greenwich 格林威治 - + Hongkong 香港 - + HST 美国夏威夷时间 - + Iceland 冰岛 - + Iran 伊朗 - + Israel 以色列 - + Jamaica 牙买加 - + Kwajalein 夸贾林环礁 - + Libya 利比亚 - + MET 中欧时间 - + MST 山区标准时间 (北美) - + MST7MDT 山区标准时间&山区夏令时 (北美) - + Navajo 纳瓦霍 - + NZ 新西兰时间 - + NZ-CHAT 新西兰-查塔姆群岛 - + Poland 波兰 - + Portugal 葡萄牙 - + PRC 中国标准时间 - + PST8PDT 太平洋标准时间&太平洋夏令时 - + ROC 台湾时间 - + ROK 韩国时间 - + Singapore 新加坡 - + Turkey 土耳其 - + UCT UCT - + Universal 世界时间 - + UTC 协调世界时 - + W-SU 欧洲-莫斯科时间 - + WET 西欧时间 - + Zulu 祖鲁 - + Mono 单声道 - + Stereo 立体声 - + Surround 环绕声 - + 4GB DRAM (Default) 4GB DRAM (默认) - + 6GB DRAM (Unsafe) 6GB DRAM (不安全) - + 8GB DRAM 8GB DRAM - + 10GB DRAM (Unsafe) 10GB DRAM (不安全) - + 12GB DRAM (Unsafe) 12GB DRAM (不安全) - + Docked 主机模式 - + Handheld 掌机模式 - - + + Off 关闭 - + Boost (1700MHz) 加速 (1700MHz) - + Fast (2000MHz) 快速 (2000MHz) - + Always ask (Default) 总是询问 (默认) - + Only if game specifies not to stop 仅当游戏不希望停止时 - + Never ask 从不询问 - - + + Medium (256) 中（256） - - + + High (512) 高（512） - + Very Small (16 MB) 很小 (16 MB) - + Small (32 MB) 较小 (32 MB) - + Normal (128 MB) 正常 (128 MB) - + Large (256 MB) 较大 (256 MB) - + Very Large (512 MB) 很大 (512 MB) - + Very Low (4 MB) 很低 (4 MB) - + Low (8 MB) 低 (8 MB) - + Normal (16 MB) 正常 (16 MB) - + Medium (32 MB) 中 (32 MB) - + High (64 MB) 高 (64 MB) - + Very Low (32) 很低 (32) - + Low (64) 低 (64) - + Normal (128) 正常 (128) - + Disabled 禁用 - + ExtendedDynamicState 1 扩展动态状态 1 - + ExtendedDynamicState 2 扩展动态状态 2 - + ExtendedDynamicState 3 扩展动态状态 3 - + Tree View 树景视图 - + Grid View 网格视图 @@ -5795,7 +5791,7 @@ Drag points to change position, or double-click table cells to edit values.数据管理器 - + Deleting ANY data is IRREVERSABLE! 删除任何数据都是不可逆的! @@ -5806,13 +5802,13 @@ Drag points to change position, or double-click table cells to edit values. - UserNAND - 用户 NAND + User NAND + - SysNAND - 系统 NAND + System NAND + @@ -5858,7 +5854,7 @@ Drag points to change position, or double-click table cells to edit values.导入此目录的数据。这可能需要一些时间,并且会删除所有现有数据！ - + Calculating... 正在计算... diff --git a/dist/languages/zh_TW.ts b/dist/languages/zh_TW.ts index c56da6e0a2..0f3b2fa04e 100644 --- a/dist/languages/zh_TW.ts +++ b/dist/languages/zh_TW.ts @@ -796,11 +796,22 @@ This feature is experimental. + Use asynchronous GPU emulation + + + + + Uses an extra CPU thread for rendering. +This option should always remain enabled. + + + + NVDEC emulation: NVDEC 模擬： - + Specifies how videos should be decoded. It can either use the CPU or the GPU for decoding, or perform no decoding at all (black screen on videos). In most cases, GPU decoding provides the best performance. @@ -809,12 +820,12 @@ In most cases, GPU decoding provides the best performance. GPU解碼在大多數情況下提供最好的性能 - + ASTC Decoding Method: ASTC解碼方式： - + This option controls how ASTC textures should be decoded. CPU: Use the CPU for decoding. GPU: Use the GPU's compute shaders to decode ASTC textures (recommended). @@ -823,55 +834,55 @@ stuttering but may present artifacts. - + ASTC Recompression Method: ASTC重新壓縮方式： - + Most GPUs lack support for ASTC textures and must decompress to anintermediate format: RGBA8. BC1/BC3: The intermediate format will be recompressed to BC1 or BC3 format, saving VRAM but degrading image quality. - + Frame Pacing Mode (Vulkan only) - + Controls how the emulator manages frame pacing to reduce stuttering and make the frame rate smoother and more consistent. - + VRAM Usage Mode: VRAM 使用模式： - + Selects whether the emulator should prefer to conserve memory or make maximum usage of available video memory for performance. Aggressive mode may impact performance of other applications such as recording software. - + Skip CPU Inner Invalidation 跳過CPU內部失效處理 - + Skips certain cache invalidations during memory updates, reducing CPU usage and improving latency. This may cause soft-crashes. - + VSync Mode: 垂直同步： - + FIFO (VSync) does not drop frames or exhibit tearing but is limited by the screen refresh rate. FIFO Relaxed allows tearing as it recovers from a slow down. Mailbox can have lower latency than FIFO and does not tear but may drop frames. @@ -879,1377 +890,1362 @@ Immediate (no synchronization) presents whatever is available and can exhibit te - + Sync Memory Operations 同步記憶體操作 - + Ensures data consistency between compute and memory operations. This option fixes issues in games, but may degrade performance. Unreal Engine 4 games often see the most significant changes thereof. - + Enable asynchronous presentation (Vulkan only) 啟用非同步顯示（僅限Vulkan） - + Slightly improves performance by moving presentation to a separate CPU thread. 透過將畫面顯示移至獨立的CPU執行緒來略微提升性能。 - + Force maximum clocks (Vulkan only) 強制使用最大時脈（僅限Vulkan） - + Runs work in the background while waiting for graphics commands to keep the GPU from lowering its clock speed. 在等待圖形命令時於背景執行任務以防GPU降低時脈 - + Anisotropic Filtering: 各向異性過濾： - + Controls the quality of texture rendering at oblique angles. Safe to set at 16x on most GPUs. - + GPU Mode: - + Controls the GPU emulation mode. Most games render fine with Fast or Balanced modes, but Accurate is still required for some. Particles tend to only render correctly with Accurate mode. - + DMA Accuracy: - + Controls the DMA precision accuracy. Safe precision fixes issues in some games but may degrade performance. - + Enable asynchronous shader compilation - + May reduce shader stutter. - + Fast GPU Time - + Overclocks the emulated GPU to increase dynamic resolution and render distance. Use 256 for maximal performance and 512 for maximal graphics fidelity. - + GPU Unswizzle - + Accelerates BCn 3D texture decoding using GPU compute. Disable if experiencing crashes or graphical glitches. - + GPU Unswizzle Max Texture Size - + Sets the maximum size (MiB) for GPU-based texture unswizzling. While the GPU is faster for medium and large textures, the CPU may be more efficient for very small ones. Adjust this to find the balance between GPU acceleration and CPU overhead. - + GPU Unswizzle Stream Size - + Sets the maximum amount of texture data (in MiB) processed per frame. Higher values can reduce stutter during texture loading but may impact frame consistency. - + GPU Unswizzle Chunk Size - + Determines the number of depth slices processed in a single dispatch. Increasing this can improve throughput on high-end GPUs but may cause TDR or driver timeouts on weaker hardware. - + Use Vulkan pipeline cache 启用 Vulkan 管线缓存 - + Enables GPU vendor-specific pipeline cache. This option can improve shader loading time significantly in cases where the Vulkan driver does not store pipeline cache files internally. 启用 GPU 供应商专用的管线缓存。 在 Vulkan 驱动程序内部不存储管线缓存的情况下，此选项可显著提高着色器加载速度。 - + Enable Compute Pipelines (Intel Vulkan Only) 启用计算管线 (仅限 Intel 显卡 Vulkan 模式) - + Required by some games. This setting only exists for Intel proprietary drivers and may crash if enabled. Compute pipelines are always enabled on all other drivers. - + Enable Reactive Flushing 启用反应性刷新 - + Uses reactive flushing instead of predictive flushing, allowing more accurate memory syncing. 使用反应性刷新取代预测性刷新，从而更精确地同步内存。 - + Sync to framerate of video playback 播放视频时帧率同步 - + Run the game at normal speed during video playback, even when the framerate is unlocked. 在视频播放期间以正常速度运行游戏，即使帧率未锁定。 - + Barrier feedback loops 屏障反馈循环 - + Improves rendering of transparency effects in specific games. 改进某些游戏中透明效果的渲染。 - + Enable buffer history - + Enables access to previous buffer states. This option may improve rendering quality and performance consistency in some games. - + Fix bloom effects - + Removes bloom in Burnout. - + Enable Legacy Rescale Pass - + May fix rescale issues in some games by relying on behavior from the previous implementation. Legacy behavior workaround that fixes line artifacts on AMD and Intel GPUs, and grey texture flicker on Nvidia GPUs in Luigis Mansion 3. - + Extended Dynamic State - + Controls the number of features that can be used in Extended Dynamic State. Higher states allow for more features and can increase performance, but may cause additional graphical issues. - + Vertex Input Dynamic State - + Enables vertex input dynamic state feature for better quality and performance. - + Sample Shading - + Allows the fragment shader to execute per sample in a multi-sampled fragment instead of once per fragment. Improves graphics quality at the cost of performance. Higher values improve quality but degrade performance. - + RNG Seed 隨機種子 - + Controls the seed of the random number generator. Mainly used for speedrunning. - + Device Name 裝置名稱 - + The name of the console. - + Custom RTC Date: 自定义系统时间： - + This option allows to change the clock of the console. Can be used to manipulate time in games. - + The number of seconds from the current unix time - + Language: 语言： - + This option can be overridden when region setting is auto-select - + Region: 區域： - + The region of the console. - + Time Zone: 時區： - + The time zone of the console. - + Sound Output Mode: 音訊輸出模式： - + Console Mode: 控制台模式： - + Selects if the console is in Docked or Handheld mode. Games will change their resolution, details and supported controllers and depending on this setting. Setting to Handheld can help improve performance for low end systems. - - Unit Serial - - - - - Battery Serial - - - - - Debug knobs - - - - + Prompt for user profile on boot - + Useful if multiple people use the same PC. - + Pause when not in focus - + Pauses emulation when focusing on other windows. - + Confirm before stopping emulation 停止模拟时需要确认 - + Overrides prompts asking to confirm stopping the emulation. Enabling it bypasses such prompts and directly exits the emulation. - + Hide mouse on inactivity 滑鼠閒置時自動隱藏 - + Hides the mouse after 2.5s of inactivity. - + Disable controller applet 禁用控制器程序 - + Forcibly disables the use of the controller applet in emulated programs. When a program attempts to open the controller applet, it is immediately closed. - + Check for updates - + Whether or not to check for updates upon startup. - + Enable Gamemode 启用游戏模式 - + Force X11 as Graphics Backend - + Custom frontend 自定义前端 - + Real applet 真实的小程序 - + Never - + On Load - + Always - + CPU CPU - + GPU GPU - + CPU Asynchronous CPU 异步模拟 - + Uncompressed (Best quality) 不壓縮 (最高品質) - + BC1 (Low quality) BC1 (低品質) - + BC3 (Medium quality) BC3 (中品質) - - + + Auto 自動 - + 30 FPS - + 60 FPS - + 90 FPS - + 120 FPS - + Conservative 保守模式(节省 VRAM) - + Aggressive 激进模式 - + Vulkan Vulkan - + OpenGL GLSL - + OpenGL GLASM (Assembly Shaders, NVIDIA Only) - + OpenGL SPIR-V (Experimental, AMD/Mesa Only) - + Null 無 - + Fast - + Balanced - - + + Accurate 高精度 - - + + Default 預設 - + Unsafe (fast) - + Safe (stable) - + Unsafe 低精度 - + Paranoid (disables most optimizations) 偏执模式 (禁用绝大多数优化项) - + Debugging - + Dynarmic Dynarmic - + NCE NCE - + Borderless Windowed 無邊框視窗 - + Exclusive Fullscreen 全螢幕獨占 - + No Video Output 無視訊輸出 - + CPU Video Decoding CPU 視訊解碼 - + GPU Video Decoding (Default) GPU 視訊解碼（預設） - + 0.25X (180p/270p) [EXPERIMENTAL] - + 0.5X (360p/540p) [EXPERIMENTAL] 0.5X (360p/540p) [实验性] - + 0.75X (540p/810p) [EXPERIMENTAL] 0.75X (540p/810p) [實驗性] - + 1X (720p/1080p) 1X (720p/1080p) - + 1.25X (900p/1350p) [EXPERIMENTAL] - + 1.5X (1080p/1620p) [EXPERIMENTAL] 1.5X (1080p/1620p) [實驗性] - + 2X (1440p/2160p) 2X (1440p/2160p) - + 3X (2160p/3240p) 3X (2160p/3240p) - + 4X (2880p/4320p) 4X (2880p/4320p) - + 5X (3600p/5400p) 5X (3600p/5400p) - + 6X (4320p/6480p) 6X (4320p/6480p) - + 7X (5040p/7560p) 7X (5040p/7560p) - + 8X (5760p/8640p) 8X (5760p/8640p) - + Nearest Neighbor 最近鄰 - + Bilinear 雙線性 - + Bicubic 雙立方 - + Gaussian 高斯 - + Lanczos - + ScaleForce 強制縮放 - + AMD FidelityFX Super Resolution - + Area - + MMPX - + Zero-Tangent - + B-Spline - + Mitchell - + Spline-1 - - + + None 無 - + FXAA FXAA - + SMAA SMAA - + Default (16:9) 預設 (16:9) - + Force 4:3 強制 4:3 - + Force 21:9 強制 21:9 - + Force 16:10 強制 16:10 - + Stretch to Window 延伸視窗 - + Automatic 自動 - + 2x 2x - + 4x 4x - + 8x 8x - + 16x 16x - + 32x - + 64x - + Japanese (日本語) 日文 (日本語) - + American English 美式英语 - + French (français) 法文 (français) - + German (Deutsch) 德文 (Deutsch) - + Italian (italiano) 義大利文 (italiano) - + Spanish (español) 西班牙文 (español) - + Chinese 中文 - + Korean (한국어) 韓文 (한국어) - + Dutch (Nederlands) 荷蘭文 (Nederlands) - + Portuguese (português) 葡萄牙文 (português) - + Russian (Русский) 俄文 (Русский) - + Taiwanese 台灣中文 - + British English 英式英文 - + Canadian French 加拿大法文 - + Latin American Spanish 拉丁美洲西班牙文 - + Simplified Chinese 簡體中文 - + Traditional Chinese (正體中文) 正體中文 (正體中文) - + Brazilian Portuguese (português do Brasil) 巴西-葡萄牙語 (português do Brasil) - + Polish (polska) - + Thai (แบบไทย) - - + + Japan 日本 - + USA 美國 - + Europe 歐洲 - + Australia 澳洲 - + China 中國 - + Korea 南韓 - + Taiwan 台灣 - + Auto (%1) Auto select time zone 自動 (%1) - + Default (%1) Default time zone 預設 (%1) - + CET 中歐 - + CST6CDT CST6CDT - + Cuba 古巴 - + EET EET - + Egypt 埃及 - + Eire 愛爾蘭 - + EST 北美東部 - + EST5EDT EST5EDT - + GB GB - + GB-Eire 英國－愛爾蘭 - + GMT GMT - + GMT+0 GMT+0 - + GMT-0 GMT-0 - + GMT0 GMT0 - + Greenwich 格林威治 - + Hongkong 香港 - + HST 夏威夷 - + Iceland 冰島 - + Iran 伊朗 - + Israel 以色列 - + Jamaica 牙買加 - + Kwajalein 瓜加林環礁 - + Libya 利比亞 - + MET 中歐 - + MST 北美山區 - + MST7MDT MST7MDT - + Navajo 納瓦霍 - + NZ 紐西蘭 - + NZ-CHAT 紐西蘭－查塔姆群島 - + Poland 波蘭 - + Portugal 葡萄牙 - + PRC 中國 - + PST8PDT 太平洋 - + ROC 臺灣 - + ROK 韓國 - + Singapore 新加坡 - + Turkey 土耳其 - + UCT UCT - + Universal 世界 - + UTC UTC - + W-SU 莫斯科 - + WET 西歐 - + Zulu 協調世界時 - + Mono 單聲道 - + Stereo 立體聲 - + Surround 環繞音效 - + 4GB DRAM (Default) 4GB DRAM (默认) - + 6GB DRAM (Unsafe) 6GB DRAM (不安全) - + 8GB DRAM - + 10GB DRAM (Unsafe) - + 12GB DRAM (Unsafe) - + Docked TV - + Handheld 掌機模式 - - + + Off - + Boost (1700MHz) - + Fast (2000MHz) - + Always ask (Default) 总是询问 (默认) - + Only if game specifies not to stop 仅当游戏不希望停止时 - + Never ask 从不询问 - - + + Medium (256) - - + + High (512) - + Very Small (16 MB) - + Small (32 MB) - + Normal (128 MB) - + Large (256 MB) - + Very Large (512 MB) - + Very Low (4 MB) - + Low (8 MB) - + Normal (16 MB) - + Medium (32 MB) - + High (64 MB) - + Very Low (32) - + Low (64) - + Normal (128) - + Disabled - + ExtendedDynamicState 1 - + ExtendedDynamicState 2 - + ExtendedDynamicState 3 - + Tree View - + Grid View @@ -5757,7 +5753,7 @@ Drag points to change position, or double-click table cells to edit values. - + Deleting ANY data is IRREVERSABLE! @@ -5768,12 +5764,12 @@ Drag points to change position, or double-click table cells to edit values. - UserNAND + User NAND - SysNAND + System NAND @@ -5820,7 +5816,7 @@ Drag points to change position, or double-click table cells to edit values. - + Calculating... diff --git a/docs/Deps.md b/docs/Deps.md index 80caf1685f..d706c1e4ba 100644 --- a/docs/Deps.md +++ b/docs/Deps.md @@ -79,7 +79,7 @@ Certain other dependencies will be fetched by CPM regardless. System packages *c On amd64: -* [xbyak](https://github.com/herumi/xbyak) - 7.22 or earlier is recommended +* [xbyak](https://github.com/herumi/xbyak) - 7.35.2+ On aarch64 OR if `DYNARMIC_TESTS` is on: @@ -161,11 +161,12 @@ sudo pacman -Syu --needed base-devel boost catch2 cmake enet ffmpeg fmt git glsl Ubuntu, Debian, Mint Linux ```sh -sudo apt-get install autoconf cmake g++ gcc git glslang-tools libglu1-mesa-dev libhidapi-dev libpulse-dev libtool libudev-dev libxcb-icccm4 libxcb-image0 libxcb-keysyms1 libxcb-render-util0 libxcb-xinerama0 libxcb-xkb1 libxext-dev libxkbcommon-x11-0 mesa-common-dev nasm ninja-build qt6-base-private-dev catch2 libfmt-dev liblz4-dev nlohmann-json3-dev libzstd-dev libssl-dev libavfilter-dev libavcodec-dev libswscale-dev pkg-config zlib1g-dev libva-dev libvdpau-dev qt6-tools-dev qt6-charts-dev libvulkan-dev spirv-tools spirv-headers libusb-1.0-0-dev libxbyak-dev libboost-dev libboost-fiber-dev libboost-context-dev libsdl2-dev libopus-dev libasound2t64 vulkan-utility-libraries-dev +sudo apt-get install autoconf cmake g++ gcc git glslang-tools libglu1-mesa-dev libhidapi-dev libpulse-dev libtool libudev-dev libxcb-icccm4 libxcb-image0 libxcb-keysyms1 libxcb-render-util0 libxcb-xinerama0 libxcb-xkb1 libxext-dev libxkbcommon-x11-0 mesa-common-dev nasm ninja-build qt6-base-private-dev catch2 libfmt-dev liblz4-dev nlohmann-json3-dev libzstd-dev libssl-dev libavfilter-dev libavcodec-dev libswscale-dev pkg-config zlib1g-dev libva-dev libvdpau-dev qt6-tools-dev qt6-charts-dev libvulkan-dev spirv-tools spirv-headers libusb-1.0-0-dev libboost-dev libboost-fiber-dev libboost-context-dev libsdl2-dev libopus-dev libasound2t64 vulkan-utility-libraries-dev ``` * Ubuntu 22.04, Linux Mint 20, or Debian 12 or later is required. * To enable QT Web Engine, add `-DYUZU_USE_QT_WEB_ENGINE=ON` when running CMake. +* `libxbyak-dev` is optional for x86_64 targets diff --git a/externals/cpmfile.json b/externals/cpmfile.json index b8472774ae..9d292daff0 100644 --- a/externals/cpmfile.json +++ b/externals/cpmfile.json @@ -58,8 +58,13 @@ "package": "xbyak", "repo": "herumi/xbyak", "tag": "v%VERSION%", - "hash": "b6475276b2faaeb315734ea8f4f8bd87ededcee768961b39679bee547e7f3e98884d8b7851e176d861dab30a80a76e6ea302f8c111483607dde969b4797ea95a", - "git_version": "7.35.2" + "hash": "d93971cc8f17f20818e36099aa862d15d30b60f17c7dff0cc8b7ac89ad6dc6453256dd47a454904666a85cea6ca27f9867f782c7b2c6d0c16039af8e3e28e6cc", + "git_version": "7.35.4", + "bundled": true, + "skip_updates": true, + "patches": [ + "0001-rvalue-optimize.patch" + ] }, "oaknut": { "repo": "eden-emulator/oaknut", diff --git a/src/android/app/src/main/java/org/yuzu/yuzu_emu/activities/EmulationActivity.kt b/src/android/app/src/main/java/org/yuzu/yuzu_emu/activities/EmulationActivity.kt index 949edc1ee3..eab0fac705 100644 --- a/src/android/app/src/main/java/org/yuzu/yuzu_emu/activities/EmulationActivity.kt +++ b/src/android/app/src/main/java/org/yuzu/yuzu_emu/activities/EmulationActivity.kt @@ -15,6 +15,7 @@ import android.content.BroadcastReceiver import android.content.Context import android.content.Intent import android.content.IntentFilter +import android.content.pm.PackageManager import android.content.res.Configuration import android.graphics.Rect import android.graphics.drawable.Icon @@ -100,6 +101,7 @@ class EmulationActivity : AppCompatActivity(), SensorEventListener, InputManager private var romSwapGeneration = 0 private var hasEmulationSession = processHasEmulationSession private val romSwapStopTimeoutRunnable = Runnable { onRomSwapStopTimeout() } + private val pictureInPictureFailureActions: MutableSet = mutableSetOf() private fun onRomSwapStopTimeout() { if (!isWaitingForRomSwapStop) { @@ -266,12 +268,18 @@ class EmulationActivity : AppCompatActivity(), SensorEventListener, InputManager } override fun onUserLeaveHint() { - if (Build.VERSION.SDK_INT < Build.VERSION_CODES.S) { - if (BooleanSetting.PICTURE_IN_PICTURE.getBoolean() && !isInPictureInPictureMode) { - val pictureInPictureParamsBuilder = PictureInPictureParams.Builder() - .getPictureInPictureActionsBuilder().getPictureInPictureAspectBuilder() - enterPictureInPictureMode(pictureInPictureParamsBuilder.build()) - } + if (Build.VERSION.SDK_INT >= Build.VERSION_CODES.S || + !isPictureInPictureSupported() || + !BooleanSetting.PICTURE_IN_PICTURE.getBoolean() || + isInPictureInPictureMode + ) { + return + } + + val pictureInPictureParamsBuilder = PictureInPictureParams.Builder() + .getPictureInPictureActionsBuilder().getPictureInPictureAspectBuilder() + runPictureInPictureAction("enter picture-in-picture mode") { + enterPictureInPictureMode(pictureInPictureParamsBuilder.build()) } } @@ -651,7 +659,29 @@ class EmulationActivity : AppCompatActivity(), SensorEventListener, InputManager return this.apply { setActions(pictureInPictureActions) } } + private fun isPictureInPictureSupported() = + Build.VERSION.SDK_INT >= Build.VERSION_CODES.O && + packageManager.hasSystemFeature(PackageManager.FEATURE_PICTURE_IN_PICTURE) + + private fun runPictureInPictureAction(actionName: String, action: () -> Unit) { + try { + action() + } catch (e: IllegalStateException) { + if (pictureInPictureFailureActions.add(actionName)) { + Log.warning("[PiP] Failed to $actionName: ${e.message}") + } + } catch (e: UnsupportedOperationException) { + if (pictureInPictureFailureActions.add(actionName)) { + Log.warning("[PiP] Failed to $actionName: ${e.message}") + } + } + } + fun buildPictureInPictureParams() { + if (!isPictureInPictureSupported()) { + return + } + val pictureInPictureParamsBuilder = PictureInPictureParams.Builder() .getPictureInPictureActionsBuilder().getPictureInPictureAspectBuilder() if (Build.VERSION.SDK_INT >= Build.VERSION_CODES.S) { @@ -661,7 +691,9 @@ class EmulationActivity : AppCompatActivity(), SensorEventListener, InputManager BooleanSetting.PICTURE_IN_PICTURE.getBoolean() && isEmulationActive ) } - setPictureInPictureParams(pictureInPictureParamsBuilder.build()) + runPictureInPictureAction("set picture-in-picture params") { + setPictureInPictureParams(pictureInPictureParamsBuilder.build()) + } } fun displayMultiplayerDialog() { diff --git a/src/android/app/src/main/java/org/yuzu/yuzu_emu/applets/keyboard/SoftwareKeyboard.kt b/src/android/app/src/main/java/org/yuzu/yuzu_emu/applets/keyboard/SoftwareKeyboard.kt index e058067c97..26e787f377 100644 --- a/src/android/app/src/main/java/org/yuzu/yuzu_emu/applets/keyboard/SoftwareKeyboard.kt +++ b/src/android/app/src/main/java/org/yuzu/yuzu_emu/applets/keyboard/SoftwareKeyboard.kt @@ -1,3 +1,7 @@ + +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project +// SPDX-License-Identifier: GPL-3.0-or-later + // SPDX-FileCopyrightText: Copyright 2023 yuzu Emulator Project // SPDX-License-Identifier: GPL-2.0-or-later @@ -33,8 +37,10 @@ object SoftwareKeyboard { val emulationActivity = NativeLibrary.sEmulationActivity.get() val overlayView = emulationActivity!!.findViewById(R.id.surface_input_overlay) + overlayView.requestFocus() val im = overlayView.context.getSystemService(Context.INPUT_METHOD_SERVICE) as InputMethodManager + im.restartInput(overlayView) im.showSoftInput(overlayView, InputMethodManager.SHOW_FORCED) // There isn't a good way to know that the IMM is dismissed, so poll every 500ms to submit inline keyboard result. diff --git a/src/android/app/src/main/java/org/yuzu/yuzu_emu/features/settings/model/BooleanSetting.kt b/src/android/app/src/main/java/org/yuzu/yuzu_emu/features/settings/model/BooleanSetting.kt index e47263bfb2..e482725196 100644 --- a/src/android/app/src/main/java/org/yuzu/yuzu_emu/features/settings/model/BooleanSetting.kt +++ b/src/android/app/src/main/java/org/yuzu/yuzu_emu/features/settings/model/BooleanSetting.kt @@ -17,6 +17,7 @@ enum class BooleanSetting(override val key: String) : AbstractBooleanSetting { USE_CUSTOM_CPU_TICKS("use_custom_cpu_ticks"), SKIP_CPU_INNER_INVALIDATION("skip_cpu_inner_invalidation"), FIX_BLOOM_EFFECTS("fix_bloom_effects"), + EMULATE_BGR565("emulate_bgr565"), CPUOPT_UNSAFE_HOST_MMU("cpuopt_unsafe_host_mmu"), USE_DOCKED_MODE("use_docked_mode"), USE_AUTO_STUB("use_auto_stub"), diff --git a/src/android/app/src/main/java/org/yuzu/yuzu_emu/features/settings/model/view/SettingsItem.kt b/src/android/app/src/main/java/org/yuzu/yuzu_emu/features/settings/model/view/SettingsItem.kt index 8ca9533f83..daeee398d4 100644 --- a/src/android/app/src/main/java/org/yuzu/yuzu_emu/features/settings/model/view/SettingsItem.kt +++ b/src/android/app/src/main/java/org/yuzu/yuzu_emu/features/settings/model/view/SettingsItem.kt @@ -756,6 +756,13 @@ abstract class SettingsItem( descriptionId = R.string.fix_bloom_effects_description ) ) + put( + SwitchSetting( + BooleanSetting.EMULATE_BGR565, + titleId = R.string.emulate_bgr565, + descriptionId = R.string.emulate_bgr565_description + ) + ) put( SwitchSetting( BooleanSetting.CPUOPT_UNSAFE_HOST_MMU, diff --git a/src/android/app/src/main/java/org/yuzu/yuzu_emu/features/settings/ui/SettingsFragmentPresenter.kt b/src/android/app/src/main/java/org/yuzu/yuzu_emu/features/settings/ui/SettingsFragmentPresenter.kt index 9a218dc2a2..0487339f68 100644 --- a/src/android/app/src/main/java/org/yuzu/yuzu_emu/features/settings/ui/SettingsFragmentPresenter.kt +++ b/src/android/app/src/main/java/org/yuzu/yuzu_emu/features/settings/ui/SettingsFragmentPresenter.kt @@ -284,8 +284,6 @@ class SettingsFragmentPresenter( add(BooleanSetting.SYNC_MEMORY_OPERATIONS.key) add(BooleanSetting.RENDERER_USE_DISK_SHADER_CACHE.key) add(BooleanSetting.RENDERER_FORCE_MAX_CLOCK.key) - add(BooleanSetting.RENDERER_ASYNCHRONOUS_GPU_EMULATION.key) - add(BooleanSetting.RENDERER_ASYNC_PRESENTATION.key) add(BooleanSetting.RENDERER_REACTIVE_FLUSHING.key) add(BooleanSetting.ENABLE_BUFFER_HISTORY.key) add(BooleanSetting.USE_OPTIMIZED_VERTEX_BUFFERS.key) @@ -295,7 +293,10 @@ class SettingsFragmentPresenter( add(IntSetting.FAST_GPU_TIME.key) add(BooleanSetting.SKIP_CPU_INNER_INVALIDATION.key) add(BooleanSetting.FIX_BLOOM_EFFECTS.key) + add(BooleanSetting.EMULATE_BGR565.key) add(BooleanSetting.RENDERER_ASYNCHRONOUS_SHADERS.key) + add(BooleanSetting.RENDERER_ASYNCHRONOUS_GPU_EMULATION.key) + add(BooleanSetting.RENDERER_ASYNC_PRESENTATION.key) add(SettingsItem.GPU_UNSWIZZLE_COMBINED) add(HeaderSetting(R.string.extensions)) diff --git a/src/android/app/src/main/java/org/yuzu/yuzu_emu/fragments/EmulationFragment.kt b/src/android/app/src/main/java/org/yuzu/yuzu_emu/fragments/EmulationFragment.kt index a4c9eb9039..120bafdd14 100644 --- a/src/android/app/src/main/java/org/yuzu/yuzu_emu/fragments/EmulationFragment.kt +++ b/src/android/app/src/main/java/org/yuzu/yuzu_emu/fragments/EmulationFragment.kt @@ -291,13 +291,23 @@ class EmulationFragment : Fragment(), SurfaceHolder.Callback { // Game launched via intent (check for existing custom config) intentGame != null -> { game?.let { gameInstance -> + runCatching { GameHelper.restoreContentForGame(gameInstance) } + .onFailure { + Log.warning( + "[EmulationFragment] Failed to restore content for intent launch: ${it.message}" + ) + } + val customConfigFile = SettingsFile.getCustomSettingsFile(gameInstance) if (customConfigFile.exists()) { + shouldUseCustom = true Log.info( "[EmulationFragment] Found existing custom settings for ${gameInstance.title}, loading them" ) SettingsFile.loadCustomConfig(gameInstance) + NativeConfig.unloadPerGameConfig() } else { + shouldUseCustom = false Log.info( "[EmulationFragment] No custom settings found for ${gameInstance.title}, using global settings" ) @@ -871,7 +881,7 @@ class EmulationFragment : Fragment(), SurfaceHolder.Callback { if (drawerView == binding.quickSettingsSheet) { isQuickSettingsMenuOpen = true if (shouldUseCustom) { - SettingsFile.loadCustomConfig(args.game!!) + SettingsFile.loadCustomConfig(game!!) } } } @@ -2499,7 +2509,6 @@ class EmulationFragment : Fragment(), SurfaceHolder.Callback { fun toggleOverlay(enable: Boolean) { if (!isAdded || _binding == null) return - if (enable && hasPhysicalControllerConnected && !args.overlayGamelessEditMode) return if (enable == !BooleanSetting.SHOW_INPUT_OVERLAY.getBoolean()) { // Reset controller input flag so controller can hide overlay again if (!enable) { @@ -2537,7 +2546,8 @@ class EmulationFragment : Fragment(), SurfaceHolder.Callback { if (binding.surfaceInputOverlay.isGamelessMode()) return if (hasConnectedControllers) { - if (BooleanSetting.SHOW_INPUT_OVERLAY.getBoolean()) { + if (BooleanSetting.SHOW_INPUT_OVERLAY.getBoolean() && + BooleanSetting.HIDE_OVERLAY_ON_CONTROLLER_INPUT.getBoolean()) { overlayHiddenByPhysicalController = true toggleOverlay(false) } diff --git a/src/android/app/src/main/java/org/yuzu/yuzu_emu/overlay/InputOverlay.kt b/src/android/app/src/main/java/org/yuzu/yuzu_emu/overlay/InputOverlay.kt index d3b5d86174..7ff9c78923 100644 --- a/src/android/app/src/main/java/org/yuzu/yuzu_emu/overlay/InputOverlay.kt +++ b/src/android/app/src/main/java/org/yuzu/yuzu_emu/overlay/InputOverlay.kt @@ -17,16 +17,23 @@ import android.graphics.drawable.VectorDrawable import android.os.Build import android.os.Handler import android.os.Looper +import android.text.Editable +import android.text.InputType import android.util.AttributeSet import android.view.HapticFeedbackConstants +import android.view.KeyEvent import android.view.MotionEvent import android.view.View import android.view.View.OnTouchListener import android.view.WindowInsets +import android.view.inputmethod.BaseInputConnection +import android.view.inputmethod.EditorInfo +import android.view.inputmethod.InputConnection import androidx.core.content.ContextCompat import androidx.window.layout.WindowMetricsCalculator import kotlin.math.max import kotlin.math.min +import org.yuzu.yuzu_emu.NativeLibrary import org.yuzu.yuzu_emu.features.input.NativeInput import org.yuzu.yuzu_emu.R import org.yuzu.yuzu_emu.features.input.model.NativeAnalog @@ -49,6 +56,7 @@ class InputOverlay(context: Context, attrs: AttributeSet?) : private val overlayButtons: MutableSet = HashSet() private val overlayDpads: MutableSet = HashSet() private val overlayJoysticks: MutableSet = HashSet() + private val imeEditable = Editable.Factory.getInstance().newEditable("") private var inEditMode = false private var gamelessMode = false @@ -75,6 +83,63 @@ class InputOverlay(context: Context, attrs: AttributeSet?) : // External listener for EmulationFragment joypad overlay auto-hide var touchEventListener: ((MotionEvent) -> Unit)? = null + override fun onCheckIsTextEditor(): Boolean = true + + override fun onCreateInputConnection(outAttrs: EditorInfo): InputConnection { + imeEditable.clear() + outAttrs.inputType = + InputType.TYPE_CLASS_TEXT or + InputType.TYPE_TEXT_FLAG_NO_SUGGESTIONS or + InputType.TYPE_TEXT_VARIATION_VISIBLE_PASSWORD + outAttrs.imeOptions = EditorInfo.IME_FLAG_NO_EXTRACT_UI or EditorInfo.IME_ACTION_DONE + outAttrs.initialSelStart = 0 + outAttrs.initialSelEnd = 0 + + return object : BaseInputConnection(this, true) { + override fun getEditable(): Editable = imeEditable + + override fun commitText(text: CharSequence?, newCursorPosition: Int): Boolean { + if (!text.isNullOrEmpty()) { + forwardCommittedText(text) + } + return super.commitText(text, newCursorPosition) + } + + override fun deleteSurroundingText(beforeLength: Int, afterLength: Int): Boolean { + repeat(beforeLength.coerceAtLeast(0)) { + NativeLibrary.submitInlineKeyboardInput(KeyEvent.KEYCODE_DEL) + } + return super.deleteSurroundingText(beforeLength, afterLength) + } + + override fun sendKeyEvent(event: KeyEvent): Boolean { + if (event.action != KeyEvent.ACTION_DOWN) { + return true + } + + when (event.keyCode) { + KeyEvent.KEYCODE_BACK, + KeyEvent.KEYCODE_DEL, + KeyEvent.KEYCODE_ENTER -> { + NativeLibrary.submitInlineKeyboardInput(event.keyCode) + } + else -> { + val textChar = event.unicodeChar + if (textChar != 0) { + NativeLibrary.submitInlineKeyboardText(textChar.toChar().toString()) + } + } + } + return true + } + + override fun performEditorAction(actionCode: Int): Boolean { + NativeLibrary.submitInlineKeyboardInput(KeyEvent.KEYCODE_ENTER) + return true + } + } + } + override fun onLayout(changed: Boolean, left: Int, top: Int, right: Int, bottom: Int) { super.onLayout(changed, left, top, right, bottom) @@ -119,6 +184,25 @@ class InputOverlay(context: Context, attrs: AttributeSet?) : } } + private fun forwardCommittedText(text: CharSequence) { + val builder = StringBuilder() + text.forEach { character -> + when (character) { + '\n' -> { + if (builder.isNotEmpty()) { + NativeLibrary.submitInlineKeyboardText(builder.toString()) + builder.clear() + } + NativeLibrary.submitInlineKeyboardInput(KeyEvent.KEYCODE_ENTER) + } + else -> builder.append(character) + } + } + if (builder.isNotEmpty()) { + NativeLibrary.submitInlineKeyboardText(builder.toString()) + } + } + private fun drawGrid(canvas: Canvas) { val gridSize = IntSetting.OVERLAY_GRID_SIZE.getInt() val width = canvas.width diff --git a/src/android/app/src/main/jni/android_settings.h b/src/android/app/src/main/jni/android_settings.h index 8628021f75..37da651519 100644 --- a/src/android/app/src/main/jni/android_settings.h +++ b/src/android/app/src/main/jni/android_settings.h @@ -95,7 +95,7 @@ namespace AndroidSettings { Settings::Setting input_overlay_auto_hide{linkage, 5, "input_overlay_auto_hide", Settings::Category::Overlay, Settings::Specialization::Default, true, true, &enable_input_overlay_auto_hide}; - Settings::Setting hide_overlay_on_controller_input{linkage, false, + Settings::Setting hide_overlay_on_controller_input{linkage, true, "hide_overlay_on_controller_input", Settings::Category::Overlay, Settings::Specialization::Default, true, diff --git a/src/android/app/src/main/jni/native.cpp b/src/android/app/src/main/jni/native.cpp index 210689ce55..93a1337d80 100644 --- a/src/android/app/src/main/jni/native.cpp +++ b/src/android/app/src/main/jni/native.cpp @@ -1726,9 +1726,8 @@ JNIEXPORT jstring JNICALL Java_org_yuzu_yuzu_1emu_NativeLibrary_getUpdateUrl( jobject obj, jstring version) { const char* version_str = env->GetStringUTFChars(version, nullptr); - const std::string url = fmt::format("{}/{}/releases/tag/{}", - std::string{Common::g_build_auto_update_website}, - std::string{Common::g_build_auto_update_repo}, + const std::string url = fmt::format("{}/{}", + std::string{Common::g_build_auto_update_api}, version_str); env->ReleaseStringUTFChars(version, version_str); return env->NewStringUTF(url.c_str()); @@ -1760,11 +1759,10 @@ JNIEXPORT jstring JNICALL Java_org_yuzu_yuzu_1emu_NativeLibrary_getUpdateApkUrl( } const std::string apk_filename = fmt::format("Eden-Android-{}-{}.apk", artifact_str, variant); - const std::string url = fmt::format("{}/{}/releases/download/{}/{}", - std::string{Common::g_build_auto_update_website}, - std::string{Common::g_build_auto_update_repo}, - version_str, - apk_filename); + + const std::string url = fmt::format("{}/{}/{}", + std::string{Common::g_build_auto_update_api}, + version_str, apk_filename); env->ReleaseStringUTFChars(tag, version_str); env->ReleaseStringUTFChars(artifact, artifact_str); diff --git a/src/android/app/src/main/res/values-ar/strings.xml b/src/android/app/src/main/res/values-ar/strings.xml index 31f7289992..2db3837eaf 100644 --- a/src/android/app/src/main/res/values-ar/strings.xml +++ b/src/android/app/src/main/res/values-ar/strings.xml @@ -32,7 +32,7 @@ إخفاء الطبقة عند إدخال ذراع التحكم إخفاء تلقائي لطبقة عناصر التحكم باللمس عند استخدام ذراع تحكم فعلية. تظهر الطبقة مرة أخرى عند فصل ذراع التحكم. عكس أزرار التأكيد/الرجوع في وحدة التحكم - قم بتبديل طريقة عمل زري التأكيد والرجوع في نظام Android لتتوافق مع أنماط Switch و Xbox أثناء استخدام واجهة المستخدم الخاصة بالتطبيق. + تبديل طريقة التعامل مع زري «تأكيد» و«رجوع» في نظام Android لتتوافق مع أنماط أجهزة Switch وXbox أثناء استخدام واجهة المستخدم الخاصة بالتطبيق. طبقة الإدخال ضبط ذراع التحكم على الشاشة @@ -268,7 +268,7 @@ المنتج إصدار Android تصحيح الأمان - معرف البناء + معرف الإصدار معلومات عامة الأجهزة واجهات برمجة التطبيقات المدعومة @@ -403,7 +403,7 @@ المساهمين الأشخاص الذين جعلوا تطبيق Eden لنظام Android ممكنًا المشاريع التي تجعل Eden لأجهزة Android ممكنة - البناء + الإصدار بيانات المستخدم استيراد/تصدير جميع بيانات التطبيق.\nعند استيراد بيانات المستخدم، سيتم حذف جميع بيانات المستخدم الموجودة!\nقد يُسبب استيراد البيانات من Citron بعض المشاكل. يُنصح باستيراد جميع البيانات المطلوبة يدويًا. جارٍ تصدير بيانات المستخدم... @@ -631,10 +631,10 @@ ذراع تحكم GameCube عكس المحور عكس الزر - زر التبديل + زر تشغيل/إيقاف زر التوربو تعيين الحد الفاصل - تبديل المحور + تشغيل/إيقاف المحور متصل استخدم هزاز النظام طبقة الإدخال @@ -660,7 +660,7 @@ افتراضي - الافتراضي + افتراضي جارٍ التحميل… جارٍ إيقاف التشغيل... هل تريد إعادة تعيين هذا الإعداد إلى قيمته الافتراضية؟ @@ -878,13 +878,13 @@ خروج من المحاكاة إنهاء - تبديل أزرار التحكم + تشغيل/إيقاف أزرار التحكم مركز العصا النسبي انزلاق الأسهم الاهتزازات الديناميكية عرض ذراع التحكم إخفاء ذراع التحكم - تبديل الكل + تشغيل/إيقاف الكل ضبط الطبقة الحجم الشفافية diff --git a/src/android/app/src/main/res/values-es/strings.xml b/src/android/app/src/main/res/values-es/strings.xml index 9e3ce0d4e8..b039b398c6 100644 --- a/src/android/app/src/main/res/values-es/strings.xml +++ b/src/android/app/src/main/res/values-es/strings.xml @@ -272,7 +272,7 @@ Información general Hardware ABIs soportadas - Información de la CPU + Información del procesador Información de la GPU Versión del controlador de Vulkan Error al obtener la información del emulador @@ -416,8 +416,8 @@ Cuando el modo turbo esté activado, la emulación se ejecutará a esta velocidad. Velocidad lenta Cuando el modo lento esté activado, la emulación se ejecutará a esta velocidad. - Motor de la CPU - Precisión de la CPU + Motor del procesador + Precisión del procesador %1$s%2$s @@ -433,7 +433,7 @@ Configurar RTC personalizado - Overclock de la CPU + Overclock del procesador Fuerza a la CPU emulada a ejecutarser a una velocidad de reloj más alta, lo cual reduce ciertos limitadores de fotogramas por segundo. Usa Boost (1700 MHz) para ejecutar a la velocidad de reloj nativa más alta de la Switch, o Fast (2000 MHz) para ejecutar a una velocidad doble de reloj. Ticks de CPU personalizados Establezca un valor personalizado de los ciclos de la CPU. Los valores más altos pueden aumentar el rendimiento, pero también pueden hacer que el juego se congele. Se recomienda un rango de 77–21000. @@ -536,7 +536,7 @@ Escalar la resolución a 2x o más puede causar problemas y ralentizar significativamente su dispositivo. - CPU + Procesador Usar Auto Stub Rellena automáticamente servicios y funciones ausentes. Puede mejorar la compatibilidad pero puede causar cierres inesperados. diff --git a/src/android/app/src/main/res/values-ru/strings.xml b/src/android/app/src/main/res/values-ru/strings.xml index ec7105e25f..a0f7dabfcd 100644 --- a/src/android/app/src/main/res/values-ru/strings.xml +++ b/src/android/app/src/main/res/values-ru/strings.xml @@ -482,6 +482,10 @@ Уменьшение зависаний за счет хранения и загрузки сгенерированных шейдеров. Принудительная максимальная тактовая частота (только для Adreno) Заставляет ГПУ работать на максимально возможных тактовых частотах (тепловые ограничения все равно будут применяться). + Асинхронная эмуляция ГПУ + Выполняет эмуляцию ГПУ асинхронно для снижения задержек ЦП и увеличения производительности. Отключайте только при возникновении проблем с таймингами. + Асинхронная презентация + Немного улучшает производительность, перемещая презентацию в отдельный поток ЦП. Реактивная очистка Повышение точности рендеринга в некоторых играх за счет снижения производительности. Включить историю буфера @@ -1080,6 +1084,7 @@ Следовать системе Цвет темы + Eden Фиолетовый Синий Циановый diff --git a/src/android/app/src/main/res/values-uk/strings.xml b/src/android/app/src/main/res/values-uk/strings.xml index 434d3fbb3d..cba50d9822 100644 --- a/src/android/app/src/main/res/values-uk/strings.xml +++ b/src/android/app/src/main/res/values-uk/strings.xml @@ -482,6 +482,10 @@ Зменшує затримки шляхом збереження шейдерів. Максимальна тактова частота (тільки Adreno) Змушує GPU працювати на максимальній тактовій частоті. + Асинхронна емуляція ГП + Емуляція ГП виконується асинхронно для зменшення затримок ЦП й покращення пропускної здатності. Вимкніть лише у випадку виникнення проблем із таймінгами. + Асинхронне подання + Трохи покращує продуктивність завдяки переміщенню подання на окремий потік ЦП. Реактивне очищення Покращує точність рендерингу в деяких іграх. Увімкнути історію буфера diff --git a/src/android/app/src/main/res/values-zh-rCN/strings.xml b/src/android/app/src/main/res/values-zh-rCN/strings.xml index 8fc37937bf..8b26754e2c 100644 --- a/src/android/app/src/main/res/values-zh-rCN/strings.xml +++ b/src/android/app/src/main/res/values-zh-rCN/strings.xml @@ -476,21 +476,25 @@ 将生成的着色器缓存于磁盘中并进行读取，以减少卡顿。 强制最大时钟 (仅限 Adreno) 强制 GPU 以最大时钟运行 (仍被温控限制)。 + GPU 异步模拟 + 异步运行 GPU 模拟，以减少 CPU 停顿并提高吞吐量。仅当遇到与时序相关的问题时才应禁用此功能。 + 异步呈现 + 通过将呈现操作移至单独的 CPU 线程来略微提升性能。 启用反应性刷新 - 牺牲性能，提高某些游戏的渲染精度。 + 通过牺牲性能来提高某些游戏的渲染精度。 启用缓冲区历史 - 允许访问之前的缓冲状态。\n这个选项可能会提升某些游戏的渲染质量和性能一致性。 + 启用对先前缓冲区状态的访问。此选项可在某些游戏中提升渲染质量并保持性能的一致性。 优化顶点缓冲区 - 实现优化顶点缓冲区绑定以提升性能。需要 Mesa 26.0+ Turnip 驱动。老驱动会崩溃。 + 启用经过优化的顶点缓冲区绑定以提升性能。需要 Mesa 26.0 及以上版本的 Turnip 驱动程序。在旧版驱动程序上会导致程序崩溃。 Hacks GPU 超频频率 - 强制大多数游戏以其最高原生分辨率运行。使用 256 以获得最大性能，使用 512 以获得最大图形保真度。 + 强制大多数游戏以其最高原生分辨率运行。设置为 256 可获得最佳性能，设置为 512 可获得最佳画面保真度。 跳过CPU内部无效化 在内存更新期间跳过某些CPU端缓存无效化，减少CPU使用率并提高其性能。可能会导致某些游戏出现故障或崩溃。 - 修复泛光效果 - 减少《塞尔达传说：智慧的再现》(LA/EOW) 在 Adreno 700 系列 GPU 上的模糊感，并移除《横冲直撞》(Burnout) 中的模糊特效。警告：可能会导致其他游戏出现画面花屏或异常。 + 修复 Bloom 效果 + 减少《塞尔达传说：智慧的再现》（Adreno 700）中的 bloom 模糊，并移除《Burnout》中的 bloom 效果。警告：可能会导致在其他游戏中出现画面显示问题。 使用异步着色器 异步编译着色器。这可能会减少卡顿，但也可能会导致图形错误。 GPU 还原设置 diff --git a/src/android/app/src/main/res/values/strings.xml b/src/android/app/src/main/res/values/strings.xml index d42fb37d58..02860364a9 100644 --- a/src/android/app/src/main/res/values/strings.xml +++ b/src/android/app/src/main/res/values/strings.xml @@ -501,7 +501,7 @@ Enable buffer history Enables access to previous buffer states. This option may improve rendering quality and performance consistency in some games. Optimized Vertex Buffers - Enables optimized vertex buffer binding for improved performance. Requires Mesa 26.0+ Turnip drivers. Will crash on older drivers. + Enables optimized vertex buffer binding for improved performance. Requires Mesa 26.0+ Turnip drivers/ QCOM drivers. Will crash on older Turnip drivers. Hacks @@ -510,7 +510,9 @@ Skip CPU Inner Invalidation Skips certain CPU-side cache invalidations during memory updates, reducing CPU usage and improving it\'s performance. This may cause glitches or crashes on some games. Fix Bloom Effects - Reduces bloom blur in LA/EOW (Adreno 700), removes bloom in Burnout. Warning: may cause graphical artifacts in other games. + Reduces bloom blur in LA/EOW (Adreno A6XX - A7XX/ Turnip), removes bloom in Burnout. Warning: may cause graphical artifacts in other games. + Emulate BGR565 + Fixes problems with inverted colors in games or strange artifacts or strange shadows. Use asynchronous shaders Compiles shaders asynchronously. This may reduce stutters but may also introduce glitches. GPU Unswizzle Settings diff --git a/src/common/CMakeLists.txt b/src/common/CMakeLists.txt index 2846058df9..7e9007eb15 100644 --- a/src/common/CMakeLists.txt +++ b/src/common/CMakeLists.txt @@ -183,8 +183,6 @@ if(ARCHITECTURE_x86_64) x64/cpu_detect.h x64/cpu_wait.cpp x64/cpu_wait.h - x64/native_clock.cpp - x64/native_clock.h x64/rdtsc.cpp x64/rdtsc.h x64/xbyak_abi.h @@ -192,10 +190,6 @@ if(ARCHITECTURE_x86_64) target_link_libraries(common PRIVATE xbyak::xbyak) endif() -if(HAS_NCE) - target_sources(common PRIVATE arm64/native_clock.cpp arm64/native_clock.h) -endif() - if(MSVC) target_compile_definitions( common diff --git a/src/common/android/applets/software_keyboard.cpp b/src/common/android/applets/software_keyboard.cpp index db76db91a6..8967811bd3 100644 --- a/src/common/android/applets/software_keyboard.cpp +++ b/src/common/android/applets/software_keyboard.cpp @@ -243,6 +243,9 @@ void AndroidKeyboard::SubmitInlineKeyboardInput(int key_code) { static_cast(m_current_text.size())); break; case KEYCODE_DEL: + if (m_current_text.empty()) { + return; + } m_current_text.pop_back(); submit_inline_callback(Service::AM::Frontend::SwkbdReplyType::ChangedString, m_current_text, static_cast(m_current_text.size())); diff --git a/src/common/arm64/native_clock.cpp b/src/common/arm64/native_clock.cpp deleted file mode 100644 index 76ffb74bab..0000000000 --- a/src/common/arm64/native_clock.cpp +++ /dev/null @@ -1,87 +0,0 @@ -// SPDX-FileCopyrightText: Copyright 2023 yuzu Emulator Project -// SPDX-License-Identifier: GPL-2.0-or-later - -#ifdef ANDROID -#include -#endif -#include "common/arm64/native_clock.h" - -namespace Common::Arm64 { - -namespace { - -NativeClock::FactorType GetFixedPointFactor(u64 num, u64 den) { - return (static_cast(num) << 64) / den; -} - -u64 MultiplyHigh(u64 m, NativeClock::FactorType factor) { - return static_cast((m * factor) >> 64); -} - -} // namespace - -NativeClock::NativeClock() { - const u64 host_cntfrq = GetHostCNTFRQ(); - ns_cntfrq_factor = GetFixedPointFactor(NsRatio::den, host_cntfrq); - us_cntfrq_factor = GetFixedPointFactor(UsRatio::den, host_cntfrq); - ms_cntfrq_factor = GetFixedPointFactor(MsRatio::den, host_cntfrq); - guest_cntfrq_factor = GetFixedPointFactor(CNTFRQ, host_cntfrq); - gputick_cntfrq_factor = GetFixedPointFactor(GPUTickFreq, host_cntfrq); -} - -std::chrono::nanoseconds NativeClock::GetTimeNS() const { - return std::chrono::nanoseconds{MultiplyHigh(GetUptime(), ns_cntfrq_factor)}; -} - -std::chrono::microseconds NativeClock::GetTimeUS() const { - return std::chrono::microseconds{MultiplyHigh(GetUptime(), us_cntfrq_factor)}; -} - -std::chrono::milliseconds NativeClock::GetTimeMS() const { - return std::chrono::milliseconds{MultiplyHigh(GetUptime(), ms_cntfrq_factor)}; -} - -s64 NativeClock::GetCNTPCT() const { - return MultiplyHigh(GetUptime(), guest_cntfrq_factor); -} - -s64 NativeClock::GetGPUTick() const { - return MultiplyHigh(GetUptime(), gputick_cntfrq_factor); -} - -s64 NativeClock::GetUptime() const { - s64 cntvct_el0 = 0; - asm volatile("dsb ish\n\t" - "mrs %[cntvct_el0], cntvct_el0\n\t" - "dsb ish\n\t" - : [cntvct_el0] "=r"(cntvct_el0)); - return cntvct_el0; -} - -bool NativeClock::IsNative() const { - return true; -} - -s64 NativeClock::GetHostCNTFRQ() { - u64 cntfrq_el0 = 0; - std::string_view board{""}; -#ifdef ANDROID - char buffer[PROP_VALUE_MAX]; - int len{__system_property_get("ro.product.board", buffer)}; - board = std::string_view(buffer, static_cast(len)); -#endif - if (board == "s5e9925") { // Exynos 2200 - cntfrq_el0 = 25600000; - } else if (board == "exynos2100") { // Exynos 2100 - cntfrq_el0 = 26000000; - } else if (board == "exynos9810") { // Exynos 9810 - cntfrq_el0 = 26000000; - } else if (board == "s5e8825") { // Exynos 1280 - cntfrq_el0 = 26000000; - } else { - asm("mrs %[cntfrq_el0], cntfrq_el0" : [cntfrq_el0] "=r"(cntfrq_el0)); - } - return cntfrq_el0; -} - -} // namespace Common::Arm64 diff --git a/src/common/arm64/native_clock.h b/src/common/arm64/native_clock.h deleted file mode 100644 index 94bc1882e0..0000000000 --- a/src/common/arm64/native_clock.h +++ /dev/null @@ -1,45 +0,0 @@ -// SPDX-FileCopyrightText: Copyright 2023 yuzu Emulator Project -// SPDX-License-Identifier: GPL-2.0-or-later - -#pragma once - -#include "common/wall_clock.h" - -namespace Common::Arm64 { - -class NativeClock final : public WallClock { -public: - explicit NativeClock(); - - std::chrono::nanoseconds GetTimeNS() const override; - - std::chrono::microseconds GetTimeUS() const override; - - std::chrono::milliseconds GetTimeMS() const override; - - s64 GetCNTPCT() const override; - - s64 GetGPUTick() const override; - - s64 GetUptime() const override; - - bool IsNative() const override; - - static s64 GetHostCNTFRQ(); - -public: - using FactorType = unsigned __int128; - - FactorType GetGuestCNTFRQFactor() const { - return guest_cntfrq_factor; - } - -private: - FactorType ns_cntfrq_factor; - FactorType us_cntfrq_factor; - FactorType ms_cntfrq_factor; - FactorType guest_cntfrq_factor; - FactorType gputick_cntfrq_factor; -}; - -} // namespace Common::Arm64 diff --git a/src/common/multi_level_page_table.inc b/src/common/multi_level_page_table.inc index 8ac506fa0a..79125e8e0b 100644 --- a/src/common/multi_level_page_table.inc +++ b/src/common/multi_level_page_table.inc @@ -13,13 +13,13 @@ namespace Common { template -MultiLevelPageTable::MultiLevelPageTable(std::size_t address_space_bits_, - std::size_t first_level_bits_, - std::size_t page_bits_) - : address_space_bits{address_space_bits_}, - first_level_bits{first_level_bits_}, page_bits{page_bits_} { +MultiLevelPageTable::MultiLevelPageTable(std::size_t address_space_bits_, std::size_t first_level_bits_, std::size_t page_bits_) + : address_space_bits{address_space_bits_} + , first_level_bits{first_level_bits_} + , page_bits{page_bits_} +{ if (page_bits == 0) { - return; + return; } first_level_shift = address_space_bits - first_level_bits; first_level_chunk_size = (1ULL << (first_level_shift - page_bits)) * sizeof(BaseAddr); @@ -30,12 +30,9 @@ MultiLevelPageTable::MultiLevelPageTable(std::size_t address_space_bit void* base{VirtualAlloc(nullptr, alloc_size, MEM_RESERVE, PAGE_READWRITE)}; #else void* base{mmap(nullptr, alloc_size, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0)}; - - if (base == MAP_FAILED) { + if (base == MAP_FAILED) base = nullptr; - } #endif - ASSERT(base); base_ptr = reinterpret_cast(base); } @@ -56,29 +53,21 @@ template void MultiLevelPageTable::ReserveRange(u64 start, std::size_t size) { const u64 new_start = start >> first_level_shift; const u64 new_end = (start + size) >> first_level_shift; - for (u64 i = new_start; i <= new_end; i++) { - if (!first_level_map[i]) { + for (u64 i = new_start; i <= new_end; i++) + if (!first_level_map[i]) AllocateLevel(i); - } - } } template -void MultiLevelPageTable::AllocateLevel(u64 level) { - void* ptr = reinterpret_cast(base_ptr) + level * first_level_chunk_size; +void MultiLevelPageTable::AllocateLevel(u64 index) { + void* ptr = reinterpret_cast(base_ptr) + index * first_level_chunk_size; #ifdef _WIN32 - void* base{VirtualAlloc(ptr, first_level_chunk_size, MEM_COMMIT, PAGE_READWRITE)}; -#else - void* base{mmap(ptr, first_level_chunk_size, PROT_READ | PROT_WRITE, - MAP_ANONYMOUS | MAP_PRIVATE, -1, 0)}; - - if (base == MAP_FAILED) { - base = nullptr; - } -#endif + void* base = VirtualAlloc(ptr, first_level_chunk_size, MEM_COMMIT, PAGE_READWRITE); ASSERT(base); - - first_level_map[level] = base; +#else + void* base = ptr; +#endif + first_level_map[index] = base; } } // namespace Common diff --git a/src/common/settings.h b/src/common/settings.h index bec1e93e79..13ccf5a1d5 100644 --- a/src/common/settings.h +++ b/src/common/settings.h @@ -555,6 +555,9 @@ struct Values { SwitchableSetting fix_bloom_effects{linkage, false, "fix_bloom_effects", Category::RendererHacks}; + SwitchableSetting emulate_bgr565{linkage, false, "emulate_bgr565", + Category::RendererHacks}; + SwitchableSetting rescale_hack{linkage, false, "rescale_hack", Category::RendererHacks}; @@ -584,7 +587,7 @@ struct Values { SwitchableSetting dyna_state{linkage, #if defined(ANDROID) - ExtendedDynamicState::EDS1, + ExtendedDynamicState::Disabled, #elif defined(__APPLE__) ExtendedDynamicState::Disabled, #else @@ -636,8 +639,8 @@ struct Values { Category::System}; SwitchableSetting region_index{linkage, Region::Usa, "region_index", Category::System}; SwitchableSetting time_zone_index{linkage, TimeZone::Auto, "time_zone_index", Category::System}; - Setting serial_battery{linkage, 0, "serial_battery", Category::System}; - Setting serial_unit{linkage, 0, "serial_unit", Category::System}; + Setting serial_battery{linkage, 0, "serial_battery", Category::Debugging}; + Setting serial_unit{linkage, 0, "serial_unit", Category::Debugging}; // Measured in seconds since epoch SwitchableSetting custom_rtc_enabled{linkage, false, "custom_rtc_enabled", Category::System, Specialization::Paired, true, true}; SwitchableSetting custom_rtc{ @@ -807,7 +810,7 @@ struct Values { 0, 65535, "debug_knobs", - Category::Core, + Category::Debugging, Specialization::Countable, true, true}; diff --git a/src/common/wall_clock.cpp b/src/common/wall_clock.cpp index 4f9c240905..bff9e7b4f4 100644 --- a/src/common/wall_clock.cpp +++ b/src/common/wall_clock.cpp @@ -1,77 +1,196 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later // SPDX-FileCopyrightText: Copyright 2020 yuzu Emulator Project // SPDX-License-Identifier: GPL-2.0-or-later #include "common/steady_clock.h" +#include "common/uint128.h" #include "common/wall_clock.h" +#ifdef __ANDROID__ +#include +#endif #ifdef ARCHITECTURE_x86_64 #include "common/x64/cpu_detect.h" -#include "common/x64/native_clock.h" #include "common/x64/rdtsc.h" #endif -#ifdef HAS_NCE -#include "common/arm64/native_clock.h" -#endif namespace Common { -class StandardWallClock final : public WallClock { -public: - explicit StandardWallClock() {} - - std::chrono::nanoseconds GetTimeNS() const override { - return std::chrono::duration_cast( - std::chrono::system_clock::now().time_since_epoch()); - } - - std::chrono::microseconds GetTimeUS() const override { - return std::chrono::duration_cast( - std::chrono::system_clock::now().time_since_epoch()); - } - - std::chrono::milliseconds GetTimeMS() const override { - return std::chrono::duration_cast( - std::chrono::system_clock::now().time_since_epoch()); - } - - s64 GetCNTPCT() const override { - return GetUptime() * NsToCNTPCTRatio::num / NsToCNTPCTRatio::den; - } - - s64 GetGPUTick() const override { - return GetUptime() * NsToGPUTickRatio::num / NsToGPUTickRatio::den; - } - - s64 GetUptime() const override { - return std::chrono::duration_cast( - std::chrono::steady_clock::now().time_since_epoch()) - .count(); - } - - bool IsNative() const override { - return false; - } -}; - -std::unique_ptr CreateOptimalClock() { #if defined(ARCHITECTURE_x86_64) - const auto& caps = GetCPUCaps(); +WallClock::WallClock(bool invariant_, u64 rdtsc_frequency_) noexcept + : invariant{invariant_} + , rdtsc_frequency{rdtsc_frequency_} + , ns_rdtsc_factor{GetFixedPoint64Factor(NsRatio::den, rdtsc_frequency_)} + , us_rdtsc_factor{GetFixedPoint64Factor(UsRatio::den, rdtsc_frequency_)} + , ms_rdtsc_factor{GetFixedPoint64Factor(MsRatio::den, rdtsc_frequency_)} + , cntpct_rdtsc_factor{GetFixedPoint64Factor(CNTFRQ, rdtsc_frequency_)} + , gputick_rdtsc_factor{GetFixedPoint64Factor(GPUTickFreq, rdtsc_frequency_)} +{} - if (caps.invariant_tsc && caps.tsc_frequency >= std::nano::den) { - return std::make_unique(caps.tsc_frequency); - } else { - // Fallback to StandardWallClock if the hardware TSC - // - Is not invariant - // - Is not more precise than 1 GHz (1ns resolution) - return std::make_unique(); - } +std::chrono::nanoseconds WallClock::GetTimeNS() const { + if (invariant) + return std::chrono::duration_cast(std::chrono::system_clock::now().time_since_epoch()); + return std::chrono::nanoseconds{MultiplyHigh(GetUptime(), ns_rdtsc_factor)}; +} + +std::chrono::microseconds WallClock::GetTimeUS() const { + if (invariant) + return std::chrono::duration_cast(std::chrono::system_clock::now().time_since_epoch()); + return std::chrono::microseconds{MultiplyHigh(GetUptime(), us_rdtsc_factor)}; +} + +std::chrono::milliseconds WallClock::GetTimeMS() const { + if (invariant) + return std::chrono::duration_cast(std::chrono::system_clock::now().time_since_epoch()); + return std::chrono::milliseconds{MultiplyHigh(GetUptime(), ms_rdtsc_factor)}; +} + +s64 WallClock::GetCNTPCT() const { + if (invariant) + return GetUptime() * NsToCNTPCTRatio::num / NsToCNTPCTRatio::den; + return MultiplyHigh(GetUptime(), cntpct_rdtsc_factor); +} + +s64 WallClock::GetGPUTick() const { + if (invariant) + return GetUptime() * NsToGPUTickRatio::num / NsToGPUTickRatio::den; + return MultiplyHigh(GetUptime(), gputick_rdtsc_factor); +} + +s64 WallClock::GetUptime() const { + if (invariant) + return std::chrono::duration_cast(std::chrono::steady_clock::now().time_since_epoch()).count(); + return s64(Common::X64::FencedRDTSC()); +} + +bool WallClock::IsNative() const { + if (invariant) + return false; + return true; +} #elif defined(HAS_NCE) - return std::make_unique(); +namespace { + +[[nodiscard]] WallClock::FactorType GetFixedPointFactor(u64 num, u64 den) noexcept { + return (WallClock::FactorType(num) << 64) / den; +} + +[[nodiscard]] u64 MultiplyHigh(u64 m, WallClock::FactorType factor) noexcept { + return static_cast((m * factor) >> 64); +} + +[[nodiscard]] s64 GetHostCNTFRQ() noexcept { + u64 cntfrq_el0 = 0; +#ifdef ANDROID + std::string_view board{""}; + char buffer[PROP_VALUE_MAX]; + int len{__system_property_get("ro.product.board", buffer)}; + board = std::string_view(buffer, static_cast(len)); + if (board == "s5e9925") { // Exynos 2200 + cntfrq_el0 = 25600000; + } else if (board == "exynos2100") { // Exynos 2100 + cntfrq_el0 = 26000000; + } else if (board == "exynos9810") { // Exynos 9810 + cntfrq_el0 = 26000000; + } else if (board == "s5e8825") { // Exynos 1280 + cntfrq_el0 = 26000000; + } else { + asm volatile("mrs %[cntfrq_el0], cntfrq_el0" : [cntfrq_el0] "=r"(cntfrq_el0)); + } + return cntfrq_el0; #else - return std::make_unique(); + asm volatile("mrs %[cntfrq_el0], cntfrq_el0" : [cntfrq_el0] "=r"(cntfrq_el0)); + return cntfrq_el0; +#endif +} + +} // namespace + +WallClock::WallClock(bool invariant_, u64 rdtsc_frequency_) noexcept { + const u64 host_cntfrq = std::max(GetHostCNTFRQ(), 1); + ns_cntfrq_factor = GetFixedPointFactor(NsRatio::den, host_cntfrq); + us_cntfrq_factor = GetFixedPointFactor(UsRatio::den, host_cntfrq); + ms_cntfrq_factor = GetFixedPointFactor(MsRatio::den, host_cntfrq); + guest_cntfrq_factor = GetFixedPointFactor(CNTFRQ, host_cntfrq); + gputick_cntfrq_factor = GetFixedPointFactor(GPUTickFreq, host_cntfrq); +} + +std::chrono::nanoseconds WallClock::GetTimeNS() const { + return std::chrono::nanoseconds{MultiplyHigh(GetUptime(), ns_cntfrq_factor)}; +} + +std::chrono::microseconds WallClock::GetTimeUS() const { + return std::chrono::microseconds{MultiplyHigh(GetUptime(), us_cntfrq_factor)}; +} + +std::chrono::milliseconds WallClock::GetTimeMS() const { + return std::chrono::milliseconds{MultiplyHigh(GetUptime(), ms_cntfrq_factor)}; +} + +s64 WallClock::GetCNTPCT() const { + return MultiplyHigh(GetUptime(), guest_cntfrq_factor); +} + +s64 WallClock::GetGPUTick() const { + return MultiplyHigh(GetUptime(), gputick_cntfrq_factor); +} + +s64 WallClock::GetUptime() const { + s64 cntvct_el0 = 0; + asm volatile( + "dsb ish\n\t" + "mrs %[cntvct_el0], cntvct_el0\n\t" + "dsb ish\n\t" + : [cntvct_el0] "=r"(cntvct_el0) + ); + return cntvct_el0; +} + +bool WallClock::IsNative() const { + return true; +} +#else +WallClock::WallClock(bool invariant_, u64 rdtsc_frequency_) noexcept {} + +std::chrono::nanoseconds WallClock::GetTimeNS() const { + return std::chrono::duration_cast(std::chrono::system_clock::now().time_since_epoch()); +} + +std::chrono::microseconds WallClock::GetTimeUS() const { + return std::chrono::duration_cast(std::chrono::system_clock::now().time_since_epoch()); +} + +std::chrono::milliseconds WallClock::GetTimeMS() const { + return std::chrono::duration_cast(std::chrono::system_clock::now().time_since_epoch()); +} + +s64 WallClock::GetCNTPCT() const { + return GetUptime() * NsToCNTPCTRatio::num / NsToCNTPCTRatio::den; +} + +s64 WallClock::GetGPUTick() const { + return GetUptime() * NsToGPUTickRatio::num / NsToGPUTickRatio::den; +} + +s64 WallClock::GetUptime() const { + return std::chrono::duration_cast(std::chrono::steady_clock::now().time_since_epoch()).count(); +} + +bool WallClock::IsNative() const { + return false; +} +#endif + +WallClock CreateOptimalClock() noexcept { +#if defined(ARCHITECTURE_x86_64) + auto const& caps = GetCPUCaps(); + return WallClock(!(caps.invariant_tsc && caps.tsc_frequency >= std::nano::den), std::max(caps.tsc_frequency, 1)); +#elif defined(HAS_NCE) + return WallClock(false, 1); +#else + return WallClock(true, 1); #endif } diff --git a/src/common/wall_clock.h b/src/common/wall_clock.h index 7ad6536930..6a6d56a610 100644 --- a/src/common/wall_clock.h +++ b/src/common/wall_clock.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later // SPDX-FileCopyrightText: Copyright 2020 yuzu Emulator Project @@ -20,28 +20,28 @@ public: static constexpr u64 GPUTickFreq = 614'400'000; // GM20B GPU Tick Frequency = 614.4 MHz static constexpr u64 CPUTickFreq = 1'020'000'000; // T210/4 A57 CPU Tick Frequency = 1020.0 MHz - virtual ~WallClock() = default; + explicit WallClock(bool invariant, u64 rdtsc_frequency_) noexcept; /// @returns The time in nanoseconds since the construction of this clock. - virtual std::chrono::nanoseconds GetTimeNS() const = 0; + std::chrono::nanoseconds GetTimeNS() const; /// @returns The time in microseconds since the construction of this clock. - virtual std::chrono::microseconds GetTimeUS() const = 0; + std::chrono::microseconds GetTimeUS() const; /// @returns The time in milliseconds since the construction of this clock. - virtual std::chrono::milliseconds GetTimeMS() const = 0; + std::chrono::milliseconds GetTimeMS() const; /// @returns The guest CNTPCT ticks since the construction of this clock. - virtual s64 GetCNTPCT() const = 0; + s64 GetCNTPCT() const; /// @returns The guest GPU ticks since the construction of this clock. - virtual s64 GetGPUTick() const = 0; + s64 GetGPUTick() const; /// @returns The raw host timer ticks since an indeterminate epoch. - virtual s64 GetUptime() const = 0; + s64 GetUptime() const; /// @returns Whether the clock directly uses the host's hardware clock. - virtual bool IsNative() const = 0; + bool IsNative() const; static inline u64 NSToCNTPCT(u64 ns) { return ns * NsToCNTPCTRatio::num / NsToCNTPCTRatio::den; @@ -85,8 +85,33 @@ protected: using CPUTickToUsRatio = std::ratio; using CPUTickToCNTPCTRatio = std::ratio; using CPUTickToGPUTickRatio = std::ratio; + +#if defined(ARCHITECTURE_x86_64) + bool invariant; + u64 rdtsc_frequency; + u64 ns_rdtsc_factor; + u64 us_rdtsc_factor; + u64 ms_rdtsc_factor; + u64 cntpct_rdtsc_factor; + u64 gputick_rdtsc_factor; +#elif defined(HAS_NCE) +public: + using FactorType = unsigned __int128; + + FactorType GetGuestCNTFRQFactor() const { + return guest_cntfrq_factor; + } +protected: + FactorType ns_cntfrq_factor; + FactorType us_cntfrq_factor; + FactorType ms_cntfrq_factor; + FactorType guest_cntfrq_factor; + FactorType gputick_cntfrq_factor; +#else + +#endif }; -[[nodiscard]] std::unique_ptr CreateOptimalClock(); +[[nodiscard]] WallClock CreateOptimalClock() noexcept; } // namespace Common diff --git a/src/common/x64/native_clock.cpp b/src/common/x64/native_clock.cpp deleted file mode 100644 index d2d27fafea..0000000000 --- a/src/common/x64/native_clock.cpp +++ /dev/null @@ -1,46 +0,0 @@ -// SPDX-FileCopyrightText: Copyright 2020 yuzu Emulator Project -// SPDX-License-Identifier: GPL-2.0-or-later - -#include "common/uint128.h" -#include "common/x64/native_clock.h" -#include "common/x64/rdtsc.h" - -namespace Common::X64 { - -NativeClock::NativeClock(u64 rdtsc_frequency_) - : rdtsc_frequency{rdtsc_frequency_}, ns_rdtsc_factor{GetFixedPoint64Factor(NsRatio::den, - rdtsc_frequency)}, - us_rdtsc_factor{GetFixedPoint64Factor(UsRatio::den, rdtsc_frequency)}, - ms_rdtsc_factor{GetFixedPoint64Factor(MsRatio::den, rdtsc_frequency)}, - cntpct_rdtsc_factor{GetFixedPoint64Factor(CNTFRQ, rdtsc_frequency)}, - gputick_rdtsc_factor{GetFixedPoint64Factor(GPUTickFreq, rdtsc_frequency)} {} - -std::chrono::nanoseconds NativeClock::GetTimeNS() const { - return std::chrono::nanoseconds{MultiplyHigh(GetUptime(), ns_rdtsc_factor)}; -} - -std::chrono::microseconds NativeClock::GetTimeUS() const { - return std::chrono::microseconds{MultiplyHigh(GetUptime(), us_rdtsc_factor)}; -} - -std::chrono::milliseconds NativeClock::GetTimeMS() const { - return std::chrono::milliseconds{MultiplyHigh(GetUptime(), ms_rdtsc_factor)}; -} - -s64 NativeClock::GetCNTPCT() const { - return MultiplyHigh(GetUptime(), cntpct_rdtsc_factor); -} - -s64 NativeClock::GetGPUTick() const { - return MultiplyHigh(GetUptime(), gputick_rdtsc_factor); -} - -s64 NativeClock::GetUptime() const { - return static_cast(FencedRDTSC()); -} - -bool NativeClock::IsNative() const { - return true; -} - -} // namespace Common::X64 diff --git a/src/common/x64/native_clock.h b/src/common/x64/native_clock.h deleted file mode 100644 index b2629b0311..0000000000 --- a/src/common/x64/native_clock.h +++ /dev/null @@ -1,38 +0,0 @@ -// SPDX-FileCopyrightText: Copyright 2020 yuzu Emulator Project -// SPDX-License-Identifier: GPL-2.0-or-later - -#pragma once - -#include "common/wall_clock.h" - -namespace Common::X64 { - -class NativeClock final : public WallClock { -public: - explicit NativeClock(u64 rdtsc_frequency_); - - std::chrono::nanoseconds GetTimeNS() const override; - - std::chrono::microseconds GetTimeUS() const override; - - std::chrono::milliseconds GetTimeMS() const override; - - s64 GetCNTPCT() const override; - - s64 GetGPUTick() const override; - - s64 GetUptime() const override; - - bool IsNative() const override; - -private: - u64 rdtsc_frequency; - - u64 ns_rdtsc_factor; - u64 us_rdtsc_factor; - u64 ms_rdtsc_factor; - u64 cntpct_rdtsc_factor; - u64 gputick_rdtsc_factor; -}; - -} // namespace Common::X64 diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.cpp b/src/core/arm/dynarmic/arm_dynarmic_32.cpp index 1520f128cf..e434a31d5d 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_32.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_32.cpp @@ -113,8 +113,7 @@ void DynarmicCallbacks32::CallSVC(u32 swi) { } void DynarmicCallbacks32::AddTicks(u64 ticks) { - ASSERT_MSG(!m_parent.m_uses_wall_clock, "Dynarmic ticking disabled"); - + ASSERT(!m_parent.m_uses_wall_clock && "Dynarmic ticking disabled"); // Divide the number of ticks by the amount of CPU cores. TODO(Subv): This yields only a // rough approximation of the amount of executed ticks in the system, it may be thrown off // if not all cores are doing a similar amount of work. Instead of doing this, we should @@ -123,14 +122,12 @@ void DynarmicCallbacks32::AddTicks(u64 ticks) { u64 amortized_ticks = ticks / Core::Hardware::NUM_CPU_CORES; // Always execute at least one tick. amortized_ticks = std::max(amortized_ticks, 1); - m_parent.m_system.CoreTiming().AddTicks(amortized_ticks); } u64 DynarmicCallbacks32::GetTicksRemaining() { - ASSERT_MSG(!m_parent.m_uses_wall_clock, "Dynarmic ticking disabled"); - - return std::max(m_parent.m_system.CoreTiming().GetDowncount(), 0); + ASSERT(!m_parent.m_uses_wall_clock && "Dynarmic ticking disabled"); + return std::max(m_parent.m_system.CoreTiming().downcount, 0); } bool DynarmicCallbacks32::CheckMemoryAccess(u64 addr, u64 size, Kernel::DebugWatchpointType type) { @@ -289,7 +286,6 @@ void ArmDynarmic32::MakeJit(Common::PageTable* page_table) { config.optimizations |= Dynarmic::OptimizationFlag::Unsafe_UnfuseFMA; config.optimizations |= Dynarmic::OptimizationFlag::Unsafe_IgnoreStandardFPCRValue; config.optimizations |= Dynarmic::OptimizationFlag::Unsafe_InaccurateNaN; - config.optimizations |= Dynarmic::OptimizationFlag::Unsafe_IgnoreGlobalMonitor; break; // Paranoia mode for debugging optimizations case Settings::CpuAccuracy::Paranoid: diff --git a/src/core/arm/dynarmic/arm_dynarmic_64.cpp b/src/core/arm/dynarmic/arm_dynarmic_64.cpp index fe7fb5983f..4e2350c556 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_64.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_64.cpp @@ -150,8 +150,7 @@ void DynarmicCallbacks64::CallSVC(u32 svc) { } void DynarmicCallbacks64::AddTicks(u64 ticks) { - ASSERT_MSG(!m_parent.m_uses_wall_clock, "Dynarmic ticking disabled"); - + ASSERT(!m_parent.m_uses_wall_clock && "Dynarmic ticking disabled"); // Divide the number of ticks by the amount of CPU cores. TODO(Subv): This yields only a // rough approximation of the amount of executed ticks in the system, it may be thrown off // if not all cores are doing a similar amount of work. Instead of doing this, we should @@ -160,13 +159,12 @@ void DynarmicCallbacks64::AddTicks(u64 ticks) { u64 amortized_ticks = ticks / Core::Hardware::NUM_CPU_CORES; // Always execute at least one tick. amortized_ticks = std::max(amortized_ticks, 1); - m_parent.m_system.CoreTiming().AddTicks(amortized_ticks); } u64 DynarmicCallbacks64::GetTicksRemaining() { ASSERT(!m_parent.m_uses_wall_clock && "Dynarmic ticking disabled"); - return std::max(m_parent.m_system.CoreTiming().GetDowncount(), 0); + return std::max(m_parent.m_system.CoreTiming().downcount, 0); } u64 DynarmicCallbacks64::GetCNTPCT() { @@ -340,7 +338,6 @@ void ArmDynarmic64::MakeJit(Common::PageTable* page_table, std::size_t address_s config.unsafe_optimizations = true; config.optimizations |= Dynarmic::OptimizationFlag::Unsafe_UnfuseFMA; config.fastmem_address_space_bits = 64; - config.optimizations |= Dynarmic::OptimizationFlag::Unsafe_IgnoreGlobalMonitor; break; // Paranoia mode for debugging optimizations case Settings::CpuAccuracy::Paranoid: diff --git a/src/core/arm/dynarmic/dynarmic_exclusive_monitor.cpp b/src/core/arm/dynarmic/dynarmic_exclusive_monitor.cpp index b5c9c43c42..8e40fecebc 100644 --- a/src/core/arm/dynarmic/dynarmic_exclusive_monitor.cpp +++ b/src/core/arm/dynarmic/dynarmic_exclusive_monitor.cpp @@ -1,3 +1,6 @@ +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project +// SPDX-License-Identifier: GPL-3.0-or-later + // SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project // SPDX-License-Identifier: GPL-2.0-or-later @@ -7,28 +10,30 @@ namespace Core { DynarmicExclusiveMonitor::DynarmicExclusiveMonitor(Memory::Memory& memory_, std::size_t core_count_) - : monitor{core_count_}, memory{memory_} {} + : monitor{} + , memory{memory_} +{} DynarmicExclusiveMonitor::~DynarmicExclusiveMonitor() = default; u8 DynarmicExclusiveMonitor::ExclusiveRead8(std::size_t core_index, VAddr addr) { - return monitor.ReadAndMark(core_index, addr, [&]() -> u8 { return memory.Read8(addr); }); + return monitor.ReadAndMark(core_index, addr, [=]() -> u8 { return memory.Read8(addr); }); } u16 DynarmicExclusiveMonitor::ExclusiveRead16(std::size_t core_index, VAddr addr) { - return monitor.ReadAndMark(core_index, addr, [&]() -> u16 { return memory.Read16(addr); }); + return monitor.ReadAndMark(core_index, addr, [=]() -> u16 { return memory.Read16(addr); }); } u32 DynarmicExclusiveMonitor::ExclusiveRead32(std::size_t core_index, VAddr addr) { - return monitor.ReadAndMark(core_index, addr, [&]() -> u32 { return memory.Read32(addr); }); + return monitor.ReadAndMark(core_index, addr, [=]() -> u32 { return memory.Read32(addr); }); } u64 DynarmicExclusiveMonitor::ExclusiveRead64(std::size_t core_index, VAddr addr) { - return monitor.ReadAndMark(core_index, addr, [&]() -> u64 { return memory.Read64(addr); }); + return monitor.ReadAndMark(core_index, addr, [=]() -> u64 { return memory.Read64(addr); }); } u128 DynarmicExclusiveMonitor::ExclusiveRead128(std::size_t core_index, VAddr addr) { - return monitor.ReadAndMark(core_index, addr, [&]() -> u128 { + return monitor.ReadAndMark(core_index, addr, [=]() -> u128 { u128 result; result[0] = memory.Read64(addr); result[1] = memory.Read64(addr + 8); @@ -41,31 +46,31 @@ void DynarmicExclusiveMonitor::ClearExclusive(std::size_t core_index) { } bool DynarmicExclusiveMonitor::ExclusiveWrite8(std::size_t core_index, VAddr vaddr, u8 value) { - return monitor.DoExclusiveOperation(core_index, vaddr, [&](u8 expected) -> bool { + return monitor.DoExclusiveOperation(core_index, vaddr, [=](u8 expected) -> bool { return memory.WriteExclusive8(vaddr, value, expected); }); } bool DynarmicExclusiveMonitor::ExclusiveWrite16(std::size_t core_index, VAddr vaddr, u16 value) { - return monitor.DoExclusiveOperation(core_index, vaddr, [&](u16 expected) -> bool { + return monitor.DoExclusiveOperation(core_index, vaddr, [=](u16 expected) -> bool { return memory.WriteExclusive16(vaddr, value, expected); }); } bool DynarmicExclusiveMonitor::ExclusiveWrite32(std::size_t core_index, VAddr vaddr, u32 value) { - return monitor.DoExclusiveOperation(core_index, vaddr, [&](u32 expected) -> bool { + return monitor.DoExclusiveOperation(core_index, vaddr, [=](u32 expected) -> bool { return memory.WriteExclusive32(vaddr, value, expected); }); } bool DynarmicExclusiveMonitor::ExclusiveWrite64(std::size_t core_index, VAddr vaddr, u64 value) { - return monitor.DoExclusiveOperation(core_index, vaddr, [&](u64 expected) -> bool { + return monitor.DoExclusiveOperation(core_index, vaddr, [=](u64 expected) -> bool { return memory.WriteExclusive64(vaddr, value, expected); }); } bool DynarmicExclusiveMonitor::ExclusiveWrite128(std::size_t core_index, VAddr vaddr, u128 value) { - return monitor.DoExclusiveOperation(core_index, vaddr, [&](u128 expected) -> bool { + return monitor.DoExclusiveOperation(core_index, vaddr, [=](u128 expected) -> bool { return memory.WriteExclusive128(vaddr, value, expected); }); } diff --git a/src/core/arm/nce/patcher.cpp b/src/core/arm/nce/patcher.cpp index ea77166645..bf72b207b9 100644 --- a/src/core/arm/nce/patcher.cpp +++ b/src/core/arm/nce/patcher.cpp @@ -3,7 +3,7 @@ #include #include -#include "common/arm64/native_clock.h" +#include "common/wall_clock.h" #include "common/alignment.h" #include "common/literals.h" #include "core/arm/nce/arm_nce.h" @@ -578,7 +578,11 @@ void Patcher::WriteMsrHandler(ModuleDestLabel module_dest, oaknut::XReg src_reg, } void Patcher::WriteCntpctHandler(ModuleDestLabel module_dest, oaknut::XReg dest_reg, oaknut::VectorCodeGenerator& cg) { - static Common::Arm64::NativeClock clock{}; +#if defined(HAS_NCE) + static Common::WallClock clock(false, 1); +#else + static Common::WallClock clock(true, 1); +#endif const auto factor = clock.GetGuestCNTFRQFactor(); const auto raw_factor = std::bit_cast>(factor); diff --git a/src/core/core_timing.cpp b/src/core/core_timing.cpp index b216dc2094..6738a0d73d 100644 --- a/src/core/core_timing.cpp +++ b/src/core/core_timing.cpp @@ -57,15 +57,51 @@ void CoreTiming::Initialize(std::function&& on_thread_init_) { Reset(); on_thread_init = std::move(on_thread_init_); event_fifo_id = 0; - shutting_down = false; cpu_ticks = 0; if (is_multicore) { - timer_thread.emplace([](CoreTiming& instance) { + timer_thread = std::jthread([this](std::stop_token stop_token) { Common::SetCurrentThreadName("HostTiming"); Common::SetCurrentThreadPriority(Common::ThreadPriority::High); - instance.on_thread_init(); - instance.ThreadLoop(); - }, std::ref(*this)); + on_thread_init(); + has_started = true; + while (!stop_token.stop_requested()) { + while (!paused && !stop_token.stop_requested()) { + paused_set = false; + if (auto const next_time = Advance(); next_time) { + // There are more events left in the queue, wait until the next event. + auto wait_time = *next_time - GetGlobalTimeNs().count(); + if (wait_time > 0) { +#ifdef _WIN32 + while (!paused && !event.IsSet() && wait_time > 0) { + wait_time = *next_time - GetGlobalTimeNs().count(); + if (wait_time >= timer_resolution_ns) { + Common::Windows::SleepForOneTick(); + } else { +#ifdef ARCHITECTURE_x86_64 + Common::X64::MicroSleep(); +#else + std::this_thread::yield(); +#endif + } + } + if (event.IsSet()) + event.Reset(); +#else + event.WaitFor(std::chrono::nanoseconds(wait_time)); +#endif + } + } else { + // Queue is empty, wait until another event is scheduled and signals us to + // continue. + wait_set = true; + event.Wait(); + } + wait_set = false; + } + paused_set = true; + pause_event.Wait(); + } + }); } } @@ -90,7 +126,7 @@ void CoreTiming::SyncPause(bool is_paused) { } Pause(is_paused); - if (timer_thread) { + if (timer_thread.joinable()) { if (!is_paused) { pause_event.Set(); } @@ -190,33 +226,22 @@ void CoreTiming::ResetTicks() { } u64 CoreTiming::GetClockTicks() const { - u64 fres; - if (is_multicore) [[likely]] { - fres = clock->GetCNTPCT(); - } else { - fres = Common::WallClock::CPUTickToCNTPCT(cpu_ticks); + u64 fres = is_multicore ? clock.GetCNTPCT() : Common::WallClock::CPUTickToCNTPCT(cpu_ticks); + if (auto const overclock = Settings::values.fast_cpu_time.GetValue(); overclock != Settings::CpuClock::Off) { + fres = u64(f64(fres) * (1.7 + 0.3 * u32(overclock))); } - - const auto overclock = Settings::values.fast_cpu_time.GetValue(); - - if (overclock != Settings::CpuClock::Off) { - fres = (u64) ((double) fres * (1.7 + 0.3 * u32(overclock))); - } - - if (Settings::values.sync_core_speed.GetValue()) { - const auto ticks = double(fres); - const auto speed_limit = double(Settings::SpeedLimit())*0.01; - return u64(ticks/speed_limit); - } else { - return fres; - } + if (::Settings::values.sync_core_speed.GetValue()) { + auto const ticks = f64(fres); + auto const speed_limit = f64(Settings::SpeedLimit()) * 0.01; + return u64(ticks / speed_limit); + } + return fres; } u64 CoreTiming::GetGPUTicks() const { - if (is_multicore) [[likely]] { - return clock->GetGPUTick(); - } - return Common::WallClock::CPUTickToGPUTick(cpu_ticks); + return is_multicore + ? clock.GetGPUTick() + : Common::WallClock::CPUTickToGPUTick(cpu_ticks); } std::optional CoreTiming::Advance() { @@ -278,75 +303,29 @@ std::optional CoreTiming::Advance() { } } -void CoreTiming::ThreadLoop() { - has_started = true; - while (!shutting_down) { - while (!paused) { - paused_set = false; - const auto next_time = Advance(); - if (next_time) { - // There are more events left in the queue, wait until the next event. - auto wait_time = *next_time - GetGlobalTimeNs().count(); - if (wait_time > 0) { -#ifdef _WIN32 - while (!paused && !event.IsSet() && wait_time > 0) { - wait_time = *next_time - GetGlobalTimeNs().count(); - if (wait_time >= timer_resolution_ns) { - Common::Windows::SleepForOneTick(); - } else { -#ifdef ARCHITECTURE_x86_64 - Common::X64::MicroSleep(); -#else - std::this_thread::yield(); -#endif - } - } - - if (event.IsSet()) { - event.Reset(); - } -#else - event.WaitFor(std::chrono::nanoseconds(wait_time)); -#endif - } - } else { - // Queue is empty, wait until another event is scheduled and signals us to - // continue. - wait_set = true; - event.Wait(); - } - wait_set = false; - } - - paused_set = true; - pause_event.Wait(); - } -} - void CoreTiming::Reset() { paused = true; - shutting_down = true; pause_event.Set(); event.Set(); - if (timer_thread) { - timer_thread->join(); + if (timer_thread.joinable()) { + timer_thread.request_stop(); + timer_thread.join(); } - timer_thread.reset(); has_started = false; } -std::chrono::nanoseconds CoreTiming::GetGlobalTimeNs() const { - if (is_multicore) [[likely]] { - return clock->GetTimeNS(); - } - return std::chrono::nanoseconds{Common::WallClock::CPUTickToNS(cpu_ticks)}; +/// @brief Returns current time in nanoseconds. +std::chrono::nanoseconds CoreTiming::GetGlobalTimeNs() const noexcept { + return is_multicore + ? clock.GetTimeNS() + : std::chrono::nanoseconds{Common::WallClock::CPUTickToNS(cpu_ticks)}; } -std::chrono::microseconds CoreTiming::GetGlobalTimeUs() const { - if (is_multicore) [[likely]] { - return clock->GetTimeUS(); - } - return std::chrono::microseconds{Common::WallClock::CPUTickToUS(cpu_ticks)}; +/// @brief Returns current time in microseconds. +std::chrono::microseconds CoreTiming::GetGlobalTimeUs() const noexcept { + return is_multicore + ? clock.GetTimeUS() + : std::chrono::microseconds{Common::WallClock::CPUTickToUS(cpu_ticks)}; } #ifdef _WIN32 diff --git a/src/core/core_timing.h b/src/core/core_timing.h index ae9f56d519..5967c83b57 100644 --- a/src/core/core_timing.h +++ b/src/core/core_timing.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later // SPDX-FileCopyrightText: Copyright 2020 yuzu Emulator Project @@ -118,7 +118,7 @@ public: void Idle(); - s64 GetDowncount() const { + s64 GetDowncount() const noexcept { return downcount; } @@ -128,11 +128,8 @@ public: /// Returns the current GPU tick value. u64 GetGPUTicks() const; - /// Returns current time in microseconds. - std::chrono::microseconds GetGlobalTimeUs() const; - - /// Returns current time in nanoseconds. - std::chrono::nanoseconds GetGlobalTimeNs() const; + [[nodiscard]] std::chrono::microseconds GetGlobalTimeUs() const noexcept; + [[nodiscard]] std::chrono::nanoseconds GetGlobalTimeNs() const noexcept; /// Checks for events manually and returns time in nanoseconds for next event, threadsafe. std::optional Advance(); @@ -141,13 +138,11 @@ public: void SetTimerResolutionNs(std::chrono::nanoseconds ns); #endif -private: struct Event; - void ThreadLoop(); void Reset(); - std::unique_ptr clock; + Common::WallClock clock; s64 global_timer = 0; @@ -165,11 +160,10 @@ private: Common::Event pause_event{}; mutable std::mutex basic_lock; std::mutex advance_lock; - std::optional timer_thread; + std::jthread timer_thread; std::atomic paused{}; std::atomic paused_set{}; std::atomic wait_set{}; - std::atomic shutting_down{}; std::atomic has_started{}; std::function on_thread_init{}; diff --git a/src/core/file_sys/system_archive/system_archive.cpp b/src/core/file_sys/system_archive/system_archive.cpp index cb68d5b55e..bbdf27039b 100644 --- a/src/core/file_sys/system_archive/system_archive.cpp +++ b/src/core/file_sys/system_archive/system_archive.cpp @@ -15,86 +15,76 @@ namespace FileSys::SystemArchive { -constexpr u64 SYSTEM_ARCHIVE_BASE_TITLE_ID = 0x0100000000000800; -constexpr std::size_t SYSTEM_ARCHIVE_COUNT = 0x28; - -using SystemArchiveSupplier = VirtualDir (*)(); - struct SystemArchiveDescriptor { - u64 title_id; const char* name; - SystemArchiveSupplier supplier; + VirtualDir (*supplier)(); }; -constexpr std::array SYSTEM_ARCHIVES{{ - {0x0100000000000800, "CertStore", nullptr}, - {0x0100000000000801, "ErrorMessage", nullptr}, - {0x0100000000000802, "MiiModel", &MiiModel}, - {0x0100000000000803, "BrowserDll", nullptr}, - {0x0100000000000804, "Help", nullptr}, - {0x0100000000000805, "SharedFont", nullptr}, - {0x0100000000000806, "NgWord", &NgWord1}, - {0x0100000000000807, "SsidList", nullptr}, - {0x0100000000000808, "Dictionary", nullptr}, - {0x0100000000000809, "SystemVersion", &SystemVersion}, - {0x010000000000080A, "AvatarImage", nullptr}, - {0x010000000000080B, "LocalNews", nullptr}, - {0x010000000000080C, "Eula", nullptr}, - {0x010000000000080D, "UrlBlackList", nullptr}, - {0x010000000000080E, "TimeZoneBinary", &TimeZoneBinary}, - {0x010000000000080F, "CertStoreCruiser", nullptr}, - {0x0100000000000810, "FontNintendoExtension", &FontNintendoExtension}, - {0x0100000000000811, "FontStandard", &FontStandard}, - {0x0100000000000812, "FontKorean", &FontKorean}, - {0x0100000000000813, "FontChineseTraditional", &FontChineseTraditional}, - {0x0100000000000814, "FontChineseSimple", &FontChineseSimple}, - {0x0100000000000815, "FontBfcpx", nullptr}, - {0x0100000000000816, "SystemUpdate", nullptr}, - {0x0100000000000817, "0100000000000817", nullptr}, - {0x0100000000000818, "FirmwareDebugSettings", nullptr}, - {0x0100000000000819, "BootImagePackage", nullptr}, - {0x010000000000081A, "BootImagePackageSafe", nullptr}, - {0x010000000000081B, "BootImagePackageExFat", nullptr}, - {0x010000000000081C, "BootImagePackageExFatSafe", nullptr}, - {0x010000000000081D, "FatalMessage", nullptr}, - {0x010000000000081E, "ControllerIcon", nullptr}, - {0x010000000000081F, "PlatformConfigIcosa", nullptr}, - {0x0100000000000820, "PlatformConfigCopper", nullptr}, - {0x0100000000000821, "PlatformConfigHoag", nullptr}, - {0x0100000000000822, "ControllerFirmware", nullptr}, - {0x0100000000000823, "NgWord2", &NgWord2}, - {0x0100000000000824, "PlatformConfigIcosaMariko", nullptr}, - {0x0100000000000825, "ApplicationBlackList", nullptr}, - {0x0100000000000826, "RebootlessSystemUpdateVersion", nullptr}, - {0x0100000000000827, "ContentActionTable", nullptr}, -}}; +constexpr inline SystemArchiveDescriptor GetSystemArchive(u64 title_id) { + switch (title_id) { + case 0x0100000000000800: return {"CertStore", nullptr}; + case 0x0100000000000801: return {"ErrorMessage", nullptr}; + case 0x0100000000000802: return {"MiiModel", &MiiModel}; + case 0x0100000000000803: return {"BrowserDll", nullptr}; + case 0x0100000000000804: return {"Help", nullptr}; + case 0x0100000000000805: return {"SharedFont", nullptr}; + case 0x0100000000000806: return {"NgWord", &NgWord1}; + case 0x0100000000000807: return {"SsidList", nullptr}; + case 0x0100000000000808: return {"Dictionary", nullptr}; + case 0x0100000000000809: return {"SystemVersion", &SystemVersion}; + case 0x010000000000080A: return {"AvatarImage", nullptr}; + case 0x010000000000080B: return {"LocalNews", nullptr}; + case 0x010000000000080C: return {"Eula", nullptr}; + case 0x010000000000080D: return {"UrlBlackList", nullptr}; + case 0x010000000000080E: return {"TimeZoneBinary", &TimeZoneBinary}; + case 0x010000000000080F: return {"CertStoreCruiser", nullptr}; + case 0x0100000000000810: return {"FontNintendoExtension", &FontNintendoExtension}; + case 0x0100000000000811: return {"FontStandard", &FontStandard}; + case 0x0100000000000812: return {"FontKorean", &FontKorean}; + case 0x0100000000000813: return {"FontChineseTraditional", &FontChineseTraditional}; + case 0x0100000000000814: return {"FontChineseSimple", &FontChineseSimple}; + case 0x0100000000000815: return {"FontBfcpx", nullptr}; + case 0x0100000000000816: return {"SystemUpdate", nullptr}; + case 0x0100000000000817: return {"0100000000000817", nullptr}; + case 0x0100000000000818: return {"FirmwareDebugSettings", nullptr}; + case 0x0100000000000819: return {"BootImagePackage", nullptr}; + case 0x010000000000081A: return {"BootImagePackageSafe", nullptr}; + case 0x010000000000081B: return {"BootImagePackageExFat", nullptr}; + case 0x010000000000081C: return {"BootImagePackageExFatSafe", nullptr}; + case 0x010000000000081D: return {"FatalMessage", nullptr}; + case 0x010000000000081E: return {"ControllerIcon", nullptr}; + case 0x010000000000081F: return {"PlatformConfigIcosa", nullptr}; + case 0x0100000000000820: return {"PlatformConfigCopper", nullptr}; + case 0x0100000000000821: return {"PlatformConfigHoag", nullptr}; + case 0x0100000000000822: return {"ControllerFirmware", nullptr}; + case 0x0100000000000823: return {"NgWord2", &NgWord2}; + case 0x0100000000000824: return {"PlatformConfigIcosaMariko", nullptr}; + case 0x0100000000000825: return {"ApplicationBlackList", nullptr}; + case 0x0100000000000826: return {"RebootlessSystemUpdateVersion", nullptr}; + case 0x0100000000000827: return {"ContentActionTable", nullptr}; + case 0x0100000000000828: return {"FunctionBlackList", nullptr}; + case 0x0100000000000829: return {"PlatformConfigCalcio", nullptr}; + case 0x0100000000000830: return {"NgWordT", nullptr}; + case 0x0100000000000831: return {"PlatformConfigAula", nullptr}; + case 0x0100000000000832: return {"CradleFirmware", nullptr}; + case 0x0100000000000835: return {"ErrorMessageUtf8", nullptr}; + case 0x0100000000000859: return {"ClientCertData", nullptr}; + case 0x010000000000085C: return {"GameCardConfigurationData", nullptr}; + default: return {nullptr, nullptr}; + } +} VirtualFile SynthesizeSystemArchive(const u64 title_id) { - if (title_id < SYSTEM_ARCHIVES.front().title_id || title_id > SYSTEM_ARCHIVES.back().title_id) { - return nullptr; + auto const desc = GetSystemArchive(title_id); + LOG_INFO(Service_FS, "Synthesizing system archive '{}' (0x{:016X}).", desc.name, title_id); + if (desc.supplier != nullptr) { + if (auto const dir = desc.supplier(); dir != nullptr) { + if (auto const romfs = CreateRomFS(dir); romfs != nullptr) { + LOG_INFO(Service_FS, " - System archive generation successful!"); + return romfs; + } + } } - - const auto& desc = SYSTEM_ARCHIVES[title_id - SYSTEM_ARCHIVE_BASE_TITLE_ID]; - - LOG_INFO(Service_FS, "Synthesizing system archive '{}' (0x{:016X}).", desc.name, desc.title_id); - - if (desc.supplier == nullptr) { - return nullptr; - } - - const auto dir = desc.supplier(); - - if (dir == nullptr) { - return nullptr; - } - - const auto romfs = CreateRomFS(dir); - - if (romfs == nullptr) { - return nullptr; - } - - LOG_INFO(Service_FS, " - System archive generation successful!"); - return romfs; + return nullptr; } } // namespace FileSys::SystemArchive diff --git a/src/core/hle/service/am/frontend/applet_web_browser.cpp b/src/core/hle/service/am/frontend/applet_web_browser.cpp index 92782c58e2..1ddb1ec2a3 100644 --- a/src/core/hle/service/am/frontend/applet_web_browser.cpp +++ b/src/core/hle/service/am/frontend/applet_web_browser.cpp @@ -4,6 +4,7 @@ // SPDX-FileCopyrightText: Copyright 2020 yuzu Emulator Project // SPDX-License-Identifier: GPL-2.0-or-later +#include "applet_web_browser_types.h" #include "common/assert.h" #include "common/fs/file.h" #include "common/fs/fs.h" @@ -370,16 +371,13 @@ void WebBrowser::ExtractOfflineRomFS() { void WebBrowser::WebBrowserExit(WebExitReason exit_reason, std::string last_url) { const bool use_tlv_output = - (web_arg_header.shim_kind == ShimKind::Share && - web_applet_version >= WebAppletVersion::Version196608) || - (web_arg_header.shim_kind == ShimKind::Web && - web_applet_version >= WebAppletVersion::Version524288) || - (web_arg_header.shim_kind == ShimKind::Lhub); + (web_arg_header.shim_kind == ShimKind::Share && web_applet_version >= WebAppletVersion::Version196608) + || (web_arg_header.shim_kind == ShimKind::Web && web_applet_version >= WebAppletVersion::Version524288) + || (web_arg_header.shim_kind == ShimKind::Lhub); // https://switchbrew.org/wiki/Internet_Browser#TLVs if (use_tlv_output) { - LOG_DEBUG(Service_AM, "Using TLV output: exit_reason={}, last_url={}, last_url_size={}", - exit_reason, last_url, last_url.size()); + LOG_DEBUG(Service_AM, "Using TLV output: exit_reason={}, last_url={}, last_url_size={}", exit_reason, last_url, last_url.size()); // storage size for TLVs is 0x2000 bytes (as per switchbrew documentation) constexpr size_t TLV_STORAGE_SIZE = 0x2000; @@ -600,11 +598,14 @@ void WebBrowser::ExecuteShare() { void WebBrowser::ExecuteWeb() { LOG_INFO(Service_AM, "Opening external URL at {}", external_url); - - frontend.OpenExternalWebPage(external_url, - [this](WebExitReason exit_reason, std::string last_url) { - WebBrowserExit(exit_reason, last_url); - }); + frontend.OpenExternalWebPage(external_url, [this](WebExitReason exit_reason, std::string last_url) { + // Offline and web applets must be explicitly exited from because they respect exit state + // Unlike the other web stuffs + if (exit_reason == WebExitReason::ExitRequested || exit_reason == WebExitReason::EndButtonPressed) + exit_reason = (web_arg_header.shim_kind == ShimKind::Web || web_arg_header.shim_kind == ShimKind::Offline) + ? WebExitReason::ExitRequested : WebExitReason::EndButtonPressed; + WebBrowserExit(exit_reason, last_url); + }); } void WebBrowser::ExecuteWifi() { diff --git a/src/core/hle/service/nvdrv/devices/nvhost_as_gpu.cpp b/src/core/hle/service/nvdrv/devices/nvhost_as_gpu.cpp index 6e1ff70f68..df0339ba85 100644 --- a/src/core/hle/service/nvdrv/devices/nvhost_as_gpu.cpp +++ b/src/core/hle/service/nvdrv/devices/nvhost_as_gpu.cpp @@ -10,6 +10,7 @@ #include "common/alignment.h" #include "common/assert.h" +#include "common/common_types.h" #include "common/logging.h" #include "core/core.h" #include "core/hle/service/nvdrv/core/container.h" @@ -130,12 +131,12 @@ NvResult nvhost_as_gpu::AllocAsEx(IoctlAllocAsEx& params) { const auto start_pages{static_cast(vm.va_range_start >> VM::PAGE_SIZE_BITS)}; const auto end_pages{static_cast(vm.va_range_split >> VM::PAGE_SIZE_BITS)}; - vm.small_page_allocator = std::make_shared(start_pages, end_pages); + vm.small_page_allocator.emplace(start_pages, end_pages); const auto start_big_pages{static_cast(vm.va_range_split >> vm.big_page_size_bits)}; const auto end_big_pages{ static_cast((vm.va_range_end - vm.va_range_split) >> vm.big_page_size_bits)}; - vm.big_page_allocator = std::make_unique(start_big_pages, end_big_pages); + vm.big_page_allocator.emplace(start_big_pages, end_big_pages); gmmu = std::make_shared(system, max_big_page_bits, vm.va_range_split, vm.big_page_size_bits, VM::PAGE_SIZE_BITS); @@ -188,8 +189,8 @@ NvResult nvhost_as_gpu::AllocateSpace(IoctlAllocSpace& params) { } allocation_map[params.offset] = { - .size = size, .mappings{}, + .size = size, .page_size = params.page_size, .sparse = (params.flags & MappingFlags::Sparse) != MappingFlags::None, .big_pages = params.page_size != VM::YUZU_PAGESIZE, @@ -199,71 +200,52 @@ NvResult nvhost_as_gpu::AllocateSpace(IoctlAllocSpace& params) { } void nvhost_as_gpu::FreeMappingLocked(u64 offset) { - auto mapping{mapping_map.at(offset)}; - - if (!mapping->fixed) { - auto& allocator{mapping->big_page ? *vm.big_page_allocator : *vm.small_page_allocator}; - u32 page_size_bits{mapping->big_page ? vm.big_page_size_bits : VM::PAGE_SIZE_BITS}; - u32 page_size{mapping->big_page ? vm.big_page_size : VM::YUZU_PAGESIZE}; - u64 aligned_size{Common::AlignUp(mapping->size, page_size)}; - - allocator.Free(static_cast(mapping->offset >> page_size_bits), - static_cast(aligned_size >> page_size_bits)); + auto const it = mapping_map.find(offset); + auto const mapping = it->second; + if (!mapping.fixed) { + auto& allocator{mapping.big_page ? *vm.big_page_allocator : *vm.small_page_allocator}; + u32 page_size_bits{mapping.big_page ? vm.big_page_size_bits : VM::PAGE_SIZE_BITS}; + u32 page_size{mapping.big_page ? vm.big_page_size : VM::YUZU_PAGESIZE}; + u64 aligned_size{Common::AlignUp(mapping.size, page_size)}; + allocator.Free(u32(mapping.offset >> page_size_bits), u32(aligned_size >> page_size_bits)); } - - nvmap.UnpinHandle(mapping->handle); - + nvmap.UnpinHandle(mapping.handle); // Sparse mappings shouldn't be fully unmapped, just returned to their sparse state // Only FreeSpace can unmap them fully - if (mapping->sparse_alloc) { - gmmu->MapSparse(offset, mapping->size, mapping->big_page); + if (mapping.sparse_alloc) { + gmmu->MapSparse(offset, mapping.size, mapping.big_page); } else { - gmmu->Unmap(offset, mapping->size); + gmmu->Unmap(offset, mapping.size); } - - mapping_map.erase(offset); + mapping_map.erase(it); } NvResult nvhost_as_gpu::FreeSpace(IoctlFreeSpace& params) { - LOG_DEBUG(Service_NVDRV, "called, offset={:X}, pages={:X}, page_size={:X}", params.offset, - params.pages, params.page_size); - + LOG_DEBUG(Service_NVDRV, "called, offset={:X}, pages={:X}, page_size={:X}", params.offset, params.pages, params.page_size); std::scoped_lock lock(mutex); - if (!vm.initialised) { return NvResult::BadValue; } - - try { - auto allocation{allocation_map[params.offset]}; - - if (allocation.page_size != params.page_size || - allocation.size != (static_cast(params.pages) * params.page_size)) { + if (auto const it = allocation_map.find(params.offset); it != allocation_map.end()) { + auto const allocation = it->second; + if (allocation.page_size != params.page_size || allocation.size != (u64(params.pages) * params.page_size)) return NvResult::BadValue; - } - for (const auto& mapping : allocation.mappings) { - FreeMappingLocked(mapping->offset); - } + for (const auto mapping_offset : allocation.mappings) + FreeMappingLocked(mapping_offset); // Unset sparse flag if required - if (allocation.sparse) { + if (allocation.sparse) gmmu->Unmap(params.offset, allocation.size); - } - auto& allocator{params.page_size == VM::YUZU_PAGESIZE ? *vm.small_page_allocator - : *vm.big_page_allocator}; - u32 page_size_bits{params.page_size == VM::YUZU_PAGESIZE ? VM::PAGE_SIZE_BITS - : vm.big_page_size_bits}; + auto& allocator{params.page_size == VM::YUZU_PAGESIZE ? *vm.small_page_allocator : *vm.big_page_allocator}; + u32 page_size_bits{params.page_size == VM::YUZU_PAGESIZE ? VM::PAGE_SIZE_BITS : vm.big_page_size_bits}; - allocator.Free(static_cast(params.offset >> page_size_bits), - static_cast(allocation.size >> page_size_bits)); + allocator.Free(u32(params.offset >> page_size_bits), u32(allocation.size >> page_size_bits)); allocation_map.erase(params.offset); - } catch (const std::out_of_range&) { - return NvResult::BadValue; + return NvResult::Success; } - - return NvResult::Success; + return NvResult::BadValue; } NvResult nvhost_as_gpu::Remap(std::span entries) { @@ -327,26 +309,18 @@ NvResult nvhost_as_gpu::MapBufferEx(IoctlMapBufferEx& params) { // Remaps a subregion of an existing mapping to a different PA if ((params.flags & MappingFlags::Remap) != MappingFlags::None) { - try { - auto mapping{mapping_map.at(params.offset)}; - - if (mapping->size < params.mapping_size) { - LOG_WARNING(Service_NVDRV, - "Cannot remap a partially mapped GPU address space region: {:#X}", - params.offset); + if (auto const it = mapping_map.find(params.offset); it != mapping_map.end()) { + auto const mapping = it->second; + if (mapping.size < params.mapping_size) { + LOG_WARNING(Service_NVDRV, "Cannot remap a partially mapped GPU address space region: {:#X}", params.offset); return NvResult::BadValue; } - - u64 gpu_address{static_cast(params.offset + params.buffer_offset)}; - VAddr device_address{mapping->ptr + params.buffer_offset}; - - gmmu->Map(gpu_address, device_address, params.mapping_size, - static_cast(params.kind), mapping->big_page); - + u64 gpu_address = u64(params.offset + params.buffer_offset); + VAddr device_address{mapping.ptr + params.buffer_offset}; + gmmu->Map(gpu_address, device_address, params.mapping_size, Tegra::PTEKind(params.kind), mapping.big_page); return NvResult::Success; - } catch (const std::out_of_range&) { - LOG_WARNING(Service_NVDRV, "Cannot remap an unmapped GPU address space region: {:#X}", - params.offset); + } else { + LOG_WARNING(Service_NVDRV, "Cannot remap an unmapped GPU address space region: {:#X}", params.offset); return NvResult::BadValue; } } @@ -356,8 +330,7 @@ NvResult nvhost_as_gpu::MapBufferEx(IoctlMapBufferEx& params) { return NvResult::BadValue; } - DAddr device_address{ - static_cast(nvmap.PinHandle(params.handle, false) + params.buffer_offset)}; + DAddr device_address = DAddr(nvmap.PinHandle(params.handle, false) + params.buffer_offset); u64 size{params.mapping_size ? params.mapping_size : handle->orig_size}; bool big_page{[&]() { @@ -381,32 +354,22 @@ NvResult nvhost_as_gpu::MapBufferEx(IoctlMapBufferEx& params) { } const bool use_big_pages = alloc->second.big_pages && big_page; - gmmu->Map(params.offset, device_address, size, static_cast(params.kind), - use_big_pages); + gmmu->Map(params.offset, device_address, size, static_cast(params.kind), use_big_pages); - auto mapping{std::make_shared(params.handle, device_address, params.offset, size, - true, use_big_pages, alloc->second.sparse)}; - alloc->second.mappings.push_back(mapping); - mapping_map[params.offset] = mapping; + alloc->second.mappings.push_back(params.offset); + mapping_map.insert_or_assign(params.offset, Mapping(params.handle, device_address, params.offset, size, true, use_big_pages, alloc->second.sparse)); } else { auto& allocator{big_page ? *vm.big_page_allocator : *vm.small_page_allocator}; u32 page_size{big_page ? vm.big_page_size : VM::YUZU_PAGESIZE}; u32 page_size_bits{big_page ? vm.big_page_size_bits : VM::PAGE_SIZE_BITS}; - params.offset = static_cast(allocator.Allocate( - static_cast(Common::AlignUp(size, page_size) >> page_size_bits))) - << page_size_bits; + params.offset = u64(allocator.Allocate(u32(Common::AlignUp(size, page_size) >> page_size_bits))) << page_size_bits; if (!params.offset) { ASSERT_MSG(false, "Failed to allocate free space in the GPU AS!"); return NvResult::InsufficientMemory; } - - gmmu->Map(params.offset, device_address, Common::AlignUp(size, page_size), - static_cast(params.kind), big_page); - - auto mapping{std::make_shared(params.handle, device_address, params.offset, size, - false, big_page, false)}; - mapping_map[params.offset] = mapping; + gmmu->Map(params.offset, device_address, Common::AlignUp(size, page_size), Tegra::PTEKind(params.kind), big_page); + mapping_map.insert_or_assign(params.offset, Mapping(params.handle, device_address, params.offset, size, false, big_page, false)); } map_buffer_offsets.insert(params.offset); @@ -415,37 +378,32 @@ NvResult nvhost_as_gpu::MapBufferEx(IoctlMapBufferEx& params) { } NvResult nvhost_as_gpu::UnmapBuffer(IoctlUnmapBuffer& params) { - if (map_buffer_offsets.find(params.offset) != map_buffer_offsets.end()) { + std::scoped_lock lock(mutex); + if (auto const offset_it = map_buffer_offsets.find(params.offset); offset_it != map_buffer_offsets.end()) { LOG_DEBUG(Service_NVDRV, "called, offset={:#X}", params.offset); - - std::scoped_lock lock(mutex); - if (!vm.initialised) { return NvResult::BadValue; } - auto mapping{mapping_map.at(params.offset)}; - - if (!mapping->fixed) { - auto& allocator{mapping->big_page ? *vm.big_page_allocator : *vm.small_page_allocator}; - u32 page_size_bits{mapping->big_page ? vm.big_page_size_bits : VM::PAGE_SIZE_BITS}; - - allocator.Free(static_cast(mapping->offset >> page_size_bits), - static_cast(mapping->size >> page_size_bits)); + auto const it = mapping_map.find(params.offset); + auto const mapping = it->second; + if (!mapping.fixed) { + auto& allocator{mapping.big_page ? *vm.big_page_allocator : *vm.small_page_allocator}; + u32 page_size_bits{mapping.big_page ? vm.big_page_size_bits : VM::PAGE_SIZE_BITS}; + allocator.Free(u32(mapping.offset >> page_size_bits), u32(mapping.size >> page_size_bits)); } // Sparse mappings shouldn't be fully unmapped, just returned to their sparse state // Only FreeSpace can unmap them fully - if (mapping->sparse_alloc) { - gmmu->MapSparse(params.offset, mapping->size, mapping->big_page); + if (mapping.sparse_alloc) { + gmmu->MapSparse(params.offset, mapping.size, mapping.big_page); } else { - gmmu->Unmap(params.offset, mapping->size); + gmmu->Unmap(params.offset, mapping.size); } - nvmap.UnpinHandle(mapping->handle); - - mapping_map.erase(params.offset); - map_buffer_offsets.erase(params.offset); + nvmap.UnpinHandle(mapping.handle); + mapping_map.erase(it); + map_buffer_offsets.erase(offset_it); } return NvResult::Success; } @@ -478,8 +436,7 @@ void nvhost_as_gpu::GetVARegionsImpl(IoctlGetVaRegions& params) { } NvResult nvhost_as_gpu::GetVARegions1(IoctlGetVaRegions& params) { - LOG_DEBUG(Service_NVDRV, "called, buf_addr={:X}, buf_size={:X}", params.buf_addr, - params.buf_size); + LOG_DEBUG(Service_NVDRV, "called, buf_addr={:X}, buf_size={:X}", params.buf_addr, params.buf_size); std::scoped_lock lock(mutex); diff --git a/src/core/hle/service/nvdrv/devices/nvhost_as_gpu.h b/src/core/hle/service/nvdrv/devices/nvhost_as_gpu.h index 7d50fd4c33..862bdd60bf 100644 --- a/src/core/hle/service/nvdrv/devices/nvhost_as_gpu.h +++ b/src/core/hle/service/nvdrv/devices/nvhost_as_gpu.h @@ -165,35 +165,36 @@ private: NvCore::NvMap& nvmap; struct Mapping { - NvCore::NvMap::Handle::Id handle; DAddr ptr; u64 offset; u64 size; - bool fixed; - bool big_page; // Only valid if fixed == false - bool sparse_alloc; + NvCore::NvMap::Handle::Id handle; + bool fixed : 1; + bool big_page : 1; // Only valid if fixed == false + bool sparse_alloc : 1; - Mapping(NvCore::NvMap::Handle::Id handle_, DAddr ptr_, u64 offset_, u64 size_, bool fixed_, - bool big_page_, bool sparse_alloc_) - : handle(handle_), ptr(ptr_), offset(offset_), size(size_), fixed(fixed_), - big_page(big_page_), sparse_alloc(sparse_alloc_) {} + Mapping(NvCore::NvMap::Handle::Id handle_, DAddr ptr_, u64 offset_, u64 size_, bool fixed_, bool big_page_, bool sparse_alloc_) + : ptr(ptr_), offset(offset_), size(size_), handle(handle_) + , fixed(fixed_), big_page(big_page_), sparse_alloc(sparse_alloc_) + {} }; struct Allocation { + std::vector mappings; u64 size; - std::list> mappings; u32 page_size; bool sparse; bool big_pages; }; - std::map> - mapping_map; //!< This maps the base addresses of mapped buffers to their total sizes and - //!< mapping type, this is needed as what was originally a single buffer may - //!< have been split into multiple GPU side buffers with the remap flag. - std::map allocation_map; //!< Holds allocations created by AllocSpace from - //!< which fixed buffers can be mapped into - std::mutex mutex; //!< Locks all AS operations + //!< This maps the base addresses of mapped buffers to their total sizes and + //!< mapping type, this is needed as what was originally a single buffer may + //!< have been split into multiple GPU side buffers with the remap flag. + std::map mapping_map; + //!< Holds allocations created by AllocSpace from + //!< which fixed buffers can be mapped into + std::map allocation_map; + std::mutex mutex; //!< Locks all AS operations struct VM { static constexpr u32 YUZU_PAGESIZE{0x1000}; @@ -213,9 +214,8 @@ private: using Allocator = Common::FlatAllocator; - std::unique_ptr big_page_allocator; - std::shared_ptr - small_page_allocator; //! Shared as this is also used by nvhost::GpuChannel + std::optional big_page_allocator; + std::optional small_page_allocator; //! Shared as this is also used by nvhost::GpuChannel bool initialised{}; } vm; diff --git a/src/core/hle/service/nvnflinger/buffer_queue_producer.cpp b/src/core/hle/service/nvnflinger/buffer_queue_producer.cpp index 436b0f4b05..bb0433e1d0 100644 --- a/src/core/hle/service/nvnflinger/buffer_queue_producer.cpp +++ b/src/core/hle/service/nvnflinger/buffer_queue_producer.cpp @@ -26,8 +26,11 @@ namespace Service::android { BufferQueueProducer::BufferQueueProducer(Service::KernelHelpers::ServiceContext& service_context_, std::shared_ptr buffer_queue_core_, Service::Nvidia::NvCore::NvMap& nvmap_) - : service_context{service_context_}, core{std::move(buffer_queue_core_)}, slots(core->slots), - clock{Common::CreateOptimalClock()}, nvmap(nvmap_) { + : service_context{service_context_}, core{std::move(buffer_queue_core_)} + , slots(core->slots) + , clock{Common::CreateOptimalClock()} + , nvmap(nvmap_) +{ buffer_wait_event = service_context.CreateEvent("BufferQueue:WaitEvent"); } @@ -485,7 +488,7 @@ Status BufferQueueProducer::QueueBuffer(s32 slot, const QueueBufferInput& input, slots[slot].buffer_state = BufferState::Queued; slots[slot].frame_number = core->frame_counter; slots[slot].queue_time = timestamp; - slots[slot].presentation_time = clock->GetTimeNS().count(); + slots[slot].presentation_time = clock.GetTimeNS().count(); slots[slot].fence = fence; item.slot = slot; diff --git a/src/core/hle/service/nvnflinger/buffer_queue_producer.h b/src/core/hle/service/nvnflinger/buffer_queue_producer.h index 06cb49cbad..51c0801a0a 100644 --- a/src/core/hle/service/nvnflinger/buffer_queue_producer.h +++ b/src/core/hle/service/nvnflinger/buffer_queue_producer.h @@ -89,8 +89,7 @@ private: s32 next_callback_ticket{}; s32 current_callback_ticket{}; std::condition_variable_any callback_condition; - std::unique_ptr clock; - + Common::WallClock clock; Service::Nvidia::NvCore::NvMap& nvmap; }; diff --git a/src/core/hle/service/sockets/sfdnsres.cpp b/src/core/hle/service/sockets/sfdnsres.cpp index f9f0ee56eb..d643d931e2 100644 --- a/src/core/hle/service/sockets/sfdnsres.cpp +++ b/src/core/hle/service/sockets/sfdnsres.cpp @@ -54,13 +54,14 @@ enum class NetDbError : s32 { }; static const constexpr std::array blockedDomains = { - "srv.nintendo.net", //obvious - "phoenix-api.wbagora.com", //hogwarts legacy + "srv.nintendo.net", // Obvious + "phoenix-api.wbagora.com", // Hogwarts legacy "battle.net", - "microsoft.com", //minecraft dungeons + other games + "microsoft.com", // Minecraft dungeons + other games "mojang.com", "xboxlive.com", - "minecraftservices.com" + "minecraftservices.com", + "508223012e5a5ff19f30a391b2bdadc0.my.2k.com", // Civilization 5 }; static bool IsBlockedHost(const std::string& host) { diff --git a/src/core/loader/deconstructed_rom_directory.cpp b/src/core/loader/deconstructed_rom_directory.cpp index 2ea63e137e..afa5cdbc36 100644 --- a/src/core/loader/deconstructed_rom_directory.cpp +++ b/src/core/loader/deconstructed_rom_directory.cpp @@ -228,9 +228,8 @@ AppLoader_DeconstructedRomDirectory::LoadResult AppLoader_DeconstructedRomDirect code_size += patch_ctx.GetTotalPatchSize(); // TODO: this is bad form of ASLR, it sucks - size_t aslr_offset = ((::Settings::values.rng_seed_enabled.GetValue() - ? ::Settings::values.rng_seed.GetValue() - : Common::Random::Random64(0)) * 0x734287f27) & 0xfff000; + std::uintptr_t aslr_offset = ((::Settings::values.rng_seed_enabled.GetValue() + ? ::Settings::values.rng_seed.GetValue() : Common::Random::Random64(0)) << 12) & 0xfff000; // Setup the process code layout if (process.LoadFromMetadata(metadata, code_size, fastmem_base, aslr_offset, is_hbl).IsError()) { diff --git a/src/core/loader/kip.cpp b/src/core/loader/kip.cpp index 81449ac8b8..978ffed2b9 100644 --- a/src/core/loader/kip.cpp +++ b/src/core/loader/kip.cpp @@ -89,9 +89,8 @@ AppLoader::LoadResult AppLoader_KIP::Load(Kernel::KProcess& process, codeset.DataSegment().size += kip->GetBSSSize(); // TODO: this is bad form of ASLR, it sucks - size_t aslr_offset = ((::Settings::values.rng_seed_enabled.GetValue() - ? ::Settings::values.rng_seed.GetValue() - : Common::Random::Random64(0)) * 0x734287f27) & 0xfff000; + std::uintptr_t aslr_offset = ((::Settings::values.rng_seed_enabled.GetValue() + ? ::Settings::values.rng_seed.GetValue() : Common::Random::Random64(0)) << 12) & 0xfff000; // Setup the process code layout if (process.LoadFromMetadata(FileSys::ProgramMetadata::GetDefault(), codeset.memory.size(), 0, aslr_offset, false).IsError()) { diff --git a/src/core/loader/nro.cpp b/src/core/loader/nro.cpp index e7c5ac01b1..738d805149 100644 --- a/src/core/loader/nro.cpp +++ b/src/core/loader/nro.cpp @@ -242,9 +242,8 @@ static bool LoadNroImpl(Core::System& system, Kernel::KProcess& process, }(); // TODO: this is bad form of ASLR, it sucks - size_t aslr_offset = ((::Settings::values.rng_seed_enabled.GetValue() - ? ::Settings::values.rng_seed.GetValue() - : Common::Random::Random64(0)) * 0x734287f27) & 0xfff000; + std::uintptr_t aslr_offset = ((::Settings::values.rng_seed_enabled.GetValue() + ? ::Settings::values.rng_seed.GetValue() : Common::Random::Random64(0)) << 12) & 0xfff000; // Setup the process code layout if (process diff --git a/src/dynarmic/src/dynarmic/CMakeLists.txt b/src/dynarmic/src/dynarmic/CMakeLists.txt index c51a660c03..484e41b60a 100644 --- a/src/dynarmic/src/dynarmic/CMakeLists.txt +++ b/src/dynarmic/src/dynarmic/CMakeLists.txt @@ -169,8 +169,6 @@ if ("x86_64" IN_LIST ARCHITECTURE) backend/x64/emit_x64_vector.cpp backend/x64/emit_x64_vector_floating_point.cpp backend/x64/emit_x64_vector_saturation.cpp - backend/x64/exclusive_monitor.cpp - backend/x64/exclusive_monitor_friend.h backend/x64/host_feature.h backend/x64/hostloc.h backend/x64/jitstate_info.h @@ -231,7 +229,6 @@ if ("arm64" IN_LIST ARCHITECTURE) backend/arm64/emit_arm64_vector_floating_point.cpp backend/arm64/emit_arm64_vector_saturation.cpp backend/arm64/emit_context.h - backend/arm64/exclusive_monitor.cpp backend/arm64/fastmem.h backend/arm64/fpsr_manager.cpp backend/arm64/fpsr_manager.h @@ -278,7 +275,6 @@ if ("riscv64" IN_LIST ARCHITECTURE) backend/riscv64/emit_riscv64_vector.cpp backend/riscv64/emit_riscv64.cpp backend/riscv64/emit_riscv64.h - backend/riscv64/exclusive_monitor.cpp backend/riscv64/reg_alloc.cpp backend/riscv64/reg_alloc.h backend/riscv64/stack_layout.h @@ -367,7 +363,6 @@ if (BOOST_NO_HEADERS) else() target_link_libraries(dynarmic PRIVATE Boost::headers) endif() - if (DYNARMIC_USE_LLVM) target_include_directories(dynarmic PRIVATE ${LLVM_INCLUDE_DIRS}) target_compile_definitions(dynarmic PRIVATE DYNARMIC_USE_LLVM=1 ${LLVM_DEFINITIONS}) @@ -385,4 +380,7 @@ endif() if (CMAKE_SYSTEM_NAME STREQUAL "Windows") target_compile_definitions(dynarmic PRIVATE FMT_USE_WINDOWS_H=0) endif() +if (NOT DEFINED xbyak_ADDED) + target_compile_definitions(dynarmic PRIVATE XBYAK_BUNDLED=1) +endif() target_compile_definitions(dynarmic PRIVATE FMT_USE_USER_DEFINED_LITERALS=1) diff --git a/src/dynarmic/src/dynarmic/backend/arm64/a64_address_space.cpp b/src/dynarmic/src/dynarmic/backend/arm64/a64_address_space.cpp index 2c71ffe282..74451f19a8 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/a64_address_space.cpp +++ b/src/dynarmic/src/dynarmic/backend/arm64/a64_address_space.cpp @@ -135,12 +135,9 @@ static void* EmitExclusiveWriteCallTrampoline(oaknut::CodeGenerator& code, const oaknut::Label l_addr, l_this; auto fn = [](const A64::UserConfig& conf, A64::VAddr vaddr, T value) -> u32 { - return conf.global_monitor->DoExclusiveOperation(conf.processor_id, vaddr, - [&](T expected) -> bool { - return (conf.callbacks->*callback)(vaddr, value, expected); - }) - ? 0 - : 1; + return conf.global_monitor->DoExclusiveOperation(conf.processor_id, vaddr, [&](T expected) -> bool { + return (conf.callbacks->*callback)(vaddr, value, expected); + }) ? 0 : 1; }; void* target = code.xptr(); @@ -300,12 +297,9 @@ static void* EmitExclusiveWrite128CallTrampoline(oaknut::CodeGenerator& code, co oaknut::Label l_addr, l_this; auto fn = [](const A64::UserConfig& conf, A64::VAddr vaddr, Vector value) -> u32 { - return conf.global_monitor->DoExclusiveOperation(conf.processor_id, vaddr, - [&](Vector expected) -> bool { - return conf.callbacks->MemoryWriteExclusive128(vaddr, value, expected); - }) - ? 0 - : 1; + return conf.global_monitor->DoExclusiveOperation(conf.processor_id, vaddr, [&](Vector expected) -> bool { + return conf.callbacks->MemoryWriteExclusive128(vaddr, value, expected); + }) ? 0 : 1; }; void* target = code.xptr(); diff --git a/src/dynarmic/src/dynarmic/backend/arm64/exclusive_monitor.cpp b/src/dynarmic/src/dynarmic/backend/arm64/exclusive_monitor.cpp deleted file mode 100644 index d9bc9b2395..0000000000 --- a/src/dynarmic/src/dynarmic/backend/arm64/exclusive_monitor.cpp +++ /dev/null @@ -1,61 +0,0 @@ -// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project -// SPDX-License-Identifier: GPL-3.0-or-later - -/* This file is part of the dynarmic project. - * Copyright (c) 2022 MerryMage - * SPDX-License-Identifier: 0BSD - */ - -#include "dynarmic/interface/exclusive_monitor.h" - -#include - -#include "common/assert.h" - -namespace Dynarmic { - -ExclusiveMonitor::ExclusiveMonitor(std::size_t processor_count) - : exclusive_addresses(processor_count, INVALID_EXCLUSIVE_ADDRESS), exclusive_values(processor_count) {} - -size_t ExclusiveMonitor::GetProcessorCount() const { - return exclusive_addresses.size(); -} - -void ExclusiveMonitor::Lock() { - lock.Lock(); -} - -void ExclusiveMonitor::Unlock() { - lock.Unlock(); -} - -bool ExclusiveMonitor::CheckAndClear(std::size_t processor_id, VAddr address) { - const VAddr masked_address = address & RESERVATION_GRANULE_MASK; - - Lock(); - if (exclusive_addresses[processor_id] != masked_address) { - Unlock(); - return false; - } - - for (VAddr& other_address : exclusive_addresses) { - if (other_address == masked_address) { - other_address = INVALID_EXCLUSIVE_ADDRESS; - } - } - return true; -} - -void ExclusiveMonitor::Clear() { - Lock(); - std::fill(exclusive_addresses.begin(), exclusive_addresses.end(), INVALID_EXCLUSIVE_ADDRESS); - Unlock(); -} - -void ExclusiveMonitor::ClearProcessor(std::size_t processor_id) { - Lock(); - exclusive_addresses[processor_id] = INVALID_EXCLUSIVE_ADDRESS; - Unlock(); -} - -} // namespace Dynarmic diff --git a/src/dynarmic/src/dynarmic/backend/riscv64/exclusive_monitor.cpp b/src/dynarmic/src/dynarmic/backend/riscv64/exclusive_monitor.cpp deleted file mode 100644 index b3585c64ea..0000000000 --- a/src/dynarmic/src/dynarmic/backend/riscv64/exclusive_monitor.cpp +++ /dev/null @@ -1,54 +0,0 @@ -// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project -// SPDX-License-Identifier: GPL-3.0-or-later - -#include "dynarmic/interface/exclusive_monitor.h" - -#include - -namespace Dynarmic { - -ExclusiveMonitor::ExclusiveMonitor(std::size_t processor_count) - : exclusive_addresses(processor_count, INVALID_EXCLUSIVE_ADDRESS), exclusive_values(processor_count) {} - -size_t ExclusiveMonitor::GetProcessorCount() const { - return exclusive_addresses.size(); -} - -void ExclusiveMonitor::Lock() { - lock.Lock(); -} - -void ExclusiveMonitor::Unlock() { - lock.Unlock(); -} - -bool ExclusiveMonitor::CheckAndClear(size_t processor_id, VAddr address) { - const VAddr masked_address = address & RESERVATION_GRANULE_MASK; - - Lock(); - if (exclusive_addresses[processor_id] != masked_address) { - Unlock(); - return false; - } - - for (VAddr& other_address : exclusive_addresses) { - if (other_address == masked_address) { - other_address = INVALID_EXCLUSIVE_ADDRESS; - } - } - return true; -} - -void ExclusiveMonitor::Clear() { - Lock(); - std::fill(exclusive_addresses.begin(), exclusive_addresses.end(), INVALID_EXCLUSIVE_ADDRESS); - Unlock(); -} - -void ExclusiveMonitor::ClearProcessor(size_t processor_id) { - Lock(); - exclusive_addresses[processor_id] = INVALID_EXCLUSIVE_ADDRESS; - Unlock(); -} - -} // namespace Dynarmic diff --git a/src/dynarmic/src/dynarmic/backend/x64/a32_emit_x64_memory.cpp b/src/dynarmic/src/dynarmic/backend/x64/a32_emit_x64_memory.cpp index f138b5f137..c72d669b5b 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/a32_emit_x64_memory.cpp +++ b/src/dynarmic/src/dynarmic/backend/x64/a32_emit_x64_memory.cpp @@ -20,7 +20,7 @@ #include "dynarmic/backend/x64/abi.h" #include "dynarmic/backend/x64/devirtualize.h" #include "dynarmic/backend/x64/emit_x64_memory.h" -#include "dynarmic/backend/x64/exclusive_monitor_friend.h" +#include "dynarmic/interface/exclusive_monitor.h" #include "dynarmic/backend/x64/perf_map.h" #include "dynarmic/interface/exclusive_monitor.h" @@ -174,67 +174,35 @@ void A32EmitX64::EmitA32ClearExclusive(A32EmitContext&, IR::Inst*) { } void A32EmitX64::EmitA32ExclusiveReadMemory8(A32EmitContext& ctx, IR::Inst* inst) { - if (conf.fastmem_exclusive_access) { - EmitExclusiveReadMemoryInline<8, &A32::UserCallbacks::MemoryRead8>(ctx, inst); - } else { - EmitExclusiveReadMemory<8, &A32::UserCallbacks::MemoryRead8>(ctx, inst); - } + EmitExclusiveReadMemoryInline<8, &A32::UserCallbacks::MemoryRead8>(ctx, inst); } void A32EmitX64::EmitA32ExclusiveReadMemory16(A32EmitContext& ctx, IR::Inst* inst) { - if (conf.fastmem_exclusive_access) { - EmitExclusiveReadMemoryInline<16, &A32::UserCallbacks::MemoryRead16>(ctx, inst); - } else { - EmitExclusiveReadMemory<16, &A32::UserCallbacks::MemoryRead16>(ctx, inst); - } + EmitExclusiveReadMemoryInline<16, &A32::UserCallbacks::MemoryRead16>(ctx, inst); } void A32EmitX64::EmitA32ExclusiveReadMemory32(A32EmitContext& ctx, IR::Inst* inst) { - if (conf.fastmem_exclusive_access) { - EmitExclusiveReadMemoryInline<32, &A32::UserCallbacks::MemoryRead32>(ctx, inst); - } else { - EmitExclusiveReadMemory<32, &A32::UserCallbacks::MemoryRead32>(ctx, inst); - } + EmitExclusiveReadMemoryInline<32, &A32::UserCallbacks::MemoryRead32>(ctx, inst); } void A32EmitX64::EmitA32ExclusiveReadMemory64(A32EmitContext& ctx, IR::Inst* inst) { - if (conf.fastmem_exclusive_access) { - EmitExclusiveReadMemoryInline<64, &A32::UserCallbacks::MemoryRead64>(ctx, inst); - } else { - EmitExclusiveReadMemory<64, &A32::UserCallbacks::MemoryRead64>(ctx, inst); - } + EmitExclusiveReadMemoryInline<64, &A32::UserCallbacks::MemoryRead64>(ctx, inst); } void A32EmitX64::EmitA32ExclusiveWriteMemory8(A32EmitContext& ctx, IR::Inst* inst) { - if (conf.fastmem_exclusive_access) { - EmitExclusiveWriteMemoryInline<8, &A32::UserCallbacks::MemoryWriteExclusive8>(ctx, inst); - } else { - EmitExclusiveWriteMemory<8, &A32::UserCallbacks::MemoryWriteExclusive8>(ctx, inst); - } + EmitExclusiveWriteMemoryInline<8, &A32::UserCallbacks::MemoryWriteExclusive8>(ctx, inst); } void A32EmitX64::EmitA32ExclusiveWriteMemory16(A32EmitContext& ctx, IR::Inst* inst) { - if (conf.fastmem_exclusive_access) { - EmitExclusiveWriteMemoryInline<16, &A32::UserCallbacks::MemoryWriteExclusive16>(ctx, inst); - } else { - EmitExclusiveWriteMemory<16, &A32::UserCallbacks::MemoryWriteExclusive16>(ctx, inst); - } + EmitExclusiveWriteMemoryInline<16, &A32::UserCallbacks::MemoryWriteExclusive16>(ctx, inst); } void A32EmitX64::EmitA32ExclusiveWriteMemory32(A32EmitContext& ctx, IR::Inst* inst) { - if (conf.fastmem_exclusive_access) { - EmitExclusiveWriteMemoryInline<32, &A32::UserCallbacks::MemoryWriteExclusive32>(ctx, inst); - } else { - EmitExclusiveWriteMemory<32, &A32::UserCallbacks::MemoryWriteExclusive32>(ctx, inst); - } + EmitExclusiveWriteMemoryInline<32, &A32::UserCallbacks::MemoryWriteExclusive32>(ctx, inst); } void A32EmitX64::EmitA32ExclusiveWriteMemory64(A32EmitContext& ctx, IR::Inst* inst) { - if (conf.fastmem_exclusive_access) { - EmitExclusiveWriteMemoryInline<64, &A32::UserCallbacks::MemoryWriteExclusive64>(ctx, inst); - } else { - EmitExclusiveWriteMemory<64, &A32::UserCallbacks::MemoryWriteExclusive64>(ctx, inst); - } + EmitExclusiveWriteMemoryInline<64, &A32::UserCallbacks::MemoryWriteExclusive64>(ctx, inst); } void A32EmitX64::EmitCheckMemoryAbort(A32EmitContext& ctx, IR::Inst* inst, Xbyak::Label* end) { diff --git a/src/dynarmic/src/dynarmic/backend/x64/a64_emit_x64_memory.cpp b/src/dynarmic/src/dynarmic/backend/x64/a64_emit_x64_memory.cpp index 4b7054b4b2..1070ee8d7e 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/a64_emit_x64_memory.cpp +++ b/src/dynarmic/src/dynarmic/backend/x64/a64_emit_x64_memory.cpp @@ -20,7 +20,7 @@ #include "dynarmic/backend/x64/abi.h" #include "dynarmic/backend/x64/devirtualize.h" #include "dynarmic/backend/x64/emit_x64_memory.h" -#include "dynarmic/backend/x64/exclusive_monitor_friend.h" +#include "dynarmic/interface/exclusive_monitor.h" #include "dynarmic/backend/x64/perf_map.h" #include "dynarmic/common/spin_lock_x64.h" #include "dynarmic/interface/exclusive_monitor.h" @@ -330,83 +330,43 @@ void A64EmitX64::EmitA64ClearExclusive(A64EmitContext&, IR::Inst*) { } void A64EmitX64::EmitA64ExclusiveReadMemory8(A64EmitContext& ctx, IR::Inst* inst) { - if (conf.fastmem_exclusive_access) { - EmitExclusiveReadMemoryInline<8, &A64::UserCallbacks::MemoryRead8>(ctx, inst); - } else { - EmitExclusiveReadMemory<8, &A64::UserCallbacks::MemoryRead8>(ctx, inst); - } + EmitExclusiveReadMemoryInline<8, &A64::UserCallbacks::MemoryRead8>(ctx, inst); } void A64EmitX64::EmitA64ExclusiveReadMemory16(A64EmitContext& ctx, IR::Inst* inst) { - if (conf.fastmem_exclusive_access) { - EmitExclusiveReadMemoryInline<16, &A64::UserCallbacks::MemoryRead16>(ctx, inst); - } else { - EmitExclusiveReadMemory<16, &A64::UserCallbacks::MemoryRead16>(ctx, inst); - } + EmitExclusiveReadMemoryInline<16, &A64::UserCallbacks::MemoryRead16>(ctx, inst); } void A64EmitX64::EmitA64ExclusiveReadMemory32(A64EmitContext& ctx, IR::Inst* inst) { - if (conf.fastmem_exclusive_access) { - EmitExclusiveReadMemoryInline<32, &A64::UserCallbacks::MemoryRead32>(ctx, inst); - } else { - EmitExclusiveReadMemory<32, &A64::UserCallbacks::MemoryRead32>(ctx, inst); - } + EmitExclusiveReadMemoryInline<32, &A64::UserCallbacks::MemoryRead32>(ctx, inst); } void A64EmitX64::EmitA64ExclusiveReadMemory64(A64EmitContext& ctx, IR::Inst* inst) { - if (conf.fastmem_exclusive_access) { - EmitExclusiveReadMemoryInline<64, &A64::UserCallbacks::MemoryRead64>(ctx, inst); - } else { - EmitExclusiveReadMemory<64, &A64::UserCallbacks::MemoryRead64>(ctx, inst); - } + EmitExclusiveReadMemoryInline<64, &A64::UserCallbacks::MemoryRead64>(ctx, inst); } void A64EmitX64::EmitA64ExclusiveReadMemory128(A64EmitContext& ctx, IR::Inst* inst) { - if (conf.fastmem_exclusive_access) { - EmitExclusiveReadMemoryInline<128, &A64::UserCallbacks::MemoryRead128>(ctx, inst); - } else { - EmitExclusiveReadMemory<128, &A64::UserCallbacks::MemoryRead128>(ctx, inst); - } + EmitExclusiveReadMemoryInline<128, &A64::UserCallbacks::MemoryRead128>(ctx, inst); } void A64EmitX64::EmitA64ExclusiveWriteMemory8(A64EmitContext& ctx, IR::Inst* inst) { - if (conf.fastmem_exclusive_access) { - EmitExclusiveWriteMemoryInline<8, &A64::UserCallbacks::MemoryWriteExclusive8>(ctx, inst); - } else { - EmitExclusiveWriteMemory<8, &A64::UserCallbacks::MemoryWriteExclusive8>(ctx, inst); - } + EmitExclusiveWriteMemoryInline<8, &A64::UserCallbacks::MemoryWriteExclusive8>(ctx, inst); } void A64EmitX64::EmitA64ExclusiveWriteMemory16(A64EmitContext& ctx, IR::Inst* inst) { - if (conf.fastmem_exclusive_access) { - EmitExclusiveWriteMemoryInline<16, &A64::UserCallbacks::MemoryWriteExclusive16>(ctx, inst); - } else { - EmitExclusiveWriteMemory<16, &A64::UserCallbacks::MemoryWriteExclusive16>(ctx, inst); - } + EmitExclusiveWriteMemoryInline<16, &A64::UserCallbacks::MemoryWriteExclusive16>(ctx, inst); } void A64EmitX64::EmitA64ExclusiveWriteMemory32(A64EmitContext& ctx, IR::Inst* inst) { - if (conf.fastmem_exclusive_access) { - EmitExclusiveWriteMemoryInline<32, &A64::UserCallbacks::MemoryWriteExclusive32>(ctx, inst); - } else { - EmitExclusiveWriteMemory<32, &A64::UserCallbacks::MemoryWriteExclusive32>(ctx, inst); - } + EmitExclusiveWriteMemoryInline<32, &A64::UserCallbacks::MemoryWriteExclusive32>(ctx, inst); } void A64EmitX64::EmitA64ExclusiveWriteMemory64(A64EmitContext& ctx, IR::Inst* inst) { - if (conf.fastmem_exclusive_access) { - EmitExclusiveWriteMemoryInline<64, &A64::UserCallbacks::MemoryWriteExclusive64>(ctx, inst); - } else { - EmitExclusiveWriteMemory<64, &A64::UserCallbacks::MemoryWriteExclusive64>(ctx, inst); - } + EmitExclusiveWriteMemoryInline<64, &A64::UserCallbacks::MemoryWriteExclusive64>(ctx, inst); } void A64EmitX64::EmitA64ExclusiveWriteMemory128(A64EmitContext& ctx, IR::Inst* inst) { - if (conf.fastmem_exclusive_access) { - EmitExclusiveWriteMemoryInline<128, &A64::UserCallbacks::MemoryWriteExclusive128>(ctx, inst); - } else { - EmitExclusiveWriteMemory<128, &A64::UserCallbacks::MemoryWriteExclusive128>(ctx, inst); - } + EmitExclusiveWriteMemoryInline<128, &A64::UserCallbacks::MemoryWriteExclusive128>(ctx, inst); } void A64EmitX64::EmitCheckMemoryAbort(A64EmitContext&, IR::Inst* inst, Xbyak::Label* end) { diff --git a/src/dynarmic/src/dynarmic/backend/x64/block_of_code.cpp b/src/dynarmic/src/dynarmic/backend/x64/block_of_code.cpp index f41bea6c83..18bd6a8c18 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/block_of_code.cpp +++ b/src/dynarmic/src/dynarmic/backend/x64/block_of_code.cpp @@ -519,10 +519,6 @@ void BlockOfCode::LoadRequiredFlagsForCondFromRax(IR::Cond cond) { } } -Xbyak::Address BlockOfCode::Const(const Xbyak::AddressFrame& frame, u64 lower, u64 upper) { - return constant_pool.GetConstant(frame, lower, upper); -} - CodePtr BlockOfCode::GetCodeBegin() const { return code_begin; } diff --git a/src/dynarmic/src/dynarmic/backend/x64/block_of_code.h b/src/dynarmic/src/dynarmic/backend/x64/block_of_code.h index 857b1a4484..f347e8723a 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/block_of_code.h +++ b/src/dynarmic/src/dynarmic/backend/x64/block_of_code.h @@ -24,6 +24,7 @@ #include "dynarmic/common/cast_util.h" #include "dynarmic/interface/halt_reason.h" #include "dynarmic/ir/cond.h" +#include "xbyak/xbyak.h" namespace Dynarmic::Backend::X64 { @@ -101,8 +102,8 @@ public: } /// Code emitter: Calls the lambda. Lambda must not have any captures. - template - void CallLambda(Lambda l) { + template + void CallLambda(F l) { CallFunction(Common::FptrCast(l)); } @@ -124,22 +125,35 @@ public: } } - Xbyak::Address Const(const Xbyak::AddressFrame& frame, u64 lower, u64 upper = 0); - - template - Xbyak::Address BConst(const Xbyak::AddressFrame& frame, u64 value) { - return Const(frame, mcl::bit::replicate_element(esize, value), - mcl::bit::replicate_element(esize, value)); + // Xbyak benefits slightly from not having & references on some of its ctors, however one main + // disadvantage is that this breaks ABI slightly because we need to hijack the main privated ctor, hence + // we define two paths, one for gentoo (non bundled) and one for our custom bundled set with patch +#ifdef XBYAK_BUNDLED + [[nodiscard]] Xbyak::Address Const(const Xbyak::AddressFrame frame, u64 lower, u64 upper = 0) { + return constant_pool.GetConstant(Xbyak::AddressFrame(frame.bit_, frame.broadcast_), lower, upper); } + template + [[nodiscard]] Xbyak::Address BConst(const Xbyak::AddressFrame frame, u64 value) { + return Const(Xbyak::AddressFrame(frame.bit_, frame.broadcast_), mcl::bit::replicate_element(esize, value), mcl::bit::replicate_element(esize, value)); + } +#else + [[nodiscard]] Xbyak::Address Const(const Xbyak::AddressFrame& frame, u64 lower, u64 upper = 0) { + return constant_pool.GetConstant(frame, lower, upper); + } + template + [[nodiscard]] Xbyak::Address BConst(const Xbyak::AddressFrame& frame, u64 value) { + return Const(frame, mcl::bit::replicate_element(esize, value), mcl::bit::replicate_element(esize, value)); + } +#endif CodePtr GetCodeBegin() const; size_t GetTotalCodeSize() const; - const void* GetReturnFromRunCodeAddress() const { + [[nodiscard]] const void* GetReturnFromRunCodeAddress() const { return return_from_run_code[0]; } - const void* GetForceReturnFromRunCodeAddress() const { + [[nodiscard]] const void* GetForceReturnFromRunCodeAddress() const { return return_from_run_code[FORCE_RETURN]; } diff --git a/src/dynarmic/src/dynarmic/backend/x64/constant_pool.cpp b/src/dynarmic/src/dynarmic/backend/x64/constant_pool.cpp index 127149a29e..cc802c744c 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/constant_pool.cpp +++ b/src/dynarmic/src/dynarmic/backend/x64/constant_pool.cpp @@ -25,7 +25,11 @@ ConstantPool::ConstantPool(BlockOfCode& code, size_t size) reinterpret_cast(code.AllocateFromCodeSpace(size)), size / align_size); } +#ifdef XBYAK_BUNDLED +Xbyak::Address ConstantPool::GetConstant(const Xbyak::AddressFrame frame, u64 lower, u64 upper) { +#else Xbyak::Address ConstantPool::GetConstant(const Xbyak::AddressFrame& frame, u64 lower, u64 upper) { +#endif const auto constant = ConstantT(lower, upper); auto iter = constant_info.find(constant); if (iter == constant_info.end()) { diff --git a/src/dynarmic/src/dynarmic/backend/x64/constant_pool.h b/src/dynarmic/src/dynarmic/backend/x64/constant_pool.h index 79e57fc78c..51ac3205d2 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/constant_pool.h +++ b/src/dynarmic/src/dynarmic/backend/x64/constant_pool.h @@ -29,7 +29,11 @@ class ConstantPool final { public: ConstantPool(BlockOfCode& code, size_t size); +#ifdef XBYAK_BUNDLED + Xbyak::Address GetConstant(const Xbyak::AddressFrame frame, u64 lower, u64 upper = 0); +#else Xbyak::Address GetConstant(const Xbyak::AddressFrame& frame, u64 lower, u64 upper = 0); +#endif private: static constexpr size_t align_size = 16; // bytes diff --git a/src/dynarmic/src/dynarmic/backend/x64/emit_x64_memory.cpp.inc b/src/dynarmic/src/dynarmic/backend/x64/emit_x64_memory.cpp.inc index 4fa14d504b..ec3e14ee0e 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/emit_x64_memory.cpp.inc +++ b/src/dynarmic/src/dynarmic/backend/x64/emit_x64_memory.cpp.inc @@ -230,12 +230,11 @@ void AxxEmitX64::EmitExclusiveReadMemory(AxxEmitContext& ctx, IR::Inst* inst) { if (ordered) { code.mfence(); } - code.CallLambda( - [](AxxUserConfig& conf, Axx::VAddr vaddr) -> T { - return conf.global_monitor->ReadAndMark(conf.processor_id, vaddr, [&]() -> T { - return (conf.callbacks->*callback)(vaddr); - }); + code.CallLambda([](AxxUserConfig& conf, Axx::VAddr vaddr) -> T { + return conf.global_monitor->ReadAndMark(conf.processor_id, vaddr, [&]() -> T { + return (conf.callbacks->*callback)(vaddr); }); + }); code.ZeroExtendFrom(bitsize, code.ABI_RETURN); } else { const Xbyak::Xmm result = ctx.reg_alloc.ScratchXmm(code); @@ -250,12 +249,11 @@ void AxxEmitX64::EmitExclusiveReadMemory(AxxEmitContext& ctx, IR::Inst* inst) { if (ordered) { code.mfence(); } - code.CallLambda( - [](AxxUserConfig& conf, Axx::VAddr vaddr, Vector& ret) { - ret = conf.global_monitor->ReadAndMark(conf.processor_id, vaddr, [&]() -> Vector { - return (conf.callbacks->*callback)(vaddr); - }); + code.CallLambda([](AxxUserConfig& conf, Axx::VAddr vaddr, Vector& ret) { + ret = conf.global_monitor->ReadAndMark(conf.processor_id, vaddr, [&]() -> Vector { + return (conf.callbacks->*callback)(vaddr); }); + }); code.movups(result, xword[rsp + ABI_SHADOW_SPACE]); ctx.reg_alloc.ReleaseStackSpace(code, 16 + ABI_SHADOW_SPACE); @@ -320,11 +318,12 @@ void AxxEmitX64::EmitExclusiveWriteMemory(AxxEmitContext& ctx, IR::Inst* inst) { template void AxxEmitX64::EmitExclusiveReadMemoryInline(AxxEmitContext& ctx, IR::Inst* inst) { - ASSERT(conf.global_monitor && conf.fastmem_pointer); - if (!exception_handler.SupportsFastmem()) { + ASSERT(conf.global_monitor); + if (!conf.fastmem_exclusive_access || !exception_handler.SupportsFastmem()) { EmitExclusiveReadMemory(ctx, inst); return; } + ASSERT(conf.fastmem_pointer); auto args = ctx.reg_alloc.GetArgumentInfo(inst); constexpr bool ordered = true; @@ -344,10 +343,10 @@ void AxxEmitX64::EmitExclusiveReadMemoryInline(AxxEmitContext& ctx, IR::Inst* in const auto wrapped_fn = read_fallbacks[std::make_tuple(ordered, bitsize, vaddr.getIdx(), value_idx)]; - EmitExclusiveLock(code, conf, tmp, tmp2.cvt32()); + EmitExclusiveLock(code, conf, tmp2.cvt32()); code.mov(code.byte[code.ABI_JIT_PTR + offsetof(AxxJitState, exclusive_state)], u8(1)); - code.mov(tmp, std::bit_cast(GetExclusiveMonitorAddressPointer(conf.global_monitor, conf.processor_id))); + code.mov(tmp, std::bit_cast(conf.global_monitor->exclusive_addresses.data() + conf.processor_id)); code.mov(qword[tmp], vaddr); const auto fastmem_marker = ShouldFastmem(ctx, inst); @@ -381,10 +380,10 @@ void AxxEmitX64::EmitExclusiveReadMemoryInline(AxxEmitContext& ctx, IR::Inst* in code.call(wrapped_fn); } - code.mov(tmp, std::bit_cast(GetExclusiveMonitorValuePointer(conf.global_monitor, conf.processor_id))); + code.mov(tmp, std::bit_cast(conf.global_monitor->exclusive_values.data() + conf.processor_id)); EmitWriteMemoryMov(code, tmp, value_idx, false); - EmitExclusiveUnlock(code, conf, tmp, tmp2.cvt32()); + EmitExclusiveUnlock(code, conf, tmp2.cvt32()); if constexpr (bitsize == 128) { ctx.reg_alloc.DefineValue(code, inst, Xbyak::Xmm{value_idx}); @@ -397,11 +396,12 @@ void AxxEmitX64::EmitExclusiveReadMemoryInline(AxxEmitContext& ctx, IR::Inst* in template void AxxEmitX64::EmitExclusiveWriteMemoryInline(AxxEmitContext& ctx, IR::Inst* inst) { - ASSERT(conf.global_monitor && conf.fastmem_pointer); - if (!exception_handler.SupportsFastmem()) { + ASSERT(conf.global_monitor); + if (!conf.fastmem_exclusive_access || !exception_handler.SupportsFastmem()) { EmitExclusiveWriteMemory(ctx, inst); return; } + ASSERT(conf.fastmem_pointer); auto args = ctx.reg_alloc.GetArgumentInfo(inst); constexpr bool ordered = true; @@ -425,7 +425,7 @@ void AxxEmitX64::EmitExclusiveWriteMemoryInline(AxxEmitContext& ctx, IR::Inst* i const auto wrapped_fn = exclusive_write_fallbacks[std::make_tuple(ordered, bitsize, vaddr.getIdx(), value.getIdx())]; - EmitExclusiveLock(code, conf, tmp, tmp2.cvt32()); + EmitExclusiveLock(code, conf, tmp2.cvt32()); SharedLabel end = ctx.GenSharedLabel(); @@ -433,14 +433,14 @@ void AxxEmitX64::EmitExclusiveWriteMemoryInline(AxxEmitContext& ctx, IR::Inst* i code.movzx(tmp.cvt32(), code.byte[code.ABI_JIT_PTR + offsetof(AxxJitState, exclusive_state)]); code.test(tmp.cvt8(), tmp.cvt8()); code.je(*end, code.T_NEAR); - code.mov(tmp, std::bit_cast(GetExclusiveMonitorAddressPointer(conf.global_monitor, conf.processor_id))); + code.mov(tmp, std::bit_cast(conf.global_monitor->exclusive_addresses.data() + conf.processor_id)); code.cmp(qword[tmp], vaddr); code.jne(*end, code.T_NEAR); EmitExclusiveTestAndClear(code, conf, vaddr, tmp, rax); code.mov(code.byte[code.ABI_JIT_PTR + offsetof(AxxJitState, exclusive_state)], u8(0)); - code.mov(tmp, std::bit_cast(GetExclusiveMonitorValuePointer(conf.global_monitor, conf.processor_id))); + code.mov(tmp, std::bit_cast(conf.global_monitor->exclusive_values.data() + conf.processor_id)); if constexpr (bitsize == 128) { code.mov(rax, qword[tmp + 0]); @@ -519,7 +519,7 @@ void AxxEmitX64::EmitExclusiveWriteMemoryInline(AxxEmitContext& ctx, IR::Inst* i } code.L(*end); - EmitExclusiveUnlock(code, conf, tmp, eax); + EmitExclusiveUnlock(code, conf, eax); ctx.reg_alloc.DefineValue(code, inst, status); EmitCheckMemoryAbort(ctx, inst); } diff --git a/src/dynarmic/src/dynarmic/backend/x64/emit_x64_memory.h b/src/dynarmic/src/dynarmic/backend/x64/emit_x64_memory.h index 3ac078f1d7..4581f9d7c2 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/emit_x64_memory.h +++ b/src/dynarmic/src/dynarmic/backend/x64/emit_x64_memory.h @@ -13,7 +13,7 @@ #include "dynarmic/backend/x64/a32_emit_x64.h" #include "dynarmic/backend/x64/a64_emit_x64.h" -#include "dynarmic/backend/x64/exclusive_monitor_friend.h" +#include "dynarmic/interface/exclusive_monitor.h" #include "dynarmic/common/spin_lock_x64.h" #include "dynarmic/interface/exclusive_monitor.h" #include "dynarmic/ir/acc_type.h" @@ -344,43 +344,36 @@ const void* EmitWriteMemoryMov(BlockOfCode& code, const Xbyak::RegExp& addr, int } template -void EmitExclusiveLock(BlockOfCode& code, const UserConfig& conf, Xbyak::Reg64 pointer, Xbyak::Reg32 tmp) { - if (conf.HasOptimization(OptimizationFlag::Unsafe_IgnoreGlobalMonitor)) { - return; +void EmitExclusiveLock(BlockOfCode& code, const UserConfig& conf, Xbyak::Reg32 tmp) { + if (!conf.HasOptimization(OptimizationFlag::Unsafe_IgnoreGlobalMonitor)) { + u64 const slp = std::bit_cast(std::addressof(conf.global_monitor->lock.storage)); + EmitSpinLockLock(code, dword[slp], tmp, code.HasHostFeature(HostFeature::WAITPKG)); } - - code.mov(pointer, std::bit_cast(GetExclusiveMonitorLockPointer(conf.global_monitor))); - EmitSpinLockLock(code, pointer, tmp, code.HasHostFeature(HostFeature::WAITPKG)); } template -void EmitExclusiveUnlock(BlockOfCode& code, const UserConfig& conf, Xbyak::Reg64 pointer, Xbyak::Reg32 tmp) { - if (conf.HasOptimization(OptimizationFlag::Unsafe_IgnoreGlobalMonitor)) { - return; +void EmitExclusiveUnlock(BlockOfCode& code, const UserConfig& conf, Xbyak::Reg32 tmp) { + if (!conf.HasOptimization(OptimizationFlag::Unsafe_IgnoreGlobalMonitor)) { + u64 const slp = std::bit_cast(std::addressof(conf.global_monitor->lock.storage)); + EmitSpinLockUnlock(code, dword[slp], tmp); } - - code.mov(pointer, std::bit_cast(GetExclusiveMonitorLockPointer(conf.global_monitor))); - EmitSpinLockUnlock(code, pointer, tmp); } template void EmitExclusiveTestAndClear(BlockOfCode& code, const UserConfig& conf, Xbyak::Reg64 vaddr, Xbyak::Reg64 pointer, Xbyak::Reg64 tmp) { - if (conf.HasOptimization(OptimizationFlag::Unsafe_IgnoreGlobalMonitor)) { - return; - } - - code.mov(tmp, 0xDEAD'DEAD'DEAD'DEAD); - const size_t processor_count = GetExclusiveMonitorProcessorCount(conf.global_monitor); - for (size_t processor_index = 0; processor_index < processor_count; processor_index++) { - if (processor_index == conf.processor_id) { - continue; + if (!conf.HasOptimization(OptimizationFlag::Unsafe_IgnoreGlobalMonitor)) { + code.mov(tmp, 0xDEAD'DEAD'DEAD'DEAD); + static_assert(ExclusiveMonitor::MAX_NUM_CPU_CORES == 4); + for (size_t i = 0; i < ExclusiveMonitor::MAX_NUM_CPU_CORES; i++) { + if (i != conf.processor_id) { + Xbyak::Label ok; + code.mov(pointer, std::bit_cast(conf.global_monitor->exclusive_addresses.data() + i)); + code.cmp(qword[pointer], vaddr); + code.jne(ok, code.T_NEAR); + code.mov(qword[pointer], tmp); + code.L(ok); + } } - Xbyak::Label ok; - code.mov(pointer, std::bit_cast(GetExclusiveMonitorAddressPointer(conf.global_monitor, processor_index))); - code.cmp(qword[pointer], vaddr); - code.jne(ok, code.T_NEAR); - code.mov(qword[pointer], tmp); - code.L(ok); } } diff --git a/src/dynarmic/src/dynarmic/backend/x64/emit_x64_packed.cpp b/src/dynarmic/src/dynarmic/backend/x64/emit_x64_packed.cpp index c29d7d2648..8f9c13b316 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/emit_x64_packed.cpp +++ b/src/dynarmic/src/dynarmic/backend/x64/emit_x64_packed.cpp @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -595,7 +595,8 @@ void EmitX64::EmitPackedHalvingSubAddS16(EmitContext& ctx, IR::Inst* inst) { EmitPackedSubAdd(code, ctx, inst, false, true, true); } -static void EmitPackedOperation(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, void (Xbyak::CodeGenerator::*fn)(const Xbyak::Mmx& mmx, const Xbyak::Operand&)) { +template +static void EmitPackedOperation(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, F&& fn) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); const Xbyak::Xmm xmm_a = ctx.reg_alloc.UseScratchXmm(code, args[0]); diff --git a/src/dynarmic/src/dynarmic/backend/x64/emit_x64_vector_saturation.cpp b/src/dynarmic/src/dynarmic/backend/x64/emit_x64_vector_saturation.cpp index f9ad53c5a7..6cf78576b1 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/emit_x64_vector_saturation.cpp +++ b/src/dynarmic/src/dynarmic/backend/x64/emit_x64_vector_saturation.cpp @@ -23,7 +23,8 @@ using namespace Xbyak::util; namespace { -void EmitVectorSaturatedNative(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, void (Xbyak::CodeGenerator::*saturated_fn)(const Xbyak::Mmx& mmx, const Xbyak::Operand&), void (Xbyak::CodeGenerator::*unsaturated_fn)(const Xbyak::Mmx& mmx, const Xbyak::Operand&), void (Xbyak::CodeGenerator::*sub_fn)(const Xbyak::Mmx& mmx, const Xbyak::Operand&)) { +template +static void EmitVectorSaturatedNative(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, F1&& saturated_fn, F2&& unsaturated_fn, F3&& sub_fn) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); const Xbyak::Xmm result = ctx.reg_alloc.UseScratchXmm(code, args[0]); diff --git a/src/dynarmic/src/dynarmic/backend/x64/hostloc.h b/src/dynarmic/src/dynarmic/backend/x64/hostloc.h index 7191a0ceba..d62090d612 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/hostloc.h +++ b/src/dynarmic/src/dynarmic/backend/x64/hostloc.h @@ -8,8 +8,6 @@ #pragma once #include -#include - #include "common/assert.h" #include "common/common_types.h" #include "dynarmic/backend/x64/xbyak.h" diff --git a/src/dynarmic/src/dynarmic/common/spin_lock_x64.cpp b/src/dynarmic/src/dynarmic/common/spin_lock_x64.cpp index 7607bbaafc..ecd0483f2d 100644 --- a/src/dynarmic/src/dynarmic/common/spin_lock_x64.cpp +++ b/src/dynarmic/src/dynarmic/common/spin_lock_x64.cpp @@ -23,19 +23,18 @@ static const auto default_cg_mode = nullptr; //Allow RWE namespace Dynarmic { void EmitSpinLockLock(Xbyak::CodeGenerator& code, Xbyak::Reg64 ptr, Xbyak::Reg32 tmp, bool waitpkg) { - // TODO: this is because we lack regalloc - so better to be safe :( - if (waitpkg) { - code.push(Xbyak::util::eax); - code.push(Xbyak::util::ebx); - code.push(Xbyak::util::edx); - } Xbyak::Label start, loop; code.jmp(start, code.T_NEAR); code.L(loop); if (waitpkg) { + // TODO: this is because we lack regalloc - so better to be safe :( + code.push(Xbyak::util::rax); + code.push(Xbyak::util::rbx); + code.push(Xbyak::util::rdx); // TODO: This clobbers EAX and EDX did we tell the regalloc? // ARM ptr for address-monitoring - code.umonitor(ptr); + code.mov(Xbyak::util::eax, ptr); + code.umonitor(Xbyak::util::eax); // tmp.bit[0] = 0: C0.1 | Slow Wakup | Better Savings // tmp.bit[0] = 1: C0.2 | Fast Wakup | Lesser Savings // edx:eax is implicitly used as a 64-bit deadline timestamp @@ -49,6 +48,9 @@ void EmitSpinLockLock(Xbyak::CodeGenerator& code, Xbyak::Reg64 ptr, Xbyak::Reg32 code.umwait(Xbyak::util::ebx); // CF == 1 if we hit the OS-timeout in IA32_UMWAIT_CONTROL without a write // CF == 0 if we exited the wait for any other reason + code.pop(Xbyak::util::rdx); + code.pop(Xbyak::util::rbx); + code.pop(Xbyak::util::rax); } else { code.pause(); } @@ -57,16 +59,12 @@ void EmitSpinLockLock(Xbyak::CodeGenerator& code, Xbyak::Reg64 ptr, Xbyak::Reg32 /*code.lock();*/ code.xchg(code.dword[ptr], tmp); code.test(tmp, tmp); code.jnz(loop, code.T_NEAR); - if (waitpkg) { - code.pop(Xbyak::util::edx); - code.pop(Xbyak::util::ebx); - code.pop(Xbyak::util::eax); - } } -void EmitSpinLockUnlock(Xbyak::CodeGenerator& code, Xbyak::Reg64 ptr, Xbyak::Reg32 tmp) { +// ptr operand must be a dword[ptr] +void EmitSpinLockUnlock(Xbyak::CodeGenerator& code, Xbyak::Address ptr, Xbyak::Reg32 tmp) { code.xor_(tmp, tmp); - code.xchg(code.dword[ptr], tmp); + code.xchg(ptr, tmp); code.mfence(); } @@ -89,11 +87,12 @@ void SpinLockImpl::Initialize() noexcept { Xbyak::Reg64 const ABI_PARAM1 = Backend::X64::HostLocToReg64(Backend::X64::ABI_PARAM1); code.align(); lock = code.getCurr(); - EmitSpinLockLock(code, ABI_PARAM1, code.eax, false); + EmitSpinLockLock(code, code.dword[ABI_PARAM1], code.eax, false); code.ret(); + code.align(); unlock = code.getCurr(); - EmitSpinLockUnlock(code, ABI_PARAM1, code.eax); + EmitSpinLockUnlock(code, code.dword[ABI_PARAM1], code.eax); code.ret(); } diff --git a/src/dynarmic/src/dynarmic/common/spin_lock_x64.h b/src/dynarmic/src/dynarmic/common/spin_lock_x64.h index b17d4f67f8..f2b01895cb 100644 --- a/src/dynarmic/src/dynarmic/common/spin_lock_x64.h +++ b/src/dynarmic/src/dynarmic/common/spin_lock_x64.h @@ -12,7 +12,7 @@ namespace Dynarmic { -void EmitSpinLockLock(Xbyak::CodeGenerator& code, Xbyak::Reg64 ptr, Xbyak::Reg32 tmp, bool waitpkg); -void EmitSpinLockUnlock(Xbyak::CodeGenerator& code, Xbyak::Reg64 ptr, Xbyak::Reg32 tmp); +void EmitSpinLockLock(Xbyak::CodeGenerator& code, Xbyak::Address ptr, Xbyak::Reg32 tmp, bool waitpkg); +void EmitSpinLockUnlock(Xbyak::CodeGenerator& code, Xbyak::Address ptr, Xbyak::Reg32 tmp); } // namespace Dynarmic diff --git a/src/dynarmic/src/dynarmic/interface/exclusive_monitor.h b/src/dynarmic/src/dynarmic/interface/exclusive_monitor.h index 566743c767..cf036bd270 100644 --- a/src/dynarmic/src/dynarmic/interface/exclusive_monitor.h +++ b/src/dynarmic/src/dynarmic/interface/exclusive_monitor.h @@ -1,3 +1,6 @@ +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project +// SPDX-License-Identifier: GPL-3.0-or-later + /* This file is part of the dynarmic project. * Copyright (c) 2018 MerryMage * SPDX-License-Identifier: 0BSD @@ -20,68 +23,71 @@ using Vector = std::array; class ExclusiveMonitor { public: - /// @param processor_count Maximum number of processors using this global - /// exclusive monitor. Each processor must have a - /// unique id. - explicit ExclusiveMonitor(size_t processor_count); - - size_t GetProcessorCount() const; + explicit ExclusiveMonitor() noexcept { + std::fill(exclusive_addresses.begin(), exclusive_addresses.end(), INVALID_EXCLUSIVE_ADDRESS); + } /// Marks a region containing [address, address+size) to be exclusive to - /// processor processor_id. - template - T ReadAndMark(size_t processor_id, VAddr address, Function op) { + /// processor index. + template + [[nodiscard]] inline T ReadAndMark(std::size_t index, VAddr address, F f) { static_assert(std::is_trivially_copyable_v); const VAddr masked_address = address & RESERVATION_GRANULE_MASK; - - Lock(); - exclusive_addresses[processor_id] = masked_address; - const T value = op(); - std::memcpy(exclusive_values[processor_id].data(), &value, sizeof(T)); - Unlock(); + lock.Lock(); + exclusive_addresses[index] = masked_address; + T const value = f(); + std::memcpy(exclusive_values[index].data(), std::addressof(value), sizeof(T)); + lock.Unlock(); return value; } - /// Checks to see if processor processor_id has exclusive access to the + [[nodiscard]] inline bool CheckAndClear(std::size_t index, VAddr address) { + const VAddr masked_address = address & RESERVATION_GRANULE_MASK; + if (exclusive_addresses[index] != masked_address) + return false; + for (VAddr& other_address : exclusive_addresses) + if (other_address == masked_address) + other_address = INVALID_EXCLUSIVE_ADDRESS; + return true; + } + + /// Checks to see if processor index has exclusive access to the /// specified region. If it does, executes the operation then clears /// the exclusive state for processors if their exclusive region(s) /// contain [address, address+size). - template - bool DoExclusiveOperation(size_t processor_id, VAddr address, Function op) { + template + [[nodiscard]] inline bool DoExclusiveOperation(std::size_t index, VAddr address, F&& f) { static_assert(std::is_trivially_copyable_v); - if (!CheckAndClear(processor_id, address)) { - return false; + bool result = false; + lock.Lock(); + if (CheckAndClear(index, address)) { + T saved_value{}; + std::memcpy(std::addressof(saved_value), exclusive_values[index].data(), sizeof(T)); + result = f(saved_value); } - - T saved_value; - std::memcpy(&saved_value, exclusive_values[processor_id].data(), sizeof(T)); - const bool result = op(saved_value); - - Unlock(); + lock.Unlock(); return result; } /// Unmark everything. - void Clear(); + inline void Clear() { + lock.Lock(); + std::fill(exclusive_addresses.begin(), exclusive_addresses.end(), INVALID_EXCLUSIVE_ADDRESS); + lock.Unlock(); + } + /// Unmark processor id - void ClearProcessor(size_t processor_id); - -private: - bool CheckAndClear(size_t processor_id, VAddr address); - - void Lock(); - void Unlock(); - - friend volatile int* GetExclusiveMonitorLockPointer(ExclusiveMonitor*); - friend size_t GetExclusiveMonitorProcessorCount(ExclusiveMonitor*); - friend VAddr* GetExclusiveMonitorAddressPointer(ExclusiveMonitor*, size_t index); - friend Vector* GetExclusiveMonitorValuePointer(ExclusiveMonitor*, size_t index); + inline void ClearProcessor(size_t index) { + lock.Lock(); + exclusive_addresses[index] = INVALID_EXCLUSIVE_ADDRESS; + lock.Unlock(); + } static constexpr VAddr RESERVATION_GRANULE_MASK = 0xFFFF'FFFF'FFFF'FFFFull; static constexpr VAddr INVALID_EXCLUSIVE_ADDRESS = 0xDEAD'DEAD'DEAD'DEADull; static constexpr size_t MAX_NUM_CPU_CORES = 4; // Sync with src/core/hardware_properties - boost::container::static_vector exclusive_addresses; - boost::container::static_vector exclusive_values; + std::array exclusive_addresses; + std::array exclusive_values; SpinLock lock; }; diff --git a/src/frontend_common/update_checker.cpp b/src/frontend_common/update_checker.cpp index 1f01c25a26..71a94f38d4 100644 --- a/src/frontend_common/update_checker.cpp +++ b/src/frontend_common/update_checker.cpp @@ -80,55 +80,24 @@ std::optional UpdateChecker::GetResponse(std::string url, std::stri } } -std::optional UpdateChecker::GetLatestRelease(bool include_prereleases) { +std::optional UpdateChecker::GetLatestRelease() { #ifdef YUZU_BUNDLED_OPENSSL const auto update_check_url = fmt::format("https://{}", Common::g_build_auto_update_api); #else const auto update_check_url = std::string{Common::g_build_auto_update_api}; #endif - auto update_check_path = fmt::format("{}{}", std::string{Common::g_build_auto_update_api_path}, - std::string{Common::g_build_auto_update_repo}); + auto update_check_path = std::string{Common::g_build_auto_update_api_path}; try { - if (include_prereleases) { // This can return either a prerelease or a stable release, - // whichever is more recent. - const auto update_check_tags_path = update_check_path + "/tags"; - const auto update_check_releases_path = update_check_path + "/releases"; + const auto response = UpdateChecker::GetResponse(update_check_url, update_check_path); - const auto tags_response = UpdateChecker::GetResponse(update_check_url, update_check_tags_path); - const auto releases_response = UpdateChecker::GetResponse(update_check_url, update_check_releases_path); + if (!response) + return {}; - if (!tags_response || !releases_response) - return {}; - - const std::string latest_tag - = nlohmann::json::parse(tags_response.value()).at(0).at("name"); - const std::string latest_name = - nlohmann::json::parse(releases_response.value()).at(0).at("name"); - - const bool latest_tag_has_release = releases_response.value().find( - fmt::format("\"{}\"", latest_tag)) - != std::string::npos; - - // If there is a newer tag, but that tag has no associated release, don't prompt the - // user to update. - if (!latest_tag_has_release) - return {}; - - return Update{latest_tag, latest_name}; - } else { // This is a stable release, only check for other stable releases. - update_check_path += "/releases/latest"; - const auto response = UpdateChecker::GetResponse(update_check_url, update_check_path); - - if (!response) - return {}; - - const std::string latest_tag = nlohmann::json::parse(response.value()).at("tag_name"); - const std::string latest_name = nlohmann::json::parse(response.value()).at("name"); - - return Update{latest_tag, latest_name}; - } + const std::string latest_tag = nlohmann::json::parse(response.value()).at("tag_name"); + const std::string latest_name = nlohmann::json::parse(response.value()).at("name"); + return Update{latest_tag, latest_name}; } catch (nlohmann::detail::out_of_range&) { LOG_ERROR(Frontend, "Parsing JSON response from {}{} failed during update check: " @@ -147,12 +116,8 @@ std::optional UpdateChecker::GetLatestRelease(bool includ } std::optional UpdateChecker::GetUpdate() { - const bool is_prerelease = ((strstr(Common::g_build_version, "pre-alpha") != NULL) || - (strstr(Common::g_build_version, "alpha") != NULL) || - (strstr(Common::g_build_version, "beta") != NULL) || - (strstr(Common::g_build_version, "rc") != NULL)); const std::optional latest_release_tag = - UpdateChecker::GetLatestRelease(is_prerelease); + UpdateChecker::GetLatestRelease(); if (!latest_release_tag) goto empty; diff --git a/src/frontend_common/update_checker.h b/src/frontend_common/update_checker.h index fb6c25c3f3..307c38f202 100644 --- a/src/frontend_common/update_checker.h +++ b/src/frontend_common/update_checker.h @@ -18,6 +18,6 @@ typedef struct { } Update; std::optional GetResponse(std::string url, std::string path); -std::optional GetLatestRelease(bool include_prereleases); +std::optional GetLatestRelease(); std::optional GetUpdate(); } // namespace UpdateChecker diff --git a/src/hid_core/frontend/emulated_controller.cpp b/src/hid_core/frontend/emulated_controller.cpp index 604414c470..ef841e2411 100644 --- a/src/hid_core/frontend/emulated_controller.cpp +++ b/src/hid_core/frontend/emulated_controller.cpp @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later // SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project @@ -108,10 +108,10 @@ void EmulatedController::ReloadFromSettings() { // Other or debug controller should always be a pro controller if (npad_id_type != NpadIdType::Other) { SetNpadStyleIndex(MapSettingsTypeToNPad(player.controller_type)); - original_npad_type = npad_type; + original_npad_type = npad_type.load(); } else { SetNpadStyleIndex(NpadStyleIndex::Fullkey); - original_npad_type = npad_type; + original_npad_type = npad_type.load(); } // Disable special features before disconnecting @@ -577,10 +577,9 @@ void EmulatedController::UnloadInput() { } void EmulatedController::EnableConfiguration() { - std::unique_lock lock1{connect_mutex}, lock2{npad_mutex}; - is_configuring = true; - tmp_is_connected = is_connected; - tmp_npad_type = npad_type; + is_configuring.store(true); + tmp_is_connected.store(is_connected); + tmp_npad_type.store(npad_type); } void EmulatedController::DisableConfiguration() { @@ -600,7 +599,7 @@ void EmulatedController::DisableConfiguration() { Disconnect(); } SetNpadStyleIndex(tmp_npad_type); - original_npad_type = tmp_npad_type; + original_npad_type.store(tmp_npad_type); } // Apply temporary connected status to the real controller @@ -614,19 +613,16 @@ void EmulatedController::DisableConfiguration() { } void EmulatedController::EnableSystemButtons() { - std::unique_lock lock{mutex}; system_buttons_enabled = true; } void EmulatedController::DisableSystemButtons() { - std::unique_lock lock{mutex}; system_buttons_enabled = false; controller.home_button_state.raw = 0; controller.capture_button_state.raw = 0; } void EmulatedController::ResetSystemButtons() { - std::unique_lock lock{mutex}; controller.home_button_state.home.Assign(false); controller.capture_button_state.capture.Assign(false); } @@ -763,8 +759,7 @@ void EmulatedController::StartMotionCalibration() { } } -void EmulatedController::SetButton(const Common::Input::CallbackStatus& callback, std::size_t index, - Common::UUID uuid) { +void EmulatedController::SetButton(const Common::Input::CallbackStatus& callback, std::size_t index, Common::UUID uuid) { const auto player_index = Service::HID::NpadIdTypeToIndex(npad_id_type); const auto& player = Settings::values.players.GetValue()[player_index]; @@ -772,7 +767,6 @@ void EmulatedController::SetButton(const Common::Input::CallbackStatus& callback return; } - std::unique_lock lock{mutex}; bool value_changed = false; const auto new_status = TransformToButton(callback); auto& current_status = controller.button_values[index]; @@ -818,7 +812,6 @@ void EmulatedController::SetButton(const Common::Input::CallbackStatus& callback controller.debug_pad_button_state.raw = 0; controller.home_button_state.raw = 0; controller.capture_button_state.raw = 0; - lock.unlock(); TriggerOnChange(ControllerTriggerType::Button, false); return; } @@ -922,8 +915,6 @@ void EmulatedController::SetButton(const Common::Input::CallbackStatus& callback break; } - lock.unlock(); - if (!is_connected) { if (npad_type == NpadStyleIndex::Handheld) { if (npad_id_type == NpadIdType::Handheld) { @@ -952,7 +943,6 @@ void EmulatedController::SetStick(const Common::Input::CallbackStatus& callback, auto trigger_guard = SCOPE_GUARD { TriggerOnChange(ControllerTriggerType::Stick, !is_configuring); }; - std::unique_lock lock{mutex}; const auto stick_value = TransformToStick(callback); // Only read stick values that have the same uuid or are over the threshold to avoid flapping @@ -1009,7 +999,6 @@ void EmulatedController::SetTrigger(const Common::Input::CallbackStatus& callbac auto trigger_guard = SCOPE_GUARD { TriggerOnChange(ControllerTriggerType::Trigger, !is_configuring); }; - std::unique_lock lock{mutex}; const auto trigger_value = TransformToTrigger(callback); // Only read trigger values that have the same uuid or are pressed once @@ -1057,7 +1046,6 @@ void EmulatedController::SetMotion(const Common::Input::CallbackStatus& callback SCOPE_EXIT { TriggerOnChange(ControllerTriggerType::Motion, !is_configuring); }; - std::unique_lock lock{mutex}; auto& raw_status = controller.motion_values[index].raw_status; auto& emulated = controller.motion_values[index].emulated; @@ -1093,7 +1081,6 @@ void EmulatedController::SetColors(const Common::Input::CallbackStatus& callback auto trigger_guard = SCOPE_GUARD { TriggerOnChange(ControllerTriggerType::Color, !is_configuring); }; - std::unique_lock lock{mutex}; controller.color_values[index] = TransformToColor(callback); if (is_configuring) { @@ -1136,15 +1123,13 @@ void EmulatedController::SetColors(const Common::Input::CallbackStatus& callback } } -void EmulatedController::SetBattery(const Common::Input::CallbackStatus& callback, - std::size_t index) { +void EmulatedController::SetBattery(const Common::Input::CallbackStatus& callback, std::size_t index) { if (index >= controller.battery_values.size()) { return; } SCOPE_EXIT { TriggerOnChange(ControllerTriggerType::Battery, !is_configuring); }; - std::unique_lock lock{mutex}; controller.battery_values[index] = TransformToBattery(callback); if (is_configuring) { @@ -1209,47 +1194,33 @@ void EmulatedController::SetCamera(const Common::Input::CallbackStatus& callback SCOPE_EXIT { TriggerOnChange(ControllerTriggerType::IrSensor, !is_configuring); }; - std::unique_lock lock{mutex}; controller.camera_values = TransformToCamera(callback); - - if (is_configuring) { - return; + if (!is_configuring) { + controller.camera_state.sample++; + controller.camera_state.format = Core::IrSensor::ImageTransferProcessorFormat(controller.camera_values.format); + controller.camera_state.data = controller.camera_values.data; } - - controller.camera_state.sample++; - controller.camera_state.format = - static_cast(controller.camera_values.format); - controller.camera_state.data = controller.camera_values.data; } void EmulatedController::SetRingAnalog(const Common::Input::CallbackStatus& callback) { SCOPE_EXIT { TriggerOnChange(ControllerTriggerType::RingController, !is_configuring); }; - std::unique_lock lock{mutex}; const auto force_value = TransformToStick(callback); - controller.ring_analog_value = force_value.x; - - if (is_configuring) { - return; + if (!is_configuring) { + controller.ring_analog_state.force = force_value.x.value; } - - controller.ring_analog_state.force = force_value.x.value; } void EmulatedController::SetNfc(const Common::Input::CallbackStatus& callback) { SCOPE_EXIT { TriggerOnChange(ControllerTriggerType::Nfc, !is_configuring); }; - std::unique_lock lock{mutex}; controller.nfc_values = TransformToNfc(callback); - - if (is_configuring) { - return; + if (!is_configuring) { + controller.nfc_state = controller.nfc_values; } - - controller.nfc_state = controller.nfc_values; } bool EmulatedController::SetVibration(bool should_vibrate) { @@ -1258,7 +1229,6 @@ bool EmulatedController::SetVibration(bool should_vibrate) { vibration_value.high_amplitude = 1.0f; vibration_value.low_amplitude = 1.0f; } - return SetVibration(DeviceIndex::Left, vibration_value); } @@ -1268,7 +1238,6 @@ bool EmulatedController::SetVibration(u32 slot, Core::HID::VibrationGcErmCommand vibration_value.high_amplitude = 1.0f; vibration_value.low_amplitude = 1.0f; } - return SetVibration(DeviceIndex::Left, vibration_value); } @@ -1632,7 +1601,7 @@ void EmulatedController::SetSupportedNpadStyleTag(NpadStyleTag supported_styles) // Attempt to reconnect with the original type if (npad_type != original_npad_type) { Disconnect(); - const auto current_npad_type = npad_type; + const auto current_npad_type = npad_type.load(); SetNpadStyleIndex(original_npad_type); if (IsControllerSupported()) { Connect(); @@ -1650,7 +1619,7 @@ void EmulatedController::SetSupportedNpadStyleTag(NpadStyleTag supported_styles) // Fallback Fullkey controllers to Pro controllers if (IsControllerFullkey() && supported_style_tag.fullkey) { - LOG_WARNING(Service_HID, "Reconnecting controller type {} as Pro controller", npad_type); + LOG_WARNING(Service_HID, "Reconnecting controller type {} as Pro controller", npad_type.load()); SetNpadStyleIndex(NpadStyleIndex::Fullkey); Connect(); return; @@ -1658,7 +1627,7 @@ void EmulatedController::SetSupportedNpadStyleTag(NpadStyleTag supported_styles) // Fallback Dual joycon controllers to Pro controllers if (npad_type == NpadStyleIndex::JoyconDual && supported_style_tag.fullkey) { - LOG_WARNING(Service_HID, "Reconnecting controller type {} as Pro controller", npad_type); + LOG_WARNING(Service_HID, "Reconnecting controller type {} as Pro controller", npad_type.load()); SetNpadStyleIndex(NpadStyleIndex::Fullkey); Connect(); return; @@ -1666,19 +1635,16 @@ void EmulatedController::SetSupportedNpadStyleTag(NpadStyleTag supported_styles) // Fallback Pro controllers to Dual joycon if (npad_type == NpadStyleIndex::Fullkey && supported_style_tag.joycon_dual) { - LOG_WARNING(Service_HID, "Reconnecting controller type {} as Dual Joycons", npad_type); + LOG_WARNING(Service_HID, "Reconnecting controller type {} as Dual Joycons", npad_type.load()); SetNpadStyleIndex(NpadStyleIndex::JoyconDual); Connect(); return; } - - LOG_ERROR(Service_HID, "Controller type {} is not supported. Disconnecting controller", - npad_type); + LOG_ERROR(Service_HID, "Controller type {} is not supported. Disconnecting controller", npad_type.load()); } bool EmulatedController::IsControllerFullkey(bool use_temporary_value) const { - std::unique_lock lock{mutex}; - const auto type = is_configuring && use_temporary_value ? tmp_npad_type : npad_type; + const auto type = is_configuring.load() && use_temporary_value ? tmp_npad_type.load() : npad_type.load(); switch (type) { case NpadStyleIndex::Fullkey: case NpadStyleIndex::GameCube: @@ -1693,39 +1659,26 @@ bool EmulatedController::IsControllerFullkey(bool use_temporary_value) const { } bool EmulatedController::IsControllerSupported(bool use_temporary_value) const { - std::unique_lock lock{mutex}; - const auto type = is_configuring && use_temporary_value ? tmp_npad_type : npad_type; + const auto type = is_configuring.load() && use_temporary_value ? tmp_npad_type.load() : npad_type.load(); switch (type) { - case NpadStyleIndex::Fullkey: - return supported_style_tag.fullkey.As(); - case NpadStyleIndex::Handheld: - return supported_style_tag.handheld.As(); - case NpadStyleIndex::JoyconDual: - return supported_style_tag.joycon_dual.As(); - case NpadStyleIndex::JoyconLeft: - return supported_style_tag.joycon_left.As(); - case NpadStyleIndex::JoyconRight: - return supported_style_tag.joycon_right.As(); - case NpadStyleIndex::GameCube: - return supported_style_tag.gamecube.As(); - case NpadStyleIndex::Pokeball: - return supported_style_tag.palma.As(); - case NpadStyleIndex::NES: - return supported_style_tag.lark.As(); - case NpadStyleIndex::SNES: - return supported_style_tag.lucia.As(); - case NpadStyleIndex::N64: - return supported_style_tag.lagoon.As(); - case NpadStyleIndex::SegaGenesis: - return supported_style_tag.lager.As(); - default: - return false; + case NpadStyleIndex::Fullkey: return supported_style_tag.fullkey.As(); + case NpadStyleIndex::Handheld: return supported_style_tag.handheld.As(); + case NpadStyleIndex::JoyconDual: return supported_style_tag.joycon_dual.As(); + case NpadStyleIndex::JoyconLeft: return supported_style_tag.joycon_left.As(); + case NpadStyleIndex::JoyconRight: return supported_style_tag.joycon_right.As(); + case NpadStyleIndex::GameCube: return supported_style_tag.gamecube.As(); + case NpadStyleIndex::Pokeball: return supported_style_tag.palma.As(); + case NpadStyleIndex::NES: return supported_style_tag.lark.As(); + case NpadStyleIndex::SNES: return supported_style_tag.lucia.As(); + case NpadStyleIndex::N64: return supported_style_tag.lagoon.As(); + case NpadStyleIndex::SegaGenesis: return supported_style_tag.lager.As(); + default: return false; } } void EmulatedController::Connect(bool use_temporary_value) { if (!IsControllerSupported(use_temporary_value)) { - const auto type = is_configuring && use_temporary_value ? tmp_npad_type : npad_type; + const auto type = is_configuring.load() && use_temporary_value ? tmp_npad_type.load() : npad_type.load(); LOG_ERROR(Service_HID, "Controller type {} is not supported", type); return; } @@ -1733,12 +1686,10 @@ void EmulatedController::Connect(bool use_temporary_value) { auto trigger_guard = SCOPE_GUARD { TriggerOnChange(ControllerTriggerType::Connected, !is_configuring); }; - std::unique_lock lock1{connect_mutex}, lock2{mutex}; if (is_configuring) { tmp_is_connected = true; return; } - if (is_connected) { trigger_guard.Cancel(); return; @@ -1750,12 +1701,10 @@ void EmulatedController::Disconnect() { auto trigger_guard = SCOPE_GUARD { TriggerOnChange(ControllerTriggerType::Disconnected, !is_configuring); }; - std::unique_lock lock1{connect_mutex}, lock2{mutex}; if (is_configuring) { tmp_is_connected = false; return; } - if (!is_connected) { trigger_guard.Cancel(); return; @@ -1764,19 +1713,16 @@ void EmulatedController::Disconnect() { } bool EmulatedController::IsConnected(bool get_temporary_value) const { - std::shared_lock lock{connect_mutex}; if (get_temporary_value && is_configuring) return tmp_is_connected; return is_connected; } NpadIdType EmulatedController::GetNpadIdType() const { - std::shared_lock lock{mutex}; return npad_id_type; } NpadStyleIndex EmulatedController::GetNpadStyleIndex(bool get_temporary_value) const { - std::shared_lock lock{npad_mutex}; if (get_temporary_value && is_configuring) return tmp_npad_type; return npad_type; @@ -1786,8 +1732,6 @@ void EmulatedController::SetNpadStyleIndex(NpadStyleIndex npad_type_) { auto trigger_guard = SCOPE_GUARD { TriggerOnChange(ControllerTriggerType::Type, !is_configuring); }; - std::unique_lock lock1{mutex}, lock2{npad_mutex}; - if (is_configuring) { if (tmp_npad_type == npad_type_) { trigger_guard.Cancel(); @@ -1796,14 +1740,12 @@ void EmulatedController::SetNpadStyleIndex(NpadStyleIndex npad_type_) { tmp_npad_type = npad_type_; return; } - if (npad_type == npad_type_) { trigger_guard.Cancel(); return; } if (is_connected) { - LOG_WARNING(Service_HID, "Controller {} type changed while it's connected", - Service::HID::NpadIdTypeToIndex(npad_id_type)); + LOG_WARNING(Service_HID, "Controller {} type changed while it's connected", Service::HID::NpadIdTypeToIndex(npad_id_type)); } npad_type = npad_type_; } @@ -1832,37 +1774,30 @@ LedPattern EmulatedController::GetLedPattern() const { } ButtonValues EmulatedController::GetButtonsValues() const { - std::unique_lock lock{mutex}; return controller.button_values; } SticksValues EmulatedController::GetSticksValues() const { - std::unique_lock lock{mutex}; return controller.stick_values; } TriggerValues EmulatedController::GetTriggersValues() const { - std::unique_lock lock{mutex}; return controller.trigger_values; } ControllerMotionValues EmulatedController::GetMotionValues() const { - std::unique_lock lock{mutex}; return controller.motion_values; } ColorValues EmulatedController::GetColorsValues() const { - std::unique_lock lock{mutex}; return controller.color_values; } BatteryValues EmulatedController::GetBatteryValues() const { - std::unique_lock lock{mutex}; return controller.battery_values; } CameraValues EmulatedController::GetCameraValues() const { - std::unique_lock lock{mutex}; return controller.camera_values; } @@ -1871,72 +1806,54 @@ RingAnalogValue EmulatedController::GetRingSensorValues() const { } HomeButtonState EmulatedController::GetHomeButtons() const { - std::unique_lock lock{mutex}; - if (is_configuring) { + if (is_configuring) return {}; - } return controller.home_button_state; } CaptureButtonState EmulatedController::GetCaptureButtons() const { - std::unique_lock lock{mutex}; - if (is_configuring) { + if (is_configuring) return {}; - } return controller.capture_button_state; } NpadButtonState EmulatedController::GetNpadButtons() const { - std::unique_lock lock{mutex}; - if (is_configuring) { + if (is_configuring) return {}; - } return {controller.npad_button_state.raw & GetTurboButtonMask()}; } DebugPadButton EmulatedController::GetDebugPadButtons() const { - std::unique_lock lock{mutex}; - if (is_configuring) { + if (is_configuring) return {}; - } return controller.debug_pad_button_state; } AnalogSticks EmulatedController::GetSticks() const { - std::unique_lock lock{mutex}; - - if (is_configuring) { + if (is_configuring) return {}; - } - return controller.analog_stick_state; } NpadGcTriggerState EmulatedController::GetTriggers() const { - std::unique_lock lock{mutex}; - if (is_configuring) { + if (is_configuring) return {}; - } return controller.gc_trigger_state; } MotionState EmulatedController::GetMotions() const { - std::unique_lock lock{mutex}; return controller.motion_state; } ControllerColors EmulatedController::GetColors() const { - std::unique_lock lock{mutex}; return controller.colors_state; } BatteryLevelState EmulatedController::GetBattery() const { - std::unique_lock lock{mutex}; return controller.battery_state; } const CameraState& EmulatedController::GetCamera() const { - std::unique_lock lock{mutex}; return controller.camera_state; } @@ -1945,15 +1862,14 @@ RingSensorForce EmulatedController::GetRingSensorForce() const { } const NfcState& EmulatedController::GetNfc() const { - std::unique_lock lock{mutex}; return controller.nfc_state; } NpadColor EmulatedController::GetNpadColor(u32 color) { return { - .r = static_cast((color >> 16) & 0xFF), - .g = static_cast((color >> 8) & 0xFF), - .b = static_cast(color & 0xFF), + .r = u8((color >> 16) & 0xFF), + .g = u8((color >> 8) & 0xFF), + .b = u8(color & 0xFF), .a = 0xff, }; } diff --git a/src/hid_core/frontend/emulated_controller.h b/src/hid_core/frontend/emulated_controller.h index e4256faa3e..bee8fb8b3e 100644 --- a/src/hid_core/frontend/emulated_controller.h +++ b/src/hid_core/frontend/emulated_controller.h @@ -11,8 +11,10 @@ #include #include #include -#include #include +#include + +#include #include "common/common_types.h" #include "common/input.h" @@ -576,13 +578,7 @@ private: NpadButton GetTurboButtonMask() const; const NpadIdType npad_id_type; - NpadStyleIndex npad_type{NpadStyleIndex::None}; - NpadStyleIndex original_npad_type{NpadStyleIndex::None}; NpadStyleTag supported_style_tag{NpadStyleSet::All}; - bool is_connected{false}; - bool is_configuring{false}; - bool is_initialized{false}; - bool system_buttons_enabled{true}; f32 motion_sensitivity{Core::HID::MotionInput::IsAtRestStandard}; u32 turbo_button_state{0}; std::size_t nfc_handles{0}; @@ -591,9 +587,16 @@ private: std::array last_vibration_timepoint{}; std::array controller_connected{}; + // Atomically synched values + std::atomic npad_type{HID::NpadStyleIndex::None}; + std::atomic original_npad_type{HID::NpadStyleIndex::None}; // Temporary values to avoid doing changes while the controller is in configuring mode - NpadStyleIndex tmp_npad_type{NpadStyleIndex::None}; - bool tmp_is_connected{false}; + std::atomic tmp_npad_type{HID::NpadStyleIndex::None}; + std::atomic tmp_is_connected{false}; + std::atomic is_connected{false}; + std::atomic is_configuring{false}; + std::atomic is_initialized{false}; + std::atomic system_buttons_enabled{true}; ButtonParams button_params; StickParams stick_params; @@ -632,10 +635,7 @@ private: StickDevices virtual_stick_devices; ControllerMotionDevices virtual_motion_devices; - mutable std::shared_mutex mutex; - mutable std::shared_mutex callback_mutex; - mutable std::shared_mutex npad_mutex; - mutable std::shared_mutex connect_mutex; + mutable std::mutex callback_mutex; ankerl::unordered_dense::map callback_list; int last_callback_key = 0; diff --git a/src/hid_core/resources/npad/npad.cpp b/src/hid_core/resources/npad/npad.cpp index d625617bd5..3a191f4539 100644 --- a/src/hid_core/resources/npad/npad.cpp +++ b/src/hid_core/resources/npad/npad.cpp @@ -157,11 +157,14 @@ void NPad::ControllerUpdate(Core::HID::ControllerTriggerType type, std::size_t c if (!controller.device->IsConnected()) { return; } - auto* shared_memory = controller.shared_memory; - const auto& battery_level = controller.device->GetBattery(); - shared_memory->battery_level_dual = battery_level.dual.battery_level; - shared_memory->battery_level_left = battery_level.left.battery_level; - shared_memory->battery_level_right = battery_level.right.battery_level; + if (auto* shared_memory = controller.shared_memory; shared_memory) { + const auto& battery_level = controller.device->GetBattery(); + shared_memory->battery_level_dual = battery_level.dual.battery_level; + shared_memory->battery_level_left = battery_level.left.battery_level; + shared_memory->battery_level_right = battery_level.right.battery_level; + } else { + LOG_WARNING(Service_HID, "shared_memory is null {}", controller_idx); + } break; } default: @@ -180,6 +183,10 @@ void NPad::InitNewlyAddedController(u64 aruid, Core::HID::NpadIdType npad_id) { const auto& body_colors = controller.device->GetColors(); const auto& battery_level = controller.device->GetBattery(); auto* shared_memory = controller.shared_memory; + if (!shared_memory) { + LOG_WARNING(Service_HID, "shared_memory is null for npad_id={}", npad_id); + return; + } if (controller_type == Core::HID::NpadStyleIndex::None) { npad_resource.SignalStyleSetUpdateEvent(aruid, npad_id); return; @@ -801,7 +808,7 @@ Result NPad::DisconnectNpad(u64 aruid, Core::HID::NpadIdType npad_id) { auto* shared_memory = controller.shared_memory; if (!shared_memory) { - LOG_WARNING(Service_HID, "DisconnectNpad: shared_memory is null for npad_id={}", npad_id); + LOG_WARNING(Service_HID, "shared_memory is null for npad_id={}", npad_id); return ResultSuccess; } // Don't reset shared_memory->assignment_mode this value is persistent @@ -1195,11 +1202,10 @@ const Core::HID::SixAxisSensorProperties& NPad::GetSixaxisProperties( AppletDetailedUiType NPad::GetAppletDetailedUiType(Core::HID::NpadIdType npad_id) { const auto aruid = applet_resource_holder.applet_resource->GetActiveAruid(); - const auto& shared_memory = GetControllerFromNpadIdType(aruid, npad_id).shared_memory; - + const auto* shared_memory = GetControllerFromNpadIdType(aruid, npad_id).shared_memory; return { .ui_variant = 0, - .footer = shared_memory->applet_footer_type, + .footer = shared_memory ? shared_memory->applet_footer_type : AppletFooterUiType::None, }; } diff --git a/src/qt_common/config/shared_translation.cpp b/src/qt_common/config/shared_translation.cpp index 670c1ba0d6..2bcaf416df 100644 --- a/src/qt_common/config/shared_translation.cpp +++ b/src/qt_common/config/shared_translation.cpp @@ -317,9 +317,6 @@ std::unique_ptr InitializeTranslations(QObject* parent) { "their resolution, details and supported controllers and depending on this setting.\n" "Setting to Handheld can help improve performance for low end systems.")); INSERT(Settings, current_user, QString(), QString()); - INSERT(Settings, serial_unit, tr("Unit Serial"), QString()); - INSERT(Settings, serial_battery, tr("Battery Serial"), QString()); - INSERT(Settings, debug_knobs, tr("Debug knobs"), QString()); // Controls diff --git a/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp b/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp index b9a24496c9..169e83d9fd 100644 --- a/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp +++ b/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp @@ -178,6 +178,9 @@ void DefineGenericOutput(EmitContext& ctx, size_t index, std::optional invo ctx.Decorate(id, spv::Decoration::XfbBuffer, xfb_varying->buffer); ctx.Decorate(id, spv::Decoration::XfbStride, xfb_varying->stride); ctx.Decorate(id, spv::Decoration::Offset, xfb_varying->offset); + if (ctx.stage == Stage::Geometry && xfb_varying->stream != 0) { + ctx.Decorate(id, spv::Decoration::Stream, xfb_varying->stream); + } } if (num_components < 4 || element > 0) { const std::string_view subswizzle{swizzle.substr(element, num_components)}; diff --git a/src/shader_recompiler/runtime_info.h b/src/shader_recompiler/runtime_info.h index be10a9bb08..e6e1284762 100644 --- a/src/shader_recompiler/runtime_info.h +++ b/src/shader_recompiler/runtime_info.h @@ -76,6 +76,7 @@ enum class TessSpacing { struct TransformFeedbackVarying { u32 buffer{}; + u32 stream{}; u32 stride{}; u32 offset{}; u32 components{}; diff --git a/src/video_core/buffer_cache/buffer_cache.h b/src/video_core/buffer_cache/buffer_cache.h index 014b4a318e..c857e90e02 100644 --- a/src/video_core/buffer_cache/buffer_cache.h +++ b/src/video_core/buffer_cache/buffer_cache.h @@ -1067,26 +1067,29 @@ void BufferCache

::BindHostTransformFeedbackBuffers() { HostBindings host_bindings; for (u32 index = 0; index < NUM_TRANSFORM_FEEDBACK_BUFFERS; ++index) { const Binding& binding = channel_state->transform_feedback_buffers[index]; - if (maxwell3d->regs.transform_feedback.controls[index].varying_count == 0 && - maxwell3d->regs.transform_feedback.controls[index].stride == 0) { - break; + const auto& control = maxwell3d->regs.transform_feedback.controls[index]; + const bool has_layout = control.varying_count != 0 || control.stride != 0; + + Buffer* host_buffer = &slot_buffers[NULL_BUFFER_ID]; + u32 offset = 0; + u32 size = 0; + + if (has_layout && binding.buffer_id != NULL_BUFFER_ID && binding.size != 0) { + Buffer& buffer = slot_buffers[binding.buffer_id]; + TouchBuffer(buffer, binding.buffer_id); + size = binding.size; + SynchronizeBuffer(buffer, binding.device_addr, size); + MarkWrittenBuffer(binding.buffer_id, binding.device_addr, size); + offset = buffer.Offset(binding.device_addr); + buffer.MarkUsage(offset, size); + host_buffer = &buffer; } - Buffer& buffer = slot_buffers[binding.buffer_id]; - TouchBuffer(buffer, binding.buffer_id); - const u32 size = binding.size; - SynchronizeBuffer(buffer, binding.device_addr, size); - MarkWrittenBuffer(binding.buffer_id, binding.device_addr, size); - - const u32 offset = buffer.Offset(binding.device_addr); - buffer.MarkUsage(offset, size); - host_bindings.buffers.push_back(&buffer); + host_bindings.buffers.push_back(host_buffer); host_bindings.offsets.push_back(offset); host_bindings.sizes.push_back(size); } - if (host_bindings.buffers.size() > 0) { - runtime.BindTransformFeedbackBuffers(host_bindings); - } + runtime.BindTransformFeedbackBuffers(host_bindings); } template diff --git a/src/video_core/gpu_thread.cpp b/src/video_core/gpu_thread.cpp index 8d8d857a02..63a2516399 100644 --- a/src/video_core/gpu_thread.cpp +++ b/src/video_core/gpu_thread.cpp @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later // SPDX-FileCopyrightText: Copyright 2019 yuzu Emulator Project @@ -92,7 +92,16 @@ void ThreadManager::InvalidateRegion(DAddr addr, u64 size) { } void ThreadManager::FlushAndInvalidateRegion(DAddr addr, u64 size) { - // Skip flush on asynch mode, as FlushAndInvalidateRegion is not used for anything too important + if (Settings::IsGPULevelHigh()) { + if (!is_async) { + PushCommand(FlushRegionCommand(addr, size)); + } else { + auto& gpu = system.GPU(); + const u64 fence = gpu.RequestFlush(addr, size); + TickGPU(); + gpu.WaitForSyncOperation(fence); + } + } rasterizer->OnCacheInvalidation(addr, size); } diff --git a/src/video_core/host_shaders/resolve_conditional_render.comp b/src/video_core/host_shaders/resolve_conditional_render.comp index 307e77d1ad..3bc92f94fa 100644 --- a/src/video_core/host_shaders/resolve_conditional_render.comp +++ b/src/video_core/host_shaders/resolve_conditional_render.comp @@ -1,3 +1,6 @@ +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project +// SPDX-License-Identifier: GPL-3.0-or-later + // SPDX-FileCopyrightText: Copyright 2023 yuzu Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later @@ -5,16 +8,22 @@ layout(local_size_x = 1) in; -layout(std430, binding = 0) buffer Query { - uvec2 initial; - uvec2 unknown; - uvec2 current; +layout(std430, binding = 0) readonly buffer Query { + uint data[]; }; -layout(std430, binding = 1) buffer Result { +layout(std430, binding = 1) writeonly buffer Result { uint result; }; +layout(push_constant) uniform PushConstants { + uint compare_to_zero; +}; + void main() { - result = all(equal(initial, current)) ? 1 : 0; + if (compare_to_zero != 0u) { + result = (data[0] != 0u && data[1] != 0u) ? 1u : 0u; + } else { + result = (data[0] == data[4] && data[1] == data[5]) ? 1u : 0u; + } } diff --git a/src/video_core/macro.cpp b/src/video_core/macro.cpp index 66cea5afbd..2cda78c459 100644 --- a/src/video_core/macro.cpp +++ b/src/video_core/macro.cpp @@ -285,11 +285,11 @@ void HLE_MultiDrawIndexedIndirectCount::Fallback(Engines::Maxwell3D& maxwell3d, } void HLE_DrawIndirectByteCount::Execute(Engines::Maxwell3D& maxwell3d, std::span parameters, [[maybe_unused]] u32 method) { const bool force = maxwell3d.Rasterizer().HasDrawTransformFeedback(); - auto topology = Maxwell3D::Regs::PrimitiveTopology(parameters[0] & 0xFFFFU); - if (!force && (!maxwell3d.AnyParametersDirty() || !IsTopologySafe(topology))) { + if (!force) { Fallback(maxwell3d, parameters); return; } + auto topology = Maxwell3D::Regs::PrimitiveTopology(parameters[0] & 0xFFFFU); auto& params = maxwell3d.draw_manager->GetIndirectParams(); params.is_byte_count = true; params.is_indexed = false; diff --git a/src/video_core/query_cache/query_cache.h b/src/video_core/query_cache/query_cache.h index 4ed42487aa..6bed91a53e 100644 --- a/src/video_core/query_cache/query_cache.h +++ b/src/video_core/query_cache/query_cache.h @@ -412,6 +412,7 @@ bool QueryCacheBase::AccelerateHostConditionalRendering() { .found_query = nullptr, }; } + it_current = it_current_2; } auto* query = impl->ObtainQuery(it_current->second); qc_dirty |= True(query->flags & QueryFlagBits::IsHostManaged) && diff --git a/src/video_core/query_cache/query_stream.h b/src/video_core/query_cache/query_stream.h index 1d11b12752..b4dc9d1815 100644 --- a/src/video_core/query_cache/query_stream.h +++ b/src/video_core/query_cache/query_stream.h @@ -1,3 +1,6 @@ +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project +// SPDX-License-Identifier: GPL-3.0-or-later + // SPDX-FileCopyrightText: Copyright 2023 yuzu Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later @@ -75,7 +78,7 @@ public: } u64 GetDependentMask() const { - return dependence_mask; + return dependent_mask; } u64 GetAmendValue() const { diff --git a/src/video_core/renderer_opengl/gl_rasterizer.cpp b/src/video_core/renderer_opengl/gl_rasterizer.cpp index e268c4d2c6..26826a8f78 100644 --- a/src/video_core/renderer_opengl/gl_rasterizer.cpp +++ b/src/video_core/renderer_opengl/gl_rasterizer.cpp @@ -629,6 +629,9 @@ void RasterizerOpenGL::ReleaseFences(bool force) { void RasterizerOpenGL::FlushAndInvalidateRegion(DAddr addr, u64 size, VideoCommon::CacheType which) { + if (Settings::IsGPULevelHigh()) { + FlushRegion(addr, size, which); + } InvalidateRegion(addr, size, which); } diff --git a/src/video_core/renderer_vulkan/fixed_pipeline_state.cpp b/src/video_core/renderer_vulkan/fixed_pipeline_state.cpp index 866b721a84..d53cf70b37 100644 --- a/src/video_core/renderer_vulkan/fixed_pipeline_state.cpp +++ b/src/video_core/renderer_vulkan/fixed_pipeline_state.cpp @@ -190,9 +190,7 @@ void FixedPipelineState::Refresh(Tegra::Engines::Maxwell3D& maxwell3d, DynamicFe } } } - if (!extended_dynamic_state_3_enables) { - dynamic_state.Refresh3(regs); - } + dynamic_state.Refresh3(regs, features); if (xfb_enabled) { RefreshXfbState(xfb_state, regs); } @@ -295,16 +293,22 @@ void FixedPipelineState::DynamicState::Refresh2(const Maxwell& regs, depth_bias_enable.Assign(enabled_lut[POLYGON_OFFSET_ENABLE_LUT[topology_index]] != 0 ? 1 : 0); } -void FixedPipelineState::DynamicState::Refresh3(const Maxwell& regs) { - logic_op_enable.Assign(regs.logic_op.enable != 0 ? 1 : 0); - depth_clamp_disabled.Assign(regs.viewport_clip_control.geometry_clip == - Maxwell::ViewportClipControl::GeometryClip::Passthrough || - regs.viewport_clip_control.geometry_clip == - Maxwell::ViewportClipControl::GeometryClip::FrustumXYZ || - regs.viewport_clip_control.geometry_clip == - Maxwell::ViewportClipControl::GeometryClip::FrustumZ); - - line_stipple_enable.Assign(regs.line_stipple_enable); +void FixedPipelineState::DynamicState::Refresh3(const Maxwell& regs, + const DynamicFeatures& features) { + if (!features.has_dynamic_state3_logic_op_enable) { + logic_op_enable.Assign(regs.logic_op.enable != 0 ? 1 : 0); + } + if (!features.has_dynamic_state3_depth_clamp_enable) { + depth_clamp_disabled.Assign(regs.viewport_clip_control.geometry_clip == + Maxwell::ViewportClipControl::GeometryClip::Passthrough || + regs.viewport_clip_control.geometry_clip == + Maxwell::ViewportClipControl::GeometryClip::FrustumXYZ || + regs.viewport_clip_control.geometry_clip == + Maxwell::ViewportClipControl::GeometryClip::FrustumZ); + } + if (!features.has_dynamic_state3_line_stipple_enable) { + line_stipple_enable.Assign(regs.line_stipple_enable); + } } size_t FixedPipelineState::Hash() const noexcept { diff --git a/src/video_core/renderer_vulkan/fixed_pipeline_state.h b/src/video_core/renderer_vulkan/fixed_pipeline_state.h index ffc91e9a55..44157d686d 100644 --- a/src/video_core/renderer_vulkan/fixed_pipeline_state.h +++ b/src/video_core/renderer_vulkan/fixed_pipeline_state.h @@ -27,6 +27,9 @@ struct DynamicFeatures { bool has_extended_dynamic_state_2_patch_control_points; bool has_extended_dynamic_state_3_blend; bool has_extended_dynamic_state_3_enables; + bool has_dynamic_state3_depth_clamp_enable; + bool has_dynamic_state3_logic_op_enable; + bool has_dynamic_state3_line_stipple_enable; bool has_dynamic_vertex_input; bool has_provoking_vertex; bool has_provoking_vertex_first_mode; @@ -175,7 +178,7 @@ struct FixedPipelineState { void Refresh(const Maxwell& regs); void Refresh2(const Maxwell& regs, Maxwell::PrimitiveTopology topology, bool base_features_supported); - void Refresh3(const Maxwell& regs); + void Refresh3(const Maxwell& regs, const DynamicFeatures& features); Maxwell::ComparisonOp DepthTestFunc() const noexcept { return UnpackComparisonOp(depth_test_func); @@ -265,8 +268,7 @@ struct FixedPipelineState { return sizeof(*this); } if (dynamic_vertex_input && extended_dynamic_state_3_blend) { - // Exclude dynamic state and attributes - return offsetof(FixedPipelineState, dynamic_state); + return offsetof(FixedPipelineState, attachments); } if (dynamic_vertex_input) { // Exclude dynamic state diff --git a/src/video_core/renderer_vulkan/renderer_vulkan.cpp b/src/video_core/renderer_vulkan/renderer_vulkan.cpp index 010cfd225d..2deec13ace 100644 --- a/src/video_core/renderer_vulkan/renderer_vulkan.cpp +++ b/src/video_core/renderer_vulkan/renderer_vulkan.cpp @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -171,7 +172,11 @@ try RendererVulkan::~RendererVulkan() { scheduler.RegisterOnSubmit([] {}); - void(device.GetLogical().WaitIdle()); + scheduler.Finish(); + { + std::scoped_lock lock{scheduler.submit_mutex}; + void(device.GetLogical().WaitIdle()); + } } void RendererVulkan::Composite(std::span framebuffers) { diff --git a/src/video_core/renderer_vulkan/vk_blit_screen.cpp b/src/video_core/renderer_vulkan/vk_blit_screen.cpp index bb7eb9bdaa..75a8c3bf91 100644 --- a/src/video_core/renderer_vulkan/vk_blit_screen.cpp +++ b/src/video_core/renderer_vulkan/vk_blit_screen.cpp @@ -8,6 +8,7 @@ // SPDX-License-Identifier: GPL-2.0-or-later #include +#include #include "video_core/framebuffer_config.h" #include "video_core/present.h" #include "video_core/renderer_vulkan/present/filters.h" @@ -31,7 +32,10 @@ BlitScreen::~BlitScreen() = default; void BlitScreen::WaitIdle() { present_manager.WaitPresent(); scheduler.Finish(); - device.GetLogical().WaitIdle(); + { + std::scoped_lock lock{scheduler.submit_mutex}; + device.GetLogical().WaitIdle(); + } } void BlitScreen::SetWindowAdaptPass() { diff --git a/src/video_core/renderer_vulkan/vk_buffer_cache.cpp b/src/video_core/renderer_vulkan/vk_buffer_cache.cpp index 74f06427dd..a359502046 100644 --- a/src/video_core/renderer_vulkan/vk_buffer_cache.cpp +++ b/src/video_core/renderer_vulkan/vk_buffer_cache.cpp @@ -637,12 +637,10 @@ void BufferCacheRuntime::BindTransformFeedbackBuffers(VideoCommon::HostBindings< for (u32 i = 0; i < bindings.buffers.size(); ++i) { auto handle = bindings.buffers[i]->Handle(); if (handle == VK_NULL_HANDLE) { + ReserveNullBuffer(); + handle = *null_buffer; bindings.offsets[i] = 0; - bindings.sizes[i] = VK_WHOLE_SIZE; - if (!device.HasNullDescriptor()) { - ReserveNullBuffer(); - handle = *null_buffer; - } + bindings.sizes[i] = 0; } buffer_handles[i] = handle; } diff --git a/src/video_core/renderer_vulkan/vk_compute_pass.cpp b/src/video_core/renderer_vulkan/vk_compute_pass.cpp index d45a57f7bb..f198b65d69 100644 --- a/src/video_core/renderer_vulkan/vk_compute_pass.cpp +++ b/src/video_core/renderer_vulkan/vk_compute_pass.cpp @@ -228,6 +228,10 @@ struct QueriesPrefixScanPushConstants { u32 accumulation_limit; u32 buffer_offset; }; + +struct ConditionalRenderingResolvePushConstants { + u32 compare_to_zero; +}; } // Anonymous namespace ComputePass::ComputePass(const Device& device_, DescriptorPool& descriptor_pool, @@ -413,7 +417,8 @@ ConditionalRenderingResolvePass::ConditionalRenderingResolvePass( const Device& device_, Scheduler& scheduler_, DescriptorPool& descriptor_pool_, ComputePassDescriptorQueue& compute_pass_descriptor_queue_) : ComputePass(device_, descriptor_pool_, INPUT_OUTPUT_DESCRIPTOR_SET_BINDINGS, - INPUT_OUTPUT_DESCRIPTOR_UPDATE_TEMPLATE, INPUT_OUTPUT_BANK_INFO, nullptr, + INPUT_OUTPUT_DESCRIPTOR_UPDATE_TEMPLATE, INPUT_OUTPUT_BANK_INFO, + COMPUTE_PUSH_CONSTANT_RANGE, RESOLVE_CONDITIONAL_RENDER_COMP_SPV), scheduler{scheduler_}, compute_pass_descriptor_queue{compute_pass_descriptor_queue_} {} @@ -430,7 +435,7 @@ void ConditionalRenderingResolvePass::Resolve(VkBuffer dst_buffer, VkBuffer src_ const void* const descriptor_data{compute_pass_descriptor_queue.UpdateData()}; scheduler.RequestOutsideRenderPassOperationContext(); - scheduler.Record([this, descriptor_data](vk::CommandBuffer cmdbuf) { + scheduler.Record([this, descriptor_data, compare_to_zero](vk::CommandBuffer cmdbuf) { static constexpr VkMemoryBarrier read_barrier{ .sType = VK_STRUCTURE_TYPE_MEMORY_BARRIER, .pNext = nullptr, @@ -443,6 +448,9 @@ void ConditionalRenderingResolvePass::Resolve(VkBuffer dst_buffer, VkBuffer src_ .srcAccessMask = VK_ACCESS_SHADER_WRITE_BIT, .dstAccessMask = VK_ACCESS_CONDITIONAL_RENDERING_READ_BIT_EXT, }; + const ConditionalRenderingResolvePushConstants uniforms{ + .compare_to_zero = compare_to_zero ? 1U : 0U, + }; const VkDescriptorSet set = descriptor_allocator.Commit(); device.GetLogical().UpdateDescriptorSet(set, *descriptor_template, descriptor_data); @@ -450,9 +458,11 @@ void ConditionalRenderingResolvePass::Resolve(VkBuffer dst_buffer, VkBuffer src_ VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT, 0, read_barrier); cmdbuf.BindPipeline(VK_PIPELINE_BIND_POINT_COMPUTE, *pipeline); cmdbuf.BindDescriptorSets(VK_PIPELINE_BIND_POINT_COMPUTE, *layout, 0, set, {}); + cmdbuf.PushConstants(*layout, VK_SHADER_STAGE_COMPUTE_BIT, uniforms); cmdbuf.Dispatch(1, 1, 1); cmdbuf.PipelineBarrier(VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT, - VK_PIPELINE_STAGE_ALL_COMMANDS_BIT, 0, write_barrier); + VK_PIPELINE_STAGE_CONDITIONAL_RENDERING_BIT_EXT, 0, + write_barrier); }); } @@ -520,7 +530,7 @@ void QueriesPrefixScanPass::Run(VkBuffer accumulation_buffer, VkBuffer dst_buffe const VkDescriptorSet set = descriptor_allocator.Commit(); device.GetLogical().UpdateDescriptorSet(set, *descriptor_template, descriptor_data); - cmdbuf.PipelineBarrier(VK_PIPELINE_STAGE_ALL_COMMANDS_BIT, + cmdbuf.PipelineBarrier(VK_PIPELINE_STAGE_TRANSFER_BIT, VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT, 0, read_barrier); cmdbuf.BindPipeline(VK_PIPELINE_BIND_POINT_COMPUTE, *pipeline); cmdbuf.BindDescriptorSets(VK_PIPELINE_BIND_POINT_COMPUTE, *layout, 0, set, {}); diff --git a/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp b/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp index 8f706a02c8..43fbefe425 100644 --- a/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp +++ b/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp @@ -467,6 +467,10 @@ bool GraphicsPipeline::ConfigureImpl(bool is_indexed) { bind_stage_info(4); } + if (regs.transform_feedback_enabled != 0) { + scheduler.RequestOutsideRenderPassOperationContext(); + } + buffer_cache.UpdateGraphicsBuffers(is_indexed); buffer_cache.BindHostGeometryBuffers(is_indexed); diff --git a/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp b/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp index 5f86506961..7b5ac7fac0 100644 --- a/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp +++ b/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp @@ -485,6 +485,12 @@ PipelineCache::PipelineCache(Tegra::MaxwellDeviceMemoryManager& device_memory_, device.IsExtExtendedDynamicState3BlendingSupported(); dynamic_features.has_extended_dynamic_state_3_enables = device.IsExtExtendedDynamicState3EnablesSupported(); + dynamic_features.has_dynamic_state3_depth_clamp_enable = + device.SupportsDynamicState3DepthClampEnable(); + dynamic_features.has_dynamic_state3_logic_op_enable = + device.SupportsDynamicState3LogicOpEnable(); + dynamic_features.has_dynamic_state3_line_stipple_enable = + device.SupportsDynamicState3LineStippleEnable(); // VIDS: Independent toggle (not affected by dyna_state levels) dynamic_features.has_dynamic_vertex_input = diff --git a/src/video_core/renderer_vulkan/vk_present_manager.cpp b/src/video_core/renderer_vulkan/vk_present_manager.cpp index 80853362ad..de854554c7 100644 --- a/src/video_core/renderer_vulkan/vk_present_manager.cpp +++ b/src/video_core/renderer_vulkan/vk_present_manager.cpp @@ -189,7 +189,7 @@ void PresentManager::RecreateFrame(Frame* frame, u32 width, u32 height, VkFormat frame->image = memory_allocator.CreateImage({ .sType = VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO, .pNext = nullptr, - .flags = VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT, + .flags = VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT | VK_IMAGE_CREATE_EXTENDED_USAGE_BIT, .imageType = VK_IMAGE_TYPE_2D, .format = swapchain.GetImageFormat(), .extent = diff --git a/src/video_core/renderer_vulkan/vk_query_cache.cpp b/src/video_core/renderer_vulkan/vk_query_cache.cpp index 8518d89eee..6aea5d18a8 100644 --- a/src/video_core/renderer_vulkan/vk_query_cache.cpp +++ b/src/video_core/renderer_vulkan/vk_query_cache.cpp @@ -157,8 +157,9 @@ public: ReserveHostQuery(); scheduler.Record([query_pool = current_query_pool, - query_index = current_bank_slot](vk::CommandBuffer cmdbuf) { + query_index = current_bank_slot](vk::CommandBuffer cmdbuf) { const bool use_precise = Settings::IsGPULevelHigh(); + cmdbuf.ResetQueryPool(query_pool, static_cast(query_index), 1); cmdbuf.BeginQuery(query_pool, static_cast(query_index), use_precise ? VK_QUERY_CONTROL_PRECISE_BIT : 0); }); @@ -220,8 +221,7 @@ public: } PauseCounter(); const auto driver_id = device.GetDriverID(); - if (driver_id == VK_DRIVER_ID_QUALCOMM_PROPRIETARY || - driver_id == VK_DRIVER_ID_ARM_PROPRIETARY || driver_id == VK_DRIVER_ID_MESA_TURNIP) { + if (driver_id == VK_DRIVER_ID_ARM_PROPRIETARY || driver_id == VK_DRIVER_ID_MESA_TURNIP) { pending_sync.clear(); sync_values_stash.clear(); return; @@ -666,13 +666,18 @@ public: offsets.fill(0); last_queries.fill(0); last_queries_stride.fill(1); + stream_to_slot.fill(INVALID_SLOT); + VkBufferUsageFlags counter_buffer_usage = + VK_BUFFER_USAGE_TRANSFER_SRC_BIT | VK_BUFFER_USAGE_TRANSFER_DST_BIT; + if (device.IsExtTransformFeedbackSupported()) { + counter_buffer_usage |= VK_BUFFER_USAGE_TRANSFORM_FEEDBACK_COUNTER_BUFFER_BIT_EXT; + } const VkBufferCreateInfo buffer_ci = { .sType = VK_STRUCTURE_TYPE_BUFFER_CREATE_INFO, .pNext = nullptr, .flags = 0, .size = TFBQueryBank::QUERY_SIZE * NUM_STREAMS, - .usage = VK_BUFFER_USAGE_TRANSFER_SRC_BIT | VK_BUFFER_USAGE_TRANSFER_DST_BIT | - VK_BUFFER_USAGE_TRANSFORM_FEEDBACK_COUNTER_BUFFER_BIT_EXT, + .usage = counter_buffer_usage, .sharingMode = VK_SHARING_MODE_EXCLUSIVE, .queueFamilyIndexCount = 0, .pQueueFamilyIndices = nullptr, @@ -692,6 +697,9 @@ public: ~TFBCounterStreamer() = default; void StartCounter() override { + if (!device.IsExtTransformFeedbackSupported()) { + return; + } FlushBeginTFB(); has_started = true; } @@ -706,7 +714,9 @@ public: void CloseCounter() override { if (has_flushed_end_pending) { - FlushEndTFB(); + if (scheduler.IsRenderPassActive()) { + FlushEndTFB(); + } } runtime.View3DRegs([this](Maxwell3D& maxwell3d) { if (maxwell3d.regs.transform_feedback_enabled == 0) { @@ -756,18 +766,33 @@ public: if (has_timestamp) { new_query->flags |= VideoCommon::QueryFlagBits::HasTimestamp; } + if (!device.IsExtTransformFeedbackSupported()) { + new_query->flags |= VideoCommon::QueryFlagBits::IsFinalValueSynced; + return index; + } if (!subreport_) { new_query->flags |= VideoCommon::QueryFlagBits::IsFinalValueSynced; return index; } const size_t subreport = static_cast(*subreport_); + if (subreport >= NUM_STREAMS) { + new_query->flags |= VideoCommon::QueryFlagBits::IsFinalValueSynced; + return index; + } last_queries[subreport] = address; if ((streams_mask & (1ULL << subreport)) == 0) { new_query->flags |= VideoCommon::QueryFlagBits::IsFinalValueSynced; return index; } + const size_t slot = stream_to_slot[subreport]; + if (slot >= NUM_STREAMS) { + new_query->flags |= VideoCommon::QueryFlagBits::IsFinalValueSynced; + return index; + } + + scheduler.RequestOutsideRenderPassOperationContext(); CloseCounter(); - auto [bank_slot, data_slot] = ProduceCounterBuffer(subreport); + auto [bank_slot, data_slot] = ProduceCounterBuffer(slot); new_query->start_bank_id = static_cast(bank_slot); new_query->size_banks = 1; new_query->start_slot = static_cast(data_slot); @@ -778,6 +803,9 @@ public: } std::optional> GetLastQueryStream(size_t stream) { + if (stream >= NUM_STREAMS) { + return std::nullopt; + } if (last_queries[stream] != 0) { std::pair result(last_queries[stream], last_queries_stride[stream]); return result; @@ -789,6 +817,10 @@ public: return out_topology; } + u32 GetPatchVertices() const { + return patch_vertices; + } + bool HasUnsyncedQueries() const override { return !pending_flush_queries.empty(); } @@ -855,6 +887,9 @@ public: private: void FlushBeginTFB() { + if (!device.IsExtTransformFeedbackSupported()) [[unlikely]] { + return; + } if (has_flushed_end_pending) [[unlikely]] { return; } @@ -868,12 +903,24 @@ private: }); return; } + static constexpr VkMemoryBarrier COUNTER_RESUME_BARRIER{ + .sType = VK_STRUCTURE_TYPE_MEMORY_BARRIER, + .pNext = nullptr, + .srcAccessMask = VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_WRITE_BIT_EXT, + .dstAccessMask = VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_READ_BIT_EXT, + }; scheduler.Record([this, total = static_cast(buffers_count)](vk::CommandBuffer cmdbuf) { + cmdbuf.PipelineBarrier(VK_PIPELINE_STAGE_TRANSFORM_FEEDBACK_BIT_EXT, + VK_PIPELINE_STAGE_TRANSFORM_FEEDBACK_BIT_EXT, 0, + COUNTER_RESUME_BARRIER); cmdbuf.BeginTransformFeedbackEXT(0, total, counter_buffers.data(), offsets.data()); }); } void FlushEndTFB() { + if (!device.IsExtTransformFeedbackSupported()) [[unlikely]] { + return; + } if (!has_flushed_end_pending) [[unlikely]] { UNREACHABLE(); return; @@ -899,28 +946,48 @@ private: void UpdateBuffers() { last_queries.fill(0); last_queries_stride.fill(1); + stream_to_slot.fill(INVALID_SLOT); streams_mask = 0; // reset previously recorded streams runtime.View3DRegs([this](Maxwell3D& maxwell3d) { buffers_count = 0; out_topology = maxwell3d.draw_manager->GetDrawState().topology; + patch_vertices = std::max(maxwell3d.regs.patch_vertices, 1U); + if (out_topology == Maxwell3D::Regs::PrimitiveTopology::Patches) { + switch (maxwell3d.regs.tessellation.params.output_primitives.Value()) { + case Maxwell3D::Regs::Tessellation::OutputPrimitives::Points: + out_topology = Maxwell3D::Regs::PrimitiveTopology::Points; + break; + case Maxwell3D::Regs::Tessellation::OutputPrimitives::Lines: + out_topology = Maxwell3D::Regs::PrimitiveTopology::LineStrip; + break; + case Maxwell3D::Regs::Tessellation::OutputPrimitives::Triangles_CW: + case Maxwell3D::Regs::Tessellation::OutputPrimitives::Triangles_CCW: + out_topology = Maxwell3D::Regs::PrimitiveTopology::TriangleStrip; + break; + } + } for (size_t i = 0; i < Maxwell3D::Regs::NumTransformFeedbackBuffers; i++) { const auto& tf = maxwell3d.regs.transform_feedback; if (tf.buffers[i].enable == 0) { continue; } + buffers_count = std::max(buffers_count, i + 1); const size_t stream = tf.controls[i].stream; if (stream >= last_queries_stride.size()) { LOG_WARNING(Render_Vulkan, "TransformFeedback stream {} out of range", stream); continue; } + if ((streams_mask & (1ULL << stream)) != 0) { + continue; + } last_queries_stride[stream] = tf.controls[i].stride; + stream_to_slot[stream] = i; streams_mask |= 1ULL << stream; - buffers_count = std::max(buffers_count, stream + 1); } }); } - std::pair ProduceCounterBuffer(size_t stream) { + std::pair ProduceCounterBuffer(size_t slot_index) { if (current_bank == nullptr || current_bank->IsClosed()) { current_bank_id = bank_pool.ReserveBank([this](std::deque& queue, size_t index) { @@ -946,7 +1013,8 @@ private: }; scheduler.RequestOutsideRenderPassOperationContext(); scheduler.Record([dst_buffer = current_bank->GetBuffer(), - src_buffer = counter_buffers[stream], src_offset = offsets[stream], + src_buffer = counter_buffers[slot_index], + src_offset = offsets[slot_index], slot](vk::CommandBuffer cmdbuf) { cmdbuf.PipelineBarrier(VK_PIPELINE_STAGE_TRANSFORM_FEEDBACK_BIT_EXT, VK_PIPELINE_STAGE_TRANSFER_BIT, 0, READ_BARRIER); @@ -965,6 +1033,7 @@ private: friend class PrimitivesSucceededStreamer; static constexpr size_t NUM_STREAMS = 4; + static constexpr size_t INVALID_SLOT = NUM_STREAMS; QueryCacheRuntime& runtime; const Device& device; @@ -994,7 +1063,9 @@ private: std::array offsets{}; std::array last_queries; std::array last_queries_stride; + std::array stream_to_slot; Maxwell3D::Regs::PrimitiveTopology out_topology; + u32 patch_vertices{1}; u64 streams_mask; }; @@ -1015,6 +1086,7 @@ public: u64 stride{}; DAddr dependant_address{}; Maxwell3D::Regs::PrimitiveTopology topology{Maxwell3D::Regs::PrimitiveTopology::Points}; + u32 patch_vertices{1}; size_t dependant_index{}; bool dependant_manage{}; }; @@ -1031,6 +1103,10 @@ public: ~PrimitivesSucceededStreamer() = default; + void ResetCounter() override { + tfb_streamer.ResetCounter(); + } + size_t WriteCounter(DAddr address, bool has_timestamp, u32 value, std::optional subreport_) override { auto index = BuildQuery(); @@ -1048,6 +1124,7 @@ public: auto dependant_address_opt = tfb_streamer.GetLastQueryStream(subreport); bool must_manage_dependance = false; new_query->topology = tfb_streamer.GetOutputTopology(); + new_query->patch_vertices = tfb_streamer.GetPatchVertices(); if (dependant_address_opt) { auto [dep_address, stride] = *dependant_address_opt; new_query->dependant_address = dep_address; @@ -1068,6 +1145,7 @@ public: } new_query->stride = 1; runtime.View3DRegs([new_query, subreport](Maxwell3D& maxwell3d) { + new_query->patch_vertices = std::max(maxwell3d.regs.patch_vertices, 1U); for (size_t i = 0; i < Maxwell3D::Regs::NumTransformFeedbackBuffers; i++) { const auto& tf = maxwell3d.regs.transform_feedback; if (tf.buffers[i].enable == 0) { @@ -1131,27 +1209,39 @@ public: } } query->value = [&]() -> u64 { + const auto saturating_subtract = [](u64 value, u64 amount) { + return value > amount ? value - amount : 0; + }; switch (query->topology) { case Maxwell3D::Regs::PrimitiveTopology::Points: return num_vertices; case Maxwell3D::Regs::PrimitiveTopology::Lines: return num_vertices / 2; case Maxwell3D::Regs::PrimitiveTopology::LineLoop: - return (num_vertices / 2) + 1; + return num_vertices > 1 ? num_vertices : 0; case Maxwell3D::Regs::PrimitiveTopology::LineStrip: - return num_vertices - 1; - case Maxwell3D::Regs::PrimitiveTopology::Patches: + return saturating_subtract(num_vertices, 1); + case Maxwell3D::Regs::PrimitiveTopology::LinesAdjacency: + return num_vertices / 4; + case Maxwell3D::Regs::PrimitiveTopology::LineStripAdjacency: + return saturating_subtract(num_vertices, 3); case Maxwell3D::Regs::PrimitiveTopology::Triangles: - case Maxwell3D::Regs::PrimitiveTopology::TrianglesAdjacency: return num_vertices / 3; + case Maxwell3D::Regs::PrimitiveTopology::TrianglesAdjacency: + return num_vertices / 6; case Maxwell3D::Regs::PrimitiveTopology::TriangleFan: case Maxwell3D::Regs::PrimitiveTopology::TriangleStrip: + return saturating_subtract(num_vertices, 2); case Maxwell3D::Regs::PrimitiveTopology::TriangleStripAdjacency: - return num_vertices - 2; + return num_vertices > 4 ? (num_vertices - 4) / 2 : 0; case Maxwell3D::Regs::PrimitiveTopology::Quads: return num_vertices / 4; + case Maxwell3D::Regs::PrimitiveTopology::QuadStrip: + return num_vertices > 2 ? (num_vertices - 2) / 2 : 0; case Maxwell3D::Regs::PrimitiveTopology::Polygon: - return 1U; + return num_vertices >= 3 ? 1U : 0U; + case Maxwell3D::Regs::PrimitiveTopology::Patches: + return num_vertices / std::max(query->patch_vertices, 1U); default: return num_vertices; } @@ -1202,16 +1292,24 @@ struct QueryCacheRuntimeImpl { hcr_setup.pNext = nullptr; hcr_setup.flags = 0; - conditional_resolve_pass = std::make_unique( - device, scheduler, descriptor_pool, compute_pass_descriptor_queue); + const bool has_conditional_rendering = device.IsExtConditionalRendering(); + if (has_conditional_rendering) { + conditional_resolve_pass = std::make_unique( + device, scheduler, descriptor_pool, compute_pass_descriptor_queue); + } + + VkBufferUsageFlags hcr_buffer_usage = + VK_BUFFER_USAGE_TRANSFER_DST_BIT | VK_BUFFER_USAGE_STORAGE_BUFFER_BIT; + if (has_conditional_rendering) { + hcr_buffer_usage |= VK_BUFFER_USAGE_CONDITIONAL_RENDERING_BIT_EXT; + } const VkBufferCreateInfo buffer_ci = { .sType = VK_STRUCTURE_TYPE_BUFFER_CREATE_INFO, .pNext = nullptr, .flags = 0, .size = sizeof(u32), - .usage = VK_BUFFER_USAGE_TRANSFER_DST_BIT | VK_BUFFER_USAGE_STORAGE_BUFFER_BIT | - VK_BUFFER_USAGE_CONDITIONAL_RENDERING_BIT_EXT, + .usage = hcr_buffer_usage, .sharingMode = VK_SHARING_MODE_EXCLUSIVE, .queueFamilyIndexCount = 0, .pQueueFamilyIndices = nullptr, @@ -1338,15 +1436,17 @@ void QueryCacheRuntime::HostConditionalRenderingCompareValueImpl(VideoCommon::Lo } } -void QueryCacheRuntime::HostConditionalRenderingCompareBCImpl(DAddr address, bool is_equal) { +void QueryCacheRuntime::HostConditionalRenderingCompareBCImpl(DAddr address, bool is_equal, + bool compare_to_zero) { VkBuffer to_resolve; u32 to_resolve_offset; + const u32 resolve_size = compare_to_zero ? 8 : 24; { std::scoped_lock lk(impl->buffer_cache.mutex); - static constexpr auto sync_info = VideoCommon::ObtainBufferSynchronize::NoSynchronize; + const auto sync_info = VideoCommon::ObtainBufferSynchronize::FullSynchronize; const auto post_op = VideoCommon::ObtainBufferOperation::DoNothing; const auto [buffer, offset] = - impl->buffer_cache.ObtainCPUBuffer(address, 24, sync_info, post_op); + impl->buffer_cache.ObtainCPUBuffer(address, resolve_size, sync_info, post_op); to_resolve = buffer->Handle(); to_resolve_offset = static_cast(offset); } @@ -1355,7 +1455,7 @@ void QueryCacheRuntime::HostConditionalRenderingCompareBCImpl(DAddr address, boo PauseHostConditionalRendering(); } impl->conditional_resolve_pass->Resolve(*impl->hcr_resolve_buffer, to_resolve, - to_resolve_offset, false); + to_resolve_offset, compare_to_zero); impl->hcr_setup.buffer = *impl->hcr_resolve_buffer; impl->hcr_setup.offset = 0; impl->hcr_setup.flags = is_equal ? 0 : VK_CONDITIONAL_RENDERING_INVERTED_BIT_EXT; @@ -1371,7 +1471,7 @@ bool QueryCacheRuntime::HostConditionalRenderingCompareValue(VideoCommon::Lookup if (!impl->device.IsExtConditionalRendering()) { return false; } - HostConditionalRenderingCompareValueImpl(object_1, false); + HostConditionalRenderingCompareBCImpl(object_1.address, true, true); return true; } @@ -1420,7 +1520,8 @@ bool QueryCacheRuntime::HostConditionalRenderingCompareValues(VideoCommon::Looku auto driver_id = impl->device.GetDriverID(); const bool is_gpu_high = Settings::IsGPULevelHigh(); - if ((!is_gpu_high && driver_id == VK_DRIVER_ID_INTEL_PROPRIETARY_WINDOWS) || driver_id == VK_DRIVER_ID_QUALCOMM_PROPRIETARY || driver_id == VK_DRIVER_ID_ARM_PROPRIETARY || driver_id == VK_DRIVER_ID_MESA_TURNIP) { + if ((!is_gpu_high && driver_id == VK_DRIVER_ID_INTEL_PROPRIETARY_WINDOWS) || driver_id == VK_DRIVER_ID_ARM_PROPRIETARY || driver_id == VK_DRIVER_ID_MESA_TURNIP) { + EndHostConditionalRendering(); return true; } @@ -1437,10 +1538,12 @@ bool QueryCacheRuntime::HostConditionalRenderingCompareValues(VideoCommon::Looku } if (!is_gpu_high) { + EndHostConditionalRendering(); return true; } if (!is_in_bc[0] && !is_in_bc[1]) { + EndHostConditionalRendering(); return true; } HostConditionalRenderingCompareBCImpl(object_1.address, equal_check); diff --git a/src/video_core/renderer_vulkan/vk_query_cache.h b/src/video_core/renderer_vulkan/vk_query_cache.h index e2aa4d991e..bbb5234e11 100644 --- a/src/video_core/renderer_vulkan/vk_query_cache.h +++ b/src/video_core/renderer_vulkan/vk_query_cache.h @@ -63,7 +63,8 @@ public: private: void HostConditionalRenderingCompareValueImpl(VideoCommon::LookupData object, bool is_equal); - void HostConditionalRenderingCompareBCImpl(DAddr address, bool is_equal); + void HostConditionalRenderingCompareBCImpl(DAddr address, bool is_equal, + bool compare_to_zero = false); friend struct QueryCacheRuntimeImpl; std::unique_ptr impl; }; diff --git a/src/video_core/renderer_vulkan/vk_rasterizer.cpp b/src/video_core/renderer_vulkan/vk_rasterizer.cpp index ba7b5d8c1b..78337b3ebe 100644 --- a/src/video_core/renderer_vulkan/vk_rasterizer.cpp +++ b/src/video_core/renderer_vulkan/vk_rasterizer.cpp @@ -173,6 +173,28 @@ DrawParams MakeDrawParams(const MaxwellDrawState& draw_state, u32 num_instances, } return params; } + +bool SupportsPrimitiveRestart(VkPrimitiveTopology topology) { + switch (topology) { + case VK_PRIMITIVE_TOPOLOGY_POINT_LIST: + case VK_PRIMITIVE_TOPOLOGY_LINE_LIST: + case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST: + case VK_PRIMITIVE_TOPOLOGY_LINE_LIST_WITH_ADJACENCY: + case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST_WITH_ADJACENCY: + case VK_PRIMITIVE_TOPOLOGY_PATCH_LIST: + return false; + default: + return true; + } +} + +bool IsPrimitiveRestartSupported(const Device& device, VkPrimitiveTopology topology) { + return ((topology != VK_PRIMITIVE_TOPOLOGY_PATCH_LIST && + device.IsTopologyListPrimitiveRestartSupported()) || + SupportsPrimitiveRestart(topology) || + (topology == VK_PRIMITIVE_TOPOLOGY_PATCH_LIST && + device.IsPatchListPrimitiveRestartSupported())); +} } // Anonymous namespace RasterizerVulkan::RasterizerVulkan(Core::Frontend::EmuWindow& emu_window_, Tegra::GPU& gpu_, @@ -225,6 +247,7 @@ void RasterizerVulkan::PrepareDraw(bool is_indexed, Func&& draw_func) { UpdateDynamicStates(); + query_cache.NotifySegment(true); HandleTransformFeedback(); query_cache.CounterEnable(VideoCommon::QueryType::ZPassPixelCount64, maxwell3d->regs.zpass_pixel_count_enable); @@ -336,6 +359,7 @@ void RasterizerVulkan::DrawTexture() { UpdateDynamicStates(); + query_cache.NotifySegment(true); query_cache.CounterEnable(VideoCommon::QueryType::ZPassPixelCount64, maxwell3d->regs.zpass_pixel_count_enable); const auto& draw_texture_state = maxwell3d->draw_manager->GetDrawTextureState(); @@ -575,11 +599,17 @@ void RasterizerVulkan::DispatchCompute() { } void RasterizerVulkan::ResetCounter(VideoCommon::QueryType type) { - if (type != VideoCommon::QueryType::ZPassPixelCount64) { + switch (type) { + case VideoCommon::QueryType::ZPassPixelCount64: + case VideoCommon::QueryType::StreamingByteCount: + case VideoCommon::QueryType::StreamingPrimitivesSucceeded: + case VideoCommon::QueryType::VtgPrimitivesOut: + query_cache.CounterReset(type); + return; + default: LOG_DEBUG(Render_Vulkan, "Unimplemented counter reset={}", type); return; } - query_cache.CounterReset(type); } void RasterizerVulkan::Query(GPUVAddr gpu_addr, VideoCommon::QueryType type, @@ -766,6 +796,9 @@ void RasterizerVulkan::ReleaseFences(bool force) { void RasterizerVulkan::FlushAndInvalidateRegion(DAddr addr, u64 size, VideoCommon::CacheType which) { + if (Settings::IsGPULevelHigh()) { + FlushRegion(addr, size, which); + } InvalidateRegion(addr, size, which); } @@ -830,6 +863,10 @@ bool RasterizerVulkan::AccelerateConditionalRendering() { return query_cache.AccelerateHostConditionalRendering(); } +bool RasterizerVulkan::HasDrawTransformFeedback() { + return device.IsTransformFeedbackDrawSupported(); +} + bool RasterizerVulkan::AccelerateSurfaceCopy(const Tegra::Engines::Fermi2D::Surface& src, const Tegra::Engines::Fermi2D::Surface& dst, const Tegra::Engines::Fermi2D::Config& copy_config) { @@ -976,6 +1013,12 @@ bool AccelerateDMA::BufferToImage(const Tegra::DMA::ImageCopy& copy_info, void RasterizerVulkan::UpdateDynamicStates() { auto& regs = maxwell3d->regs; + auto& flags = maxwell3d->dirty.flags; + const auto topology = maxwell3d->draw_manager->GetDrawState().topology; + if (state_tracker.ChangePrimitiveTopology(topology)) { + flags[Dirty::DepthBiasEnable] = true; + flags[Dirty::PrimitiveRestartEnable] = true; + } // Core Dynamic States (Vulkan 1.0) - Always active regardless of dyna_state setting UpdateViewportsState(regs); @@ -1084,6 +1127,9 @@ void RasterizerVulkan::UpdateViewportsState(Tegra::Engines::Maxwell3D::Regs& reg if (!state_tracker.TouchViewports()) { return; } + + maxwell3d->dirty.flags[Dirty::Scissors] = true; + if (!regs.viewport_scale_offset_enabled) { float x = static_cast(regs.surface_clip.x); float y = static_cast(regs.surface_clip.y); @@ -1101,8 +1147,12 @@ void RasterizerVulkan::UpdateViewportsState(Tegra::Engines::Maxwell3D::Regs& reg .minDepth = 0.0f, .maxDepth = 1.0f, }; - scheduler.Record([viewport](vk::CommandBuffer cmdbuf) { - cmdbuf.SetViewport(0, viewport); + scheduler.Record([this, viewport](vk::CommandBuffer cmdbuf) { + const u32 num_viewports = std::min(device.GetMaxViewports(), Maxwell::NumViewports); + std::array viewport_list{}; + viewport_list.fill(viewport); + const vk::Span viewports(viewport_list.data(), num_viewports); + cmdbuf.SetViewport(0, viewports); }); return; } @@ -1142,8 +1192,12 @@ void RasterizerVulkan::UpdateScissorsState(Tegra::Engines::Maxwell3D::Regs& regs scissor.offset.y = static_cast(y); scissor.extent.width = width; scissor.extent.height = height; - scheduler.Record([scissor](vk::CommandBuffer cmdbuf) { - cmdbuf.SetScissor(0, scissor); + scheduler.Record([this, scissor](vk::CommandBuffer cmdbuf) { + const u32 num_scissors = std::min(device.GetMaxViewports(), Maxwell::NumViewports); + std::array scissor_list{}; + scissor_list.fill(scissor); + const vk::Span scissors(scissor_list.data(), num_scissors); + cmdbuf.SetScissor(0, scissors); }); return; } @@ -1388,7 +1442,17 @@ void RasterizerVulkan::UpdatePrimitiveRestartEnable(Tegra::Engines::Maxwell3D::R if (!state_tracker.TouchPrimitiveRestartEnable()) { return; } - scheduler.Record([enable = regs.primitive_restart.enabled](vk::CommandBuffer cmdbuf) { + + bool enable = regs.primitive_restart.enabled != 0; + if (device.IsMoltenVK()) { + enable = true; + } else if (enable) { + const auto topology = + MaxwellToVK::PrimitiveTopology(device, maxwell3d->draw_manager->GetDrawState().topology); + enable = IsPrimitiveRestartSupported(device, topology); + } + + scheduler.Record([enable](vk::CommandBuffer cmdbuf) { cmdbuf.SetPrimitiveRestartEnableEXT(enable); }); } @@ -1727,7 +1791,9 @@ void RasterizerVulkan::UpdateStencilTestEnable(Tegra::Engines::Maxwell3D::Regs& void RasterizerVulkan::UpdateVertexInput(Tegra::Engines::Maxwell3D::Regs& regs) { auto& dirty{maxwell3d->dirty.flags}; - if (!dirty[Dirty::VertexInput]) { + const bool vertex_input_dirty = dirty[Dirty::VertexInput]; + const bool vertex_buffers_dirty = dirty[VideoCommon::Dirty::VertexBuffers]; + if (!vertex_input_dirty && !vertex_buffers_dirty) { return; } dirty[Dirty::VertexInput] = false; @@ -1735,38 +1801,31 @@ void RasterizerVulkan::UpdateVertexInput(Tegra::Engines::Maxwell3D::Regs& regs) boost::container::static_vector bindings; boost::container::static_vector attributes; - // There seems to be a bug on Nvidia's driver where updating only higher attributes ends up - // generating dirty state. Track the highest dirty attribute and update all attributes until - // that one. - size_t highest_dirty_attr{}; - for (size_t index = 0; index < Maxwell::NumVertexAttributes; ++index) { - if (dirty[Dirty::VertexAttribute0 + index]) { - highest_dirty_attr = index; - } - } - for (size_t index = 0; index < highest_dirty_attr; ++index) { + const u32 max_attributes = + static_cast(std::min(Maxwell::NumVertexAttributes, + device.GetMaxVertexInputAttributes())); + const u32 max_bindings = + static_cast(std::min(Maxwell::NumVertexArrays, + device.GetMaxVertexInputBindings())); + + + for (u32 index = 0; index < max_attributes; ++index) { const Maxwell::VertexAttribute attribute{regs.vertex_attrib_format[index]}; const u32 binding{attribute.buffer}; - dirty[Dirty::VertexAttribute0 + index] = false; - dirty[Dirty::VertexBinding0 + static_cast(binding)] = true; - if (!attribute.constant) { - attributes.push_back({ - .sType = VK_STRUCTURE_TYPE_VERTEX_INPUT_ATTRIBUTE_DESCRIPTION_2_EXT, - .pNext = nullptr, - .location = static_cast(index), - .binding = binding, - .format = MaxwellToVK::VertexFormat(device, attribute.type, attribute.size), - .offset = attribute.offset, - }); - } - } - for (size_t index = 0; index < Maxwell::NumVertexAttributes; ++index) { - if (!dirty[Dirty::VertexBinding0 + index]) { + if (attribute.constant || binding >= max_bindings) { continue; } - dirty[Dirty::VertexBinding0 + index] = false; + attributes.push_back({ + .sType = VK_STRUCTURE_TYPE_VERTEX_INPUT_ATTRIBUTE_DESCRIPTION_2_EXT, + .pNext = nullptr, + .location = index, + .binding = binding, + .format = MaxwellToVK::VertexFormat(device, attribute.type, attribute.size), + .offset = attribute.offset, + }); + } - const u32 binding{static_cast(index)}; + for (u32 binding = 0; binding < max_bindings; ++binding) { const auto& input_binding{regs.vertex_streams[binding]}; const bool is_instanced{regs.vertex_stream_instances.IsInstancingEnabled(binding)}; bindings.push_back({ @@ -1778,6 +1837,14 @@ void RasterizerVulkan::UpdateVertexInput(Tegra::Engines::Maxwell3D::Regs& regs) .divisor = is_instanced ? input_binding.frequency : 1, }); } + + for (size_t index = 0; index < Maxwell::NumVertexAttributes; ++index) { + dirty[Dirty::VertexAttribute0 + index] = false; + } + for (size_t index = 0; index < Maxwell::NumVertexArrays; ++index) { + dirty[Dirty::VertexBinding0 + index] = false; + } + scheduler.Record([bindings, attributes](vk::CommandBuffer cmdbuf) { cmdbuf.SetVertexInputEXT(bindings, attributes); }); diff --git a/src/video_core/renderer_vulkan/vk_rasterizer.h b/src/video_core/renderer_vulkan/vk_rasterizer.h index b689c6b660..841933d31d 100644 --- a/src/video_core/renderer_vulkan/vk_rasterizer.h +++ b/src/video_core/renderer_vulkan/vk_rasterizer.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later // SPDX-FileCopyrightText: Copyright 2019 yuzu Emulator Project @@ -122,6 +122,7 @@ public: void FlushCommands() override; void TickFrame() override; bool AccelerateConditionalRendering() override; + bool HasDrawTransformFeedback() override; bool AccelerateSurfaceCopy(const Tegra::Engines::Fermi2D::Surface& src, const Tegra::Engines::Fermi2D::Surface& dst, const Tegra::Engines::Fermi2D::Config& copy_config) override; diff --git a/src/video_core/renderer_vulkan/vk_scheduler.cpp b/src/video_core/renderer_vulkan/vk_scheduler.cpp index 226619d8d6..fdaf9baacc 100644 --- a/src/video_core/renderer_vulkan/vk_scheduler.cpp +++ b/src/video_core/renderer_vulkan/vk_scheduler.cpp @@ -324,6 +324,8 @@ void Scheduler::EndRenderPass() return; } + query_cache->CounterClose(VideoCommon::QueryType::StreamingByteCount); + // Log render pass end if (Settings::values.gpu_logging_enabled.GetValue() && Settings::values.gpu_log_vulkan_calls.GetValue()) { diff --git a/src/video_core/renderer_vulkan/vk_scheduler.h b/src/video_core/renderer_vulkan/vk_scheduler.h index 00a912f2cd..0709c3a370 100644 --- a/src/video_core/renderer_vulkan/vk_scheduler.h +++ b/src/video_core/renderer_vulkan/vk_scheduler.h @@ -63,6 +63,11 @@ public: /// of a renderpass. void RequestOutsideRenderPassOperationContext(); + /// Returns true when a render pass is currently active in the scheduler state. + bool IsRenderPassActive() const { + return state.renderpass != VK_NULL_HANDLE; + } + /// Update the pipeline to the current execution context. bool UpdateGraphicsPipeline(GraphicsPipeline* pipeline); diff --git a/src/video_core/renderer_vulkan/vk_state_tracker.cpp b/src/video_core/renderer_vulkan/vk_state_tracker.cpp index 79967d540a..3f4dd89c7e 100644 --- a/src/video_core/renderer_vulkan/vk_state_tracker.cpp +++ b/src/video_core/renderer_vulkan/vk_state_tracker.cpp @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later // SPDX-FileCopyrightText: Copyright 2020 yuzu Emulator Project @@ -87,6 +87,7 @@ Flags MakeInvalidationFlags() { void SetupDirtyViewports(Tables& tables) { FillBlock(tables[0], OFF(viewport_transform), NUM(viewport_transform), Viewports); FillBlock(tables[0], OFF(viewports), NUM(viewports), Viewports); + FillBlock(tables[1], OFF(surface_clip), NUM(surface_clip), Viewports); tables[0][OFF(viewport_scale_offset_enabled)] = Viewports; tables[1][OFF(window_origin)] = Viewports; } diff --git a/src/video_core/renderer_vulkan/vk_state_tracker.h b/src/video_core/renderer_vulkan/vk_state_tracker.h index 74bae9e181..6b47ba4176 100644 --- a/src/video_core/renderer_vulkan/vk_state_tracker.h +++ b/src/video_core/renderer_vulkan/vk_state_tracker.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later // SPDX-FileCopyrightText: Copyright 2020 yuzu Emulator Project diff --git a/src/video_core/renderer_vulkan/vk_texture_cache.cpp b/src/video_core/renderer_vulkan/vk_texture_cache.cpp index 48aa5ec476..f099db74cb 100644 --- a/src/video_core/renderer_vulkan/vk_texture_cache.cpp +++ b/src/video_core/renderer_vulkan/vk_texture_cache.cpp @@ -176,7 +176,18 @@ constexpr VkBorderColor ConvertBorderColor(const std::array& color) { .pViewFormats = view_formats.data(), }; if (view_formats.size() > 1) { - image_ci.flags |= VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT; + image_ci.flags |= + VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT | VK_IMAGE_CREATE_EXTENDED_USAGE_BIT; + + const bool has_storage_compatible_view = + std::any_of(view_formats.begin(), view_formats.end(), [&device](VkFormat view_format) { + return device.IsFormatSupported(view_format, VK_FORMAT_FEATURE_STORAGE_IMAGE_BIT, + FormatType::Optimal); + }); + if (has_storage_compatible_view) { + image_ci.usage |= VK_IMAGE_USAGE_STORAGE_BIT; + } + if (device.IsKhrImageFormatListSupported()) { image_ci.pNext = &image_format_list; } @@ -668,11 +679,16 @@ void CopyBufferToImage(vk::CommandBuffer cmdbuf, VkBuffer src_buffer, VkImage im } void TryTransformSwizzleIfNeeded(PixelFormat format, std::array& swizzle, - bool emulate_a4b4g4r4) { + bool emulate_bgr565, bool emulate_a4b4g4r4) { switch (format) { case PixelFormat::A1B5G5R5_UNORM: std::ranges::transform(swizzle, swizzle.begin(), SwapBlueRed); break; + case PixelFormat::B5G6R5_UNORM: + if (emulate_bgr565) { + std::ranges::transform(swizzle, swizzle.begin(), SwapBlueRed); + } + break; case PixelFormat::A5B5G5R1_UNORM: std::ranges::transform(swizzle, swizzle.begin(), SwapSpecial); break; @@ -2119,22 +2135,21 @@ ImageView::ImageView(TextureCacheRuntime& runtime, const VideoCommon::ImageViewI if (!info.IsRenderTarget()) { swizzle = info.Swizzle(); TryTransformSwizzleIfNeeded(format, swizzle, - !device->IsExt4444FormatsSupported()); + device->MustEmulateBGR565(), + !device->IsExt4444FormatsSupported()); if ((aspect_mask & (VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT)) != 0) { std::ranges::transform(swizzle, swizzle.begin(), ConvertGreenRed); SanitizeDepthStencilSwizzle(swizzle, device->SupportsDepthStencilSwizzleOne()); } } const auto format_info = MaxwellToVK::SurfaceFormat(*device, FormatType::Optimal, true, format); - if (ImageUsageFlags(format_info, format) != image.UsageFlags()) { - LOG_WARNING(Render_Vulkan, - "Image view format {} has different usage flags than image format {}", format, - image.info.format); - } + const VkImageUsageFlags requested_view_usage = ImageUsageFlags(format_info, format); + const VkImageUsageFlags image_usage = image.UsageFlags(); + const VkImageUsageFlags clamped_view_usage = requested_view_usage & image_usage; const VkImageViewUsageCreateInfo image_view_usage{ .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_USAGE_CREATE_INFO, .pNext = nullptr, - .usage = ImageUsageFlags(format_info, format), + .usage = clamped_view_usage, }; const VkImageViewCreateInfo create_info{ .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO, @@ -2300,23 +2315,18 @@ vk::ImageView ImageView::MakeView(VkFormat vk_format, VkImageAspectFlags aspect_ Sampler::Sampler(TextureCacheRuntime& runtime, const Tegra::Texture::TSCEntry& tsc) { const auto& device = runtime.device; - // Check if custom border colors are supported - const bool has_custom_border_colors = runtime.device.IsCustomBorderColorsSupported(); - const bool has_format_undefined = runtime.device.IsCustomBorderColorWithoutFormatSupported(); + const bool has_custom_border_extension = runtime.device.IsExtCustomBorderColorSupported(); + const bool has_format_undefined = + has_custom_border_extension && runtime.device.IsCustomBorderColorWithoutFormatSupported(); + const bool has_custom_border_colors = + has_format_undefined && runtime.device.IsCustomBorderColorsSupported(); const auto color = tsc.BorderColor(); - // Determine border format based on available features: - // - If customBorderColorWithoutFormat is available: use VK_FORMAT_UNDEFINED (most flexible) - // - If only customBorderColors is available: use concrete format (R8G8B8A8_UNORM) - // - If neither is available: use standard border colors (handled by ConvertBorderColor) - const VkFormat border_format = has_format_undefined ? VK_FORMAT_UNDEFINED - : VK_FORMAT_R8G8B8A8_UNORM; - const VkSamplerCustomBorderColorCreateInfoEXT border_ci{ .sType = VK_STRUCTURE_TYPE_SAMPLER_CUSTOM_BORDER_COLOR_CREATE_INFO_EXT, .pNext = nullptr, .customBorderColor = std::bit_cast(color), - .format = border_format, + .format = VK_FORMAT_UNDEFINED, }; const void* pnext = nullptr; if (has_custom_border_colors) { diff --git a/src/video_core/transform_feedback.cpp b/src/video_core/transform_feedback.cpp index a8f9da9853..53d29c08e2 100644 --- a/src/video_core/transform_feedback.cpp +++ b/src/video_core/transform_feedback.cpp @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later // SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project @@ -88,13 +88,13 @@ std::pair, u32> MakeTransformF return 0; }; - UNIMPLEMENTED_IF_MSG(layout.stream != 0, "Stream is not zero: {}", layout.stream); Shader::TransformFeedbackVarying varying{ .buffer = static_cast(buffer), .stride = layout.stride, .offset = offset * 4, .components = 1, }; + varying.stream = layout.stream; const u32 base_offset = offset; const auto attribute{get_attribute(offset)}; if (std::ranges::find(VECTORS, Common::AlignDown(attribute, 4)) != VECTORS.end()) { diff --git a/src/video_core/vulkan_common/vulkan_device.cpp b/src/video_core/vulkan_common/vulkan_device.cpp index 5075a79bcd..6e55306079 100644 --- a/src/video_core/vulkan_common/vulkan_device.cpp +++ b/src/video_core/vulkan_common/vulkan_device.cpp @@ -869,6 +869,10 @@ bool Device::HasTimelineSemaphore() const { return features.timeline_semaphore.timelineSemaphore; } +bool Device::MustEmulateBGR565() const { + return Settings::values.emulate_bgr565.GetValue(); +} + bool Device::GetSuitability(bool requires_swapchain) { // Assume we will be suitable. bool suitable = true; @@ -919,6 +923,17 @@ bool Device::GetSuitability(bool requires_swapchain) { FOR_EACH_VK_FEATURE_EXT(FEATURE_EXTENSION); FOR_EACH_VK_EXTENSION(EXTENSION); + if (supported_extensions.contains(VK_KHR_ROBUSTNESS_2_EXTENSION_NAME)) { + loaded_extensions.erase(VK_EXT_ROBUSTNESS_2_EXTENSION_NAME); + loaded_extensions.insert(VK_KHR_ROBUSTNESS_2_EXTENSION_NAME); + extensions.robustness_2 = true; + } else if (supported_extensions.contains(VK_EXT_ROBUSTNESS_2_EXTENSION_NAME)) { + loaded_extensions.insert(VK_EXT_ROBUSTNESS_2_EXTENSION_NAME); + extensions.robustness_2 = true; + } else { + extensions.robustness_2 = false; + } + #undef FEATURE_EXTENSION #undef EXTENSION @@ -1131,8 +1146,6 @@ bool Device::GetSuitability(bool requires_swapchain) { if (u32(Settings::values.dyna_state.GetValue()) == 0) { LOG_INFO(Render_Vulkan, "Extended Dynamic State disabled by user setting, clearing all EDS features"); - features.custom_border_color.customBorderColors = false; - features.custom_border_color.customBorderColorWithoutFormat = false; features.extended_dynamic_state.extendedDynamicState = false; features.extended_dynamic_state2.extendedDynamicState2 = false; features.extended_dynamic_state3.extendedDynamicState3ColorBlendEnable = false; @@ -1148,24 +1161,13 @@ bool Device::GetSuitability(bool requires_swapchain) { void Device::RemoveUnsuitableExtensions() { // VK_EXT_custom_border_color - // Enable extension if driver supports it, then check individual features - // - customBorderColors: Required to use VK_BORDER_COLOR_FLOAT_CUSTOM_EXT - // - customBorderColorWithoutFormat: Optional, allows VK_FORMAT_UNDEFINED - // If only customBorderColors is available, we must provide a specific format if (extensions.custom_border_color) { - // Verify that at least customBorderColors is available - if (!features.custom_border_color.customBorderColors) { - LOG_WARNING(Render_Vulkan, - "VK_EXT_custom_border_color reported but customBorderColors feature not available, disabling"); - extensions.custom_border_color = false; - } + extensions.custom_border_color = + features.custom_border_color.customBorderColors && + features.custom_border_color.customBorderColorWithoutFormat; } RemoveExtensionFeatureIfUnsuitable(extensions.custom_border_color, features.custom_border_color, VK_EXT_CUSTOM_BORDER_COLOR_EXTENSION_NAME); - // VK_KHR_unified_image_layouts - extensions.unified_image_layouts = features.unified_image_layouts.unifiedImageLayouts; - RemoveExtensionFeatureIfUnsuitable(extensions.unified_image_layouts, features.unified_image_layouts, - VK_KHR_UNIFIED_IMAGE_LAYOUTS_EXTENSION_NAME); // VK_EXT_depth_bias_control extensions.depth_bias_control = @@ -1251,16 +1253,22 @@ void Device::RemoveUnsuitableExtensions() { VK_EXT_EXTENDED_DYNAMIC_STATE_3_EXTENSION_NAME); // VK_EXT_robustness2 - extensions.robustness_2 = features.robustness2.robustBufferAccess2 || - features.robustness2.robustImageAccess2 || - features.robustness2.nullDescriptor; + features.robustness2.robustBufferAccess2 = VK_FALSE; + features.robustness2.robustImageAccess2 = VK_FALSE; + extensions.robustness_2 = features.robustness2.nullDescriptor; + + const char* robustness2_extension_name = + loaded_extensions.contains(VK_KHR_ROBUSTNESS_2_EXTENSION_NAME) + ? VK_KHR_ROBUSTNESS_2_EXTENSION_NAME + : VK_EXT_ROBUSTNESS_2_EXTENSION_NAME; RemoveExtensionFeatureIfUnsuitable(extensions.robustness_2, features.robustness2, - VK_EXT_ROBUSTNESS_2_EXTENSION_NAME); + robustness2_extension_name); - // VK_EXT_image_robustness - extensions.image_robustness = features.image_robustness.robustImageAccess; - RemoveExtensionFeatureIfUnsuitable(extensions.image_robustness, features.image_robustness, + // Image robustness + extensions.robust_image_access = features.robust_image_access.robustImageAccess; + RemoveExtensionFeatureIfUnsuitable(extensions.robust_image_access, + features.robust_image_access, VK_EXT_IMAGE_ROBUSTNESS_EXTENSION_NAME); // VK_KHR_shader_atomic_int64 @@ -1288,8 +1296,7 @@ void Device::RemoveUnsuitableExtensions() { // VK_EXT_transform_feedback extensions.transform_feedback = features.transform_feedback.transformFeedback && - properties.transform_feedback.maxTransformFeedbackBuffers > 0 && - properties.transform_feedback.transformFeedbackQueries; + properties.transform_feedback.maxTransformFeedbackBuffers > 0; RemoveExtensionFeatureIfUnsuitable(extensions.transform_feedback, features.transform_feedback, VK_EXT_TRANSFORM_FEEDBACK_EXTENSION_NAME); diff --git a/src/video_core/vulkan_common/vulkan_device.h b/src/video_core/vulkan_common/vulkan_device.h index ad9d53ce16..a8a89aee89 100644 --- a/src/video_core/vulkan_common/vulkan_device.h +++ b/src/video_core/vulkan_common/vulkan_device.h @@ -38,7 +38,7 @@ VK_DEFINE_HANDLE(VmaAllocator) FEATURE(KHR, TimelineSemaphore, TIMELINE_SEMAPHORE, timeline_semaphore) #define FOR_EACH_VK_FEATURE_1_3(FEATURE) \ - FEATURE(EXT, ImageRobustness, IMAGE_ROBUSTNESS, image_robustness) \ + FEATURE(EXT, ImageRobustness, IMAGE_ROBUSTNESS, robust_image_access) \ FEATURE(EXT, ShaderDemoteToHelperInvocation, SHADER_DEMOTE_TO_HELPER_INVOCATION, \ shader_demote_to_helper_invocation) \ FEATURE(EXT, SubgroupSizeControl, SUBGROUP_SIZE_CONTROL, subgroup_size_control) \ @@ -68,8 +68,7 @@ VK_DEFINE_HANDLE(VmaAllocator) FEATURE(KHR, PipelineExecutableProperties, PIPELINE_EXECUTABLE_PROPERTIES, \ pipeline_executable_properties) \ FEATURE(KHR, WorkgroupMemoryExplicitLayout, WORKGROUP_MEMORY_EXPLICIT_LAYOUT, \ - workgroup_memory_explicit_layout) \ - FEATURE(KHR, UnifiedImageLayouts, UNIFIED_IMAGE_LAYOUTS, unified_image_layouts) + workgroup_memory_explicit_layout) // Define miscellaneous extensions which may be used by the implementation here. @@ -124,7 +123,6 @@ VK_DEFINE_HANDLE(VmaAllocator) EXTENSION_NAME(VK_EXT_EXTENDED_DYNAMIC_STATE_3_EXTENSION_NAME) \ EXTENSION_NAME(VK_EXT_EXTERNAL_MEMORY_HOST_EXTENSION_NAME) \ EXTENSION_NAME(VK_EXT_4444_FORMATS_EXTENSION_NAME) \ - EXTENSION_NAME(VK_EXT_IMAGE_ROBUSTNESS_EXTENSION_NAME) \ EXTENSION_NAME(VK_EXT_LINE_RASTERIZATION_EXTENSION_NAME) \ EXTENSION_NAME(VK_EXT_ROBUSTNESS_2_EXTENSION_NAME) \ EXTENSION_NAME(VK_EXT_VERTEX_INPUT_DYNAMIC_STATE_EXTENSION_NAME) \ @@ -174,13 +172,11 @@ VK_DEFINE_HANDLE(VmaAllocator) FEATURE_NAME(depth_bias_control, depthBiasExact) \ FEATURE_NAME(extended_dynamic_state, extendedDynamicState) \ FEATURE_NAME(format_a4b4g4r4, formatA4B4G4R4) \ - FEATURE_NAME(image_robustness, robustImageAccess) \ + FEATURE_NAME(robust_image_access, robustImageAccess) \ FEATURE_NAME(index_type_uint8, indexTypeUint8) \ FEATURE_NAME(primitive_topology_list_restart, primitiveTopologyListRestart) \ FEATURE_NAME(provoking_vertex, provokingVertexLast) \ FEATURE_NAME(robustness2, nullDescriptor) \ - FEATURE_NAME(robustness2, robustBufferAccess2) \ - FEATURE_NAME(robustness2, robustImageAccess2) \ FEATURE_NAME(shader_float16_int8, shaderFloat16) \ FEATURE_NAME(shader_float16_int8, shaderInt8) \ FEATURE_NAME(timeline_semaphore, timelineSemaphore) \ @@ -542,6 +538,17 @@ public: return extensions.transform_feedback; } + /// Returns true if transform feedback draw commands are supported. + bool IsTransformFeedbackDrawSupported() const { + return extensions.transform_feedback && properties.transform_feedback.transformFeedbackDraw; + } + + /// Returns true if transform feedback query types are supported. + bool IsTransformFeedbackQueriesSupported() const { + return extensions.transform_feedback && + properties.transform_feedback.transformFeedbackQueries; + } + /// Returns true if the device supports VK_EXT_transform_feedback properly. bool AreTransformFeedbackGeometryStreamsSupported() const { return features.transform_feedback.geometryStreams; @@ -552,36 +559,6 @@ public: return extensions.custom_border_color; } - /// Returns true if the device supports VK_EXT_image_robustness. - bool IsExtImageRobustnessSupported() const { - return extensions.image_robustness; - } - - /// Returns true if robustImageAccess is supported. - bool IsRobustImageAccessSupported() const { - return features.image_robustness.robustImageAccess; - } - - /// Returns true if the device supports VK_EXT_robustness2. - bool IsExtRobustness2Supported() const { - return extensions.robustness_2; - } - - /// Returns true if robustBufferAccess2 is supported. - bool IsRobustBufferAccess2Supported() const { - return features.robustness2.robustBufferAccess2; - } - - /// Returns true if robustImageAccess2 is supported. - bool IsRobustImageAccess2Supported() const { - return features.robustness2.robustImageAccess2; - } - - /// Returns true if nullDescriptor is supported. - bool IsNullDescriptorSupported() const { - return features.robustness2.nullDescriptor; - } - /// Returns true if customBorderColors feature is available. bool IsCustomBorderColorsSupported() const { return features.custom_border_color.customBorderColors; @@ -805,6 +782,8 @@ public: return features.robustness2.nullDescriptor; } + bool MustEmulateBGR565() const; + bool HasExactDepthBiasControl() const { return features.depth_bias_control.depthBiasExact; } diff --git a/src/video_core/vulkan_common/vulkan_wrapper.cpp b/src/video_core/vulkan_common/vulkan_wrapper.cpp index f59ac7d6bc..871ce52678 100644 --- a/src/video_core/vulkan_common/vulkan_wrapper.cpp +++ b/src/video_core/vulkan_common/vulkan_wrapper.cpp @@ -123,6 +123,7 @@ void Load(VkDevice device, DeviceDispatch& dld) noexcept { X(vkCmdEndDebugUtilsLabelEXT); X(vkCmdFillBuffer); X(vkCmdPipelineBarrier); + X(vkCmdResetQueryPool); X(vkCmdPushConstants); X(vkCmdPushDescriptorSetWithTemplateKHR); X(vkCmdSetBlendConstants); diff --git a/src/video_core/vulkan_common/vulkan_wrapper.h b/src/video_core/vulkan_common/vulkan_wrapper.h index aaff66359e..4a3baad2c4 100644 --- a/src/video_core/vulkan_common/vulkan_wrapper.h +++ b/src/video_core/vulkan_common/vulkan_wrapper.h @@ -225,6 +225,7 @@ struct DeviceDispatch : InstanceDispatch { PFN_vkCmdEndTransformFeedbackEXT vkCmdEndTransformFeedbackEXT{}; PFN_vkCmdFillBuffer vkCmdFillBuffer{}; PFN_vkCmdPipelineBarrier vkCmdPipelineBarrier{}; + PFN_vkCmdResetQueryPool vkCmdResetQueryPool{}; PFN_vkCmdPushConstants vkCmdPushConstants{}; PFN_vkCmdPushDescriptorSetWithTemplateKHR vkCmdPushDescriptorSetWithTemplateKHR{}; PFN_vkCmdResolveImage vkCmdResolveImage{}; @@ -1168,6 +1169,10 @@ public: dld->vkCmdEndQuery(handle, query_pool, query); } + void ResetQueryPool(VkQueryPool query_pool, u32 first_query, u32 query_count) const noexcept { + dld->vkCmdResetQueryPool(handle, query_pool, first_query, query_count); + } + void BindDescriptorSets(VkPipelineBindPoint bind_point, VkPipelineLayout layout, u32 first, Span sets, Span dynamic_offsets) const noexcept { dld->vkCmdBindDescriptorSets(handle, bind_point, layout, first, sets.size(), sets.data(), diff --git a/src/yuzu/configuration/configure_debug.cpp b/src/yuzu/configuration/configure_debug.cpp index fadaf1c01a..9db48c084b 100644 --- a/src/yuzu/configuration/configure_debug.cpp +++ b/src/yuzu/configuration/configure_debug.cpp @@ -51,6 +51,8 @@ void ConfigureDebug::SetConfiguration() { ui->enable_all_controllers->setChecked(Settings::values.enable_all_controllers.GetValue()); ui->extended_logging->setChecked(Settings::values.extended_logging.GetValue()); ui->perform_vulkan_check->setChecked(Settings::values.perform_vulkan_check.GetValue()); + ui->serial_battery_edit->setText(QString::fromStdString(std::to_string(Settings::values.serial_battery.GetValue()))); + ui->serial_board_edit->setText(QString::fromStdString(std::to_string(Settings::values.serial_unit.GetValue()))); #ifdef YUZU_USE_QT_WEB_ENGINE ui->disable_web_applet->setChecked(Settings::values.disable_web_applet.GetValue()); #else @@ -126,6 +128,8 @@ void ConfigureDebug::ApplyConfiguration() { Settings::values.extended_logging = ui->extended_logging->isChecked(); Settings::values.perform_vulkan_check = ui->perform_vulkan_check->isChecked(); Settings::values.disable_web_applet = ui->disable_web_applet->isChecked(); + Settings::values.serial_battery = ui->serial_battery_edit->text().toUInt(); + Settings::values.serial_unit = ui->serial_board_edit->text().toUInt(); Settings::values.debug_knobs = ui->debug_knobs_spinbox->value(); Debugger::ToggleConsole(); Common::Log::Filter filter; diff --git a/src/yuzu/data_dialog.cpp b/src/yuzu/data_dialog.cpp index bbe5d43e05..8d50843eb3 100644 --- a/src/yuzu/data_dialog.cpp +++ b/src/yuzu/data_dialog.cpp @@ -23,27 +23,18 @@ DataDialog::DataDialog(QWidget* parent) : QDialog(parent), ui(std::make_uniquepage->addWidget(new DataWidget(FrontendCommon::DataManager::DataDir::name, \ - QtCommon::StringLookup::DataManager##name##Tooltip, \ - QStringLiteral(#name), this)); \ - ui->labels->addItem(label); + ui->pages->addTab(new DataWidget(FrontendCommon::DataManager::DataDir::name, \ + QtCommon::StringLookup::DataManager##name##Tooltip, \ + QStringLiteral(#name), this), \ + label); WIDGET(tr("Shaders"), Shaders) - WIDGET(tr("UserNAND"), UserNand) - WIDGET(tr("SysNAND"), SysNand) + WIDGET(tr("User NAND"), UserNand) + WIDGET(tr("System NAND"), SysNand) WIDGET(tr("Mods"), Mods) WIDGET(tr("Saves"), Saves) #undef WIDGET - - connect(ui->labels, &QListWidget::itemSelectionChanged, this, [this]() { - const auto items = ui->labels->selectedItems(); - if (items.isEmpty()) { - return; - } - - ui->page->setCurrentIndex(ui->labels->row(items[0])); - }); } DataDialog::~DataDialog() = default; @@ -71,25 +62,29 @@ DataWidget::DataWidget(FrontendCommon::DataManager::DataDir data_dir, } void DataWidget::clear() { - std::string user_id = selectProfile(); - QtCommon::Content::ClearDataDir(m_dir, user_id); + std::optional user_id = selectProfile(); + if (!user_id) return; + QtCommon::Content::ClearDataDir(m_dir, user_id.value()); scan(); } void DataWidget::open() { - std::string user_id = selectProfile(); + std::optional user_id = selectProfile(); + if (!user_id) return; QDesktopServices::openUrl(QUrl::fromLocalFile( - QString::fromStdString(FrontendCommon::DataManager::GetDataDirString(m_dir, user_id)))); + QString::fromStdString(FrontendCommon::DataManager::GetDataDirString(m_dir, user_id.value())))); } void DataWidget::upload() { - std::string user_id = selectProfile(); - QtCommon::Content::ExportDataDir(m_dir, user_id, m_exportName); + std::optional user_id = selectProfile(); + if (!user_id) return; + QtCommon::Content::ExportDataDir(m_dir, user_id.value(), m_exportName); } void DataWidget::download() { - std::string user_id = selectProfile(); - QtCommon::Content::ImportDataDir(m_dir, user_id, std::bind(&DataWidget::scan, this)); + std::optional user_id = selectProfile(); + if (!user_id) return; + QtCommon::Content::ImportDataDir(m_dir, user_id.value(), std::bind(&DataWidget::scan, this)); } void DataWidget::scan() { @@ -108,10 +103,11 @@ void DataWidget::scan() { QtConcurrent::run([this]() { return FrontendCommon::DataManager::DataDirSize(m_dir); })); } -std::string DataWidget::selectProfile() { +std::optional DataWidget::selectProfile() { std::string user_id{}; if (m_dir == FrontendCommon::DataManager::DataDir::Saves) { user_id = GetProfileIDString(); + if (user_id.empty()) return std::nullopt; } return user_id; diff --git a/src/yuzu/data_dialog.h b/src/yuzu/data_dialog.h index 7f988f6047..2915f00848 100644 --- a/src/yuzu/data_dialog.h +++ b/src/yuzu/data_dialog.h @@ -45,7 +45,7 @@ private: FrontendCommon::DataManager::DataDir m_dir; const QString m_exportName; - std::string selectProfile(); + std::optional selectProfile(); }; #endif // DATA_DIALOG_H diff --git a/src/yuzu/data_dialog.ui b/src/yuzu/data_dialog.ui index 02e674d856..1e33530774 100644 --- a/src/yuzu/data_dialog.ui +++ b/src/yuzu/data_dialog.ui @@ -27,31 +27,9 @@ - + - - - - 0 - 0 - - - - - - - - - 0 - 0 - - - - - 275 - 200 - - + -1