mirror of
https://git.eden-emu.dev/eden-emu/eden
synced 2026-06-02 01:07:04 +02:00
spinlocks, annoyances with organistaion
Signed-off-by: lizzie <lizzie@eden-emu.dev>
This commit is contained in:
lizzie
parent
47c8ecf450
commit
c2e046b275
16 changed files with 356 additions and 135 deletions
107
externals/powah/data2code.c
vendored
107
externals/powah/data2code.c
vendored
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@ -51,30 +51,53 @@ int main(int argc, char *argv[]) {
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int i_extopc = atoi(sec);
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//printf("// %s\n", mem);
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if (!strcmp(form, "XO")) {
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if (strcmp(mem, "ADDC") == 0 || strcmp(mem, "SUBFC") == 0)
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printf("//");
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printf(
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"void %s(GPR const rt, GPR const ra, GPR const rb) {"
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" emit_%s(0x%08x, rt, ra, rb, false, false); "
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"}\n"
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, mem, form, (i_opcode << 26) | (i_extopc << 1));
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printf(
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"void %sC(GPR const rt, GPR const ra, GPR const rb) {"
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" emit_%s(0x%08x, rt, ra, rb, true, false); "
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"}\n"
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, mem, form, (i_opcode << 26) | (i_extopc << 1));
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if (strcmp(mem, "ADDC") == 0 || strcmp(mem, "SUBFC") == 0)
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printf("//");
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printf(
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"void %s_(GPR const rt, GPR const ra, GPR const rb) {"
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" emit_%s(0x%08x, rt, ra, rb, false, true); "
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"}\n"
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, mem, form, (i_opcode << 26) | (i_extopc << 1));
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printf(
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"void %sC_(GPR const rt, GPR const ra, GPR const rb) {"
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" emit_%s(0x%08x, rt, ra, rb, true, true); "
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"}\n"
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, mem, form, (i_opcode << 26) | (i_extopc << 1));
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if (!strcmp(mem, "EXTSH")) {
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printf(
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"void %s(GPR const rt, GPR const ra) {"
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" emit_%s(0x%08x, rt, ra, R0, false, false); "
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"}\n"
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, mem, form, (i_opcode << 26) | (i_extopc << 1));
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printf(
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"void %sC(GPR const rt, GPR const ra) {"
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" emit_%s(0x%08x, rt, ra, R0, true, false); "
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"}\n"
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, mem, form, (i_opcode << 26) | (i_extopc << 1));
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printf(
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"void %s_(GPR const rt, GPR const ra) {"
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" emit_%s(0x%08x, rt, ra, R0, false, true); "
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"}\n"
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, mem, form, (i_opcode << 26) | (i_extopc << 1));
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printf(
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"void %sC_(GPR const rt, GPR const ra) {"
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" emit_%s(0x%08x, rt, ra, R0, true, true); "
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"}\n"
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, mem, form, (i_opcode << 26) | (i_extopc << 1));
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} else {
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if (strcmp(mem, "ADDC") == 0 || strcmp(mem, "SUBFC") == 0)
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printf("//");
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printf(
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"void %s(GPR const rt, GPR const ra, GPR const rb) {"
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" emit_%s(0x%08x, rt, ra, rb, false, false); "
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"}\n"
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, mem, form, (i_opcode << 26) | (i_extopc << 1));
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printf(
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"void %sC(GPR const rt, GPR const ra, GPR const rb) {"
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" emit_%s(0x%08x, rt, ra, rb, true, false); "
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"}\n"
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, mem, form, (i_opcode << 26) | (i_extopc << 1));
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if (strcmp(mem, "ADDC") == 0 || strcmp(mem, "SUBFC") == 0)
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printf("//");
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printf(
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"void %s_(GPR const rt, GPR const ra, GPR const rb) {"
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" emit_%s(0x%08x, rt, ra, rb, false, true); "
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"}\n"
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, mem, form, (i_opcode << 26) | (i_extopc << 1));
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printf(
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"void %sC_(GPR const rt, GPR const ra, GPR const rb) {"
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" emit_%s(0x%08x, rt, ra, rb, true, true); "
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"}\n"
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, mem, form, (i_opcode << 26) | (i_extopc << 1));
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}
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} else if (!strcmp(form, "X")) {
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if (!strcmp(mem, "CMPL")
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|| !strcmp(mem, "CMP")) {
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@ -83,7 +106,8 @@ int main(int argc, char *argv[]) {
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" emit_%s(0x%08x, GPR{(bf << 2) | l}, ra, rb, false); "
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"}\n"
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, mem, form, i_opcode << 26);
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} else if (strcmp(mem, "CNTLZD") == 0 || strcmp(mem, "CNTLZW") == 0) {
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} else if (!strcmp(mem, "CNTLZD") || !strcmp(mem, "CNTLZW")
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|| !strcmp(mem, "EXTSB") || !strcmp(mem, "EXTSH") || !strcmp(mem, "EXTSW")) {
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printf(
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"void %s(GPR const rt, GPR const ra) {"
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" emit_%s(0x%08x, rt, ra, R0, false); "
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@ -204,16 +228,29 @@ int main(int argc, char *argv[]) {
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, mem, form, (i_opcode << 26) | (i_extopc << 1));
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}
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} else if (!strcmp(form, "M")) {
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printf(
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"void %s(GPR const rs, GPR const ra, uint32_t sh, uint32_t mb, uint32_t me = 0) {"
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" emit_%s(0x%08x, rs, ra, sh, mb, me, false); "
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"}\n"
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, mem, form, (i_opcode << 26) | (i_extopc << 1));
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printf(
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"void %s_(GPR const rs, GPR const ra, uint32_t sh, uint32_t mb, uint32_t me = 0) {"
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" emit_%s(0x%08x, rs, ra, sh, mb, me, true); "
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"}\n"
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, mem, form, (i_opcode << 26) | (i_extopc << 1));
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if (!strcmp(mem, "RLWNM")) {
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printf(
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"void %s(GPR const rs, GPR const ra, GPR const rb, uint32_t mb, uint32_t me = 0) {"
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" emit_%s(0x%08x, rs, ra, rb.index, mb, me, false); "
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"}\n"
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, mem, form, (i_opcode << 26) | (i_extopc << 1));
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printf(
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"void %s_(GPR const rs, GPR const ra, GPR const rb, uint32_t mb, uint32_t me = 0) {"
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" emit_%s(0x%08x, rs, ra, rb.index, mb, me, true); "
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"}\n"
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, mem, form, (i_opcode << 26) | (i_extopc << 1));
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} else {
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printf(
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"void %s(GPR const rs, GPR const ra, uint32_t sh, uint32_t mb, uint32_t me = 0) {"
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" emit_%s(0x%08x, rs, ra, sh, mb, me, false); "
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"}\n"
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, mem, form, (i_opcode << 26) | (i_extopc << 1));
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printf(
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"void %s_(GPR const rs, GPR const ra, uint32_t sh, uint32_t mb, uint32_t me = 0) {"
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" emit_%s(0x%08x, rs, ra, sh, mb, me, true); "
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"}\n"
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, mem, form, (i_opcode << 26) | (i_extopc << 1));
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}
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} else if (!strcmp(form, "MD")) {
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printf(
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"void %s(GPR const rs, GPR const ra, uint32_t mb, uint32_t sh) {"
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14
externals/powah/powah_emit.hpp
vendored
14
externals/powah/powah_emit.hpp
vendored
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@ -110,6 +110,7 @@ constexpr inline CPR CR6{24};
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constexpr inline CPR CR7{28};
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struct Context {
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Context() = default;
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Context(void* ptr, size_t size)
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: base{reinterpret_cast<uint32_t*>(ptr)}
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, offset{0}
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@ -280,6 +281,8 @@ struct Context {
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// Extended Memmonics, hand coded :)
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void MR(GPR const ra, GPR const rs) { OR(ra, rs, rs); }
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void NOP() { ORI(R0, R0, 0); }
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void NOT(GPR const ra, GPR const rs) { NOR(ra, rs, rs); }
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void ROTLDI(GPR const ra, GPR const rs, uint32_t n) { RLDICL(ra, rs, n, 0); }
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void ROTRDI(GPR const ra, GPR const rs, uint32_t n) { RLDICL(ra, rs, 64 - n, 0); }
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@ -287,6 +290,9 @@ struct Context {
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void ROTLWI(GPR const ra, GPR const rs, uint32_t n) { RLWINM(ra, rs, n, 0, 31); }
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void ROTRWI(GPR const ra, GPR const rs, uint32_t n) { RLWINM(ra, rs, 32 - n, 0, 31); }
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void ROTLW(GPR const ra, GPR const rs, GPR const rb) { RLWNM(ra, rs, rb, 0, 31); }
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void ROTLD(GPR const ra, GPR const rs, GPR const rb) { RLDCL(ra, rs, rb, 0); }
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void EXTLDI(GPR const ra, GPR const rs, uint32_t n, uint32_t b) { RLDICR(ra, rs, b, n - 1); }
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void SLDI(GPR const ra, GPR const rs, uint32_t n) { RLDICR(ra, rs, n, 63 - n); }
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void CLRLDI(GPR const ra, GPR const rs, uint32_t n) { RLDICL(ra, rs, 0, n); }
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@ -298,7 +304,7 @@ struct Context {
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void EXTLWI(GPR const ra, GPR const rs, uint32_t n, uint32_t b) { RLWINM(ra, rs, b, 0, n - 1); }
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void SRWI(GPR const ra, GPR const rs, uint32_t n) { RLWINM(ra, rs, 32 - n, n, 31); }
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void CLRRWI(GPR const ra, GPR const rs, uint32_t n, uint32_t b) { RLWINM(ra, rs, 0, 0, 31 - n); }
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void CLRRWI(GPR const ra, GPR const rs, uint32_t n) { RLWINM(ra, rs, 0, 0, 31 - n); }
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void CRSET(CPR const bx) { CREQV(bx, bx, bx); }
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void CRCLR(CPR const bx) { CRXOR(bx, bx, bx); }
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@ -320,8 +326,14 @@ struct Context {
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void CMPDI(CPR const cr, GPR const rx, uint32_t si) { CMPI(cr.index / 4, 1, rx, si); }
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void CMPD(CPR const cr, GPR const rx, GPR const ry) { CMP(cr.index / 4, 1, rx, ry); }
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void BLR() { BCLR(R0, CR0, R0); }
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// TODO: PowerPC 11 stuff
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void ISEL(GPR const rd, GPR const ra, GPR const rb, uint32_t d) {
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(void)rd;
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(void)ra;
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(void)rb;
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(void)d;
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std::unreachable();
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}
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void ISELLT(GPR const rd, GPR const ra, GPR const rb) { ISEL(rd, ra, rb, 0); }
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20
externals/powah/powah_gen_base.hpp
vendored
20
externals/powah/powah_gen_base.hpp
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@ -124,14 +124,14 @@ void EIEIO(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0006ac, rt, ra
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void EIEIO_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0006ac, rt, ra, rb, true); }
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void EQV(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000238, rt, ra, rb, false); }
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void EQV_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000238, rt, ra, rb, true); }
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void EXTSB(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000774, rt, ra, rb, false); }
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void EXTSB_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000774, rt, ra, rb, true); }
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void EXTSH(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000734, rt, ra, rb, false, false); }
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void EXTSHC(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000734, rt, ra, rb, true, false); }
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void EXTSH_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000734, rt, ra, rb, false, true); }
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void EXTSHC_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000734, rt, ra, rb, true, true); }
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void EXTSW(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0007b4, rt, ra, rb, false); }
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void EXTSW_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0007b4, rt, ra, rb, true); }
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void EXTSB(GPR const rt, GPR const ra) { emit_X(0x7c000774, rt, ra, R0, false); }
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void EXTSB_(GPR const rt, GPR const ra) { emit_X(0x7c000774, rt, ra, R0, true); }
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void EXTSH(GPR const rt, GPR const ra) { emit_XO(0x7c000734, rt, ra, R0, false, false); }
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void EXTSHC(GPR const rt, GPR const ra) { emit_XO(0x7c000734, rt, ra, R0, true, false); }
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void EXTSH_(GPR const rt, GPR const ra) { emit_XO(0x7c000734, rt, ra, R0, false, true); }
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void EXTSHC_(GPR const rt, GPR const ra) { emit_XO(0x7c000734, rt, ra, R0, true, true); }
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void EXTSW(GPR const rt, GPR const ra) { emit_X(0x7c0007b4, rt, ra, R0, false); }
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void EXTSW_(GPR const rt, GPR const ra) { emit_X(0x7c0007b4, rt, ra, R0, true); }
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void FABS(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc000210, rt, ra, rb, false); }
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void FABS_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc000210, rt, ra, rb, true); }
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void FADD(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xfc00002a, frt, fra, frb, frc, false); }
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@ -349,8 +349,8 @@ void RLWIMI(GPR const rs, GPR const ra, uint32_t sh, uint32_t mb, uint32_t me =
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void RLWIMI_(GPR const rs, GPR const ra, uint32_t sh, uint32_t mb, uint32_t me = 0) { emit_M(0x50000000, rs, ra, sh, mb, me, true); }
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void RLWINM(GPR const rs, GPR const ra, uint32_t sh, uint32_t mb, uint32_t me = 0) { emit_M(0x54000000, rs, ra, sh, mb, me, false); }
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void RLWINM_(GPR const rs, GPR const ra, uint32_t sh, uint32_t mb, uint32_t me = 0) { emit_M(0x54000000, rs, ra, sh, mb, me, true); }
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void RLWNM(GPR const rs, GPR const ra, uint32_t sh, uint32_t mb, uint32_t me = 0) { emit_M(0x5c000000, rs, ra, sh, mb, me, false); }
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void RLWNM_(GPR const rs, GPR const ra, uint32_t sh, uint32_t mb, uint32_t me = 0) { emit_M(0x5c000000, rs, ra, sh, mb, me, true); }
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void RLWNM(GPR const rs, GPR const ra, GPR const rb, uint32_t mb, uint32_t me = 0) { emit_M(0x5c000000, rs, ra, rb.index, mb, me, false); }
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void RLWNM_(GPR const rs, GPR const ra, GPR const rb, uint32_t mb, uint32_t me = 0) { emit_M(0x5c000000, rs, ra, rb.index, mb, me, true); }
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void SC(uint32_t lev) { emit_SC(0x44000000, lev); }
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void SI(GPR const rt, GPR const ra, uint32_t d) { emit_D(0x30000000, rt, ra, d); }
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void SI_(GPR const rt, GPR const ra, uint32_t d) { emit_D(0x34000000, rt, ra, d); }
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