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https://git.eden-emu.dev/eden-emu/eden
synced 2026-04-28 19:59:02 +02:00
Use ctr like gcc does
Signed-off-by: lizzie <lizzie@eden-emu.dev>
This commit is contained in:
parent
7aa677c114
commit
c1fc1b459e
8 changed files with 22 additions and 9 deletions
7
externals/powah/powah_emit.hpp
vendored
7
externals/powah/powah_emit.hpp
vendored
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@ -368,10 +368,11 @@ struct Context {
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void MFLR(GPR const rt) { MFSPR(powah::GPR{8}, rt, powah::GPR{0}); }
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void MFLR(GPR const rt) { MFSPR(powah::GPR{8}, rt, powah::GPR{0}); }
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void MTLR(GPR const rt) { MTSPR(powah::GPR{8}, rt, powah::GPR{0}); }
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void MTLR(GPR const rt) { MTSPR(powah::GPR{8}, rt, powah::GPR{0}); }
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void BLR() { base[offset++] = 0x4e800020; } //BCLR(R0, CR0, R0);
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void BLR() {
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void MFCTR(GPR const rt) { MFSPR(powah::GPR{9}, rt, powah::GPR{0}); }
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base[offset++] = 0x4e800020; //BCLR(R0, CR0, R0);
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void MTCTR(GPR const rt) { MTSPR(powah::GPR{9}, rt, powah::GPR{0}); }
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}
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void BCTRL() { base[offset++] = 0x4e800421; } //BCCTRL(R0, CR0, R0);
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// TODO: PowerPC 11 stuff
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// TODO: PowerPC 11 stuff
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void ISEL(GPR const rd, GPR const ra, GPR const rb, uint32_t d) {
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void ISEL(GPR const rd, GPR const ra, GPR const rb, uint32_t d) {
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@ -23,6 +23,8 @@ struct A32JitState {
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u32 cpsr_nzcv = 0;
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u32 cpsr_nzcv = 0;
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u32 fpscr = 0;
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u32 fpscr = 0;
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u8 check_bit = 0;
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u8 check_bit = 0;
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void* run_fn = nullptr;
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IR::LocationDescriptor GetLocationDescriptor() const {
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IR::LocationDescriptor GetLocationDescriptor() const {
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return IR::LocationDescriptor{regs[15] | (u64(upper_location_descriptor) << 32)};
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return IR::LocationDescriptor{regs[15] | (u64(upper_location_descriptor) << 32)};
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}
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}
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@ -74,6 +74,7 @@ struct A32Core final {
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auto const loc = thread_ctx.GetLocationDescriptor();
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auto const loc = thread_ctx.GetLocationDescriptor();
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auto const entry = process.GetOrEmit(loc);
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auto const entry = process.GetOrEmit(loc);
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using CodeFn = HaltReason (*)(A32AddressSpace*, A32JitState*, volatile u32*, void*);
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using CodeFn = HaltReason (*)(A32AddressSpace*, A32JitState*, volatile u32*, void*);
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thread_ctx.run_fn = (void*)&A32Core::Run;
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return (CodeFn(entry))(&process, &thread_ctx, halt_reason, reinterpret_cast<void*>(&A32Core::Run));
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return (CodeFn(entry))(&process, &thread_ctx, halt_reason, reinterpret_cast<void*>(&A32Core::Run));
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}
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}
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};
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};
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@ -29,6 +29,8 @@ struct A64JitState {
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u32 fpsr = 0;
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u32 fpsr = 0;
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volatile u32 halt_reason = 0;
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volatile u32 halt_reason = 0;
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u8 check_bit = 0;
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u8 check_bit = 0;
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void* run_fn = nullptr;
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IR::LocationDescriptor GetLocationDescriptor() const {
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IR::LocationDescriptor GetLocationDescriptor() const {
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const u64 fpcr_u64 = u64(fpcr & A64::LocationDescriptor::fpcr_mask) << A64::LocationDescriptor::fpcr_shift;
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const u64 fpcr_u64 = u64(fpcr & A64::LocationDescriptor::fpcr_mask) << A64::LocationDescriptor::fpcr_shift;
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const u64 pc_u64 = pc & A64::LocationDescriptor::pc_mask;
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const u64 pc_u64 = pc & A64::LocationDescriptor::pc_mask;
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@ -76,6 +76,7 @@ struct A64Core final {
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const auto loc = thread_ctx.GetLocationDescriptor();
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const auto loc = thread_ctx.GetLocationDescriptor();
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const auto entry = process.GetOrEmit(loc);
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const auto entry = process.GetOrEmit(loc);
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using CodeFn = HaltReason (*)(A64AddressSpace*, A64JitState*, volatile u32*, void*);
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using CodeFn = HaltReason (*)(A64AddressSpace*, A64JitState*, volatile u32*, void*);
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thread_ctx.run_fn = (void*)&A64Core::Run;
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return (CodeFn(entry))(&process, &thread_ctx, halt_reason, reinterpret_cast<void*>(&A64Core::Run));
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return (CodeFn(entry))(&process, &thread_ctx, halt_reason, reinterpret_cast<void*>(&A64Core::Run));
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}
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}
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};
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};
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@ -8,11 +8,10 @@
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namespace Dynarmic::Backend::PPC64 {
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namespace Dynarmic::Backend::PPC64 {
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// Jit fn signature => (AXXAddressSpace& process, AXXJitState& thread_ctx, volatile u32* halt_reason, void* link_fn)
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// Jit fn signature => (AXXAddressSpace& process, AXXJitState& thread_ctx, volatile u32* halt_reason)
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constexpr powah::GPR RPROCESS = powah::R3;
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constexpr powah::GPR RPROCESS = powah::R3;
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constexpr powah::GPR RJIT = powah::R4;
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constexpr powah::GPR RJIT = powah::R4;
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constexpr powah::GPR RHALTREASON = powah::R5;
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constexpr powah::GPR RHALTREASON = powah::R5;
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constexpr powah::GPR RLINKFN = powah::R6;
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constexpr powah::GPR RNZCV = powah::R31;
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constexpr powah::GPR RNZCV = powah::R31;
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constexpr powah::GPR ABI_PARAM1 = powah::R3;
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constexpr powah::GPR ABI_PARAM1 = powah::R3;
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@ -21,6 +21,7 @@
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#include "dynarmic/ir/basic_block.h"
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#include "dynarmic/ir/basic_block.h"
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#include "dynarmic/ir/microinstruction.h"
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#include "dynarmic/ir/microinstruction.h"
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#include "dynarmic/ir/opcodes.h"
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#include "dynarmic/ir/opcodes.h"
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#include "stack_layout.h"
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namespace Dynarmic::Backend::PPC64 {
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namespace Dynarmic::Backend::PPC64 {
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@ -155,23 +156,28 @@ void EmitTerminal(powah::Context& code, EmitContext& ctx, IR::Term::ReturnToDisp
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}
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}
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void EmitTerminal(powah::Context& code, EmitContext& ctx, IR::Term::LinkBlock terminal, IR::LocationDescriptor initial_location, bool) {
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void EmitTerminal(powah::Context& code, EmitContext& ctx, IR::Term::LinkBlock terminal, IR::LocationDescriptor initial_location, bool) {
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auto const tmp_lr = ctx.reg_alloc.ScratchGpr();
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auto const tmp = ctx.reg_alloc.ScratchGpr();
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auto const tmp = ctx.reg_alloc.ScratchGpr();
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code.LI(tmp, terminal.next.Value());
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code.LD(tmp_lr, PPC64::RJIT, offsetof(StackLayout, lr));
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code.MFCTR(tmp_lr);
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if (ctx.emit_conf.a64_variant) {
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if (ctx.emit_conf.a64_variant) {
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code.LI(tmp, terminal.next.Value());
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code.STD(tmp, PPC64::RJIT, offsetof(A64JitState, pc));
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code.STD(tmp, PPC64::RJIT, offsetof(A64JitState, pc));
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code.MFLR(PPC64::RLINKFN);
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code.LD(tmp, PPC64::RJIT, offsetof(A64JitState, run_fn));
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code.MTCTR(tmp);
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for (u32 i = 0; i < 4; ++i)
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for (u32 i = 0; i < 4; ++i)
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code.STD(powah::GPR{3 + i}, powah::R1, -((GPR_ORDER.size() + i) * 8));
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code.STD(powah::GPR{3 + i}, powah::R1, -((GPR_ORDER.size() + i) * 8));
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code.ADDIS(powah::R1, powah::R1, -sizeof(StackLayout));
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code.ADDIS(powah::R1, powah::R1, -sizeof(StackLayout));
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code.BLR();
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code.BCTRL();
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code.ADDI(powah::R1, powah::R1, sizeof(StackLayout));
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code.ADDI(powah::R1, powah::R1, sizeof(StackLayout));
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for (u32 i = 0; i < 4; ++i)
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for (u32 i = 0; i < 4; ++i)
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code.LD(powah::GPR{3 + i}, powah::R1, -((GPR_ORDER.size() + i) * 8));
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code.LD(powah::GPR{3 + i}, powah::R1, -((GPR_ORDER.size() + i) * 8));
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code.MTLR(PPC64::RLINKFN);
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} else {
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} else {
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code.LI(tmp, terminal.next.Value());
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code.STW(tmp, PPC64::RJIT, offsetof(A32JitState, regs) + sizeof(u32) * 15);
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code.STW(tmp, PPC64::RJIT, offsetof(A32JitState, regs) + sizeof(u32) * 15);
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ASSERT(false && "unimp");
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ASSERT(false && "unimp");
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}
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}
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code.MTCTR(tmp_lr);
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}
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}
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void EmitTerminal(powah::Context& code, EmitContext& ctx, IR::Term::LinkBlockFast terminal, IR::LocationDescriptor initial_location, bool) {
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void EmitTerminal(powah::Context& code, EmitContext& ctx, IR::Term::LinkBlockFast terminal, IR::LocationDescriptor initial_location, bool) {
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@ -15,6 +15,7 @@ struct alignas(16) StackLayout {
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std::array<u64, 18> regs;
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std::array<u64, 18> regs;
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std::array<u64, SpillCount> spill;
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std::array<u64, SpillCount> spill;
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u64 check_bit;
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u64 check_bit;
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void* lr;
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};
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};
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static_assert(sizeof(StackLayout) % 16 == 0);
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static_assert(sizeof(StackLayout) % 16 == 0);
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