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https://git.eden-emu.dev/eden-emu/eden
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[vk, graphics, pipeline, rasterizer] Alpha Coverage Adjustment
This commit is contained in:
parent
2abf124f09
commit
8cce12f3d3
3 changed files with 24 additions and 8 deletions
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@ -265,6 +265,7 @@ GraphicsPipeline::GraphicsPipeline(
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std::ranges::copy(info->constant_buffer_used_sizes, uniform_buffer_sizes[stage].begin());
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std::ranges::copy(info->constant_buffer_used_sizes, uniform_buffer_sizes[stage].begin());
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num_textures += Shader::NumDescriptors(info->texture_descriptors);
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num_textures += Shader::NumDescriptors(info->texture_descriptors);
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}
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}
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fragment_has_color0_output = stage_infos[NUM_STAGES - 1].stores_frag_color[0];
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auto func{[this, shader_notify, &render_pass_cache, &descriptor_pool, pipeline_statistics] {
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auto func{[this, shader_notify, &render_pass_cache, &descriptor_pool, pipeline_statistics] {
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DescriptorLayoutBuilder builder{MakeBuilder(device, stage_infos)};
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DescriptorLayoutBuilder builder{MakeBuilder(device, stage_infos)};
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uses_push_descriptor = builder.CanUsePushDescriptor();
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uses_push_descriptor = builder.CanUsePushDescriptor();
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@ -771,6 +772,7 @@ void GraphicsPipeline::MakePipeline(VkRenderPass render_pass) {
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provoking_vertex.pNext = std::exchange(rasterization_ci.pNext, &provoking_vertex);
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provoking_vertex.pNext = std::exchange(rasterization_ci.pNext, &provoking_vertex);
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}
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}
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const bool supports_alpha_output = fragment_has_color0_output;
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const VkPipelineMultisampleStateCreateInfo multisample_ci{
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const VkPipelineMultisampleStateCreateInfo multisample_ci{
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.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
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.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
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.pNext = nullptr,
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.pNext = nullptr,
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@ -779,8 +781,10 @@ void GraphicsPipeline::MakePipeline(VkRenderPass render_pass) {
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.sampleShadingEnable = Settings::values.sample_shading.GetValue() ? VK_TRUE : VK_FALSE,
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.sampleShadingEnable = Settings::values.sample_shading.GetValue() ? VK_TRUE : VK_FALSE,
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.minSampleShading = static_cast<float>(Settings::values.sample_shading_fraction.GetValue()) / 100.0f,
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.minSampleShading = static_cast<float>(Settings::values.sample_shading_fraction.GetValue()) / 100.0f,
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.pSampleMask = nullptr,
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.pSampleMask = nullptr,
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.alphaToCoverageEnable = key.state.alpha_to_coverage_enabled != 0 ? VK_TRUE : VK_FALSE,
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.alphaToCoverageEnable =
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.alphaToOneEnable = key.state.alpha_to_one_enabled != 0 ? VK_TRUE : VK_FALSE,
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supports_alpha_output && key.state.alpha_to_coverage_enabled != 0 ? VK_TRUE : VK_FALSE,
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.alphaToOneEnable =
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supports_alpha_output && key.state.alpha_to_one_enabled != 0 ? VK_TRUE : VK_FALSE,
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};
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};
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const VkPipelineDepthStencilStateCreateInfo depth_stencil_ci{
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const VkPipelineDepthStencilStateCreateInfo depth_stencil_ci{
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.sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO,
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.sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO,
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@ -82,6 +82,13 @@ public:
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const std::array<const Shader::Info*, NUM_STAGES>& infos);
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const std::array<const Shader::Info*, NUM_STAGES>& infos);
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bool HasDynamicVertexInput() const noexcept { return key.state.dynamic_vertex_input; }
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bool HasDynamicVertexInput() const noexcept { return key.state.dynamic_vertex_input; }
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bool SupportsAlphaToCoverage() const noexcept {
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return fragment_has_color0_output;
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}
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bool SupportsAlphaToOne() const noexcept {
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return fragment_has_color0_output;
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}
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GraphicsPipeline& operator=(GraphicsPipeline&&) noexcept = delete;
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GraphicsPipeline& operator=(GraphicsPipeline&&) noexcept = delete;
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GraphicsPipeline(GraphicsPipeline&&) noexcept = delete;
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GraphicsPipeline(GraphicsPipeline&&) noexcept = delete;
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@ -149,6 +156,7 @@ private:
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std::array<u32, 5> enabled_uniform_buffer_masks{};
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std::array<u32, 5> enabled_uniform_buffer_masks{};
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VideoCommon::UniformBufferSizes uniform_buffer_sizes{};
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VideoCommon::UniformBufferSizes uniform_buffer_sizes{};
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u32 num_textures{};
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u32 num_textures{};
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bool fragment_has_color0_output{};
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vk::DescriptorSetLayout descriptor_set_layout;
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vk::DescriptorSetLayout descriptor_set_layout;
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DescriptorAllocator descriptor_allocator;
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DescriptorAllocator descriptor_allocator;
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@ -1483,9 +1483,11 @@ void RasterizerVulkan::UpdateAlphaToCoverageEnable(Tegra::Engines::Maxwell3D::Re
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if (!state_tracker.TouchAlphaToCoverageEnable()) {
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if (!state_tracker.TouchAlphaToCoverageEnable()) {
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return;
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return;
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}
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}
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scheduler.Record([enable = regs.anti_alias_alpha_control.alpha_to_coverage](
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GraphicsPipeline* const pipeline = pipeline_cache.CurrentGraphicsPipeline();
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vk::CommandBuffer cmdbuf) {
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const bool enable = pipeline != nullptr && pipeline->SupportsAlphaToCoverage() &&
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cmdbuf.SetAlphaToCoverageEnableEXT(enable != 0);
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regs.anti_alias_alpha_control.alpha_to_coverage != 0;
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scheduler.Record([enable](vk::CommandBuffer cmdbuf) {
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cmdbuf.SetAlphaToCoverageEnableEXT(enable ? VK_TRUE : VK_FALSE);
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});
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});
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}
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}
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@ -1493,9 +1495,11 @@ void RasterizerVulkan::UpdateAlphaToOneEnable(Tegra::Engines::Maxwell3D::Regs& r
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if (!state_tracker.TouchAlphaToOneEnable()) {
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if (!state_tracker.TouchAlphaToOneEnable()) {
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return;
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return;
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}
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}
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scheduler.Record([enable = regs.anti_alias_alpha_control.alpha_to_one](
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GraphicsPipeline* const pipeline = pipeline_cache.CurrentGraphicsPipeline();
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vk::CommandBuffer cmdbuf) {
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const bool enable = pipeline != nullptr && pipeline->SupportsAlphaToOne() &&
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cmdbuf.SetAlphaToOneEnableEXT(enable != 0);
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regs.anti_alias_alpha_control.alpha_to_one != 0;
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scheduler.Record([enable](vk::CommandBuffer cmdbuf) {
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cmdbuf.SetAlphaToOneEnableEXT(enable ? VK_TRUE : VK_FALSE);
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});
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});
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}
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}
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