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https://git.eden-emu.dev/eden-emu/eden
synced 2026-06-28 22:45:26 +02:00
[video_core] Remove redundant references in GPU engine structs
Signed-off-by: lizzie <lizzie@eden-emu.dev>
This commit is contained in:
lizzie
parent
66141a2e7c
commit
871d3ffb20
7 changed files with 155 additions and 276 deletions
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@ -40,30 +40,32 @@
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namespace Tegra {
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struct GPU::Impl {
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explicit Impl(GPU& gpu_, Core::System& system_, bool is_async_, bool use_nvdec_)
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: gpu{gpu_}, system{system_}, host1x{system.Host1x()}, use_nvdec{use_nvdec_},
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shader_notify{std::make_unique<VideoCore::ShaderNotify>()}, is_async{is_async_},
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gpu_thread{system_, is_async_}, scheduler{std::make_unique<Control::Scheduler>(gpu)} {}
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explicit Impl(Core::System& system_, bool is_async_, bool use_nvdec_)
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: system{system_}
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, use_nvdec{use_nvdec_}
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, shader_notify()
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, is_async{is_async_}
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, gpu_thread{system_, is_async_}
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, scheduler(system_.GPU())
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{}
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~Impl() = default;
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std::shared_ptr<Control::ChannelState> CreateChannel(s32 channel_id) {
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auto channel_state = std::make_shared<Tegra::Control::ChannelState>(channel_id);
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channels.emplace(channel_id, channel_state);
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scheduler->DeclareChannel(channel_state);
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scheduler.DeclareChannel(channel_state);
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return channel_state;
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}
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void BindChannel(s32 channel_id) {
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if (bound_channel == channel_id) {
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return;
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if (bound_channel != channel_id) {
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auto it = channels.find(channel_id);
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ASSERT(it != channels.end());
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bound_channel = channel_id;
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current_channel = it->second.get();
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renderer->ReadRasterizer()->BindChannel(*current_channel);
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}
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auto it = channels.find(channel_id);
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ASSERT(it != channels.end());
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bound_channel = channel_id;
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current_channel = it->second.get();
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rasterizer->BindChannel(*current_channel);
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}
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std::shared_ptr<Control::ChannelState> AllocateChannel() {
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@ -71,13 +73,13 @@ struct GPU::Impl {
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}
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void InitChannel(Control::ChannelState& to_init, u64 program_id) {
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to_init.Init(system, gpu, program_id);
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to_init.BindRasterizer(rasterizer);
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rasterizer->InitializeChannel(to_init);
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to_init.Init(system, program_id);
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to_init.BindRasterizer(renderer->ReadRasterizer());
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renderer->ReadRasterizer()->InitializeChannel(to_init);
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}
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void InitAddressSpace(Tegra::MemoryManager& memory_manager) {
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memory_manager.BindRasterizer(rasterizer);
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memory_manager.BindRasterizer(renderer->ReadRasterizer());
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}
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void ReleaseChannel(Control::ChannelState& to_release) {
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@ -87,26 +89,26 @@ struct GPU::Impl {
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/// Binds a renderer to the GPU.
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void BindRenderer(std::unique_ptr<VideoCore::RendererBase> renderer_) {
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renderer = std::move(renderer_);
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rasterizer = renderer->ReadRasterizer();
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host1x.MemoryManager().BindInterface(rasterizer);
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host1x.gmmu_manager.BindRasterizer(rasterizer);
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system.Host1x().MemoryManager().BindInterface(renderer->ReadRasterizer());
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system.Host1x().GMMU().BindRasterizer(renderer->ReadRasterizer());
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}
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/// Flush all current written commands into the host GPU for execution.
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void FlushCommands() {
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rasterizer->FlushCommands();
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renderer->ReadRasterizer()->FlushCommands();
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}
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/// Synchronizes CPU writes with Host GPU memory.
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void InvalidateGPUCache() {
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std::function<void(PAddr, size_t)> callback_writes(
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[this](PAddr address, size_t size) { rasterizer->OnCacheInvalidation(address, size); });
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std::function<void(PAddr, size_t)> callback_writes([this](PAddr address, size_t size) {
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renderer->ReadRasterizer()->OnCacheInvalidation(address, size);
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});
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system.GatherGPUDirtyMemory(callback_writes);
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}
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/// Signal the ending of command list.
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void OnCommandListEnd() {
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rasterizer->ReleaseFences(false);
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renderer->ReadRasterizer()->ReleaseFences(false);
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Settings::UpdateGPUAccuracy();
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}
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@ -143,62 +145,6 @@ struct GPU::Impl {
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}
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}
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/// Returns a reference to the Maxwell3D GPU engine.
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[[nodiscard]] Engines::Maxwell3D& Maxwell3D() {
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ASSERT(current_channel);
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return *current_channel->maxwell_3d;
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}
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/// Returns a const reference to the Maxwell3D GPU engine.
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[[nodiscard]] const Engines::Maxwell3D& Maxwell3D() const {
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ASSERT(current_channel);
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return *current_channel->maxwell_3d;
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}
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/// Returns a reference to the KeplerCompute GPU engine.
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[[nodiscard]] Engines::KeplerCompute& KeplerCompute() {
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ASSERT(current_channel);
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return *current_channel->kepler_compute;
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}
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/// Returns a reference to the KeplerCompute GPU engine.
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[[nodiscard]] const Engines::KeplerCompute& KeplerCompute() const {
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ASSERT(current_channel);
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return *current_channel->kepler_compute;
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}
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/// Returns a reference to the GPU DMA pusher.
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[[nodiscard]] Tegra::DmaPusher& DmaPusher() {
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ASSERT(current_channel);
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return *current_channel->dma_pusher;
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}
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/// Returns a const reference to the GPU DMA pusher.
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[[nodiscard]] const Tegra::DmaPusher& DmaPusher() const {
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ASSERT(current_channel);
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return *current_channel->dma_pusher;
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}
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/// Returns a reference to the underlying renderer.
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[[nodiscard]] VideoCore::RendererBase& Renderer() {
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return *renderer;
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}
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/// Returns a const reference to the underlying renderer.
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[[nodiscard]] const VideoCore::RendererBase& Renderer() const {
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return *renderer;
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}
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/// Returns a reference to the shader notifier.
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[[nodiscard]] VideoCore::ShaderNotify& ShaderNotify() {
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return *shader_notify;
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}
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/// Returns a const reference to the shader notifier.
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[[nodiscard]] const VideoCore::ShaderNotify& ShaderNotify() const {
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return *shader_notify;
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}
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[[nodiscard]] u64 GetTicks() const {
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u64 gpu_tick = system.CoreTiming().GetGPUTicks();
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Settings::GpuOverclock overclock = Settings::values.fast_gpu_time.GetValue();
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@ -210,14 +156,6 @@ struct GPU::Impl {
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return gpu_tick;
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}
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[[nodiscard]] bool IsAsync() const {
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return is_async;
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}
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[[nodiscard]] bool UseNvdec() const {
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return use_nvdec;
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}
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void RendererFrameEndNotify() {
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system.GetPerfStats().EndGameFrame();
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}
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@ -227,7 +165,7 @@ struct GPU::Impl {
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/// core timing events.
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void Start() {
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Settings::UpdateGPUAccuracy();
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gpu_thread.StartThread(*renderer, renderer->Context(), *scheduler);
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gpu_thread.StartThread(*renderer, renderer->Context(), scheduler);
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}
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void NotifyShutdown() {
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@ -260,14 +198,13 @@ struct GPU::Impl {
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}
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VideoCore::RasterizerDownloadArea OnCPURead(DAddr addr, u64 size) {
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auto raster_area = rasterizer->GetFlushArea(addr, size);
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auto raster_area = renderer->ReadRasterizer()->GetFlushArea(addr, size);
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if (raster_area.preemtive) {
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return raster_area;
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}
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raster_area.preemtive = true;
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const u64 fence = RequestSyncOperation([this, &raster_area]() {
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rasterizer->FlushRegion(raster_area.start_address,
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raster_area.end_address - raster_area.start_address);
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renderer->ReadRasterizer()->FlushRegion(raster_area.start_address, raster_area.end_address - raster_area.start_address);
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});
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gpu_thread.TickGPU();
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WaitForSyncOperation(fence);
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@ -280,7 +217,7 @@ struct GPU::Impl {
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}
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bool OnCPUWrite(DAddr addr, u64 size) {
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return rasterizer->OnCPUWrite(addr, size);
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return renderer->ReadRasterizer()->OnCPUWrite(addr, size);
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}
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/// Notify rasterizer that any caches of the specified region should be flushed and invalidated
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@ -337,17 +274,14 @@ struct GPU::Impl {
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return out;
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}
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GPU& gpu;
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Core::System& system;
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Host1x::Host1x& host1x;
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std::unique_ptr<VideoCore::RendererBase> renderer;
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VideoCore::RasterizerInterface* rasterizer = nullptr;
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const bool use_nvdec;
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s32 new_channel_id{1};
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/// Shader build notifier
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std::unique_ptr<VideoCore::ShaderNotify> shader_notify;
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VideoCore::ShaderNotify shader_notify;
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/// When true, we are about to shut down emulation session, so terminate outstanding tasks
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std::atomic_bool shutting_down{};
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@ -371,7 +305,7 @@ struct GPU::Impl {
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VideoCommon::GPUThread::ThreadManager gpu_thread;
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std::unique_ptr<Core::Frontend::GraphicsContext> cpu_context;
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std::unique_ptr<Tegra::Control::Scheduler> scheduler;
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Tegra::Control::Scheduler scheduler;
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ankerl::unordered_dense::map<s32, std::shared_ptr<Tegra::Control::ChannelState>> channels;
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Tegra::Control::ChannelState* current_channel;
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s32 bound_channel{-1};
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@ -382,7 +316,8 @@ struct GPU::Impl {
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};
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GPU::GPU(Core::System& system, bool is_async, bool use_nvdec)
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: impl{std::make_unique<Impl>(*this, system, is_async, use_nvdec)} {}
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: impl{std::make_unique<Impl>(system, is_async, use_nvdec)}
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{}
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GPU::~GPU() = default;
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@ -423,8 +358,9 @@ void GPU::OnCommandListEnd() {
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}
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u64 GPU::RequestFlush(DAddr addr, std::size_t size) {
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return impl->RequestSyncOperation(
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[this, addr, size]() { impl->rasterizer->FlushRegion(addr, size); });
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return impl->RequestSyncOperation([this, addr, size]() {
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impl->renderer->ReadRasterizer()->FlushRegion(addr, size);
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});
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}
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u64 GPU::CurrentSyncRequestFence() const {
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@ -441,52 +377,52 @@ void GPU::TickWork() {
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/// Gets a mutable reference to the Host1x interface
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Host1x::Host1x& GPU::Host1x() {
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return impl->host1x;
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return impl->system.Host1x();
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}
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/// Gets an immutable reference to the Host1x interface.
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const Host1x::Host1x& GPU::Host1x() const {
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return impl->host1x;
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return impl->system.Host1x();
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}
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Engines::Maxwell3D& GPU::Maxwell3D() {
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return impl->Maxwell3D();
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return *impl->current_channel->maxwell_3d;
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}
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const Engines::Maxwell3D& GPU::Maxwell3D() const {
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return impl->Maxwell3D();
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return *impl->current_channel->maxwell_3d;
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}
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Engines::KeplerCompute& GPU::KeplerCompute() {
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return impl->KeplerCompute();
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return *impl->current_channel->kepler_compute;
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}
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const Engines::KeplerCompute& GPU::KeplerCompute() const {
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return impl->KeplerCompute();
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return *impl->current_channel->kepler_compute;
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}
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Tegra::DmaPusher& GPU::DmaPusher() {
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return impl->DmaPusher();
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return *impl->current_channel->dma_pusher;
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}
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const Tegra::DmaPusher& GPU::DmaPusher() const {
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return impl->DmaPusher();
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return *impl->current_channel->dma_pusher;
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}
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VideoCore::RendererBase& GPU::Renderer() {
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return impl->Renderer();
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return *impl->renderer;
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}
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const VideoCore::RendererBase& GPU::Renderer() const {
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return impl->Renderer();
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return *impl->renderer;
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}
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VideoCore::ShaderNotify& GPU::ShaderNotify() {
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return impl->ShaderNotify();
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return impl->shader_notify;
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}
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const VideoCore::ShaderNotify& GPU::ShaderNotify() const {
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return impl->ShaderNotify();
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return impl->shader_notify;
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}
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void GPU::RequestComposite(std::vector<Tegra::FramebufferConfig>&& layers,
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@ -503,11 +439,11 @@ u64 GPU::GetTicks() const {
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}
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bool GPU::IsAsync() const {
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return impl->IsAsync();
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return impl->is_async;
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}
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bool GPU::UseNvdec() const {
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return impl->UseNvdec();
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return impl->use_nvdec;
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}
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void GPU::RendererFrameEndNotify() {
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