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https://git.eden-emu.dev/eden-emu/eden
synced 2026-10-27 03:51:04 +01:00
Another take on the qcom/turnip missing handling for geometry stages
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ccbaa75e5e
commit
5dc91d7e25
7 changed files with 178 additions and 52 deletions
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@ -362,7 +362,7 @@ PipelineCache::PipelineCache(Tegra::MaxwellDeviceMemoryManager& device_memory_,
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const auto subgroup_stage_bit{[subgroup_stages](VkShaderStageFlags flag, Shader::Stage stage) {
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return (subgroup_stages & flag) != 0 ? (1u << static_cast<u32>(stage)) : 0u;
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}};
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const u32 supported_subgroup_stages{
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u32 supported_subgroup_stages{
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subgroup_stage_bit(VK_SHADER_STAGE_VERTEX_BIT, Shader::Stage::VertexA) |
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subgroup_stage_bit(VK_SHADER_STAGE_VERTEX_BIT, Shader::Stage::VertexB) |
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subgroup_stage_bit(VK_SHADER_STAGE_TESSELLATION_CONTROL_BIT,
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@ -372,6 +372,9 @@ PipelineCache::PipelineCache(Tegra::MaxwellDeviceMemoryManager& device_memory_,
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subgroup_stage_bit(VK_SHADER_STAGE_GEOMETRY_BIT, Shader::Stage::Geometry) |
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subgroup_stage_bit(VK_SHADER_STAGE_FRAGMENT_BIT, Shader::Stage::Fragment) |
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subgroup_stage_bit(VK_SHADER_STAGE_COMPUTE_BIT, Shader::Stage::Compute)};
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if (driver_id == VK_DRIVER_ID_MESA_TURNIP) {
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supported_subgroup_stages &= ~(1u << static_cast<u32>(Shader::Stage::Geometry));
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}
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profile = Shader::Profile{
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.supported_spirv = device.SupportedSpirvVersion(),
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.unified_descriptor_binding = true,
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@ -409,6 +412,8 @@ PipelineCache::PipelineCache(Tegra::MaxwellDeviceMemoryManager& device_memory_,
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.support_shader_quad_control = device.IsKhrShaderQuadControlSupported(),
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.support_quad_shuffles = device.IsSubgroupFeatureSupported(VK_SUBGROUP_FEATURE_QUAD_BIT),
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.support_vote = device.IsSubgroupFeatureSupported(VK_SUBGROUP_FEATURE_VOTE_BIT),
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.support_shuffle_relative =
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device.IsSubgroupFeatureSupported(VK_SUBGROUP_FEATURE_SHUFFLE_RELATIVE_BIT),
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.supported_subgroup_stages = supported_subgroup_stages,
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.support_viewport_index_layer_non_geometry =
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device.IsExtShaderViewportIndexLayerSupported(),
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@ -444,13 +449,17 @@ PipelineCache::PipelineCache(Tegra::MaxwellDeviceMemoryManager& device_memory_,
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driver_id == VK_DRIVER_ID_INTEL_OPEN_SOURCE_MESA,
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.has_broken_spirv_clamp = driver_id == VK_DRIVER_ID_INTEL_PROPRIETARY_WINDOWS,
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.has_broken_spirv_position_input = driver_id == false,
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.has_broken_spirv_position_input = driver_id == VK_DRIVER_ID_QUALCOMM_PROPRIETARY,
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.has_broken_unsigned_image_offsets = false,
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.has_broken_signed_operations = false,
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.has_broken_fp16_float_controls = driver_id == VK_DRIVER_ID_NVIDIA_PROPRIETARY,
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.has_broken_fp32_denorm_flush = driver_id == VK_DRIVER_ID_QUALCOMM_PROPRIETARY,
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.ignore_nan_fp_comparisons = false,
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.has_broken_spirv_subgroup_mask_vector_extract_dynamic = false,
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.has_broken_spirv_subgroup_mask_vector_extract_dynamic =
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driver_id == VK_DRIVER_ID_QUALCOMM_PROPRIETARY &&
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device.GetDriverVersion() < VK_MAKE_VERSION(512, 672, 0),
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.has_broken_spirv_subgroup_shuffle = driver_id == VK_DRIVER_ID_QUALCOMM_PROPRIETARY,
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.max_subgroup_size = device.GetMaxSubgroupSize(),
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.has_broken_robust =
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device.IsNvidia() && device.GetNvidiaArch() <= NvidiaArchitecture::Arch_Pascal,
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.min_ssbo_alignment = device.GetStorageBufferAlignment(),
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@ -485,6 +485,11 @@ FN_MAX_LIMIT_LIST
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return properties.subgroup_properties.supportedStages;
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}
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u32 GetMaxSubgroupSize() const {
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return (std::max)(properties.subgroup_properties.subgroupSize,
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properties.subgroup_size_control.maxSubgroupSize);
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}
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/// Returns the maximum number of push descriptors.
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u32 MaxPushDescriptors() const {
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return properties.push_descriptor.maxPushDescriptors;
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