mirror of
https://git.eden-emu.dev/eden-emu/eden
synced 2026-10-25 19:20:53 +01:00
Keep adjusting memory barriers to be more explicit
This commit is contained in:
parent
9d4355064b
commit
49c3a79fa8
14 changed files with 246 additions and 326 deletions
|
|
@ -869,6 +869,32 @@ FN_MAX_LIMIT_LIST
|
|||
return extensions.conditional_rendering;
|
||||
}
|
||||
|
||||
VkPipelineStageFlags2 GetBufferUserStages() const {
|
||||
VkPipelineStageFlags2 stages = vk::PIPELINE_STAGE_BUFFER_USERS;
|
||||
if (IsExtConditionalRendering()) {
|
||||
stages |= VK_PIPELINE_STAGE_2_CONDITIONAL_RENDERING_BIT_EXT;
|
||||
}
|
||||
if (IsExtTransformFeedbackSupported()) {
|
||||
stages |= VK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT;
|
||||
}
|
||||
return stages;
|
||||
}
|
||||
|
||||
VkPipelineStageFlags2 GetBufferConsumerStages() const {
|
||||
return GetBufferUserStages() | VK_PIPELINE_STAGE_2_HOST_BIT;
|
||||
}
|
||||
|
||||
VkAccessFlags2 GetBufferConsumerAccess() const {
|
||||
VkAccessFlags2 access = vk::ACCESS_BUFFER_CONSUMERS;
|
||||
if (IsExtConditionalRendering()) {
|
||||
access |= VK_ACCESS_2_CONDITIONAL_RENDERING_READ_BIT_EXT;
|
||||
}
|
||||
if (IsExtTransformFeedbackSupported()) {
|
||||
access |= VK_ACCESS_2_TRANSFORM_FEEDBACK_WRITE_BIT_EXT;
|
||||
}
|
||||
return access;
|
||||
}
|
||||
|
||||
bool IsExtAstcDecodeModeSupported() const {
|
||||
return extensions.astc_decode_mode;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -147,15 +147,6 @@ inline VkResult Filter(VkResult result) {
|
|||
return result;
|
||||
}
|
||||
|
||||
inline constexpr VkPipelineStageFlags2 PIPELINE_STAGE_GRAPHICS_COMPUTE =
|
||||
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT | VK_PIPELINE_STAGE_2_COMPUTE_SHADER_BIT;
|
||||
|
||||
inline constexpr VkPipelineStageFlags2 PIPELINE_STAGE_GRAPHICS_COMPUTE_TRANSFER =
|
||||
PIPELINE_STAGE_GRAPHICS_COMPUTE | VK_PIPELINE_STAGE_2_TRANSFER_BIT;
|
||||
|
||||
inline constexpr VkPipelineStageFlags2 PIPELINE_STAGE_GRAPHICS_COMPUTE_TRANSFER_HOST =
|
||||
PIPELINE_STAGE_GRAPHICS_COMPUTE_TRANSFER | VK_PIPELINE_STAGE_2_HOST_BIT;
|
||||
|
||||
inline constexpr VkPipelineStageFlags2 PIPELINE_STAGE_HOST = VK_PIPELINE_STAGE_2_HOST_BIT;
|
||||
|
||||
inline constexpr VkPipelineStageFlags2 PIPELINE_STAGE_GRAPHICS_SHADERS =
|
||||
|
|
@ -183,6 +174,27 @@ inline constexpr VkAccessFlags2 ACCESS_ATTACHMENTS =
|
|||
inline constexpr VkAccessFlags2 ACCESS_TRANSFER =
|
||||
VK_ACCESS_2_TRANSFER_READ_BIT | VK_ACCESS_2_TRANSFER_WRITE_BIT;
|
||||
|
||||
inline constexpr VkPipelineStageFlags2 PIPELINE_STAGE_BUFFER_USERS =
|
||||
PIPELINE_STAGE_BUFFER_INPUTS | VK_PIPELINE_STAGE_2_TRANSFER_BIT;
|
||||
|
||||
inline constexpr VkAccessFlags2 ACCESS_BUFFER_WRITES =
|
||||
VK_ACCESS_2_SHADER_WRITE_BIT | VK_ACCESS_2_TRANSFER_WRITE_BIT;
|
||||
|
||||
inline constexpr VkAccessFlags2 ACCESS_BUFFER_CONSUMERS =
|
||||
ACCESS_BUFFER_INPUTS | ACCESS_TRANSFER | VK_ACCESS_2_HOST_READ_BIT;
|
||||
|
||||
inline constexpr VkPipelineStageFlags2 PIPELINE_STAGE_IMAGE_USERS =
|
||||
PIPELINE_STAGE_GRAPHICS_SHADERS | VK_PIPELINE_STAGE_2_COMPUTE_SHADER_BIT |
|
||||
PIPELINE_STAGE_ATTACHMENTS | VK_PIPELINE_STAGE_2_TRANSFER_BIT;
|
||||
|
||||
inline constexpr VkAccessFlags2 ACCESS_IMAGE_WRITES =
|
||||
VK_ACCESS_2_SHADER_WRITE_BIT | VK_ACCESS_2_COLOR_ATTACHMENT_WRITE_BIT |
|
||||
VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT | VK_ACCESS_2_TRANSFER_WRITE_BIT;
|
||||
|
||||
inline constexpr VkAccessFlags2 ACCESS_IMAGE_USERS =
|
||||
VK_ACCESS_2_SHADER_READ_BIT | VK_ACCESS_2_SHADER_WRITE_BIT | ACCESS_ATTACHMENTS |
|
||||
ACCESS_TRANSFER;
|
||||
|
||||
|
||||
/// Table holding Vulkan instance function pointers.
|
||||
struct InstanceDispatch {
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue