mirror of
https://git.eden-emu.dev/eden-emu/eden
synced 2026-04-10 03:18:55 +02:00
[vk] batched draws
Signed-off-by: lizzie <lizzie@eden-emu.dev>
This commit is contained in:
parent
0574d7d2c9
commit
47e3533bd9
10 changed files with 134 additions and 116 deletions
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@ -69,6 +69,7 @@ void DrawManager::ProcessMethodCall(u32 method, u32 argument) {
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void DrawManager::Clear(u32 layer_count) {
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if (maxwell3d->ShouldExecute()) {
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maxwell3d->rasterizer->FlushBatchedDraws();
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maxwell3d->rasterizer->Clear(layer_count);
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}
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}
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@ -144,6 +145,8 @@ void DrawManager::SetInlineIndexBuffer(u32 index) {
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}
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void DrawManager::DrawBegin() {
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maxwell3d->rasterizer->FlushBatchedDraws();
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const auto& regs{maxwell3d->regs};
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auto reset_instance_count = regs.draw.instance_id == Maxwell3D::Regs::Draw::InstanceId::First;
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auto increment_instance_count =
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@ -192,6 +195,7 @@ void DrawManager::DrawEnd(u32 instance_count, bool force_draw) {
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draw_state.inline_index_draw_indexes.clear();
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break;
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}
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maxwell3d->rasterizer->FlushBatchedDraws();
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}
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void DrawManager::DrawIndexSmall(u32 argument) {
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@ -39,6 +39,9 @@ class RasterizerInterface {
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public:
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virtual ~RasterizerInterface() = default;
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/// Flushes draws batched by Draw()
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virtual void FlushBatchedDraws() = 0;
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/// Dispatches a draw invocation
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virtual void Draw(bool is_indexed, u32 instance_count) = 0;
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@ -22,6 +22,7 @@ RasterizerNull::RasterizerNull(Tegra::GPU& gpu) : m_gpu{gpu} {}
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RasterizerNull::~RasterizerNull() = default;
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void RasterizerNull::Draw(bool is_indexed, u32 instance_count) {}
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void RasterizerNull::FlushBatchedDraws() {}
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void RasterizerNull::DrawTexture() {}
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void RasterizerNull::Clear(u32 layer_count) {}
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void RasterizerNull::DispatchCompute() {}
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@ -37,6 +37,7 @@ public:
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explicit RasterizerNull(Tegra::GPU& gpu);
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~RasterizerNull() override;
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void FlushBatchedDraws() override;
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void Draw(bool is_indexed, u32 instance_count) override;
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void DrawTexture() override;
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void Clear(u32 layer_count) override;
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@ -258,6 +258,10 @@ void RasterizerOpenGL::PrepareDraw(bool is_indexed, Func&& draw_func) {
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has_written_global_memory |= pipeline->WritesGlobalMemory();
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}
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void RasterizerOpenGL::FlushBatchedDraws() {
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}
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void RasterizerOpenGL::Draw(bool is_indexed, u32 instance_count) {
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PrepareDraw(is_indexed, [this, is_indexed, instance_count](GLenum primitive_mode) {
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const auto& draw_state = maxwell3d->draw_manager->GetDrawState();
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@ -81,6 +81,7 @@ public:
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StateTracker& state_tracker_);
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~RasterizerOpenGL() override;
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void FlushBatchedDraws() override;
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void Draw(bool is_indexed, u32 instance_count) override;
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void DrawIndirect() override;
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void DrawTexture() override;
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@ -310,6 +310,8 @@ void GraphicsPipeline::AddTransition(GraphicsPipeline* transition) {
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template <typename Spec>
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bool GraphicsPipeline::ConfigureImpl(bool is_indexed) {
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maxwell3d->Rasterizer().FlushBatchedDraws(); //DRAW THINGS FROM PREVIOUS PIPELINE!!!!!!
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std::array<VideoCommon::ImageViewInOut, MAX_IMAGE_ELEMENTS> views;
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std::array<VideoCommon::SamplerId, MAX_IMAGE_ELEMENTS> samplers;
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size_t sampler_index{};
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@ -507,8 +509,7 @@ bool GraphicsPipeline::ConfigureImpl(bool is_indexed) {
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return true;
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}
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void GraphicsPipeline::ConfigureDraw(const RescalingPushConstant& rescaling,
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const RenderAreaPushConstant& render_area) {
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void GraphicsPipeline::ConfigureDraw(const RescalingPushConstant& rescaling, const RenderAreaPushConstant& render_area) {
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scheduler.RequestRenderpass(texture_cache.GetFramebuffer());
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if (!is_built.load(std::memory_order::relaxed)) {
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// Wait for the pipeline to be built
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@ -48,19 +48,8 @@ namespace Vulkan {
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using Maxwell = Tegra::Engines::Maxwell3D::Regs;
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using MaxwellDrawState = Tegra::Engines::DrawManager::State;
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using VideoCommon::ImageViewId;
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using VideoCommon::ImageViewType;
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namespace {
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struct DrawParams {
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u32 base_instance;
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u32 num_instances;
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u32 base_vertex;
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u32 num_vertices;
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u32 first_index;
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bool is_indexed;
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};
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VkViewport GetViewportState(const Device& device, const Maxwell& regs, size_t index, float scale) {
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const auto& src = regs.viewport_transform[index];
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const auto conv = [scale](float value) {
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@ -151,8 +140,8 @@ VkRect2D GetScissorState(const Maxwell& regs, size_t index, u32 up_scale = 1, u3
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return scissor;
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}
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DrawParams MakeDrawParams(const MaxwellDrawState& draw_state, u32 num_instances, bool is_indexed) {
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DrawParams params{
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RasterizerVulkan::DrawParams MakeDrawParams(const MaxwellDrawState& draw_state, u32 num_instances, bool is_indexed) {
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RasterizerVulkan::DrawParams params{
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.base_instance = draw_state.base_instance,
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.num_instances = num_instances,
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.base_vertex = is_indexed ? draw_state.base_index : draw_state.vertex_buffer.first,
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@ -215,6 +204,8 @@ void RasterizerVulkan::PrepareDraw(bool is_indexed, Func&& draw_func) {
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SCOPE_EXIT {
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gpu.TickWork();
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};
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if (state_tracker.flags->count() > 0)
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FlushBatchedDraws(); // Dirty state changes the way Vulkan would behave
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FlushWork();
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gpu_memory->FlushCaching();
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@ -225,75 +216,94 @@ void RasterizerVulkan::PrepareDraw(bool is_indexed, Func&& draw_func) {
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std::scoped_lock lock{buffer_cache.mutex, texture_cache.mutex};
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// update engine as channel may be different.
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pipeline->SetEngine(maxwell3d, gpu_memory);
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if (!pipeline->Configure(is_indexed))
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if (pipeline->Configure(is_indexed)) {
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UpdateDynamicStates();
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HandleTransformFeedback();
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query_cache.CounterEnable(VideoCommon::QueryType::ZPassPixelCount64, maxwell3d->regs.zpass_pixel_count_enable);
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draw_func();
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}
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}
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void RasterizerVulkan::FlushBatchedDraws() {
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auto const log_draw = [](RasterizerVulkan::DrawParams draw_params) {
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// Log draw call
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if (Settings::values.gpu_logging_enabled.GetValue() && Settings::values.gpu_log_vulkan_calls.GetValue()) {
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const std::string params = draw_params.is_indexed ?
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fmt::format("vertices={}, instances={}, firstIndex={}, baseVertex={}, baseInstance={}", draw_params.num_vertices, draw_params.num_instances, draw_params.first_index, draw_params.base_vertex, draw_params.base_instance) :
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fmt::format("vertices={}, instances={}, firstVertex={}, firstInstance={}", draw_params.num_vertices, draw_params.num_instances, draw_params.base_vertex, draw_params.base_instance);
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GPU::Logging::GPULogger::GetInstance().LogVulkanCall(draw_params.is_indexed ? "vkCmdDrawIndexed" : "vkCmdDraw", params, VK_SUCCESS);
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}
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};
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(void)log_draw;
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auto const& list = batched_draw_params;
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if (list.empty())
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return;
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UpdateDynamicStates();
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HandleTransformFeedback();
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query_cache.CounterEnable(VideoCommon::QueryType::ZPassPixelCount64,
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maxwell3d->regs.zpass_pixel_count_enable);
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draw_func();
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// Use VK_EXT_multi_draw if available (single draw becomes multi-draw with count=1)
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for (size_t i = 0; i < list.size(); ) {
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auto const first_i = i;
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bool last_is_indexed = list[i].is_indexed;
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u32 last_num_instances = list[i].num_instances;
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u32 last_base_instance = list[i].base_instance;
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// now for the sad draw part...
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u32 count = 0;
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if (last_is_indexed) {
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std::vector<VkMultiDrawIndexedInfoEXT> multi_draw_info;
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std::vector<int32_t> vertex_offset;
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for (; i < list.size()
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&& list[i].is_indexed == last_is_indexed
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&& list[i].num_instances == last_num_instances
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&& list[i].base_instance == last_base_instance; ++i) {
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multi_draw_info.push_back({
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.firstIndex = list[i].first_index,
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.indexCount = list[i].num_vertices
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});
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vertex_offset.push_back(list[i].base_vertex);
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++count;
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}
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if (device.IsExtMultiDrawSupported() && multi_draw_info.size() > 1) {
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scheduler.Record([last_num_instances, last_base_instance, count, multi_draw_info, vertex_offset](vk::CommandBuffer cmdbuf) {
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cmdbuf.DrawMultiIndexedEXT(count, multi_draw_info.data(), last_num_instances, last_base_instance, sizeof(VkMultiDrawIndexedInfoEXT), vertex_offset.data());
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});
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} else {
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for (size_t j = first_i; j < i; ++j) {
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scheduler.Record([draw_params = list[j]](vk::CommandBuffer cmdbuf) {
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cmdbuf.DrawIndexed(draw_params.num_vertices, draw_params.num_instances, draw_params.first_index, draw_params.base_vertex, draw_params.base_instance);
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});
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}
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}
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} else {
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std::vector<VkMultiDrawInfoEXT> multi_draw_info;
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for (; i < list.size()
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&& list[i].is_indexed == last_is_indexed
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&& list[i].num_instances == last_num_instances
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&& list[i].base_instance == last_base_instance; ++i) {
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multi_draw_info.push_back({
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.firstVertex = list[i].base_vertex,
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.vertexCount = list[i].num_vertices
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});
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++count;
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}
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if (device.IsExtMultiDrawSupported() && multi_draw_info.size() > 1) {
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scheduler.Record([last_num_instances, last_base_instance, count, multi_draw_info](vk::CommandBuffer cmdbuf) {
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cmdbuf.DrawMultiEXT(count, multi_draw_info.data(), last_num_instances, last_base_instance, sizeof(VkMultiDrawInfoEXT));
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});
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} else {
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for (size_t j = first_i; j < i; ++j) {
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scheduler.Record([draw_params = list[j]](vk::CommandBuffer cmdbuf) {
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cmdbuf.Draw(draw_params.num_vertices, draw_params.num_instances, draw_params.base_vertex, draw_params.base_instance);
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});
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}
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}
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}
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}
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batched_draw_params.clear();
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}
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void RasterizerVulkan::Draw(bool is_indexed, u32 instance_count) {
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PrepareDraw(is_indexed, [this, is_indexed, instance_count] {
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const auto& draw_state = maxwell3d->draw_manager->GetDrawState();
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const u32 num_instances{instance_count};
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const DrawParams draw_params{MakeDrawParams(draw_state, num_instances, is_indexed)};
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// Use VK_EXT_multi_draw if available (single draw becomes multi-draw with count=1)
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if (device.IsExtMultiDrawSupported()) {
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scheduler.Record([draw_params](vk::CommandBuffer cmdbuf) {
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if (draw_params.is_indexed) {
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// Use multi-draw indexed with single draw
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const VkMultiDrawIndexedInfoEXT multi_draw_info{
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.firstIndex = draw_params.first_index,
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.indexCount = draw_params.num_vertices,
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};
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const int32_t vertex_offset = static_cast<int32_t>(draw_params.base_vertex);
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cmdbuf.DrawMultiIndexedEXT(1, &multi_draw_info, draw_params.num_instances,
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draw_params.base_instance,
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sizeof(VkMultiDrawIndexedInfoEXT), &vertex_offset);
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} else {
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// Use multi-draw with single draw
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const VkMultiDrawInfoEXT multi_draw_info{
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.firstVertex = draw_params.base_vertex,
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.vertexCount = draw_params.num_vertices,
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};
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cmdbuf.DrawMultiEXT(1, &multi_draw_info, draw_params.num_instances,
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draw_params.base_instance,
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sizeof(VkMultiDrawInfoEXT));
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}
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});
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} else {
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// Fallback to standard draw calls
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scheduler.Record([draw_params](vk::CommandBuffer cmdbuf) {
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if (draw_params.is_indexed) {
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cmdbuf.DrawIndexed(draw_params.num_vertices, draw_params.num_instances,
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draw_params.first_index, draw_params.base_vertex,
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draw_params.base_instance);
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} else {
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cmdbuf.Draw(draw_params.num_vertices, draw_params.num_instances,
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draw_params.base_vertex, draw_params.base_instance);
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}
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});
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}
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// Log draw call
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if (Settings::values.gpu_logging_enabled.GetValue() &&
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Settings::values.gpu_log_vulkan_calls.GetValue()) {
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const std::string params = is_indexed ?
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fmt::format("vertices={}, instances={}, firstIndex={}, baseVertex={}, baseInstance={}",
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draw_params.num_vertices, draw_params.num_instances,
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draw_params.first_index, draw_params.base_vertex, draw_params.base_instance) :
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fmt::format("vertices={}, instances={}, firstVertex={}, firstInstance={}",
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draw_params.num_vertices, draw_params.num_instances,
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draw_params.base_vertex, draw_params.base_instance);
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GPU::Logging::GPULogger::GetInstance().LogVulkanCall(
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is_indexed ? "vkCmdDrawIndexed" : "vkCmdDraw", params, VK_SUCCESS);
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}
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auto const& draw_state = maxwell3d->draw_manager->GetDrawState();
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auto const num_instances = instance_count;
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batched_draw_params.push_back(MakeDrawParams(draw_state, num_instances, is_indexed));
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});
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}
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@ -356,16 +366,16 @@ void RasterizerVulkan::DrawIndirect() {
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}
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void RasterizerVulkan::DrawTexture() {
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SCOPE_EXIT {
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gpu.TickWork();
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};
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if (state_tracker.flags->count() > 0)
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FlushBatchedDraws(); // Dirty state changes the way Vulkan would behave
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FlushWork();
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std::scoped_lock l{texture_cache.mutex};
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texture_cache.SynchronizeGraphicsDescriptors();
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texture_cache.UpdateRenderTargets(false);
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UpdateDynamicStates();
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query_cache.CounterEnable(VideoCommon::QueryType::ZPassPixelCount64,
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@ -403,6 +413,8 @@ void RasterizerVulkan::DrawTexture() {
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}
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void RasterizerVulkan::Clear(u32 layer_count) {
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if (state_tracker.flags->count() > 0)
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FlushBatchedDraws(); // Dirty state changes the way Vulkan would behave
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FlushWork();
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gpu_memory->FlushCaching();
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@ -559,6 +571,8 @@ void RasterizerVulkan::Clear(u32 layer_count) {
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}
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void RasterizerVulkan::DispatchCompute() {
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if (state_tracker.flags->count() > 0)
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FlushBatchedDraws(); // Dirty state changes the way Vulkan would behave
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FlushWork();
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gpu_memory->FlushCaching();
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@ -934,7 +948,6 @@ void RasterizerVulkan::FlushWork() {
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static constexpr u32 DRAWS_TO_DISPATCH = 4096;
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static constexpr u32 CHECK_MASK = 7;
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#endif // ANDROID
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static_assert(DRAWS_TO_DISPATCH % (CHECK_MASK + 1) == 0);
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if ((++draw_counter & CHECK_MASK) != CHECK_MASK) {
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return;
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@ -52,57 +52,48 @@ class StateTracker;
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class AccelerateDMA : public Tegra::Engines::AccelerateDMAInterface {
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public:
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explicit AccelerateDMA(BufferCache& buffer_cache, TextureCache& texture_cache,
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Scheduler& scheduler);
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explicit AccelerateDMA(BufferCache& buffer_cache, TextureCache& texture_cache, Scheduler& scheduler);
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bool BufferCopy(GPUVAddr start_address, GPUVAddr end_address, u64 amount) override;
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bool BufferClear(GPUVAddr src_address, u64 amount, u32 value) override;
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bool ImageToBuffer(const Tegra::DMA::ImageCopy& copy_info, const Tegra::DMA::ImageOperand& src,
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const Tegra::DMA::BufferOperand& dst) override;
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bool BufferToImage(const Tegra::DMA::ImageCopy& copy_info, const Tegra::DMA::BufferOperand& src,
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const Tegra::DMA::ImageOperand& dst) override;
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bool ImageToBuffer(const Tegra::DMA::ImageCopy& copy_info, const Tegra::DMA::ImageOperand& src, const Tegra::DMA::BufferOperand& dst) override;
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bool BufferToImage(const Tegra::DMA::ImageCopy& copy_info, const Tegra::DMA::BufferOperand& src, const Tegra::DMA::ImageOperand& dst) override;
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private:
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template <bool IS_IMAGE_UPLOAD>
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bool DmaBufferImageCopy(const Tegra::DMA::ImageCopy& copy_info,
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const Tegra::DMA::BufferOperand& src,
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const Tegra::DMA::ImageOperand& dst);
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bool DmaBufferImageCopy(const Tegra::DMA::ImageCopy& copy_info, const Tegra::DMA::BufferOperand& src, const Tegra::DMA::ImageOperand& dst);
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BufferCache& buffer_cache;
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TextureCache& texture_cache;
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Scheduler& scheduler;
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};
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class RasterizerVulkan final : public VideoCore::RasterizerInterface,
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protected VideoCommon::ChannelSetupCaches<VideoCommon::ChannelInfo> {
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class RasterizerVulkan final : public VideoCore::RasterizerInterface, protected VideoCommon::ChannelSetupCaches<VideoCommon::ChannelInfo> {
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public:
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explicit RasterizerVulkan(Core::Frontend::EmuWindow& emu_window_, Tegra::GPU& gpu_,
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Tegra::MaxwellDeviceMemoryManager& device_memory_,
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const Device& device_, MemoryAllocator& memory_allocator_,
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StateTracker& state_tracker_, Scheduler& scheduler_);
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struct DrawParams {
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u32 base_instance;
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u32 num_instances;
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u32 base_vertex;
|
||||
u32 num_vertices;
|
||||
u32 first_index;
|
||||
bool is_indexed;
|
||||
};
|
||||
|
||||
explicit RasterizerVulkan(Core::Frontend::EmuWindow& emu_window_, Tegra::GPU& gpu_, Tegra::MaxwellDeviceMemoryManager& device_memory_, const Device& device_, MemoryAllocator& memory_allocator_, StateTracker& state_tracker_, Scheduler& scheduler_);
|
||||
~RasterizerVulkan() override;
|
||||
|
||||
void FlushBatchedDraws() override;
|
||||
void Draw(bool is_indexed, u32 instance_count) override;
|
||||
void DrawIndirect() override;
|
||||
void DrawTexture() override;
|
||||
void Clear(u32 layer_count) override;
|
||||
void DispatchCompute() override;
|
||||
void ResetCounter(VideoCommon::QueryType type) override;
|
||||
void Query(GPUVAddr gpu_addr, VideoCommon::QueryType type,
|
||||
VideoCommon::QueryPropertiesFlags flags, u32 payload, u32 subreport) override;
|
||||
void Query(GPUVAddr gpu_addr, VideoCommon::QueryType type, VideoCommon::QueryPropertiesFlags flags, u32 payload, u32 subreport) override;
|
||||
void BindGraphicsUniformBuffer(size_t stage, u32 index, GPUVAddr gpu_addr, u32 size) override;
|
||||
void DisableGraphicsUniformBuffer(size_t stage, u32 index) override;
|
||||
void FlushAll() override;
|
||||
void FlushRegion(DAddr addr, u64 size,
|
||||
VideoCommon::CacheType which = VideoCommon::CacheType::All) override;
|
||||
bool MustFlushRegion(DAddr addr, u64 size,
|
||||
VideoCommon::CacheType which = VideoCommon::CacheType::All) override;
|
||||
void FlushRegion(DAddr addr, u64 size, VideoCommon::CacheType which = VideoCommon::CacheType::All) override;
|
||||
bool MustFlushRegion(DAddr addr, u64 size, VideoCommon::CacheType which = VideoCommon::CacheType::All) override;
|
||||
VideoCore::RasterizerDownloadArea GetFlushArea(DAddr addr, u64 size) override;
|
||||
void InvalidateRegion(DAddr addr, u64 size,
|
||||
VideoCommon::CacheType which = VideoCommon::CacheType::All) override;
|
||||
void InvalidateRegion(DAddr addr, u64 size, VideoCommon::CacheType which = VideoCommon::CacheType::All) override;
|
||||
void InnerInvalidation(std::span<const std::pair<DAddr, std::size_t>> sequences) override;
|
||||
void OnCacheInvalidation(DAddr addr, u64 size) override;
|
||||
bool OnCPUWrite(DAddr addr, u64 size) override;
|
||||
|
|
@ -114,8 +105,7 @@ public:
|
|||
void SignalSyncPoint(u32 value) override;
|
||||
void SignalReference() override;
|
||||
void ReleaseFences(bool force = true) override;
|
||||
void FlushAndInvalidateRegion(
|
||||
DAddr addr, u64 size, VideoCommon::CacheType which = VideoCommon::CacheType::All) override;
|
||||
void FlushAndInvalidateRegion(DAddr addr, u64 size, VideoCommon::CacheType which = VideoCommon::CacheType::All) override;
|
||||
void WaitForIdle() override;
|
||||
void FragmentBarrier() override;
|
||||
void TiledCacheBarrier() override;
|
||||
|
|
@ -136,9 +126,7 @@ public:
|
|||
void BindChannel(Tegra::Control::ChannelState& channel) override;
|
||||
|
||||
void ReleaseChannel(s32 channel_id) override;
|
||||
std::optional<FramebufferTextureInfo> AccelerateDisplay(const Tegra::FramebufferConfig& config,
|
||||
VAddr framebuffer_addr,
|
||||
u32 pixel_stride);
|
||||
std::optional<FramebufferTextureInfo> AccelerateDisplay(const Tegra::FramebufferConfig& config, VAddr framebuffer_addr, u32 pixel_stride);
|
||||
|
||||
private:
|
||||
static constexpr const u64 NEEDS_D24[] = {
|
||||
|
|
@ -223,6 +211,7 @@ private:
|
|||
boost::container::static_vector<u32, MAX_IMAGE_VIEWS> image_view_indices;
|
||||
std::array<VideoCommon::ImageViewId, MAX_IMAGE_VIEWS> image_view_ids;
|
||||
boost::container::static_vector<VkSampler, MAX_TEXTURES> sampler_handles;
|
||||
std::vector<DrawParams> batched_draw_params;
|
||||
|
||||
u32 draw_counter = 0;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -301,6 +301,7 @@ private:
|
|||
return is_dirty;
|
||||
}
|
||||
|
||||
public:
|
||||
struct StencilProperties {
|
||||
u32 ref = 0;
|
||||
u32 write_mask = 0;
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue