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just use STD() + offset, reorder stuff

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Signed-off-by: lizzie <lizzie@eden-emu.dev>
This commit is contained in:
lizzie 2025-11-04 05:23:22 +00:00
parent 0505fc4e50
commit 1ccf1e3331
4 changed files with 13 additions and 7 deletions
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2
src/dynarmic/src/dynarmic/backend/ppc64/a32_core.h
View file

@ -16,8 +16,8 @@
namespace Dynarmic::Backend::PPC64 { namespace Dynarmic::Backend::PPC64 {
struct A32JitState { struct A32JitState {
alignas(16) std::array<u32, 64> ext_regs{};
std::array<u32, 16> regs{}; std::array<u32, 16> regs{};
alignas(16) std::array<u32, 64> ext_regs{};
u32 upper_location_descriptor; u32 upper_location_descriptor;
u32 exclusive_state = 0; u32 exclusive_state = 0;
u32 cpsr_nzcv = 0; u32 cpsr_nzcv = 0;

4
src/dynarmic/src/dynarmic/backend/ppc64/a64_core.h
View file

@ -18,10 +18,10 @@ namespace Dynarmic::Backend::PPC64 {
struct A64JitState { struct A64JitState {
using ProgramCounterType = u32; using ProgramCounterType = u32;
alignas(16) std::array<u64, 64> vec{};
std::array<u64, 31> regs{}; std::array<u64, 31> regs{};
u64 sp = 0;
u64 pc = 0; u64 pc = 0;
alignas(16) std::array<u64, 64> vec{};
u64 sp = 0;
u32 upper_location_descriptor; u32 upper_location_descriptor;
u32 exclusive_state = 0; u32 exclusive_state = 0;
u32 cpsr_nzcv = 0; u32 cpsr_nzcv = 0;

1
src/dynarmic/src/dynarmic/backend/ppc64/emit_ppc64.cpp
View file

@ -191,6 +191,7 @@ EmittedBlockInfo EmitPPC64(powah::Context& code, IR::Block block, const EmitConf
*/ */
static FILE* fp = fopen("test.bin", "wb"); static FILE* fp = fopen("test.bin", "wb");
fwrite(code.base, code.offset - start_offset, sizeof(uint32_t), fp); fwrite(code.base, code.offset - start_offset, sizeof(uint32_t), fp);
fflush(fp);
ebi.size = code.offset - start_offset; ebi.size = code.offset - start_offset;
return ebi; return ebi;

13
src/dynarmic/src/dynarmic/backend/ppc64/emit_ppc64_a64.cpp
View file

@ -102,8 +102,12 @@ void EmitIR<IR::Opcode::A64SetW>(powah::Context& code, EmitContext& ctx, IR::Ins
auto const value = ctx.reg_alloc.UseGpr(inst->GetArg(1)); auto const value = ctx.reg_alloc.UseGpr(inst->GetArg(1));
if (inst->GetArg(0).GetType() == IR::Type::A64Reg) { if (inst->GetArg(0).GetType() == IR::Type::A64Reg) {
auto const addr = ctx.reg_alloc.ScratchGpr(); auto const addr = ctx.reg_alloc.ScratchGpr();
code.ADDI(addr, PPC64::RJIT, A64::RegNumber(inst->GetArg(0).GetA64RegRef()) * sizeof(u64)); auto const tmp = ctx.reg_alloc.ScratchGpr();
code.STD(value, addr, offsetof(A64JitState, regs)); auto const offs = offsetof(A64JitState, regs)
+ A64::RegNumber(inst->GetArg(0).GetA64RegRef()) * sizeof(u64);
code.MR(tmp, value);
code.RLDICL(tmp, tmp, 0, 32);
code.STD(tmp, addr, offs);
} else { } else {
ASSERT(false && "unimp"); ASSERT(false && "unimp");
} }
@ -114,8 +118,9 @@ void EmitIR<IR::Opcode::A64SetX>(powah::Context& code, EmitContext& ctx, IR::Ins
auto const value = ctx.reg_alloc.UseGpr(inst->GetArg(1)); auto const value = ctx.reg_alloc.UseGpr(inst->GetArg(1));
if (inst->GetArg(0).GetType() == IR::Type::A64Reg) { if (inst->GetArg(0).GetType() == IR::Type::A64Reg) {
auto const addr = ctx.reg_alloc.ScratchGpr(); auto const addr = ctx.reg_alloc.ScratchGpr();
code.ADDI(addr, PPC64::RJIT, A64::RegNumber(inst->GetArg(0).GetA64RegRef()) * sizeof(u64)); auto const offs = offsetof(A64JitState, regs)
code.STD(value, addr, offsetof(A64JitState, regs)); + A64::RegNumber(inst->GetArg(0).GetA64RegRef()) * sizeof(u64);
code.STD(value, addr, offs);
} else { } else {
ASSERT(false && "unimp"); ASSERT(false && "unimp");
} }