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[shader_recompiler] Add IAbs64 to prevent errors when using I2F with a 64-bit packed CBUF variant (#2918)

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- Using I2F cbuf variant (packed 32x2 aka. U64)
- Code will call IAbs() if some conditions are met (signed + abs bit)
- Uh oh we don't have a variant for 64 bits!
- Fuck now we just made BAD ir code :(

Signed-off-by: lizzie <lizzie@eden-emu.dev>

Reviewed-on: https://git.eden-emu.dev/eden-emu/eden/pulls/2918
Reviewed-by: MaranBr <maranbr@eden-emu.dev>
Reviewed-by: Caio Oliveira <caiooliveirafarias0@gmail.com>
Co-authored-by: lizzie <lizzie@eden-emu.dev>
Co-committed-by: lizzie <lizzie@eden-emu.dev>
This commit is contained in:
lizzie 2025-11-03 20:20:19 +01:00 • committed by crueter
parent 6a9ad5e1ea
commit 0e6ea2d9d6
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GPG key ID: 425ACD2D4830EBC6
10 changed files with 52 additions and 23 deletions
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11
src/shader_recompiler/frontend/ir/ir_emitter.cpp
View file

@ -1190,8 +1190,15 @@ U32U64 IREmitter::INeg(const U32U64& value) {
}
}
U32 IREmitter::IAbs(const U32& value) {
return Inst<U32>(Opcode::IAbs32, value);
U32U64 IREmitter::IAbs(const U32U64& value) {
switch (value.Type()) {
case Type::U32:
return Inst<U32>(Opcode::IAbs32, value);
case Type::U64:
return Inst<U64>(Opcode::IAbs64, value);
default:
ThrowInvalidType(value.Type());
}
}
U32U64 IREmitter::ShiftLeftLogical(const U32U64& base, const U32& shift) {

5
src/shader_recompiler/frontend/ir/ir_emitter.h
View file

@ -1,3 +1,6 @@
// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project
// SPDX-License-Identifier: GPL-3.0-or-later
// SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project
// SPDX-License-Identifier: GPL-2.0-or-later
@ -218,7 +221,7 @@ public:
[[nodiscard]] U32 IMul(const U32& a, const U32& b);
[[nodiscard]] U32 IDiv(const U32& a, const U32& b, bool is_signed = false);
[[nodiscard]] U32U64 INeg(const U32U64& value);
[[nodiscard]] U32 IAbs(const U32& value);
[[nodiscard]] U32U64 IAbs(const U32U64& value);
[[nodiscard]] U32U64 ShiftLeftLogical(const U32U64& base, const U32& shift);
[[nodiscard]] U32U64 ShiftRightLogical(const U32U64& base, const U32& shift);
[[nodiscard]] U32U64 ShiftRightArithmetic(const U32U64& base, const U32& shift);

1
src/shader_recompiler/frontend/ir/opcodes.inc
View file

@ -296,6 +296,7 @@ OPCODE(UDiv32, U32, U32,
OPCODE(INeg32, U32, U32, )
OPCODE(INeg64, U64, U64, )
OPCODE(IAbs32, U32, U32, )
OPCODE(IAbs64, U64, U64, )
OPCODE(ShiftLeftLogical32, U32, U32, U32, )
OPCODE(ShiftLeftLogical64, U64, U64, U32, )
OPCODE(ShiftRightLogical32, U32, U32, U32, )

30
src/shader_recompiler/frontend/maxwell/translate/impl/integer_floating_point_conversion.cpp
View file

@ -70,32 +70,25 @@ void I2F(TranslatorVisitor& v, u64 insn, IR::U32U64 src) {
int src_bitsize{};
switch (i2f.int_format) {
case IntFormat::U8:
src = v.ir.BitFieldExtract(src, v.ir.Imm32(static_cast<u32>(i2f.selector) * 8),
v.ir.Imm32(8), is_signed);
if (i2f.abs != 0) {
src = v.ir.BitFieldExtract(src, v.ir.Imm32(u32(i2f.selector) * 8), v.ir.Imm32(8), is_signed);
if (i2f.abs != 0)
src = SmallAbs(v, src, 8);
}
src_bitsize = 8;
break;
case IntFormat::U16:
if (i2f.selector == 1 || i2f.selector == 3) {
if (i2f.selector == 1 || i2f.selector == 3)
throw NotImplementedException("Invalid U16 selector {}", i2f.selector.Value());
}
src = v.ir.BitFieldExtract(src, v.ir.Imm32(static_cast<u32>(i2f.selector) * 8),
v.ir.Imm32(16), is_signed);
if (i2f.abs != 0) {
src = v.ir.BitFieldExtract(src, v.ir.Imm32(u32(i2f.selector) * 8), v.ir.Imm32(16), is_signed);
if (i2f.abs != 0)
src = SmallAbs(v, src, 16);
}
src_bitsize = 16;
break;
case IntFormat::U32:
case IntFormat::U64:
if (i2f.selector != 0) {
if (i2f.selector != 0)
throw NotImplementedException("Unexpected selector {}", i2f.selector.Value());
}
if (i2f.abs != 0 && is_signed) {
if (i2f.abs != 0 && is_signed)
src = v.ir.IAbs(src);
}
src_bitsize = i2f.int_format == IntFormat::U64 ? 64 : 32;
break;
}
@ -106,9 +99,7 @@ void I2F(TranslatorVisitor& v, u64 insn, IR::U32U64 src) {
.rounding = CastFpRounding(i2f.fp_rounding),
.fmz_mode = IR::FmzMode::DontCare,
};
auto value{v.ir.ConvertIToF(static_cast<size_t>(dst_bitsize),
static_cast<size_t>(conversion_src_bitsize), is_signed, src,
fp_control)};
auto value{v.ir.ConvertIToF(size_t(dst_bitsize), size_t(conversion_src_bitsize), is_signed, src, fp_control)};
if (i2f.neg != 0) {
if (i2f.abs != 0 || !is_signed) {
// We know the value is positive
@ -141,9 +132,8 @@ void I2F(TranslatorVisitor& v, u64 insn, IR::U32U64 src) {
throw NotImplementedException("Unaligned destination {}", i2f.dest_reg.Value());
}
const IR::Value vector{v.ir.UnpackDouble2x32(value)};
for (int i = 0; i < 2; ++i) {
v.X(i2f.dest_reg + i, IR::U32{v.ir.CompositeExtract(vector, static_cast<size_t>(i))});
}
for (int i = 0; i < 2; ++i)
v.X(i2f.dest_reg + i, IR::U32{v.ir.CompositeExtract(vector, size_t(i))});
break;
}
default: