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Revert "[spv, vk, qcom] SFC 1 x 2 + SPVE."

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This commit is contained in:
CamilleLaVey 2025-12-25 23:05:14 -04:00 • committed by lizzie
parent b71098e450
commit 0ca4dae203
7 changed files with 5 additions and 269 deletions
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64
src/shader_recompiler/backend/spirv/emit_spirv.cpp
View file

@ -392,69 +392,6 @@ void SetupSignedNanCapabilities(const Profile& profile, const IR::Program& progr
}
}
void SetupRoundingMode(const Profile& profile, const IR::Program& program, EmitContext& ctx,
Id main_func) {
const auto& info = program.info;
// If no rounding modes used, nothing to do.
if (!info.uses_fp16_rounding_rte && !info.uses_fp16_rounding_rtz &&
!info.uses_fp32_rounding_rte && !info.uses_fp32_rounding_rtz &&
!info.uses_fp64_rounding_rte && !info.uses_fp64_rounding_rtz) {
return;
}
// Capability is required whenever any rounding mode is emitted.
ctx.AddCapability(spv::Capability::FPRoundingMode);
// FP16
if (info.uses_fp16_rounding_rte) {
if (profile.support_shader_rounding_rte_f16) {
ctx.AddExecutionMode(main_func, spv::ExecutionMode::RoundingModeRTE, 16U);
} else {
LOG_DEBUG(Shader_SPIRV, "Fp16 RTE rounding used in shader without host support");
}
}
if (info.uses_fp16_rounding_rtz) {
if (profile.support_shader_rounding_rtz_f16) {
ctx.AddExecutionMode(main_func, spv::ExecutionMode::RoundingModeRTZ, 16U);
} else {
LOG_DEBUG(Shader_SPIRV, "Fp16 RTZ rounding used in shader without host support");
}
}
// FP32
if (info.uses_fp32_rounding_rte) {
if (profile.support_shader_rounding_rte_f32) {
ctx.AddExecutionMode(main_func, spv::ExecutionMode::RoundingModeRTE, 32U);
} else {
LOG_DEBUG(Shader_SPIRV, "Fp32 RTE rounding used in shader without host support");
}
}
if (info.uses_fp32_rounding_rtz) {
if (profile.support_shader_rounding_rtz_f32) {
ctx.AddExecutionMode(main_func, spv::ExecutionMode::RoundingModeRTZ, 32U);
} else {
LOG_DEBUG(Shader_SPIRV, "Fp32 RTZ rounding used in shader without host support");
}
}
// FP64
if (info.uses_fp64_rounding_rte) {
if (profile.support_shader_rounding_rte_f64) {
ctx.AddExecutionMode(main_func, spv::ExecutionMode::RoundingModeRTE, 64U);
} else {
LOG_DEBUG(Shader_SPIRV, "Fp64 RTE rounding used in shader without host support");
}
}
if (info.uses_fp64_rounding_rtz) {
if (profile.support_shader_rounding_rtz_f64) {
ctx.AddExecutionMode(main_func, spv::ExecutionMode::RoundingModeRTZ, 64U);
} else {
LOG_DEBUG(Shader_SPIRV, "Fp64 RTZ rounding used in shader without host support");
}
}
}
void SetupTransformFeedbackCapabilities(EmitContext& ctx, Id main_func) {
if (ctx.runtime_info.xfb_count == 0) {
return;
@ -572,7 +509,6 @@ std::vector<u32> EmitSPIRV(const Profile& profile, const RuntimeInfo& runtime_in
ctx.AddExtension("SPV_KHR_float_controls");
SetupDenormControl(profile, program, ctx, main);
SetupSignedNanCapabilities(profile, program, ctx, main);
SetupRoundingMode(profile, program, ctx, main);
}
SetupCapabilities(profile, program.info, ctx);
SetupTransformFeedbackCapabilities(ctx, main);

125
src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp
View file

@ -790,133 +790,8 @@ void VisitFpModifiers(Info& info, IR::Inst& inst) {
info.uses_fp16_denorms_preserve = true;
break;
}
switch (control.rounding) {
case IR::FpRounding::DontCare:
break;
case IR::FpRounding::RN:
info.uses_fp16_rounding_rte = true;
break;
case IR::FpRounding::RZ:
info.uses_fp16_rounding_rtz = true;
break;
default:
break;
}
break;
}
...
case IR::Opcode::FPAdd32:
case IR::Opcode::FPFma32:
case IR::Opcode::FPMul32:
case IR::Opcode::FPRoundEven32:
case IR::Opcode::FPFloor32:
case IR::Opcode::FPCeil32:
case IR::Opcode::FPTrunc32:
case IR::Opcode::FPOrdEqual32:
case IR::Opcode::FPUnordEqual32:
case IR::Opcode::FPOrdNotEqual32:
case IR::Opcode::FPUnordNotEqual32:
case IR::Opcode::FPOrdLessThan32:
case IR::Opcode::FPUnordLessThan32:
case IR::Opcode::FPOrdGreaterThan32:
case IR::Opcode::FPUnordGreaterThan32:
case IR::Opcode::FPOrdLessThanEqual32:
case IR::Opcode::FPUnordLessThanEqual32:
case IR::Opcode::FPOrdGreaterThanEqual32:
case IR::Opcode::FPUnordGreaterThanEqual32:
case IR::Opcode::ConvertF16F32:
case IR::Opcode::ConvertF64F32: {
const auto control{inst.Flags<IR::FpControl>()};
switch (control.fmz_mode) {
case IR::FmzMode::DontCare:
break;
case IR::FmzMode::FTZ:
case IR::FmzMode::FMZ:
info.uses_fp32_denorms_flush = true;
break;
case IR::FmzMode::None:
info.uses_fp32_denorms_preserve = true;
break;
}
switch (control.rounding) {
case IR::FpRounding::DontCare:
break;
case IR::FpRounding::RN:
info.uses_fp32_rounding_rte = true;
break;
case IR::FpRounding::RZ:
info.uses_fp32_rounding_rtz = true;
break;
default:
break;
}
break;
}
...
case IR::Opcode::FPAdd64:
case IR::Opcode::FPCeil64:
case IR::Opcode::FPFloor64:
case IR::Opcode::FPFma64:
case IR::Opcode::FPMax64:
case IR::Opcode::FPMin64:
case IR::Opcode::FPMul64:
case IR::Opcode::FPNeg64:
case IR::Opcode::FPRecip64:
case IR::Opcode::FPRecipSqrt64:
case IR::Opcode::FPRoundEven64:
case IR::Opcode::FPSaturate64:
case IR::Opcode::FPClamp64:
case IR::Opcode::FPTrunc64:
case IR::Opcode::FPOrdEqual64:
case IR::Opcode::FPUnordEqual64:
case IR::Opcode::FPOrdNotEqual64:
case IR::Opcode::FPUnordNotEqual64:
case IR::Opcode::FPOrdLessThan64:
case IR::Opcode::FPUnordLessThan64:
case IR::Opcode::FPOrdGreaterThan64:
case IR::Opcode::FPUnordGreaterThan64:
case IR::Opcode::FPOrdLessThanEqual64:
case IR::Opcode::FPUnordLessThanEqual64:
case IR::Opcode::FPOrdGreaterThanEqual64:
case IR::Opcode::FPUnordGreaterThanEqual64:
case IR::Opcode::FPIsNan64:
case IR::Opcode::ConvertS16F64:
case IR::Opcode::ConvertS32F64:
case IR::Opcode::ConvertS64F64:
case IR::Opcode::ConvertU16F64:
case IR::Opcode::ConvertU32F64:
case IR::Opcode::ConvertU64F64:
case IR::Opcode::ConvertF32F64:
case IR::Opcode::ConvertF64F32:
case IR::Opcode::ConvertF64S8:
case IR::Opcode::ConvertF64S16:
case IR::Opcode::ConvertF64S32:
case IR::Opcode::ConvertF64S64:
case IR::Opcode::ConvertF64U8:
case IR::Opcode::ConvertF64U16:
case IR::Opcode::ConvertF64U32:
case IR::Opcode::ConvertF64U64:
info.uses_fp64 = true;
{
const auto control{inst.Flags<IR::FpControl>()};
switch (control.rounding) {
case IR::FpRounding::DontCare:
break;
case IR::FpRounding::RN:
info.uses_fp64_rounding_rte = true;
break;
case IR::FpRounding::RZ:
info.uses_fp64_rounding_rtz = true;
break;
default:
break;
}
}
break;
case IR::Opcode::FPAdd32:
case IR::Opcode::FPFma32:
case IR::Opcode::FPMul32:

11
src/shader_recompiler/profile.h
View file

@ -22,19 +22,8 @@ struct Profile {
bool support_int64{};
bool support_vertex_instance_id{};
bool support_float_controls{};
bool support_float_controls2{};
bool support_separate_denorm_behavior{};
bool support_separate_rounding_mode{};
/* Shader rounding mode support (SPV_KHR_float_controls floating rounding modes).
* These are set from VkPhysicalDeviceFloatControlsProperties/KHR/2KHR fields. */
bool support_shader_rounding_rte_f16{};
bool support_shader_rounding_rte_f32{};
bool support_shader_rounding_rte_f64{};
bool support_shader_rounding_rtz_f16{};
bool support_shader_rounding_rtz_f32{};
bool support_shader_rounding_rtz_f64{};
bool support_fp16_denorm_preserve{};
bool support_fp32_denorm_preserve{};
bool support_fp16_denorm_flush{};

8
src/shader_recompiler/shader_info.h
View file

@ -290,14 +290,6 @@ struct Info {
bool uses_fp16_denorms_preserve{};
bool uses_fp32_denorms_flush{};
bool uses_fp32_denorms_preserve{};
/* Rounding mode usage detected in shader IR (set during analysis). */
bool uses_fp16_rounding_rte{};
bool uses_fp16_rounding_rtz{};
bool uses_fp32_rounding_rte{};
bool uses_fp32_rounding_rtz{};
bool uses_fp64_rounding_rte{};
bool uses_fp64_rounding_rtz{};
bool uses_int8{};
bool uses_int16{};
bool uses_int64{};